bmc150_magn.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Bosch BMC150 three-axis magnetic field sensor driver
   4 *
   5 * Copyright (c) 2015, Intel Corporation.
   6 *
   7 * This code is based on bmm050_api.c authored by contact@bosch.sensortec.com:
   8 *
   9 * (C) Copyright 2011~2014 Bosch Sensortec GmbH All Rights Reserved
  10 */
  11
  12#include <linux/module.h>
  13#include <linux/i2c.h>
  14#include <linux/interrupt.h>
  15#include <linux/delay.h>
  16#include <linux/slab.h>
  17#include <linux/pm.h>
  18#include <linux/pm_runtime.h>
  19#include <linux/iio/iio.h>
  20#include <linux/iio/sysfs.h>
  21#include <linux/iio/buffer.h>
  22#include <linux/iio/events.h>
  23#include <linux/iio/trigger.h>
  24#include <linux/iio/trigger_consumer.h>
  25#include <linux/iio/triggered_buffer.h>
  26#include <linux/regmap.h>
  27#include <linux/regulator/consumer.h>
  28
  29#include "bmc150_magn.h"
  30
  31#define BMC150_MAGN_REG_CHIP_ID			0x40
  32#define BMC150_MAGN_CHIP_ID_VAL			0x32
  33
  34#define BMC150_MAGN_REG_X_L			0x42
  35#define BMC150_MAGN_REG_X_M			0x43
  36#define BMC150_MAGN_REG_Y_L			0x44
  37#define BMC150_MAGN_REG_Y_M			0x45
  38#define BMC150_MAGN_SHIFT_XY_L			3
  39#define BMC150_MAGN_REG_Z_L			0x46
  40#define BMC150_MAGN_REG_Z_M			0x47
  41#define BMC150_MAGN_SHIFT_Z_L			1
  42#define BMC150_MAGN_REG_RHALL_L			0x48
  43#define BMC150_MAGN_REG_RHALL_M			0x49
  44#define BMC150_MAGN_SHIFT_RHALL_L		2
  45
  46#define BMC150_MAGN_REG_INT_STATUS		0x4A
  47
  48#define BMC150_MAGN_REG_POWER			0x4B
  49#define BMC150_MAGN_MASK_POWER_CTL		BIT(0)
  50
  51#define BMC150_MAGN_REG_OPMODE_ODR		0x4C
  52#define BMC150_MAGN_MASK_OPMODE			GENMASK(2, 1)
  53#define BMC150_MAGN_SHIFT_OPMODE		1
  54#define BMC150_MAGN_MODE_NORMAL			0x00
  55#define BMC150_MAGN_MODE_FORCED			0x01
  56#define BMC150_MAGN_MODE_SLEEP			0x03
  57#define BMC150_MAGN_MASK_ODR			GENMASK(5, 3)
  58#define BMC150_MAGN_SHIFT_ODR			3
  59
  60#define BMC150_MAGN_REG_INT			0x4D
  61
  62#define BMC150_MAGN_REG_INT_DRDY		0x4E
  63#define BMC150_MAGN_MASK_DRDY_EN		BIT(7)
  64#define BMC150_MAGN_SHIFT_DRDY_EN		7
  65#define BMC150_MAGN_MASK_DRDY_INT3		BIT(6)
  66#define BMC150_MAGN_MASK_DRDY_Z_EN		BIT(5)
  67#define BMC150_MAGN_MASK_DRDY_Y_EN		BIT(4)
  68#define BMC150_MAGN_MASK_DRDY_X_EN		BIT(3)
  69#define BMC150_MAGN_MASK_DRDY_DR_POLARITY	BIT(2)
  70#define BMC150_MAGN_MASK_DRDY_LATCHING		BIT(1)
  71#define BMC150_MAGN_MASK_DRDY_INT3_POLARITY	BIT(0)
  72
  73#define BMC150_MAGN_REG_LOW_THRESH		0x4F
  74#define BMC150_MAGN_REG_HIGH_THRESH		0x50
  75#define BMC150_MAGN_REG_REP_XY			0x51
  76#define BMC150_MAGN_REG_REP_Z			0x52
  77#define BMC150_MAGN_REG_REP_DATAMASK		GENMASK(7, 0)
  78
  79#define BMC150_MAGN_REG_TRIM_START		0x5D
  80#define BMC150_MAGN_REG_TRIM_END		0x71
  81
  82#define BMC150_MAGN_XY_OVERFLOW_VAL		-4096
  83#define BMC150_MAGN_Z_OVERFLOW_VAL		-16384
  84
  85/* Time from SUSPEND to SLEEP */
  86#define BMC150_MAGN_START_UP_TIME_MS		3
  87
  88#define BMC150_MAGN_AUTO_SUSPEND_DELAY_MS	2000
  89
  90#define BMC150_MAGN_REGVAL_TO_REPXY(regval) (((regval) * 2) + 1)
  91#define BMC150_MAGN_REGVAL_TO_REPZ(regval) ((regval) + 1)
  92#define BMC150_MAGN_REPXY_TO_REGVAL(rep) (((rep) - 1) / 2)
  93#define BMC150_MAGN_REPZ_TO_REGVAL(rep) ((rep) - 1)
  94
  95enum bmc150_magn_axis {
  96	AXIS_X,
  97	AXIS_Y,
  98	AXIS_Z,
  99	RHALL,
 100	AXIS_XYZ_MAX = RHALL,
 101	AXIS_XYZR_MAX,
 102};
 103
 104enum bmc150_magn_power_modes {
 105	BMC150_MAGN_POWER_MODE_SUSPEND,
 106	BMC150_MAGN_POWER_MODE_SLEEP,
 107	BMC150_MAGN_POWER_MODE_NORMAL,
 108};
 109
 110struct bmc150_magn_trim_regs {
 111	s8 x1;
 112	s8 y1;
 113	__le16 reserved1;
 114	u8 reserved2;
 115	__le16 z4;
 116	s8 x2;
 117	s8 y2;
 118	__le16 reserved3;
 119	__le16 z2;
 120	__le16 z1;
 121	__le16 xyz1;
 122	__le16 z3;
 123	s8 xy2;
 124	u8 xy1;
 125} __packed;
 126
 127struct bmc150_magn_data {
 128	struct device *dev;
 129	/*
 130	 * 1. Protect this structure.
 131	 * 2. Serialize sequences that power on/off the device and access HW.
 132	 */
 133	struct mutex mutex;
 134	struct regmap *regmap;
 135	struct regulator_bulk_data regulators[2];
 136	struct iio_mount_matrix orientation;
 137	/* Ensure timestamp is naturally aligned */
 138	struct {
 139		s32 chans[3];
 140		aligned_s64 timestamp;
 141	} scan;
 142	struct iio_trigger *dready_trig;
 143	bool dready_trigger_on;
 144	int max_odr;
 145	int irq;
 146};
 147
 148static const struct {
 149	int freq;
 150	u8 reg_val;
 151} bmc150_magn_samp_freq_table[] = { {2, 0x01},
 152				    {6, 0x02},
 153				    {8, 0x03},
 154				    {10, 0x00},
 155				    {15, 0x04},
 156				    {20, 0x05},
 157				    {25, 0x06},
 158				    {30, 0x07} };
 159
 160enum bmc150_magn_presets {
 161	LOW_POWER_PRESET,
 162	REGULAR_PRESET,
 163	ENHANCED_REGULAR_PRESET,
 164	HIGH_ACCURACY_PRESET
 165};
 166
 167static const struct bmc150_magn_preset {
 168	u8 rep_xy;
 169	u8 rep_z;
 170	u8 odr;
 171} bmc150_magn_presets_table[] = {
 172	[LOW_POWER_PRESET] = {3, 3, 10},
 173	[REGULAR_PRESET] =  {9, 15, 10},
 174	[ENHANCED_REGULAR_PRESET] =  {15, 27, 10},
 175	[HIGH_ACCURACY_PRESET] =  {47, 83, 20},
 176};
 177
 178#define BMC150_MAGN_DEFAULT_PRESET REGULAR_PRESET
 179
 180static bool bmc150_magn_is_writeable_reg(struct device *dev, unsigned int reg)
 181{
 182	switch (reg) {
 183	case BMC150_MAGN_REG_POWER:
 184	case BMC150_MAGN_REG_OPMODE_ODR:
 185	case BMC150_MAGN_REG_INT:
 186	case BMC150_MAGN_REG_INT_DRDY:
 187	case BMC150_MAGN_REG_LOW_THRESH:
 188	case BMC150_MAGN_REG_HIGH_THRESH:
 189	case BMC150_MAGN_REG_REP_XY:
 190	case BMC150_MAGN_REG_REP_Z:
 191		return true;
 192	default:
 193		return false;
 194	}
 195}
 196
 197static bool bmc150_magn_is_volatile_reg(struct device *dev, unsigned int reg)
 198{
 199	switch (reg) {
 200	case BMC150_MAGN_REG_X_L:
 201	case BMC150_MAGN_REG_X_M:
 202	case BMC150_MAGN_REG_Y_L:
 203	case BMC150_MAGN_REG_Y_M:
 204	case BMC150_MAGN_REG_Z_L:
 205	case BMC150_MAGN_REG_Z_M:
 206	case BMC150_MAGN_REG_RHALL_L:
 207	case BMC150_MAGN_REG_RHALL_M:
 208	case BMC150_MAGN_REG_INT_STATUS:
 209		return true;
 210	default:
 211		return false;
 212	}
 213}
 214
 215const struct regmap_config bmc150_magn_regmap_config = {
 216	.reg_bits = 8,
 217	.val_bits = 8,
 218
 219	.max_register = BMC150_MAGN_REG_TRIM_END,
 220	.cache_type = REGCACHE_RBTREE,
 221
 222	.writeable_reg = bmc150_magn_is_writeable_reg,
 223	.volatile_reg = bmc150_magn_is_volatile_reg,
 224};
 225EXPORT_SYMBOL_NS(bmc150_magn_regmap_config, "IIO_BMC150_MAGN");
 226
 227static int bmc150_magn_set_power_mode(struct bmc150_magn_data *data,
 228				      enum bmc150_magn_power_modes mode,
 229				      bool state)
 230{
 231	int ret;
 232
 233	switch (mode) {
 234	case BMC150_MAGN_POWER_MODE_SUSPEND:
 235		ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_POWER,
 236					 BMC150_MAGN_MASK_POWER_CTL, !state);
 237		if (ret < 0)
 238			return ret;
 239		usleep_range(BMC150_MAGN_START_UP_TIME_MS * 1000, 20000);
 240		return 0;
 241	case BMC150_MAGN_POWER_MODE_SLEEP:
 242		return regmap_update_bits(data->regmap,
 243					  BMC150_MAGN_REG_OPMODE_ODR,
 244					  BMC150_MAGN_MASK_OPMODE,
 245					  BMC150_MAGN_MODE_SLEEP <<
 246					  BMC150_MAGN_SHIFT_OPMODE);
 247	case BMC150_MAGN_POWER_MODE_NORMAL:
 248		return regmap_update_bits(data->regmap,
 249					  BMC150_MAGN_REG_OPMODE_ODR,
 250					  BMC150_MAGN_MASK_OPMODE,
 251					  BMC150_MAGN_MODE_NORMAL <<
 252					  BMC150_MAGN_SHIFT_OPMODE);
 253	}
 254
 255	return -EINVAL;
 256}
 257
 258static int bmc150_magn_set_power_state(struct bmc150_magn_data *data, bool on)
 259{
 260	int ret = 0;
 261
 262	if (on)
 263		ret = pm_runtime_resume_and_get(data->dev);
 264	else
 265		pm_runtime_put_autosuspend(data->dev);
 266	if (ret < 0) {
 267		dev_err(data->dev,
 268			"failed to change power state to %d\n", on);
 269		return ret;
 270	}
 271
 272	return 0;
 273}
 274
 275static int bmc150_magn_get_odr(struct bmc150_magn_data *data, int *val)
 276{
 277	int ret, reg_val;
 278	u8 i, odr_val;
 279
 280	ret = regmap_read(data->regmap, BMC150_MAGN_REG_OPMODE_ODR, &reg_val);
 281	if (ret < 0)
 282		return ret;
 283	odr_val = (reg_val & BMC150_MAGN_MASK_ODR) >> BMC150_MAGN_SHIFT_ODR;
 284
 285	for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++)
 286		if (bmc150_magn_samp_freq_table[i].reg_val == odr_val) {
 287			*val = bmc150_magn_samp_freq_table[i].freq;
 288			return 0;
 289		}
 290
 291	return -EINVAL;
 292}
 293
 294static int bmc150_magn_set_odr(struct bmc150_magn_data *data, int val)
 295{
 296	int ret;
 297	u8 i;
 298
 299	for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
 300		if (bmc150_magn_samp_freq_table[i].freq == val) {
 301			ret = regmap_update_bits(data->regmap,
 302						 BMC150_MAGN_REG_OPMODE_ODR,
 303						 BMC150_MAGN_MASK_ODR,
 304						 bmc150_magn_samp_freq_table[i].
 305						 reg_val <<
 306						 BMC150_MAGN_SHIFT_ODR);
 307			if (ret < 0)
 308				return ret;
 309			return 0;
 310		}
 311	}
 312
 313	return -EINVAL;
 314}
 315
 316static int bmc150_magn_set_max_odr(struct bmc150_magn_data *data, int rep_xy,
 317				   int rep_z, int odr)
 318{
 319	int ret, reg_val, max_odr;
 320
 321	if (rep_xy <= 0) {
 322		ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
 323				  &reg_val);
 324		if (ret < 0)
 325			return ret;
 326		rep_xy = BMC150_MAGN_REGVAL_TO_REPXY(reg_val);
 327	}
 328	if (rep_z <= 0) {
 329		ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
 330				  &reg_val);
 331		if (ret < 0)
 332			return ret;
 333		rep_z = BMC150_MAGN_REGVAL_TO_REPZ(reg_val);
 334	}
 335	if (odr <= 0) {
 336		ret = bmc150_magn_get_odr(data, &odr);
 337		if (ret < 0)
 338			return ret;
 339	}
 340	/* the maximum selectable read-out frequency from datasheet */
 341	max_odr = 1000000 / (145 * rep_xy + 500 * rep_z + 980);
 342	if (odr > max_odr) {
 343		dev_err(data->dev,
 344			"Can't set oversampling with sampling freq %d\n",
 345			odr);
 346		return -EINVAL;
 347	}
 348	data->max_odr = max_odr;
 349
 350	return 0;
 351}
 352
 353static s32 bmc150_magn_compensate_x(struct bmc150_magn_trim_regs *tregs, s16 x,
 354				    u16 rhall)
 355{
 356	s16 val;
 357	u16 xyz1 = le16_to_cpu(tregs->xyz1);
 358
 359	if (x == BMC150_MAGN_XY_OVERFLOW_VAL)
 360		return S32_MIN;
 361
 362	if (!rhall)
 363		rhall = xyz1;
 364
 365	val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
 366	val = ((s16)((((s32)x) * ((((((((s32)tregs->xy2) * ((((s32)val) *
 367	      ((s32)val)) >> 7)) + (((s32)val) *
 368	      ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
 369	      ((s32)(((s16)tregs->x2) + ((s16)0xA0)))) >> 12)) >> 13)) +
 370	      (((s16)tregs->x1) << 3);
 371
 372	return (s32)val;
 373}
 374
 375static s32 bmc150_magn_compensate_y(struct bmc150_magn_trim_regs *tregs, s16 y,
 376				    u16 rhall)
 377{
 378	s16 val;
 379	u16 xyz1 = le16_to_cpu(tregs->xyz1);
 380
 381	if (y == BMC150_MAGN_XY_OVERFLOW_VAL)
 382		return S32_MIN;
 383
 384	if (!rhall)
 385		rhall = xyz1;
 386
 387	val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
 388	val = ((s16)((((s32)y) * ((((((((s32)tregs->xy2) * ((((s32)val) *
 389	      ((s32)val)) >> 7)) + (((s32)val) *
 390	      ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
 391	      ((s32)(((s16)tregs->y2) + ((s16)0xA0)))) >> 12)) >> 13)) +
 392	      (((s16)tregs->y1) << 3);
 393
 394	return (s32)val;
 395}
 396
 397static s32 bmc150_magn_compensate_z(struct bmc150_magn_trim_regs *tregs, s16 z,
 398				    u16 rhall)
 399{
 400	s32 val;
 401	u16 xyz1 = le16_to_cpu(tregs->xyz1);
 402	u16 z1 = le16_to_cpu(tregs->z1);
 403	s16 z2 = le16_to_cpu(tregs->z2);
 404	s16 z3 = le16_to_cpu(tregs->z3);
 405	s16 z4 = le16_to_cpu(tregs->z4);
 406
 407	if (z == BMC150_MAGN_Z_OVERFLOW_VAL)
 408		return S32_MIN;
 409
 410	val = (((((s32)(z - z4)) << 15) - ((((s32)z3) * ((s32)(((s16)rhall) -
 411	      ((s16)xyz1)))) >> 2)) / (z2 + ((s16)(((((s32)z1) *
 412	      ((((s16)rhall) << 1))) + (1 << 15)) >> 16))));
 413
 414	return val;
 415}
 416
 417static int bmc150_magn_read_xyz(struct bmc150_magn_data *data, s32 *buffer)
 418{
 419	int ret;
 420	__le16 values[AXIS_XYZR_MAX];
 421	s16 raw_x, raw_y, raw_z;
 422	u16 rhall;
 423	struct bmc150_magn_trim_regs tregs;
 424
 425	ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_X_L,
 426			       values, sizeof(values));
 427	if (ret < 0)
 428		return ret;
 429
 430	raw_x = (s16)le16_to_cpu(values[AXIS_X]) >> BMC150_MAGN_SHIFT_XY_L;
 431	raw_y = (s16)le16_to_cpu(values[AXIS_Y]) >> BMC150_MAGN_SHIFT_XY_L;
 432	raw_z = (s16)le16_to_cpu(values[AXIS_Z]) >> BMC150_MAGN_SHIFT_Z_L;
 433	rhall = le16_to_cpu(values[RHALL]) >> BMC150_MAGN_SHIFT_RHALL_L;
 434
 435	ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_TRIM_START,
 436			       &tregs, sizeof(tregs));
 437	if (ret < 0)
 438		return ret;
 439
 440	buffer[AXIS_X] = bmc150_magn_compensate_x(&tregs, raw_x, rhall);
 441	buffer[AXIS_Y] = bmc150_magn_compensate_y(&tregs, raw_y, rhall);
 442	buffer[AXIS_Z] = bmc150_magn_compensate_z(&tregs, raw_z, rhall);
 443
 444	return 0;
 445}
 446
 447static int bmc150_magn_read_raw(struct iio_dev *indio_dev,
 448				struct iio_chan_spec const *chan,
 449				int *val, int *val2, long mask)
 450{
 451	struct bmc150_magn_data *data = iio_priv(indio_dev);
 452	int ret, tmp;
 453	s32 values[AXIS_XYZ_MAX];
 454
 455	switch (mask) {
 456	case IIO_CHAN_INFO_RAW:
 457		if (iio_buffer_enabled(indio_dev))
 458			return -EBUSY;
 459		mutex_lock(&data->mutex);
 460
 461		ret = bmc150_magn_set_power_state(data, true);
 462		if (ret < 0) {
 463			mutex_unlock(&data->mutex);
 464			return ret;
 465		}
 466
 467		ret = bmc150_magn_read_xyz(data, values);
 468		if (ret < 0) {
 469			bmc150_magn_set_power_state(data, false);
 470			mutex_unlock(&data->mutex);
 471			return ret;
 472		}
 473		*val = values[chan->scan_index];
 474
 475		ret = bmc150_magn_set_power_state(data, false);
 476		if (ret < 0) {
 477			mutex_unlock(&data->mutex);
 478			return ret;
 479		}
 480
 481		mutex_unlock(&data->mutex);
 482		return IIO_VAL_INT;
 483	case IIO_CHAN_INFO_SCALE:
 484		/*
 485		 * The API/driver performs an off-chip temperature
 486		 * compensation and outputs x/y/z magnetic field data in
 487		 * 16 LSB/uT to the upper application layer.
 488		 */
 489		*val = 0;
 490		*val2 = 625;
 491		return IIO_VAL_INT_PLUS_MICRO;
 492	case IIO_CHAN_INFO_SAMP_FREQ:
 493		ret = bmc150_magn_get_odr(data, val);
 494		if (ret < 0)
 495			return ret;
 496		return IIO_VAL_INT;
 497	case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
 498		switch (chan->channel2) {
 499		case IIO_MOD_X:
 500		case IIO_MOD_Y:
 501			ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
 502					  &tmp);
 503			if (ret < 0)
 504				return ret;
 505			*val = BMC150_MAGN_REGVAL_TO_REPXY(tmp);
 506			return IIO_VAL_INT;
 507		case IIO_MOD_Z:
 508			ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
 509					  &tmp);
 510			if (ret < 0)
 511				return ret;
 512			*val = BMC150_MAGN_REGVAL_TO_REPZ(tmp);
 513			return IIO_VAL_INT;
 514		default:
 515			return -EINVAL;
 516		}
 517	default:
 518		return -EINVAL;
 519	}
 520}
 521
 522static int bmc150_magn_write_raw(struct iio_dev *indio_dev,
 523				 struct iio_chan_spec const *chan,
 524				 int val, int val2, long mask)
 525{
 526	struct bmc150_magn_data *data = iio_priv(indio_dev);
 527	int ret;
 528
 529	switch (mask) {
 530	case IIO_CHAN_INFO_SAMP_FREQ:
 531		if (val > data->max_odr)
 532			return -EINVAL;
 533		mutex_lock(&data->mutex);
 534		ret = bmc150_magn_set_odr(data, val);
 535		mutex_unlock(&data->mutex);
 536		return ret;
 537	case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
 538		switch (chan->channel2) {
 539		case IIO_MOD_X:
 540		case IIO_MOD_Y:
 541			if (val < 1 || val > 511)
 542				return -EINVAL;
 543			mutex_lock(&data->mutex);
 544			ret = bmc150_magn_set_max_odr(data, val, 0, 0);
 545			if (ret < 0) {
 546				mutex_unlock(&data->mutex);
 547				return ret;
 548			}
 549			ret = regmap_update_bits(data->regmap,
 550						 BMC150_MAGN_REG_REP_XY,
 551						 BMC150_MAGN_REG_REP_DATAMASK,
 552						 BMC150_MAGN_REPXY_TO_REGVAL
 553						 (val));
 554			mutex_unlock(&data->mutex);
 555			return ret;
 556		case IIO_MOD_Z:
 557			if (val < 1 || val > 256)
 558				return -EINVAL;
 559			mutex_lock(&data->mutex);
 560			ret = bmc150_magn_set_max_odr(data, 0, val, 0);
 561			if (ret < 0) {
 562				mutex_unlock(&data->mutex);
 563				return ret;
 564			}
 565			ret = regmap_update_bits(data->regmap,
 566						 BMC150_MAGN_REG_REP_Z,
 567						 BMC150_MAGN_REG_REP_DATAMASK,
 568						 BMC150_MAGN_REPZ_TO_REGVAL
 569						 (val));
 570			mutex_unlock(&data->mutex);
 571			return ret;
 572		default:
 573			return -EINVAL;
 574		}
 575	default:
 576		return -EINVAL;
 577	}
 578}
 579
 580static ssize_t bmc150_magn_show_samp_freq_avail(struct device *dev,
 581						struct device_attribute *attr,
 582						char *buf)
 583{
 584	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 585	struct bmc150_magn_data *data = iio_priv(indio_dev);
 586	size_t len = 0;
 587	u8 i;
 588
 589	for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
 590		if (bmc150_magn_samp_freq_table[i].freq > data->max_odr)
 591			break;
 592		len += scnprintf(buf + len, PAGE_SIZE - len, "%d ",
 593				 bmc150_magn_samp_freq_table[i].freq);
 594	}
 595	/* replace last space with a newline */
 596	buf[len - 1] = '\n';
 597
 598	return len;
 599}
 600
 601static const struct iio_mount_matrix *
 602bmc150_magn_get_mount_matrix(const struct iio_dev *indio_dev,
 603			      const struct iio_chan_spec *chan)
 604{
 605	struct bmc150_magn_data *data = iio_priv(indio_dev);
 606
 607	return &data->orientation;
 608}
 609
 610static const struct iio_chan_spec_ext_info bmc150_magn_ext_info[] = {
 611	IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bmc150_magn_get_mount_matrix),
 612	{ }
 613};
 614
 615static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(bmc150_magn_show_samp_freq_avail);
 616
 617static struct attribute *bmc150_magn_attributes[] = {
 618	&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
 619	NULL,
 620};
 621
 622static const struct attribute_group bmc150_magn_attrs_group = {
 623	.attrs = bmc150_magn_attributes,
 624};
 625
 626#define BMC150_MAGN_CHANNEL(_axis) {					\
 627	.type = IIO_MAGN,						\
 628	.modified = 1,							\
 629	.channel2 = IIO_MOD_##_axis,					\
 630	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |			\
 631			      BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),	\
 632	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) |	\
 633				    BIT(IIO_CHAN_INFO_SCALE),		\
 634	.scan_index = AXIS_##_axis,					\
 635	.scan_type = {							\
 636		.sign = 's',						\
 637		.realbits = 32,						\
 638		.storagebits = 32,					\
 639		.endianness = IIO_LE					\
 640	},								\
 641	.ext_info = bmc150_magn_ext_info,				\
 642}
 643
 644static const struct iio_chan_spec bmc150_magn_channels[] = {
 645	BMC150_MAGN_CHANNEL(X),
 646	BMC150_MAGN_CHANNEL(Y),
 647	BMC150_MAGN_CHANNEL(Z),
 648	IIO_CHAN_SOFT_TIMESTAMP(3),
 649};
 650
 651static const struct iio_info bmc150_magn_info = {
 652	.attrs = &bmc150_magn_attrs_group,
 653	.read_raw = bmc150_magn_read_raw,
 654	.write_raw = bmc150_magn_write_raw,
 655};
 656
 657static const unsigned long bmc150_magn_scan_masks[] = {
 658					BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
 659					0};
 660
 661static irqreturn_t bmc150_magn_trigger_handler(int irq, void *p)
 662{
 663	struct iio_poll_func *pf = p;
 664	struct iio_dev *indio_dev = pf->indio_dev;
 665	struct bmc150_magn_data *data = iio_priv(indio_dev);
 666	int ret;
 667
 668	mutex_lock(&data->mutex);
 669	ret = bmc150_magn_read_xyz(data, data->scan.chans);
 670	if (ret < 0)
 671		goto err;
 672
 673	iio_push_to_buffers_with_ts(indio_dev, &data->scan, sizeof(data->scan),
 674				    pf->timestamp);
 675
 676err:
 677	mutex_unlock(&data->mutex);
 678	iio_trigger_notify_done(indio_dev->trig);
 679
 680	return IRQ_HANDLED;
 681}
 682
 683static int bmc150_magn_init(struct bmc150_magn_data *data)
 684{
 685	int ret, chip_id;
 686	struct bmc150_magn_preset preset;
 687
 688	ret = regulator_bulk_enable(ARRAY_SIZE(data->regulators),
 689				    data->regulators);
 690	if (ret < 0) {
 691		dev_err(data->dev, "Failed to enable regulators: %d\n", ret);
 692		return ret;
 693	}
 694	/*
 695	 * 3ms power-on time according to datasheet, let's better
 696	 * be safe than sorry and set this delay to 5ms.
 697	 */
 698	msleep(5);
 699
 700	ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND,
 701					 false);
 702	if (ret < 0) {
 703		dev_err(data->dev,
 704			"Failed to bring up device from suspend mode\n");
 705		goto err_regulator_disable;
 706	}
 707
 708	ret = regmap_read(data->regmap, BMC150_MAGN_REG_CHIP_ID, &chip_id);
 709	if (ret < 0) {
 710		dev_err(data->dev, "Failed reading chip id\n");
 711		goto err_poweroff;
 712	}
 713	if (chip_id != BMC150_MAGN_CHIP_ID_VAL) {
 714		dev_err(data->dev, "Invalid chip id 0x%x\n", chip_id);
 715		ret = -ENODEV;
 716		goto err_poweroff;
 717	}
 718	dev_dbg(data->dev, "Chip id %x\n", chip_id);
 719
 720	preset = bmc150_magn_presets_table[BMC150_MAGN_DEFAULT_PRESET];
 721	ret = bmc150_magn_set_odr(data, preset.odr);
 722	if (ret < 0) {
 723		dev_err(data->dev, "Failed to set ODR to %d\n",
 724			preset.odr);
 725		goto err_poweroff;
 726	}
 727
 728	ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_XY,
 729			   BMC150_MAGN_REPXY_TO_REGVAL(preset.rep_xy));
 730	if (ret < 0) {
 731		dev_err(data->dev, "Failed to set REP XY to %d\n",
 732			preset.rep_xy);
 733		goto err_poweroff;
 734	}
 735
 736	ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_Z,
 737			   BMC150_MAGN_REPZ_TO_REGVAL(preset.rep_z));
 738	if (ret < 0) {
 739		dev_err(data->dev, "Failed to set REP Z to %d\n",
 740			preset.rep_z);
 741		goto err_poweroff;
 742	}
 743
 744	ret = bmc150_magn_set_max_odr(data, preset.rep_xy, preset.rep_z,
 745				      preset.odr);
 746	if (ret < 0)
 747		goto err_poweroff;
 748
 749	ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
 750					 true);
 751	if (ret < 0) {
 752		dev_err(data->dev, "Failed to power on device\n");
 753		goto err_poweroff;
 754	}
 755
 756	return 0;
 757
 758err_poweroff:
 759	bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
 760err_regulator_disable:
 761	regulator_bulk_disable(ARRAY_SIZE(data->regulators), data->regulators);
 762	return ret;
 763}
 764
 765static int bmc150_magn_reset_intr(struct bmc150_magn_data *data)
 766{
 767	int tmp;
 768
 769	/*
 770	 * Data Ready (DRDY) is always cleared after
 771	 * readout of data registers ends.
 772	 */
 773	return regmap_read(data->regmap, BMC150_MAGN_REG_X_L, &tmp);
 774}
 775
 776static void bmc150_magn_trig_reen(struct iio_trigger *trig)
 777{
 778	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
 779	struct bmc150_magn_data *data = iio_priv(indio_dev);
 780	int ret;
 781
 782	if (!data->dready_trigger_on)
 783		return;
 784
 785	mutex_lock(&data->mutex);
 786	ret = bmc150_magn_reset_intr(data);
 787	mutex_unlock(&data->mutex);
 788	if (ret)
 789		dev_err(data->dev, "Failed to reset interrupt\n");
 790}
 791
 792static int bmc150_magn_data_rdy_trigger_set_state(struct iio_trigger *trig,
 793						  bool state)
 794{
 795	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
 796	struct bmc150_magn_data *data = iio_priv(indio_dev);
 797	int ret = 0;
 798
 799	mutex_lock(&data->mutex);
 800	if (state == data->dready_trigger_on)
 801		goto err_unlock;
 802
 803	ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_INT_DRDY,
 804				 BMC150_MAGN_MASK_DRDY_EN,
 805				 state << BMC150_MAGN_SHIFT_DRDY_EN);
 806	if (ret < 0)
 807		goto err_unlock;
 808
 809	data->dready_trigger_on = state;
 810
 811	if (state) {
 812		ret = bmc150_magn_reset_intr(data);
 813		if (ret < 0)
 814			goto err_unlock;
 815	}
 816	mutex_unlock(&data->mutex);
 817
 818	return 0;
 819
 820err_unlock:
 821	mutex_unlock(&data->mutex);
 822	return ret;
 823}
 824
 825static const struct iio_trigger_ops bmc150_magn_trigger_ops = {
 826	.set_trigger_state = bmc150_magn_data_rdy_trigger_set_state,
 827	.reenable = bmc150_magn_trig_reen,
 828};
 829
 830static int bmc150_magn_buffer_preenable(struct iio_dev *indio_dev)
 831{
 832	struct bmc150_magn_data *data = iio_priv(indio_dev);
 833
 834	return bmc150_magn_set_power_state(data, true);
 835}
 836
 837static int bmc150_magn_buffer_postdisable(struct iio_dev *indio_dev)
 838{
 839	struct bmc150_magn_data *data = iio_priv(indio_dev);
 840
 841	return bmc150_magn_set_power_state(data, false);
 842}
 843
 844static const struct iio_buffer_setup_ops bmc150_magn_buffer_setup_ops = {
 845	.preenable = bmc150_magn_buffer_preenable,
 846	.postdisable = bmc150_magn_buffer_postdisable,
 847};
 848
 849int bmc150_magn_probe(struct device *dev, struct regmap *regmap,
 850		      int irq, const char *name)
 851{
 852	struct bmc150_magn_data *data;
 853	struct iio_dev *indio_dev;
 854	int ret;
 855
 856	indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
 857	if (!indio_dev)
 858		return -ENOMEM;
 859
 860	data = iio_priv(indio_dev);
 861	dev_set_drvdata(dev, indio_dev);
 862	data->regmap = regmap;
 863	data->irq = irq;
 864	data->dev = dev;
 865
 866	data->regulators[0].supply = "vdd";
 867	data->regulators[1].supply = "vddio";
 868	ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(data->regulators),
 869				      data->regulators);
 870	if (ret)
 871		return dev_err_probe(dev, ret, "failed to get regulators\n");
 872
 873	ret = iio_read_mount_matrix(dev, &data->orientation);
 874	if (ret)
 875		return ret;
 876
 877	mutex_init(&data->mutex);
 878
 879	ret = bmc150_magn_init(data);
 880	if (ret < 0)
 881		return ret;
 882
 883	indio_dev->channels = bmc150_magn_channels;
 884	indio_dev->num_channels = ARRAY_SIZE(bmc150_magn_channels);
 885	indio_dev->available_scan_masks = bmc150_magn_scan_masks;
 886	indio_dev->name = name;
 887	indio_dev->modes = INDIO_DIRECT_MODE;
 888	indio_dev->info = &bmc150_magn_info;
 889
 890	if (irq > 0) {
 891		data->dready_trig = devm_iio_trigger_alloc(dev,
 892							   "%s-dev%d",
 893							   indio_dev->name,
 894							   iio_device_id(indio_dev));
 895		if (!data->dready_trig) {
 896			ret = -ENOMEM;
 897			dev_err(dev, "iio trigger alloc failed\n");
 898			goto err_poweroff;
 899		}
 900
 901		data->dready_trig->ops = &bmc150_magn_trigger_ops;
 902		iio_trigger_set_drvdata(data->dready_trig, indio_dev);
 903		ret = iio_trigger_register(data->dready_trig);
 904		if (ret) {
 905			dev_err(dev, "iio trigger register failed\n");
 906			goto err_poweroff;
 907		}
 908
 909		ret = request_threaded_irq(irq,
 910					   iio_trigger_generic_data_rdy_poll,
 911					   NULL,
 912					   IRQF_TRIGGER_RISING | IRQF_ONESHOT,
 913					   "bmc150_magn_event",
 914					   data->dready_trig);
 915		if (ret < 0) {
 916			dev_err(dev, "request irq %d failed\n", irq);
 917			goto err_trigger_unregister;
 918		}
 919	}
 920
 921	ret = iio_triggered_buffer_setup(indio_dev,
 922					 iio_pollfunc_store_time,
 923					 bmc150_magn_trigger_handler,
 924					 &bmc150_magn_buffer_setup_ops);
 925	if (ret < 0) {
 926		dev_err(dev, "iio triggered buffer setup failed\n");
 927		goto err_free_irq;
 928	}
 929
 930	ret = pm_runtime_set_active(dev);
 931	if (ret)
 932		goto err_buffer_cleanup;
 933
 934	pm_runtime_enable(dev);
 935	pm_runtime_set_autosuspend_delay(dev,
 936					 BMC150_MAGN_AUTO_SUSPEND_DELAY_MS);
 937	pm_runtime_use_autosuspend(dev);
 938
 939	ret = iio_device_register(indio_dev);
 940	if (ret < 0) {
 941		dev_err(dev, "unable to register iio device\n");
 942		goto err_pm_cleanup;
 943	}
 944
 945	dev_dbg(dev, "Registered device %s\n", name);
 946	return 0;
 947
 948err_pm_cleanup:
 949	pm_runtime_dont_use_autosuspend(dev);
 950	pm_runtime_disable(dev);
 951err_buffer_cleanup:
 952	iio_triggered_buffer_cleanup(indio_dev);
 953err_free_irq:
 954	if (irq > 0)
 955		free_irq(irq, data->dready_trig);
 956err_trigger_unregister:
 957	if (data->dready_trig)
 958		iio_trigger_unregister(data->dready_trig);
 959err_poweroff:
 960	bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
 961	return ret;
 962}
 963EXPORT_SYMBOL_NS(bmc150_magn_probe, "IIO_BMC150_MAGN");
 964
 965void bmc150_magn_remove(struct device *dev)
 966{
 967	struct iio_dev *indio_dev = dev_get_drvdata(dev);
 968	struct bmc150_magn_data *data = iio_priv(indio_dev);
 969
 970	iio_device_unregister(indio_dev);
 971
 972	pm_runtime_disable(dev);
 973	pm_runtime_set_suspended(dev);
 974
 975	iio_triggered_buffer_cleanup(indio_dev);
 976
 977	if (data->irq > 0)
 978		free_irq(data->irq, data->dready_trig);
 979
 980	if (data->dready_trig)
 981		iio_trigger_unregister(data->dready_trig);
 982
 983	mutex_lock(&data->mutex);
 984	bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
 985	mutex_unlock(&data->mutex);
 986
 987	regulator_bulk_disable(ARRAY_SIZE(data->regulators), data->regulators);
 988}
 989EXPORT_SYMBOL_NS(bmc150_magn_remove, "IIO_BMC150_MAGN");
 990
 991#ifdef CONFIG_PM
 992static int bmc150_magn_runtime_suspend(struct device *dev)
 993{
 994	struct iio_dev *indio_dev = dev_get_drvdata(dev);
 995	struct bmc150_magn_data *data = iio_priv(indio_dev);
 996	int ret;
 997
 998	mutex_lock(&data->mutex);
 999	ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SLEEP,
1000					 true);
1001	mutex_unlock(&data->mutex);
1002	if (ret < 0) {
1003		dev_err(dev, "powering off device failed\n");
1004		return ret;
1005	}
1006	return 0;
1007}
1008
1009/*
1010 * Should be called with data->mutex held.
1011 */
1012static int bmc150_magn_runtime_resume(struct device *dev)
1013{
1014	struct iio_dev *indio_dev = dev_get_drvdata(dev);
1015	struct bmc150_magn_data *data = iio_priv(indio_dev);
1016
1017	return bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
1018					  true);
1019}
1020#endif
1021
1022#ifdef CONFIG_PM_SLEEP
1023static int bmc150_magn_suspend(struct device *dev)
1024{
1025	struct iio_dev *indio_dev = dev_get_drvdata(dev);
1026	struct bmc150_magn_data *data = iio_priv(indio_dev);
1027	int ret;
1028
1029	mutex_lock(&data->mutex);
1030	ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SLEEP,
1031					 true);
1032	mutex_unlock(&data->mutex);
1033
1034	return ret;
1035}
1036
1037static int bmc150_magn_resume(struct device *dev)
1038{
1039	struct iio_dev *indio_dev = dev_get_drvdata(dev);
1040	struct bmc150_magn_data *data = iio_priv(indio_dev);
1041	int ret;
1042
1043	mutex_lock(&data->mutex);
1044	ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
1045					 true);
1046	mutex_unlock(&data->mutex);
1047
1048	return ret;
1049}
1050#endif
1051
1052const struct dev_pm_ops bmc150_magn_pm_ops = {
1053	SET_SYSTEM_SLEEP_PM_OPS(bmc150_magn_suspend, bmc150_magn_resume)
1054	SET_RUNTIME_PM_OPS(bmc150_magn_runtime_suspend,
1055			   bmc150_magn_runtime_resume, NULL)
1056};
1057EXPORT_SYMBOL_NS(bmc150_magn_pm_ops, "IIO_BMC150_MAGN");
1058
1059MODULE_AUTHOR("Irina Tirdea <irina.tirdea@intel.com>");
1060MODULE_LICENSE("GPL v2");
1061MODULE_DESCRIPTION("BMC150 magnetometer core driver");