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veml6046x00.c
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linux-6.19.14/drivers/iio/light/veml6046x00.c
1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * VEML6046X00 High Accuracy RGBIR Color Sensor 4 * 5 * Copyright (c) 2025 Andreas Klinger <ak@it-klinger.de> 6 */ 7 8#include <linux/array_size.h> 9#include <linux/bitfield.h> 10#include <linux/bits.h> 11#include <linux/dev_printk.h> 12#include <linux/err.h> 13#include <linux/i2c.h> 14#include <linux/interrupt.h> 15#include <linux/module.h> 16#include <linux/mod_devicetable.h> 17#include <linux/pm_runtime.h> 18#include <linux/regmap.h> 19#include <linux/time.h> 20#include <linux/types.h> 21#include <linux/units.h> 22 23#include <asm/byteorder.h> 24 25#include <linux/iio/iio.h> 26#include <linux/iio/trigger_consumer.h> 27#include <linux/iio/triggered_buffer.h> 28 29/* 30 * Device registers 31 * Those which are accessed as bulk io are omitted 32 */ 33#define VEML6046X00_REG_CONF0 0x00 34#define VEML6046X00_REG_CONF1 0x01 35#define VEML6046X00_REG_THDH 0x04 36#define VEML6046X00_REG_THDL 0x06 37#define VEML6046X00_REG_R 0x10 38#define VEML6046X00_REG_G 0x12 39#define VEML6046X00_REG_B 0x14 40#define VEML6046X00_REG_IR 0x16 41#define VEML6046X00_REG_ID 0x18 42#define VEML6046X00_REG_INT 0x1A 43#define VEML6046X00_REG_INT_H 0x1B 44 45/* Bit masks for specific functionality */ 46#define VEML6046X00_CONF0_ON_0 BIT(0) 47#define VEML6046X00_CONF0_INT BIT(1) 48#define VEML6046X00_CONF0_AF_TRIG BIT(2) 49#define VEML6046X00_CONF0_AF BIT(3) 50#define VEML6046X00_CONF0_IT GENMASK(6, 4) 51#define VEML6046X00_CONF1_CAL BIT(0) 52#define VEML6046X00_CONF1_PERS GENMASK(2, 1) 53#define VEML6046X00_CONF1_GAIN GENMASK(4, 3) 54#define VEML6046X00_CONF1_PD_D2 BIT(6) 55#define VEML6046X00_CONF1_ON_1 BIT(7) 56#define VEML6046X00_INT_TH_H BIT(1) 57#define VEML6046X00_INT_TH_L BIT(2) 58#define VEML6046X00_INT_DRDY BIT(3) 59#define VEML6046X00_INT_MASK \ 60 (VEML6046X00_INT_TH_H | VEML6046X00_INT_TH_L | VEML6046X00_INT_DRDY) 61 62#define VEML6046X00_GAIN_1 0x0 63#define VEML6046X00_GAIN_2 0x1 64#define VEML6046X00_GAIN_0_66 0x2 65#define VEML6046X00_GAIN_0_5 0x3 66 67#define VEML6046X00_PD_2_2 0x0 68#define VEML6046X00_PD_1_2 BIT(6) 69 70/* Autosuspend delay */ 71#define VEML6046X00_AUTOSUSPEND_MS (3 * MSEC_PER_SEC) 72 73enum veml6046x00_scan { 74 VEML6046X00_SCAN_R, 75 VEML6046X00_SCAN_G, 76 VEML6046X00_SCAN_B, 77 VEML6046X00_SCAN_IR, 78 VEML6046X00_SCAN_TIMESTAMP, 79}; 80 81/** 82 * struct veml6046x00_rf - Regmap field of configuration registers. 83 * @int_en: Interrupt enable of green channel. 84 * @mode: Mode of operation. 85 * Driver uses always Active force mode. 86 * @trig: Trigger to be set in active force mode for starting 87 * measurement. 88 * @it: Integration time. 89 * @pers: Persistense - Number of threshold crossing for triggering 90 * interrupt. 91 */ 92struct veml6046x00_rf { 93 struct regmap_field *int_en; 94 struct regmap_field *mode; 95 struct regmap_field *trig; 96 struct regmap_field *it; 97 struct regmap_field *pers; 98}; 99 100/** 101 * struct veml6046x00_data - Private data of driver. 102 * @regmap: Regmap definition of sensor. 103 * @trig: Industrial-IO trigger. 104 * @rf: Regmap field of configuration. 105 */ 106struct veml6046x00_data { 107 struct regmap *regmap; 108 struct iio_trigger *trig; 109 struct veml6046x00_rf rf; 110}; 111 112/** 113 * DOC: Valid integration times (IT) 114 * 115 * static const int veml6046x00_it contains the array with valid IT. 116 * 117 * Register value to be read or written in regmap_field it on veml6046x00 is 118 * identical with array index. 119 * This means there is no separate translation table between valid integration 120 * times and register values needed. The index of the array is identical with 121 * the register value. 122 * 123 * The array is in the form as expected by the callback of the sysfs attribute 124 * integration_time_available (IIO_CHAN_INFO_INT_TIME). So there is no 125 * additional conversion needed. 126 */ 127static const int veml6046x00_it[][2] = { 128 { 0, 3125 }, 129 { 0, 6250 }, 130 { 0, 12500 }, 131 { 0, 25000 }, 132 { 0, 50000 }, 133 { 0, 100000 }, 134 { 0, 200000 }, 135 { 0, 400000 }, 136}; 137 138/** 139 * DOC: Handling of gain and photodiode size (PD) 140 * 141 * Gains here in the driver are not exactly the same as in the datasheet of the 142 * sensor. The gain in the driver is a combination of the gain of the sensor 143 * with the photodiode size (PD). 144 * The following combinations are possible: 145 * gain(driver) = gain(sensor) * PD 146 * 0.25 = x0.5 * 1/2 147 * 0.33 = x0.66 * 1/2 148 * 0.5 = x0.5 * 2/2 149 * 0.66 = x0.66 * 2/2 150 * 1 = x1 * 2/2 151 * 2 = x2 * 2/2 152 */ 153 154/** 155 * struct veml6046x00_gain_pd - Translation of gain and photodiode size (PD). 156 * @gain_sen: Gain used in the sensor as described in the datasheet of the 157 * sensor 158 * @pd: Photodiode size in the sensor 159 * 160 * This is the translation table from the gain used in the driver (and also used 161 * by the userspace interface in sysfs) to the gain and PD used in the sensor 162 * hardware. 163 * 164 * There are six gain values visible to the user (0.25 .. 2) which translate to 165 * two different gains in the sensor hardware (x0.5 .. x2) and two PD (1/2 and 166 * 2/2). Theoretical are there eight combinations, but gain values 0.5 and 1 are 167 * doubled and therefore the combination with the larger PD (2/2) is taken as 168 * more photodiode cells are supposed to deliver a more precise result. 169 */ 170struct veml6046x00_gain_pd { 171 unsigned int gain_sen; 172 unsigned int pd; 173}; 174 175static const struct veml6046x00_gain_pd veml6046x00_gain_pd[] = { 176 { .gain_sen = VEML6046X00_GAIN_0_5, .pd = VEML6046X00_PD_1_2 }, 177 { .gain_sen = VEML6046X00_GAIN_0_66, .pd = VEML6046X00_PD_1_2 }, 178 { .gain_sen = VEML6046X00_GAIN_0_5, .pd = VEML6046X00_PD_2_2 }, 179 { .gain_sen = VEML6046X00_GAIN_0_66, .pd = VEML6046X00_PD_2_2 }, 180 { .gain_sen = VEML6046X00_GAIN_1, .pd = VEML6046X00_PD_2_2 }, 181 { .gain_sen = VEML6046X00_GAIN_2, .pd = VEML6046X00_PD_2_2 }, 182}; 183 184/** 185 * DOC: Factors for calculation of lux 186 * 187 * static const int veml6046x00_it_gains contains the factors for calculation of 188 * lux. 189 * 190 * Depending on the set up integration time (IT), gain and photodiode size (PD) 191 * the measured raw values are different if the light is constant. As the gain 192 * and PD are already coupled in the driver (see &struct veml6046x00_gain_pd) 193 * there are two dimensions remaining: IT and gain(driver). 194 * 195 * The array of available factors for a certain IT are grouped together in the 196 * same form as expected by the callback of scale_available 197 * (IIO_CHAN_INFO_SCALE). 198 * 199 * Factors for lux / raw count are taken directly from the datasheet. 200 */ 201static const int veml6046x00_it_gains[][6][2] = { 202 /* integration time: 3.125 ms */ 203 { 204 { 5, 376000 }, /* gain: x0.25 */ 205 { 4, 72700 }, /* gain: x0.33 */ 206 { 2, 688000 }, /* gain: x0.5 */ 207 { 2, 36400 }, /* gain: x0.66 */ 208 { 1, 344000 }, /* gain: x1 */ 209 { 0, 672000 }, /* gain: x2 */ 210 }, 211 /* integration time: 6.25 ms */ 212 { 213 { 2, 688000 }, /* gain: x0.25 */ 214 { 2, 36350 }, /* gain: x0.33 */ 215 { 1, 344000 }, /* gain: x0.5 */ 216 { 1, 18200 }, /* gain: x0.66 */ 217 { 0, 672000 }, /* gain: x1 */ 218 { 0, 336000 }, /* gain: x2 */ 219 }, 220 /* integration time: 12.5 ms */ 221 { 222 { 1, 344000 }, /* gain: x0.25 */ 223 { 1, 18175 }, /* gain: x0.33 */ 224 { 0, 672000 }, /* gain: x0.5 */ 225 { 0, 509100 }, /* gain: x0.66 */ 226 { 0, 336000 }, /* gain: x1 */ 227 { 0, 168000 }, /* gain: x2 */ 228 }, 229 /* integration time: 25 ms */ 230 { 231 { 0, 672000 }, /* gain: x0.25 */ 232 { 0, 509087 }, /* gain: x0.33 */ 233 { 0, 336000 }, /* gain: x0.5 */ 234 { 0, 254550 }, /* gain: x0.66 */ 235 { 0, 168000 }, /* gain: x1 */ 236 { 0, 84000 }, /* gain: x2 */ 237 }, 238 /* integration time: 50 ms */ 239 { 240 { 0, 336000 }, /* gain: x0.25 */ 241 { 0, 254543 }, /* gain: x0.33 */ 242 { 0, 168000 }, /* gain: x0.5 */ 243 { 0, 127275 }, /* gain: x0.66 */ 244 { 0, 84000 }, /* gain: x1 */ 245 { 0, 42000 }, /* gain: x2 */ 246 }, 247 /* integration time: 100 ms */ 248 { 249 { 0, 168000 }, /* gain: x0.25 */ 250 { 0, 127271 }, /* gain: x0.33 */ 251 { 0, 84000 }, /* gain: x0.5 */ 252 { 0, 63637 }, /* gain: x0.66 */ 253 { 0, 42000 }, /* gain: x1 */ 254 { 0, 21000 }, /* gain: x2 */ 255 }, 256 /* integration time: 200 ms */ 257 { 258 { 0, 84000 }, /* gain: x0.25 */ 259 { 0, 63635 }, /* gain: x0.33 */ 260 { 0, 42000 }, /* gain: x0.5 */ 261 { 0, 31818 }, /* gain: x0.66 */ 262 { 0, 21000 }, /* gain: x1 */ 263 { 0, 10500 }, /* gain: x2 */ 264 }, 265 /* integration time: 400 ms */ 266 { 267 { 0, 42000 }, /* gain: x0.25 */ 268 { 0, 31817 }, /* gain: x0.33 */ 269 { 0, 21000 }, /* gain: x0.5 */ 270 { 0, 15909 }, /* gain: x0.66 */ 271 { 0, 10500 }, /* gain: x1 */ 272 { 0, 5250 }, /* gain: x2 */ 273 }, 274}; 275 276/* 277 * Two bits (RGB_ON_0 and RGB_ON_1) must be cleared to power on the device. 278 */ 279static int veml6046x00_power_on(struct veml6046x00_data *data) 280{ 281 int ret; 282 struct device *dev = regmap_get_device(data->regmap); 283 284 ret = regmap_clear_bits(data->regmap, VEML6046X00_REG_CONF0, 285 VEML6046X00_CONF0_ON_0); 286 if (ret) { 287 dev_err(dev, "Failed to set bit for power on %d\n", ret); 288 return ret; 289 } 290 291 return regmap_clear_bits(data->regmap, VEML6046X00_REG_CONF1, 292 VEML6046X00_CONF1_ON_1); 293} 294 295/* 296 * Two bits (RGB_ON_0 and RGB_ON_1) must be set to power off the device. 297 */ 298static int veml6046x00_shutdown(struct veml6046x00_data *data) 299{ 300 int ret; 301 struct device *dev = regmap_get_device(data->regmap); 302 303 ret = regmap_set_bits(data->regmap, VEML6046X00_REG_CONF0, 304 VEML6046X00_CONF0_ON_0); 305 if (ret) { 306 dev_err(dev, "Failed to set bit for shutdown %d\n", ret); 307 return ret; 308 } 309 310 return regmap_set_bits(data->regmap, VEML6046X00_REG_CONF1, 311 VEML6046X00_CONF1_ON_1); 312} 313 314static void veml6046x00_shutdown_action(void *data) 315{ 316 veml6046x00_shutdown(data); 317} 318 319static const struct iio_chan_spec veml6046x00_channels[] = { 320 { 321 .type = IIO_INTENSITY, 322 .address = VEML6046X00_REG_R, 323 .modified = 1, 324 .channel2 = IIO_MOD_LIGHT_RED, 325 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 326 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) | 327 BIT(IIO_CHAN_INFO_SCALE), 328 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) | 329 BIT(IIO_CHAN_INFO_SCALE), 330 .scan_index = VEML6046X00_SCAN_R, 331 .scan_type = { 332 .sign = 'u', 333 .realbits = 16, 334 .storagebits = 16, 335 .endianness = IIO_LE, 336 }, 337 }, 338 { 339 .type = IIO_INTENSITY, 340 .address = VEML6046X00_REG_G, 341 .modified = 1, 342 .channel2 = IIO_MOD_LIGHT_GREEN, 343 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 344 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) | 345 BIT(IIO_CHAN_INFO_SCALE), 346 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) | 347 BIT(IIO_CHAN_INFO_SCALE), 348 .scan_index = VEML6046X00_SCAN_G, 349 .scan_type = { 350 .sign = 'u', 351 .realbits = 16, 352 .storagebits = 16, 353 .endianness = IIO_LE, 354 }, 355 }, 356 { 357 .type = IIO_INTENSITY, 358 .address = VEML6046X00_REG_B, 359 .modified = 1, 360 .channel2 = IIO_MOD_LIGHT_BLUE, 361 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 362 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) | 363 BIT(IIO_CHAN_INFO_SCALE), 364 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) | 365 BIT(IIO_CHAN_INFO_SCALE), 366 .scan_index = VEML6046X00_SCAN_B, 367 .scan_type = { 368 .sign = 'u', 369 .realbits = 16, 370 .storagebits = 16, 371 .endianness = IIO_LE, 372 }, 373 }, 374 { 375 .type = IIO_INTENSITY, 376 .address = VEML6046X00_REG_IR, 377 .modified = 1, 378 .channel2 = IIO_MOD_LIGHT_IR, 379 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 380 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) | 381 BIT(IIO_CHAN_INFO_SCALE), 382 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) | 383 BIT(IIO_CHAN_INFO_SCALE), 384 .scan_index = VEML6046X00_SCAN_IR, 385 .scan_type = { 386 .sign = 'u', 387 .realbits = 16, 388 .storagebits = 16, 389 .endianness = IIO_LE, 390 }, 391 }, 392 IIO_CHAN_SOFT_TIMESTAMP(VEML6046X00_SCAN_TIMESTAMP), 393}; 394 395static const struct regmap_config veml6046x00_regmap_config = { 396 .name = "veml6046x00_regm", 397 .reg_bits = 8, 398 .val_bits = 8, 399 .max_register = VEML6046X00_REG_INT_H, 400}; 401 402static const struct reg_field veml6046x00_rf_int_en = 403 REG_FIELD(VEML6046X00_REG_CONF0, 1, 1); 404 405static const struct reg_field veml6046x00_rf_trig = 406 REG_FIELD(VEML6046X00_REG_CONF0, 2, 2); 407 408static const struct reg_field veml6046x00_rf_mode = 409 REG_FIELD(VEML6046X00_REG_CONF0, 3, 3); 410 411static const struct reg_field veml6046x00_rf_it = 412 REG_FIELD(VEML6046X00_REG_CONF0, 4, 6); 413 414static const struct reg_field veml6046x00_rf_pers = 415 REG_FIELD(VEML6046X00_REG_CONF1, 1, 2); 416 417static int veml6046x00_regfield_init(struct veml6046x00_data *data) 418{ 419 struct regmap *regmap = data->regmap; 420 struct device *dev = regmap_get_device(data->regmap); 421 struct regmap_field *rm_field; 422 struct veml6046x00_rf *rf = &data->rf; 423 424 rm_field = devm_regmap_field_alloc(dev, regmap, veml6046x00_rf_int_en); 425 if (IS_ERR(rm_field)) 426 return PTR_ERR(rm_field); 427 rf->int_en = rm_field; 428 429 rm_field = devm_regmap_field_alloc(dev, regmap, veml6046x00_rf_mode); 430 if (IS_ERR(rm_field)) 431 return PTR_ERR(rm_field); 432 rf->mode = rm_field; 433 434 rm_field = devm_regmap_field_alloc(dev, regmap, veml6046x00_rf_trig); 435 if (IS_ERR(rm_field)) 436 return PTR_ERR(rm_field); 437 rf->trig = rm_field; 438 439 rm_field = devm_regmap_field_alloc(dev, regmap, veml6046x00_rf_it); 440 if (IS_ERR(rm_field)) 441 return PTR_ERR(rm_field); 442 rf->it = rm_field; 443 444 rm_field = devm_regmap_field_alloc(dev, regmap, veml6046x00_rf_pers); 445 if (IS_ERR(rm_field)) 446 return PTR_ERR(rm_field); 447 rf->pers = rm_field; 448 449 return 0; 450} 451 452static int veml6046x00_get_it_index(struct veml6046x00_data *data) 453{ 454 int ret; 455 unsigned int reg; 456 457 ret = regmap_field_read(data->rf.it, ®); 458 if (ret) 459 return ret; 460 461 /* register value is identical with index of array */ 462 if (reg >= ARRAY_SIZE(veml6046x00_it)) 463 return -EINVAL; 464 465 return reg; 466} 467 468static int veml6046x00_get_it_usec(struct veml6046x00_data *data, unsigned int *it_usec) 469{ 470 int ret; 471 unsigned int reg; 472 473 ret = regmap_field_read(data->rf.it, ®); 474 if (ret) 475 return ret; 476 477 if (reg >= ARRAY_SIZE(veml6046x00_it)) 478 return -EINVAL; 479 480 *it_usec = veml6046x00_it[reg][1]; 481 482 return IIO_VAL_INT_PLUS_MICRO; 483} 484 485static int veml6046x00_set_it(struct iio_dev *iio, int val, int val2) 486{ 487 struct veml6046x00_data *data = iio_priv(iio); 488 unsigned int i; 489 490 for (i = 0; i < ARRAY_SIZE(veml6046x00_it); i++) { 491 if ((veml6046x00_it[i][0] == val) && 492 (veml6046x00_it[i][1] == val2)) 493 return regmap_field_write(data->rf.it, i); 494 } 495 496 return -EINVAL; 497} 498 499static int veml6046x00_get_val_gain_idx(struct veml6046x00_data *data, int val, 500 int val2) 501{ 502 unsigned int i; 503 int it_idx; 504 505 it_idx = veml6046x00_get_it_index(data); 506 if (it_idx < 0) 507 return it_idx; 508 509 for (i = 0; i < ARRAY_SIZE(veml6046x00_it_gains[it_idx]); i++) { 510 if ((veml6046x00_it_gains[it_idx][i][0] == val) && 511 (veml6046x00_it_gains[it_idx][i][1] == val2)) 512 return i; 513 } 514 515 return -EINVAL; 516} 517 518static int veml6046x00_get_gain_idx(struct veml6046x00_data *data) 519{ 520 int ret; 521 unsigned int i, reg, reg_gain, reg_pd; 522 523 ret = regmap_read(data->regmap, VEML6046X00_REG_CONF1, ®); 524 if (ret) 525 return ret; 526 527 reg_gain = FIELD_GET(VEML6046X00_CONF1_GAIN, reg); 528 reg_pd = reg & VEML6046X00_CONF1_PD_D2; 529 530 for (i = 0; i < ARRAY_SIZE(veml6046x00_gain_pd); i++) { 531 if ((veml6046x00_gain_pd[i].gain_sen == reg_gain) && 532 (veml6046x00_gain_pd[i].pd == reg_pd)) 533 return i; 534 } 535 536 return -EINVAL; 537} 538 539static int veml6046x00_set_scale(struct iio_dev *iio, int val, int val2) 540{ 541 struct veml6046x00_data *data = iio_priv(iio); 542 unsigned int new_scale; 543 int gain_idx; 544 545 gain_idx = veml6046x00_get_val_gain_idx(data, val, val2); 546 if (gain_idx < 0) 547 return gain_idx; 548 549 new_scale = FIELD_PREP(VEML6046X00_CONF1_GAIN, 550 veml6046x00_gain_pd[gain_idx].gain_sen) | 551 veml6046x00_gain_pd[gain_idx].pd; 552 553 return regmap_update_bits(data->regmap, VEML6046X00_REG_CONF1, 554 VEML6046X00_CONF1_GAIN | 555 VEML6046X00_CONF1_PD_D2, 556 new_scale); 557} 558 559static int veml6046x00_get_scale(struct veml6046x00_data *data, 560 int *val, int *val2) 561{ 562 int gain_idx, it_idx; 563 564 gain_idx = veml6046x00_get_gain_idx(data); 565 if (gain_idx < 0) 566 return gain_idx; 567 568 it_idx = veml6046x00_get_it_index(data); 569 if (it_idx < 0) 570 return it_idx; 571 572 *val = veml6046x00_it_gains[it_idx][gain_idx][0]; 573 *val2 = veml6046x00_it_gains[it_idx][gain_idx][1]; 574 575 return IIO_VAL_INT_PLUS_MICRO; 576} 577 578/** 579 * veml6046x00_read_data_ready() - Read data ready bit 580 * @data: Private data. 581 * 582 * Helper function for reading data ready bit from interrupt register. 583 * 584 * Return: 585 * * %1 - Data is available (AF_DATA_READY is set) 586 * * %0 - No data available 587 * * %-EIO - Error during bulk read 588 */ 589static int veml6046x00_read_data_ready(struct veml6046x00_data *data) 590{ 591 struct device *dev = regmap_get_device(data->regmap); 592 int ret; 593 u8 reg[2]; 594 595 /* 596 * Note from the vendor, but not explicitly in the datasheet: we 597 * should always read both registers together. 598 */ 599 ret = regmap_bulk_read(data->regmap, VEML6046X00_REG_INT, 600 ®, sizeof(reg)); 601 if (ret) { 602 dev_err(dev, "Failed to read interrupt register %d\n", ret); 603 return -EIO; 604 } 605 606 if (reg[1] & VEML6046X00_INT_DRDY) 607 return 1; 608 609 return 0; 610} 611 612/** 613 * veml6046x00_wait_data_available() - Wait until data is available 614 * @iio: Industrial IO. 615 * @usecs: Microseconds to wait for data. 616 * 617 * This function waits for a certain bit in the interrupt register which signals 618 * that there is data to be read available. 619 * 620 * It tries it two times with a waiting time of usecs in between. 621 * 622 * Return: 623 * * %1 - Data is available (AF_DATA_READY is set) 624 * * %0 - Timeout, no data available after usecs timeout 625 * * %-EIO - Error during bulk read 626 */ 627static int veml6046x00_wait_data_available(struct iio_dev *iio, unsigned int usecs) 628{ 629 struct veml6046x00_data *data = iio_priv(iio); 630 int ret; 631 632 ret = veml6046x00_read_data_ready(data); 633 if (ret) 634 return ret; 635 636 fsleep(usecs); 637 return veml6046x00_read_data_ready(data); 638} 639 640static int veml6046x00_single_read(struct iio_dev *iio, 641 enum iio_modifier modifier, int *val) 642{ 643 struct veml6046x00_data *data = iio_priv(iio); 644 struct device *dev = regmap_get_device(data->regmap); 645 unsigned int addr, it_usec; 646 int ret; 647 __le16 reg; 648 649 switch (modifier) { 650 case IIO_MOD_LIGHT_RED: 651 addr = VEML6046X00_REG_R; 652 break; 653 case IIO_MOD_LIGHT_GREEN: 654 addr = VEML6046X00_REG_G; 655 break; 656 case IIO_MOD_LIGHT_BLUE: 657 addr = VEML6046X00_REG_B; 658 break; 659 case IIO_MOD_LIGHT_IR: 660 addr = VEML6046X00_REG_IR; 661 break; 662 default: 663 return -EINVAL; 664 } 665 ret = pm_runtime_resume_and_get(dev); 666 if (ret) 667 return ret; 668 669 ret = veml6046x00_get_it_usec(data, &it_usec); 670 if (ret < 0) { 671 dev_err(dev, "Failed to get integration time ret: %d", ret); 672 goto out; 673 } 674 675 ret = regmap_field_write(data->rf.mode, 1); 676 if (ret) { 677 dev_err(dev, "Failed to write mode ret: %d", ret); 678 goto out; 679 } 680 681 ret = regmap_field_write(data->rf.trig, 1); 682 if (ret) { 683 dev_err(dev, "Failed to write trigger ret: %d", ret); 684 goto out; 685 } 686 687 /* integration time + 12.5 % to ensure completion */ 688 fsleep(it_usec + it_usec / 8); 689 690 ret = veml6046x00_wait_data_available(iio, it_usec * 4); 691 if (ret < 0) 692 goto out; 693 if (ret == 0) { 694 ret = -EAGAIN; 695 goto out; 696 } 697 698 if (!iio_device_claim_direct(iio)) { 699 ret = -EBUSY; 700 goto out; 701 } 702 703 ret = regmap_bulk_read(data->regmap, addr, ®, sizeof(reg)); 704 iio_device_release_direct(iio); 705 if (ret) 706 goto out; 707 708 *val = le16_to_cpu(reg); 709 710 ret = IIO_VAL_INT; 711 712out: 713 pm_runtime_put_autosuspend(dev); 714 715 return ret; 716} 717 718static int veml6046x00_read_raw(struct iio_dev *iio, 719 struct iio_chan_spec const *chan, int *val, 720 int *val2, long mask) 721{ 722 struct veml6046x00_data *data = iio_priv(iio); 723 724 switch (mask) { 725 case IIO_CHAN_INFO_RAW: 726 if (chan->type != IIO_INTENSITY) 727 return -EINVAL; 728 return veml6046x00_single_read(iio, chan->channel2, val); 729 case IIO_CHAN_INFO_INT_TIME: 730 *val = 0; 731 return veml6046x00_get_it_usec(data, val2); 732 case IIO_CHAN_INFO_SCALE: 733 return veml6046x00_get_scale(data, val, val2); 734 default: 735 return -EINVAL; 736 } 737} 738 739static int veml6046x00_read_avail(struct iio_dev *iio, 740 struct iio_chan_spec const *chan, 741 const int **vals, int *type, int *length, 742 long mask) 743{ 744 struct veml6046x00_data *data = iio_priv(iio); 745 int it_idx; 746 747 switch (mask) { 748 case IIO_CHAN_INFO_INT_TIME: 749 *vals = (int *)&veml6046x00_it; 750 *length = 2 * ARRAY_SIZE(veml6046x00_it); 751 *type = IIO_VAL_INT_PLUS_MICRO; 752 return IIO_AVAIL_LIST; 753 case IIO_CHAN_INFO_SCALE: 754 it_idx = veml6046x00_get_it_index(data); 755 if (it_idx < 0) 756 return it_idx; 757 *vals = (int *)&veml6046x00_it_gains[it_idx]; 758 *length = 2 * ARRAY_SIZE(veml6046x00_it_gains[it_idx]); 759 *type = IIO_VAL_INT_PLUS_MICRO; 760 return IIO_AVAIL_LIST; 761 default: 762 return -EINVAL; 763 } 764} 765 766static int veml6046x00_write_raw(struct iio_dev *iio, 767 struct iio_chan_spec const *chan, 768 int val, int val2, long mask) 769{ 770 switch (mask) { 771 case IIO_CHAN_INFO_INT_TIME: 772 return veml6046x00_set_it(iio, val, val2); 773 case IIO_CHAN_INFO_SCALE: 774 return veml6046x00_set_scale(iio, val, val2); 775 default: 776 return -EINVAL; 777 } 778} 779 780static const struct iio_info veml6046x00_info_no_irq = { 781 .read_raw = veml6046x00_read_raw, 782 .read_avail = veml6046x00_read_avail, 783 .write_raw = veml6046x00_write_raw, 784}; 785 786static int veml6046x00_buffer_preenable(struct iio_dev *iio) 787{ 788 struct veml6046x00_data *data = iio_priv(iio); 789 struct device *dev = regmap_get_device(data->regmap); 790 int ret; 791 792 ret = regmap_field_write(data->rf.mode, 0); 793 if (ret) { 794 dev_err(dev, "Failed to set mode %d\n", ret); 795 return ret; 796 } 797 798 ret = regmap_field_write(data->rf.trig, 0); 799 if (ret) { 800 /* 801 * no unrolling of mode as it is set appropriately with next 802 * single read. 803 */ 804 dev_err(dev, "Failed to set trigger %d\n", ret); 805 return ret; 806 } 807 808 return pm_runtime_resume_and_get(dev); 809} 810 811static int veml6046x00_buffer_postdisable(struct iio_dev *iio) 812{ 813 struct veml6046x00_data *data = iio_priv(iio); 814 struct device *dev = regmap_get_device(data->regmap); 815 int ret; 816 817 ret = regmap_field_write(data->rf.mode, 1); 818 if (ret) { 819 dev_err(dev, "Failed to set mode %d\n", ret); 820 return ret; 821 } 822 823 pm_runtime_put_autosuspend(dev); 824 825 return 0; 826} 827 828static const struct iio_buffer_setup_ops veml6046x00_buffer_setup_ops = { 829 .preenable = veml6046x00_buffer_preenable, 830 .postdisable = veml6046x00_buffer_postdisable, 831}; 832 833static irqreturn_t veml6046x00_trig_handler(int irq, void *p) 834{ 835 struct iio_poll_func *pf = p; 836 struct iio_dev *iio = pf->indio_dev; 837 struct veml6046x00_data *data = iio_priv(iio); 838 int ret; 839 struct { 840 __le16 chans[4]; 841 aligned_s64 timestamp; 842 } scan; 843 844 ret = regmap_bulk_read(data->regmap, VEML6046X00_REG_R, 845 &scan.chans, sizeof(scan.chans)); 846 if (ret) 847 goto done; 848 849 iio_push_to_buffers_with_ts(iio, &scan, sizeof(scan), 850 iio_get_time_ns(iio)); 851 852done: 853 iio_trigger_notify_done(iio->trig); 854 855 return IRQ_HANDLED; 856} 857 858static int veml6046x00_validate_part_id(struct veml6046x00_data *data) 859{ 860 struct device *dev = regmap_get_device(data->regmap); 861 unsigned int part_id; 862 int ret; 863 __le16 reg; 864 865 ret = regmap_bulk_read(data->regmap, VEML6046X00_REG_ID, 866 ®, sizeof(reg)); 867 if (ret) 868 return dev_err_probe(dev, ret, "Failed to read ID\n"); 869 870 part_id = le16_to_cpu(reg); 871 if (part_id != 0x01) 872 dev_info(dev, "Unknown ID %#04x\n", part_id); 873 874 return 0; 875} 876 877static int veml6046x00_setup_device(struct iio_dev *iio) 878{ 879 struct veml6046x00_data *data = iio_priv(iio); 880 struct device *dev = regmap_get_device(data->regmap); 881 int ret; 882 __le16 reg16; 883 884 reg16 = cpu_to_le16(VEML6046X00_CONF0_AF); 885 ret = regmap_bulk_write(data->regmap, VEML6046X00_REG_CONF0, 886 ®16, sizeof(reg16)); 887 if (ret) 888 return dev_err_probe(dev, ret, "Failed to set configuration\n"); 889 890 reg16 = cpu_to_le16(0); 891 ret = regmap_bulk_write(data->regmap, VEML6046X00_REG_THDL, 892 ®16, sizeof(reg16)); 893 if (ret) 894 return dev_err_probe(dev, ret, "Failed to set low threshold\n"); 895 896 reg16 = cpu_to_le16(U16_MAX); 897 ret = regmap_bulk_write(data->regmap, VEML6046X00_REG_THDH, 898 ®16, sizeof(reg16)); 899 if (ret) 900 return dev_err_probe(dev, ret, "Failed to set high threshold\n"); 901 902 ret = regmap_bulk_read(data->regmap, VEML6046X00_REG_INT, 903 ®16, sizeof(reg16)); 904 if (ret) 905 return dev_err_probe(dev, ret, "Failed to clear interrupts\n"); 906 907 return 0; 908} 909 910static int veml6046x00_probe(struct i2c_client *i2c) 911{ 912 struct device *dev = &i2c->dev; 913 struct veml6046x00_data *data; 914 struct iio_dev *iio; 915 struct regmap *regmap; 916 int ret; 917 918 regmap = devm_regmap_init_i2c(i2c, &veml6046x00_regmap_config); 919 if (IS_ERR(regmap)) 920 return dev_err_probe(dev, PTR_ERR(regmap), "Failed to set regmap\n"); 921 922 iio = devm_iio_device_alloc(dev, sizeof(*data)); 923 if (!iio) 924 return -ENOMEM; 925 926 data = iio_priv(iio); 927 /* struct iio_dev is retrieved via dev_get_drvdata(). */ 928 i2c_set_clientdata(i2c, iio); 929 data->regmap = regmap; 930 931 ret = veml6046x00_regfield_init(data); 932 if (ret) 933 return dev_err_probe(dev, ret, "Failed to init regfield\n"); 934 935 ret = devm_regulator_get_enable(dev, "vdd"); 936 if (ret) 937 return dev_err_probe(dev, ret, "Failed to enable regulator\n"); 938 939 /* bring device in a known state and switch device on */ 940 ret = veml6046x00_setup_device(iio); 941 if (ret < 0) 942 return ret; 943 944 ret = devm_add_action_or_reset(dev, veml6046x00_shutdown_action, data); 945 if (ret < 0) 946 return dev_err_probe(dev, ret, "Failed to add shut down action\n"); 947 948 ret = pm_runtime_set_active(dev); 949 if (ret < 0) 950 return dev_err_probe(dev, ret, "Failed to activate PM runtime\n"); 951 952 ret = devm_pm_runtime_enable(dev); 953 if (ret) 954 return dev_err_probe(dev, ret, "Failed to enable PM runtime\n"); 955 956 pm_runtime_get_noresume(dev); 957 pm_runtime_set_autosuspend_delay(dev, VEML6046X00_AUTOSUSPEND_MS); 958 pm_runtime_use_autosuspend(dev); 959 960 ret = veml6046x00_validate_part_id(data); 961 if (ret) 962 return dev_err_probe(dev, ret, "Failed to validate device ID\n"); 963 964 iio->name = "veml6046x00"; 965 iio->channels = veml6046x00_channels; 966 iio->num_channels = ARRAY_SIZE(veml6046x00_channels); 967 iio->modes = INDIO_DIRECT_MODE; 968 969 iio->info = &veml6046x00_info_no_irq; 970 971 ret = devm_iio_triggered_buffer_setup(dev, iio, NULL, 972 veml6046x00_trig_handler, 973 &veml6046x00_buffer_setup_ops); 974 if (ret) 975 return dev_err_probe(dev, ret, 976 "Failed to register triggered buffer"); 977 978 pm_runtime_put_autosuspend(dev); 979 980 ret = devm_iio_device_register(dev, iio); 981 if (ret) 982 return dev_err_probe(dev, ret, "Failed to register iio device"); 983 984 return 0; 985} 986 987static int veml6046x00_runtime_suspend(struct device *dev) 988{ 989 struct veml6046x00_data *data = iio_priv(dev_get_drvdata(dev)); 990 991 return veml6046x00_shutdown(data); 992} 993 994static int veml6046x00_runtime_resume(struct device *dev) 995{ 996 struct veml6046x00_data *data = iio_priv(dev_get_drvdata(dev)); 997 998 return veml6046x00_power_on(data); 999} 1000 1001static DEFINE_RUNTIME_DEV_PM_OPS(veml6046x00_pm_ops, 1002 veml6046x00_runtime_suspend, 1003 veml6046x00_runtime_resume, NULL); 1004 1005static const struct of_device_id veml6046x00_of_match[] = { 1006 { .compatible = "vishay,veml6046x00" }, 1007 { } 1008}; 1009MODULE_DEVICE_TABLE(of, veml6046x00_of_match); 1010 1011static const struct i2c_device_id veml6046x00_id[] = { 1012 { "veml6046x00" }, 1013 { } 1014}; 1015MODULE_DEVICE_TABLE(i2c, veml6046x00_id); 1016 1017static struct i2c_driver veml6046x00_driver = { 1018 .driver = { 1019 .name = "veml6046x00", 1020 .of_match_table = veml6046x00_of_match, 1021 .pm = pm_ptr(&veml6046x00_pm_ops), 1022 }, 1023 .probe = veml6046x00_probe, 1024 .id_table = veml6046x00_id, 1025}; 1026module_i2c_driver(veml6046x00_driver); 1027 1028MODULE_AUTHOR("Andreas Klinger <ak@it-klinger.de>"); 1029MODULE_DESCRIPTION("VEML6046X00 RGBIR Color Sensor"); 1030MODULE_LICENSE("GPL");
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