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st_uvis25_core.c
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linux-6.19.14/drivers/iio/light/st_uvis25_core.c
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * STMicroelectronics uvis25 sensor driver 4 * 5 * Copyright 2017 STMicroelectronics Inc. 6 * 7 * Lorenzo Bianconi <lorenzo.bianconi83@gmail.com> 8 */ 9 10#include <linux/kernel.h> 11#include <linux/module.h> 12#include <linux/device.h> 13#include <linux/iio/sysfs.h> 14#include <linux/delay.h> 15#include <linux/pm.h> 16#include <linux/interrupt.h> 17#include <linux/irqreturn.h> 18#include <linux/iio/trigger.h> 19#include <linux/iio/trigger_consumer.h> 20#include <linux/iio/triggered_buffer.h> 21#include <linux/iio/buffer.h> 22#include <linux/regmap.h> 23 24#include "st_uvis25.h" 25 26#define ST_UVIS25_REG_WHOAMI_ADDR 0x0f 27#define ST_UVIS25_REG_WHOAMI_VAL 0xca 28#define ST_UVIS25_REG_CTRL1_ADDR 0x20 29#define ST_UVIS25_REG_ODR_MASK BIT(0) 30#define ST_UVIS25_REG_BDU_MASK BIT(1) 31#define ST_UVIS25_REG_CTRL2_ADDR 0x21 32#define ST_UVIS25_REG_BOOT_MASK BIT(7) 33#define ST_UVIS25_REG_CTRL3_ADDR 0x22 34#define ST_UVIS25_REG_HL_MASK BIT(7) 35#define ST_UVIS25_REG_STATUS_ADDR 0x27 36#define ST_UVIS25_REG_UV_DA_MASK BIT(0) 37#define ST_UVIS25_REG_OUT_ADDR 0x28 38 39static const struct iio_chan_spec st_uvis25_channels[] = { 40 { 41 .type = IIO_UVINDEX, 42 .address = ST_UVIS25_REG_OUT_ADDR, 43 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), 44 .scan_index = 0, 45 .scan_type = { 46 .sign = 'u', 47 .realbits = 8, 48 .storagebits = 8, 49 }, 50 }, 51 IIO_CHAN_SOFT_TIMESTAMP(1), 52}; 53 54static int st_uvis25_check_whoami(struct st_uvis25_hw *hw) 55{ 56 int err, data; 57 58 err = regmap_read(hw->regmap, ST_UVIS25_REG_WHOAMI_ADDR, &data); 59 if (err < 0) { 60 dev_err(regmap_get_device(hw->regmap), 61 "failed to read whoami register\n"); 62 return err; 63 } 64 65 if (data != ST_UVIS25_REG_WHOAMI_VAL) { 66 dev_err(regmap_get_device(hw->regmap), 67 "wrong whoami {%02x vs %02x}\n", 68 data, ST_UVIS25_REG_WHOAMI_VAL); 69 return -ENODEV; 70 } 71 72 return 0; 73} 74 75static int st_uvis25_set_enable(struct st_uvis25_hw *hw, bool enable) 76{ 77 int err; 78 79 err = regmap_update_bits(hw->regmap, ST_UVIS25_REG_CTRL1_ADDR, 80 ST_UVIS25_REG_ODR_MASK, enable); 81 if (err < 0) 82 return err; 83 84 hw->enabled = enable; 85 86 return 0; 87} 88 89static int st_uvis25_read_oneshot(struct st_uvis25_hw *hw, u8 addr, int *val) 90{ 91 int err; 92 93 err = st_uvis25_set_enable(hw, true); 94 if (err < 0) 95 return err; 96 97 msleep(1500); 98 99 /* 100 * in order to avoid possible race conditions with interrupt 101 * generation, disable the sensor first and then poll output 102 * register. That sequence guarantees the interrupt will be reset 103 * when irq line is unmasked 104 */ 105 err = st_uvis25_set_enable(hw, false); 106 if (err < 0) 107 return err; 108 109 err = regmap_read(hw->regmap, addr, val); 110 111 return err < 0 ? err : IIO_VAL_INT; 112} 113 114static int st_uvis25_read_raw(struct iio_dev *iio_dev, 115 struct iio_chan_spec const *ch, 116 int *val, int *val2, long mask) 117{ 118 int ret; 119 120 if (!iio_device_claim_direct(iio_dev)) 121 return -EBUSY; 122 123 switch (mask) { 124 case IIO_CHAN_INFO_PROCESSED: { 125 struct st_uvis25_hw *hw = iio_priv(iio_dev); 126 127 /* 128 * mask irq line during oneshot read since the sensor 129 * does not export the capability to disable data-ready line 130 * in the register map and it is enabled by default. 131 * If the line is unmasked during read_raw() it will be set 132 * active and never reset since the trigger is disabled 133 */ 134 if (hw->irq > 0) 135 disable_irq(hw->irq); 136 ret = st_uvis25_read_oneshot(hw, ch->address, val); 137 if (hw->irq > 0) 138 enable_irq(hw->irq); 139 break; 140 } 141 default: 142 ret = -EINVAL; 143 break; 144 } 145 146 iio_device_release_direct(iio_dev); 147 148 return ret; 149} 150 151static irqreturn_t st_uvis25_trigger_handler_thread(int irq, void *private) 152{ 153 struct st_uvis25_hw *hw = private; 154 int err, status; 155 156 err = regmap_read(hw->regmap, ST_UVIS25_REG_STATUS_ADDR, &status); 157 if (err < 0) 158 return IRQ_HANDLED; 159 160 if (!(status & ST_UVIS25_REG_UV_DA_MASK)) 161 return IRQ_NONE; 162 163 iio_trigger_poll_nested(hw->trig); 164 165 return IRQ_HANDLED; 166} 167 168static int st_uvis25_allocate_trigger(struct iio_dev *iio_dev) 169{ 170 struct st_uvis25_hw *hw = iio_priv(iio_dev); 171 struct device *dev = regmap_get_device(hw->regmap); 172 bool irq_active_low = false; 173 unsigned long irq_type; 174 int err; 175 176 irq_type = irq_get_trigger_type(hw->irq); 177 switch (irq_type) { 178 case IRQF_TRIGGER_HIGH: 179 case IRQF_TRIGGER_RISING: 180 break; 181 case IRQF_TRIGGER_LOW: 182 case IRQF_TRIGGER_FALLING: 183 irq_active_low = true; 184 break; 185 default: 186 dev_info(dev, "mode %lx unsupported\n", irq_type); 187 return -EINVAL; 188 } 189 190 err = regmap_update_bits(hw->regmap, ST_UVIS25_REG_CTRL3_ADDR, 191 ST_UVIS25_REG_HL_MASK, irq_active_low); 192 if (err < 0) 193 return err; 194 195 err = devm_request_threaded_irq(dev, hw->irq, NULL, 196 st_uvis25_trigger_handler_thread, 197 irq_type | IRQF_ONESHOT, 198 iio_dev->name, hw); 199 if (err) { 200 dev_err(dev, "failed to request trigger irq %d\n", 201 hw->irq); 202 return err; 203 } 204 205 hw->trig = devm_iio_trigger_alloc(dev, "%s-trigger", 206 iio_dev->name); 207 if (!hw->trig) 208 return -ENOMEM; 209 210 iio_trigger_set_drvdata(hw->trig, iio_dev); 211 212 return devm_iio_trigger_register(dev, hw->trig); 213} 214 215static int st_uvis25_buffer_preenable(struct iio_dev *iio_dev) 216{ 217 return st_uvis25_set_enable(iio_priv(iio_dev), true); 218} 219 220static int st_uvis25_buffer_postdisable(struct iio_dev *iio_dev) 221{ 222 return st_uvis25_set_enable(iio_priv(iio_dev), false); 223} 224 225static const struct iio_buffer_setup_ops st_uvis25_buffer_ops = { 226 .preenable = st_uvis25_buffer_preenable, 227 .postdisable = st_uvis25_buffer_postdisable, 228}; 229 230static irqreturn_t st_uvis25_buffer_handler_thread(int irq, void *p) 231{ 232 struct iio_poll_func *pf = p; 233 struct iio_dev *iio_dev = pf->indio_dev; 234 struct st_uvis25_hw *hw = iio_priv(iio_dev); 235 unsigned int val; 236 int err; 237 /* Ensure timestamp is naturally aligned */ 238 struct { 239 u8 chan; 240 aligned_s64 ts; 241 } scan = { }; 242 243 244 err = regmap_read(hw->regmap, ST_UVIS25_REG_OUT_ADDR, &val); 245 if (err < 0) 246 goto out; 247 248 scan.chan = val; 249 250 iio_push_to_buffers_with_ts(iio_dev, &scan, sizeof(scan), 251 iio_get_time_ns(iio_dev)); 252 253out: 254 iio_trigger_notify_done(hw->trig); 255 256 return IRQ_HANDLED; 257} 258 259static int st_uvis25_allocate_buffer(struct iio_dev *iio_dev) 260{ 261 struct st_uvis25_hw *hw = iio_priv(iio_dev); 262 263 return devm_iio_triggered_buffer_setup(regmap_get_device(hw->regmap), 264 iio_dev, NULL, 265 st_uvis25_buffer_handler_thread, 266 &st_uvis25_buffer_ops); 267} 268 269static const struct iio_info st_uvis25_info = { 270 .read_raw = st_uvis25_read_raw, 271}; 272 273static int st_uvis25_init_sensor(struct st_uvis25_hw *hw) 274{ 275 int err; 276 277 err = regmap_update_bits(hw->regmap, ST_UVIS25_REG_CTRL2_ADDR, 278 ST_UVIS25_REG_BOOT_MASK, 1); 279 if (err < 0) 280 return err; 281 282 msleep(2000); 283 284 return regmap_update_bits(hw->regmap, ST_UVIS25_REG_CTRL1_ADDR, 285 ST_UVIS25_REG_BDU_MASK, 1); 286} 287 288int st_uvis25_probe(struct device *dev, int irq, struct regmap *regmap) 289{ 290 struct st_uvis25_hw *hw; 291 struct iio_dev *iio_dev; 292 int err; 293 294 iio_dev = devm_iio_device_alloc(dev, sizeof(*hw)); 295 if (!iio_dev) 296 return -ENOMEM; 297 298 dev_set_drvdata(dev, iio_dev); 299 300 hw = iio_priv(iio_dev); 301 hw->irq = irq; 302 hw->regmap = regmap; 303 304 err = st_uvis25_check_whoami(hw); 305 if (err < 0) 306 return err; 307 308 iio_dev->modes = INDIO_DIRECT_MODE; 309 iio_dev->channels = st_uvis25_channels; 310 iio_dev->num_channels = ARRAY_SIZE(st_uvis25_channels); 311 iio_dev->name = ST_UVIS25_DEV_NAME; 312 iio_dev->info = &st_uvis25_info; 313 314 err = st_uvis25_init_sensor(hw); 315 if (err < 0) 316 return err; 317 318 if (hw->irq > 0) { 319 err = st_uvis25_allocate_buffer(iio_dev); 320 if (err < 0) 321 return err; 322 323 err = st_uvis25_allocate_trigger(iio_dev); 324 if (err) 325 return err; 326 } 327 328 return devm_iio_device_register(dev, iio_dev); 329} 330EXPORT_SYMBOL_NS(st_uvis25_probe, "IIO_UVIS25"); 331 332static int st_uvis25_suspend(struct device *dev) 333{ 334 struct iio_dev *iio_dev = dev_get_drvdata(dev); 335 struct st_uvis25_hw *hw = iio_priv(iio_dev); 336 337 return regmap_clear_bits(hw->regmap, ST_UVIS25_REG_CTRL1_ADDR, 338 ST_UVIS25_REG_ODR_MASK); 339} 340 341static int st_uvis25_resume(struct device *dev) 342{ 343 struct iio_dev *iio_dev = dev_get_drvdata(dev); 344 struct st_uvis25_hw *hw = iio_priv(iio_dev); 345 346 if (hw->enabled) 347 return regmap_update_bits(hw->regmap, ST_UVIS25_REG_CTRL1_ADDR, 348 ST_UVIS25_REG_ODR_MASK, 1); 349 350 return 0; 351} 352 353EXPORT_NS_SIMPLE_DEV_PM_OPS(st_uvis25_pm_ops, st_uvis25_suspend, st_uvis25_resume, IIO_UVIS25); 354 355MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>"); 356MODULE_DESCRIPTION("STMicroelectronics uvis25 sensor driver"); 357MODULE_LICENSE("GPL v2");
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