apds9306.c

   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * APDS-9306/APDS-9306-065 Ambient Light Sensor
   4 * I2C Address: 0x52
   5 * Datasheet: https://docs.broadcom.com/doc/AV02-4755EN
   6 *
   7 * Copyright (C) 2024 Subhajit Ghosh <subhajit.ghosh@tweaklogic.com>
   8 */
   9
  10#include <linux/bits.h>
  11#include <linux/cleanup.h>
  12#include <linux/delay.h>
  13#include <linux/err.h>
  14#include <linux/i2c.h>
  15#include <linux/interrupt.h>
  16#include <linux/minmax.h>
  17#include <linux/module.h>
  18#include <linux/mutex.h>
  19#include <linux/pm.h>
  20#include <linux/pm_runtime.h>
  21#include <linux/regmap.h>
  22#include <linux/regulator/consumer.h>
  23#include <linux/types.h>
  24#include <linux/units.h>
  25
  26#include <linux/iio/iio.h>
  27#include <linux/iio/iio-gts-helper.h>
  28#include <linux/iio/events.h>
  29#include <linux/iio/sysfs.h>
  30
  31#include <linux/unaligned.h>
  32
  33#define APDS9306_MAIN_CTRL_REG		0x00
  34#define APDS9306_ALS_MEAS_RATE_REG	0x04
  35#define APDS9306_ALS_GAIN_REG		0x05
  36#define APDS9306_PART_ID_REG		0x06
  37#define APDS9306_MAIN_STATUS_REG	0x07
  38#define APDS9306_CLEAR_DATA_0_REG	0x0A
  39#define APDS9306_CLEAR_DATA_1_REG	0x0B
  40#define APDS9306_CLEAR_DATA_2_REG	0x0C
  41#define APDS9306_ALS_DATA_0_REG		0x0D
  42#define APDS9306_ALS_DATA_1_REG		0x0E
  43#define APDS9306_ALS_DATA_2_REG		0x0F
  44#define APDS9306_INT_CFG_REG		0x19
  45#define APDS9306_INT_PERSISTENCE_REG	0x1A
  46#define APDS9306_ALS_THRES_UP_0_REG	0x21
  47#define APDS9306_ALS_THRES_UP_1_REG	0x22
  48#define APDS9306_ALS_THRES_UP_2_REG	0x23
  49#define APDS9306_ALS_THRES_LOW_0_REG	0x24
  50#define APDS9306_ALS_THRES_LOW_1_REG	0x25
  51#define APDS9306_ALS_THRES_LOW_2_REG	0x26
  52#define APDS9306_ALS_THRES_VAR_REG	0x27
  53
  54#define APDS9306_ALS_INT_STAT_MASK	BIT(4)
  55#define APDS9306_ALS_DATA_STAT_MASK	BIT(3)
  56
  57#define APDS9306_ALS_THRES_VAL_MAX	(BIT(20) - 1)
  58#define APDS9306_ALS_THRES_VAR_NUM_VALS	8
  59#define APDS9306_ALS_PERSIST_NUM_VALS	16
  60#define APDS9306_ALS_READ_DATA_DELAY_US	(20 * USEC_PER_MSEC)
  61#define APDS9306_NUM_REPEAT_RATES	7
  62#define APDS9306_INT_SRC_CLEAR	0
  63#define APDS9306_INT_SRC_ALS	1
  64#define APDS9306_SAMP_FREQ_10HZ	0
  65
  66/**
  67 * struct part_id_gts_multiplier - Part no. and corresponding gts multiplier
  68 *
  69 * GTS (Gain Time Scale) are helper functions for Light sensors which along
  70 * with hardware gains also has gains associated with Integration times.
  71 *
  72 * There are two variants of the device with slightly different characteristics,
  73 * they have same ADC count for different Lux levels as mentioned in the
  74 * datasheet. This multiplier array is used to store the derived Lux per count
  75 * value for the two variants to be used by the GTS helper functions.
  76 *
  77 * @part_id: Part ID of the device
  78 * @max_scale_int: Multiplier for iio_init_iio_gts()
  79 * @max_scale_nano: Multiplier for iio_init_iio_gts()
  80 */
  81struct part_id_gts_multiplier {
  82	int part_id;
  83	int max_scale_int;
  84	int max_scale_nano;
  85};
  86
  87/*
  88 * As per the datasheet, at HW Gain = 3x, Integration time 100mS (32x),
  89 * typical 2000 ADC counts are observed for 49.8 uW per sq cm (340.134 lux)
  90 * for apds9306 and 43 uW per sq cm (293.69 lux) for apds9306-065.
  91 * Assuming lux per count is linear across all integration time ranges.
  92 *
  93 * Lux = (raw + offset) * scale; offset can be any value by userspace.
  94 * HG = Hardware Gain; ITG = Gain by changing integration time.
  95 * Scale table by IIO GTS Helpers = (1 / HG) * (1 / ITG) * Multiplier.
  96 *
  97 * The Lux values provided in the datasheet are at ITG=32x and HG=3x,
  98 * at typical 2000 count for both variants of the device.
  99 *
 100 * Lux per ADC count at 3x and 32x for apds9306 = 340.134 / 2000
 101 * Lux per ADC count at 3x and 32x for apds9306-065 = 293.69 / 2000
 102 *
 103 * The Multiplier for the scale table provided to userspace:
 104 * IIO GTS scale Multiplier for apds9306 = (340.134 / 2000) * 32 * 3 = 16.326432
 105 * and for apds9306-065 = (293.69 / 2000) * 32 * 3 = 14.09712
 106 */
 107static const struct part_id_gts_multiplier apds9306_gts_mul[] = {
 108	{
 109		.part_id = 0xB1,
 110		.max_scale_int = 16,
 111		.max_scale_nano = 326432000,
 112	}, {
 113		.part_id = 0xB3,
 114		.max_scale_int = 14,
 115		.max_scale_nano = 97120000,
 116	},
 117};
 118
 119static const int apds9306_repeat_rate_freq[APDS9306_NUM_REPEAT_RATES][2] = {
 120	{ 40, 0 },
 121	{ 20, 0 },
 122	{ 10, 0 },
 123	{ 5,  0 },
 124	{ 2,  0 },
 125	{ 1,  0 },
 126	{ 0,  500000 },
 127};
 128
 129static const int apds9306_repeat_rate_period[APDS9306_NUM_REPEAT_RATES] = {
 130	25000, 50000, 100000, 200000, 500000, 1000000, 2000000,
 131};
 132
 133/**
 134 * struct apds9306_regfields - apds9306 regmap fields definitions
 135 *
 136 * @sw_reset: Software reset regfield
 137 * @en: Enable regfield
 138 * @intg_time: Resolution regfield
 139 * @repeat_rate: Measurement Rate regfield
 140 * @gain: Hardware gain regfield
 141 * @int_src: Interrupt channel regfield
 142 * @int_thresh_var_en: Interrupt variance threshold regfield
 143 * @int_en: Interrupt enable regfield
 144 * @int_persist_val: Interrupt persistence regfield
 145 * @int_thresh_var_val: Interrupt threshold variance value regfield
 146 */
 147struct apds9306_regfields {
 148	struct regmap_field *sw_reset;
 149	struct regmap_field *en;
 150	struct regmap_field *intg_time;
 151	struct regmap_field *repeat_rate;
 152	struct regmap_field *gain;
 153	struct regmap_field *int_src;
 154	struct regmap_field *int_thresh_var_en;
 155	struct regmap_field *int_en;
 156	struct regmap_field *int_persist_val;
 157	struct regmap_field *int_thresh_var_val;
 158};
 159
 160/**
 161 * struct apds9306_data - apds9306 private data and registers definitions
 162 *
 163 * @dev: Pointer to the device structure
 164 * @gts: IIO Gain Time Scale structure
 165 * @mutex: Lock for protecting adc reads, device settings changes where
 166 *         some calculations are required before or after setting or
 167 *         getting the raw settings values from regmap writes or reads
 168 *         respectively.
 169 * @regmap: Regmap structure pointer
 170 * @rf: Regmap register fields structure
 171 * @nlux_per_count: Nano lux per ADC count for a particular model
 172 * @read_data_available: Flag set by IRQ handler for ADC data available
 173 */
 174struct apds9306_data {
 175	struct device *dev;
 176	struct iio_gts gts;
 177
 178	struct mutex mutex;
 179
 180	struct regmap *regmap;
 181	struct apds9306_regfields rf;
 182
 183	int nlux_per_count;
 184	int read_data_available;
 185};
 186
 187/*
 188 * Available scales with gain 1x - 18x, timings 3.125, 25, 50, 100, 200, 400 ms
 189 * Time impacts to gain: 1x, 8x, 16x, 32x, 64x, 128x
 190 */
 191#define APDS9306_GSEL_1X	0x00
 192#define APDS9306_GSEL_3X	0x01
 193#define APDS9306_GSEL_6X	0x02
 194#define APDS9306_GSEL_9X	0x03
 195#define APDS9306_GSEL_18X	0x04
 196
 197static const struct iio_gain_sel_pair apds9306_gains[] = {
 198	GAIN_SCALE_GAIN(1, APDS9306_GSEL_1X),
 199	GAIN_SCALE_GAIN(3, APDS9306_GSEL_3X),
 200	GAIN_SCALE_GAIN(6, APDS9306_GSEL_6X),
 201	GAIN_SCALE_GAIN(9, APDS9306_GSEL_9X),
 202	GAIN_SCALE_GAIN(18, APDS9306_GSEL_18X),
 203};
 204
 205#define APDS9306_MEAS_MODE_400MS	0x00
 206#define APDS9306_MEAS_MODE_200MS	0x01
 207#define APDS9306_MEAS_MODE_100MS	0x02
 208#define APDS9306_MEAS_MODE_50MS		0x03
 209#define APDS9306_MEAS_MODE_25MS		0x04
 210#define APDS9306_MEAS_MODE_3125US	0x05
 211
 212static const struct iio_itime_sel_mul apds9306_itimes[] = {
 213	GAIN_SCALE_ITIME_US(400000, APDS9306_MEAS_MODE_400MS, BIT(7)),
 214	GAIN_SCALE_ITIME_US(200000, APDS9306_MEAS_MODE_200MS, BIT(6)),
 215	GAIN_SCALE_ITIME_US(100000, APDS9306_MEAS_MODE_100MS, BIT(5)),
 216	GAIN_SCALE_ITIME_US(50000, APDS9306_MEAS_MODE_50MS, BIT(4)),
 217	GAIN_SCALE_ITIME_US(25000, APDS9306_MEAS_MODE_25MS, BIT(3)),
 218	GAIN_SCALE_ITIME_US(3125, APDS9306_MEAS_MODE_3125US, BIT(0)),
 219};
 220
 221static const struct iio_event_spec apds9306_event_spec[] = {
 222	{
 223		.type = IIO_EV_TYPE_THRESH,
 224		.dir = IIO_EV_DIR_RISING,
 225		.mask_shared_by_all = BIT(IIO_EV_INFO_VALUE),
 226	}, {
 227		.type = IIO_EV_TYPE_THRESH,
 228		.dir = IIO_EV_DIR_FALLING,
 229		.mask_shared_by_all = BIT(IIO_EV_INFO_VALUE),
 230	}, {
 231		.type = IIO_EV_TYPE_THRESH,
 232		.dir = IIO_EV_DIR_EITHER,
 233		.mask_shared_by_all = BIT(IIO_EV_INFO_PERIOD),
 234		.mask_separate = BIT(IIO_EV_INFO_ENABLE),
 235	}, {
 236		.type = IIO_EV_TYPE_THRESH_ADAPTIVE,
 237		.mask_shared_by_all = BIT(IIO_EV_INFO_VALUE) |
 238			BIT(IIO_EV_INFO_ENABLE),
 239	},
 240};
 241
 242static const struct iio_chan_spec apds9306_channels_with_events[] = {
 243	{
 244		.type = IIO_LIGHT,
 245		.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) |
 246					   BIT(IIO_CHAN_INFO_SAMP_FREQ),
 247		.info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) |
 248						     BIT(IIO_CHAN_INFO_SAMP_FREQ),
 249		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 250				      BIT(IIO_CHAN_INFO_SCALE),
 251		.info_mask_separate_available = BIT(IIO_CHAN_INFO_SCALE),
 252		.event_spec = apds9306_event_spec,
 253		.num_event_specs = ARRAY_SIZE(apds9306_event_spec),
 254	}, {
 255		.type = IIO_INTENSITY,
 256		.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) |
 257					   BIT(IIO_CHAN_INFO_SAMP_FREQ),
 258		.info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) |
 259						     BIT(IIO_CHAN_INFO_SAMP_FREQ),
 260		.channel2 = IIO_MOD_LIGHT_CLEAR,
 261		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 262		.modified = 1,
 263		.event_spec = apds9306_event_spec,
 264		.num_event_specs = ARRAY_SIZE(apds9306_event_spec),
 265	},
 266};
 267
 268static const struct iio_chan_spec apds9306_channels_without_events[] = {
 269	{
 270		.type = IIO_LIGHT,
 271		.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) |
 272					   BIT(IIO_CHAN_INFO_SAMP_FREQ),
 273		.info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) |
 274						     BIT(IIO_CHAN_INFO_SAMP_FREQ),
 275		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 276				      BIT(IIO_CHAN_INFO_SCALE),
 277		.info_mask_separate_available = BIT(IIO_CHAN_INFO_SCALE),
 278	}, {
 279		.type = IIO_INTENSITY,
 280		.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) |
 281					   BIT(IIO_CHAN_INFO_SAMP_FREQ),
 282		.info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) |
 283						     BIT(IIO_CHAN_INFO_SAMP_FREQ),
 284		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
 285		.modified = 1,
 286		.channel2 = IIO_MOD_LIGHT_CLEAR,
 287	},
 288};
 289
 290/* INT_PERSISTENCE available */
 291static IIO_CONST_ATTR(thresh_either_period_available, "[0 1 15]");
 292
 293/* ALS_THRESH_VAR available */
 294static IIO_CONST_ATTR(thresh_adaptive_either_values_available, "[0 1 7]");
 295
 296static struct attribute *apds9306_event_attributes[] = {
 297	&iio_const_attr_thresh_either_period_available.dev_attr.attr,
 298	&iio_const_attr_thresh_adaptive_either_values_available.dev_attr.attr,
 299	NULL
 300};
 301
 302static const struct attribute_group apds9306_event_attr_group = {
 303	.attrs = apds9306_event_attributes,
 304};
 305
 306static const struct regmap_range apds9306_readable_ranges[] = {
 307	regmap_reg_range(APDS9306_MAIN_CTRL_REG, APDS9306_ALS_THRES_VAR_REG)
 308};
 309
 310static const struct regmap_range apds9306_writable_ranges[] = {
 311	regmap_reg_range(APDS9306_MAIN_CTRL_REG, APDS9306_ALS_GAIN_REG),
 312	regmap_reg_range(APDS9306_INT_CFG_REG, APDS9306_ALS_THRES_VAR_REG)
 313};
 314
 315static const struct regmap_range apds9306_volatile_ranges[] = {
 316	regmap_reg_range(APDS9306_MAIN_STATUS_REG, APDS9306_MAIN_STATUS_REG),
 317	regmap_reg_range(APDS9306_CLEAR_DATA_0_REG, APDS9306_ALS_DATA_2_REG)
 318};
 319
 320static const struct regmap_range apds9306_precious_ranges[] = {
 321	regmap_reg_range(APDS9306_MAIN_STATUS_REG, APDS9306_MAIN_STATUS_REG)
 322};
 323
 324static const struct regmap_access_table apds9306_readable_table = {
 325	.yes_ranges = apds9306_readable_ranges,
 326	.n_yes_ranges = ARRAY_SIZE(apds9306_readable_ranges)
 327};
 328
 329static const struct regmap_access_table apds9306_writable_table = {
 330	.yes_ranges = apds9306_writable_ranges,
 331	.n_yes_ranges = ARRAY_SIZE(apds9306_writable_ranges)
 332};
 333
 334static const struct regmap_access_table apds9306_volatile_table = {
 335	.yes_ranges = apds9306_volatile_ranges,
 336	.n_yes_ranges = ARRAY_SIZE(apds9306_volatile_ranges)
 337};
 338
 339static const struct regmap_access_table apds9306_precious_table = {
 340	.yes_ranges = apds9306_precious_ranges,
 341	.n_yes_ranges = ARRAY_SIZE(apds9306_precious_ranges)
 342};
 343
 344static const struct regmap_config apds9306_regmap = {
 345	.name = "apds9306_regmap",
 346	.reg_bits = 8,
 347	.val_bits = 8,
 348	.rd_table = &apds9306_readable_table,
 349	.wr_table = &apds9306_writable_table,
 350	.volatile_table = &apds9306_volatile_table,
 351	.precious_table = &apds9306_precious_table,
 352	.max_register = APDS9306_ALS_THRES_VAR_REG,
 353	.cache_type = REGCACHE_MAPLE,
 354};
 355
 356static const struct reg_field apds9306_rf_sw_reset =
 357	REG_FIELD(APDS9306_MAIN_CTRL_REG, 4, 4);
 358
 359static const struct reg_field apds9306_rf_en =
 360	REG_FIELD(APDS9306_MAIN_CTRL_REG, 1, 1);
 361
 362static const struct reg_field apds9306_rf_intg_time =
 363	REG_FIELD(APDS9306_ALS_MEAS_RATE_REG, 4, 6);
 364
 365static const struct reg_field apds9306_rf_repeat_rate =
 366	REG_FIELD(APDS9306_ALS_MEAS_RATE_REG, 0, 2);
 367
 368static const struct reg_field apds9306_rf_gain =
 369	REG_FIELD(APDS9306_ALS_GAIN_REG, 0, 2);
 370
 371static const struct reg_field apds9306_rf_int_src =
 372	REG_FIELD(APDS9306_INT_CFG_REG, 4, 5);
 373
 374static const struct reg_field apds9306_rf_int_thresh_var_en =
 375	REG_FIELD(APDS9306_INT_CFG_REG, 3, 3);
 376
 377static const struct reg_field apds9306_rf_int_en =
 378	REG_FIELD(APDS9306_INT_CFG_REG, 2, 2);
 379
 380static const struct reg_field apds9306_rf_int_persist_val =
 381	REG_FIELD(APDS9306_INT_PERSISTENCE_REG, 4, 7);
 382
 383static const struct reg_field apds9306_rf_int_thresh_var_val =
 384	REG_FIELD(APDS9306_ALS_THRES_VAR_REG, 0, 2);
 385
 386static int apds9306_regfield_init(struct apds9306_data *data)
 387{
 388	struct device *dev = data->dev;
 389	struct regmap *regmap = data->regmap;
 390	struct regmap_field *tmp;
 391	struct apds9306_regfields *rf = &data->rf;
 392
 393	tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_sw_reset);
 394	if (IS_ERR(tmp))
 395		return PTR_ERR(tmp);
 396	rf->sw_reset = tmp;
 397
 398	tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_en);
 399	if (IS_ERR(tmp))
 400		return PTR_ERR(tmp);
 401	rf->en = tmp;
 402
 403	tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_intg_time);
 404	if (IS_ERR(tmp))
 405		return PTR_ERR(tmp);
 406	rf->intg_time = tmp;
 407
 408	tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_repeat_rate);
 409	if (IS_ERR(tmp))
 410		return PTR_ERR(tmp);
 411	rf->repeat_rate = tmp;
 412
 413	tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_gain);
 414	if (IS_ERR(tmp))
 415		return PTR_ERR(tmp);
 416	rf->gain = tmp;
 417
 418	tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_int_src);
 419	if (IS_ERR(tmp))
 420		return PTR_ERR(tmp);
 421	rf->int_src = tmp;
 422
 423	tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_int_thresh_var_en);
 424	if (IS_ERR(tmp))
 425		return PTR_ERR(tmp);
 426	rf->int_thresh_var_en = tmp;
 427
 428	tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_int_en);
 429	if (IS_ERR(tmp))
 430		return PTR_ERR(tmp);
 431	rf->int_en = tmp;
 432
 433	tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_int_persist_val);
 434	if (IS_ERR(tmp))
 435		return PTR_ERR(tmp);
 436	rf->int_persist_val = tmp;
 437
 438	tmp = devm_regmap_field_alloc(dev, regmap, apds9306_rf_int_thresh_var_val);
 439	if (IS_ERR(tmp))
 440		return PTR_ERR(tmp);
 441	rf->int_thresh_var_val = tmp;
 442
 443	return 0;
 444}
 445
 446static int apds9306_power_state(struct apds9306_data *data, bool state)
 447{
 448	struct apds9306_regfields *rf = &data->rf;
 449	int ret;
 450
 451	/* Reset not included as it causes ugly I2C bus error */
 452	if (state) {
 453		ret = regmap_field_write(rf->en, 1);
 454		if (ret)
 455			return ret;
 456		/* 5ms wake up time */
 457		fsleep(5000);
 458		return 0;
 459	}
 460
 461	return regmap_field_write(rf->en, 0);
 462}
 463
 464static int apds9306_read_data(struct apds9306_data *data, int *val, int reg)
 465{
 466	struct device *dev = data->dev;
 467	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 468	struct apds9306_regfields *rf = &data->rf;
 469	u64 ev_code;
 470	int ret, delay, intg_time, intg_time_idx, repeat_rate_idx, int_src;
 471	int status = 0;
 472	u8 buff[3];
 473
 474	ret = pm_runtime_resume_and_get(data->dev);
 475	if (ret)
 476		return ret;
 477
 478	ret = regmap_field_read(rf->intg_time, &intg_time_idx);
 479	if (ret)
 480		return ret;
 481
 482	ret = regmap_field_read(rf->repeat_rate, &repeat_rate_idx);
 483	if (ret)
 484		return ret;
 485
 486	ret = regmap_field_read(rf->int_src, &int_src);
 487	if (ret)
 488		return ret;
 489
 490	intg_time = iio_gts_find_int_time_by_sel(&data->gts, intg_time_idx);
 491	if (intg_time < 0)
 492		return intg_time;
 493
 494	/* Whichever is greater - integration time period or sampling period. */
 495	delay = max(intg_time, apds9306_repeat_rate_period[repeat_rate_idx]);
 496
 497	/*
 498	 * Clear stale data flag that might have been set by the interrupt
 499	 * handler if it got data available flag set in the status reg.
 500	 */
 501	data->read_data_available = 0;
 502
 503	/*
 504	 * If this function runs parallel with the interrupt handler, either
 505	 * this reads and clears the status registers or the interrupt handler
 506	 * does. The interrupt handler sets a flag for read data available
 507	 * in our private structure which we read here.
 508	 */
 509	ret = regmap_read_poll_timeout(data->regmap, APDS9306_MAIN_STATUS_REG,
 510				       status, data->read_data_available ||
 511				       (status & (APDS9306_ALS_DATA_STAT_MASK |
 512						  APDS9306_ALS_INT_STAT_MASK)),
 513				       APDS9306_ALS_READ_DATA_DELAY_US, delay * 2);
 514	if (ret)
 515		return ret;
 516
 517	/* If we reach here before the interrupt handler we push an event */
 518	if ((status & APDS9306_ALS_INT_STAT_MASK)) {
 519		if (int_src == APDS9306_INT_SRC_ALS)
 520			ev_code = IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0,
 521						       IIO_EV_TYPE_THRESH,
 522						       IIO_EV_DIR_EITHER);
 523		else
 524			ev_code = IIO_MOD_EVENT_CODE(IIO_INTENSITY, 0,
 525						     IIO_MOD_LIGHT_CLEAR,
 526						     IIO_EV_TYPE_THRESH,
 527						     IIO_EV_DIR_EITHER);
 528
 529		iio_push_event(indio_dev, ev_code, iio_get_time_ns(indio_dev));
 530	}
 531
 532	ret = regmap_bulk_read(data->regmap, reg, buff, sizeof(buff));
 533	if (ret) {
 534		dev_err_ratelimited(dev, "read data failed\n");
 535		return ret;
 536	}
 537
 538	*val = get_unaligned_le24(&buff);
 539
 540	pm_runtime_put_autosuspend(data->dev);
 541
 542	return 0;
 543}
 544
 545static int apds9306_intg_time_get(struct apds9306_data *data, int *val2)
 546{
 547	struct apds9306_regfields *rf = &data->rf;
 548	int ret, intg_time_idx;
 549
 550	ret = regmap_field_read(rf->intg_time, &intg_time_idx);
 551	if (ret)
 552		return ret;
 553
 554	ret = iio_gts_find_int_time_by_sel(&data->gts, intg_time_idx);
 555	if (ret < 0)
 556		return ret;
 557
 558	*val2 = ret;
 559
 560	return 0;
 561}
 562
 563static int apds9306_intg_time_set(struct apds9306_data *data, int val2)
 564{
 565	struct device *dev = data->dev;
 566	struct apds9306_regfields *rf = &data->rf;
 567	int ret, intg_old, gain_old, gain_new, gain_new_closest, intg_time_idx;
 568	int gain_idx;
 569	bool ok;
 570
 571	if (!iio_gts_valid_time(&data->gts, val2)) {
 572		dev_err_ratelimited(dev, "Unsupported integration time %u\n", val2);
 573		return -EINVAL;
 574	}
 575
 576	ret = regmap_field_read(rf->intg_time, &intg_time_idx);
 577	if (ret)
 578		return ret;
 579
 580	ret = regmap_field_read(rf->gain, &gain_idx);
 581	if (ret)
 582		return ret;
 583
 584	intg_old = iio_gts_find_int_time_by_sel(&data->gts, intg_time_idx);
 585	if (intg_old < 0)
 586		return intg_old;
 587
 588	if (intg_old == val2)
 589		return 0;
 590
 591	gain_old = iio_gts_find_gain_by_sel(&data->gts, gain_idx);
 592	if (gain_old < 0)
 593		return gain_old;
 594
 595	iio_gts_find_new_gain_by_old_gain_time(&data->gts, gain_old, intg_old,
 596					       val2, &gain_new);
 597
 598	if (gain_new < 0) {
 599		dev_err_ratelimited(dev, "Unsupported gain with time\n");
 600		return gain_new;
 601	}
 602
 603	gain_new_closest = iio_find_closest_gain_low(&data->gts, gain_new, &ok);
 604	if (gain_new_closest < 0) {
 605		gain_new_closest = iio_gts_get_min_gain(&data->gts);
 606		if (gain_new_closest < 0)
 607			return gain_new_closest;
 608	}
 609	if (!ok)
 610		dev_dbg(dev, "Unable to find optimum gain, setting minimum");
 611
 612	ret = iio_gts_find_sel_by_int_time(&data->gts, val2);
 613	if (ret < 0)
 614		return ret;
 615
 616	ret = regmap_field_write(rf->intg_time, ret);
 617	if (ret)
 618		return ret;
 619
 620	ret = iio_gts_find_sel_by_gain(&data->gts, gain_new_closest);
 621	if (ret < 0)
 622		return ret;
 623
 624	return regmap_field_write(rf->gain, ret);
 625}
 626
 627static int apds9306_sampling_freq_get(struct apds9306_data *data, int *val,
 628				      int *val2)
 629{
 630	struct apds9306_regfields *rf = &data->rf;
 631	int ret, repeat_rate_idx;
 632
 633	ret = regmap_field_read(rf->repeat_rate, &repeat_rate_idx);
 634	if (ret)
 635		return ret;
 636
 637	if (repeat_rate_idx >= ARRAY_SIZE(apds9306_repeat_rate_freq))
 638		return -EINVAL;
 639
 640	*val = apds9306_repeat_rate_freq[repeat_rate_idx][0];
 641	*val2 = apds9306_repeat_rate_freq[repeat_rate_idx][1];
 642
 643	return 0;
 644}
 645
 646static int apds9306_sampling_freq_set(struct apds9306_data *data, int val,
 647				      int val2)
 648{
 649	struct apds9306_regfields *rf = &data->rf;
 650	int i;
 651
 652	for (i = 0; i < ARRAY_SIZE(apds9306_repeat_rate_freq); i++) {
 653		if (apds9306_repeat_rate_freq[i][0] == val &&
 654		    apds9306_repeat_rate_freq[i][1] == val2)
 655			return regmap_field_write(rf->repeat_rate, i);
 656	}
 657
 658	return -EINVAL;
 659}
 660
 661static int apds9306_scale_get(struct apds9306_data *data, int *val, int *val2)
 662{
 663	struct apds9306_regfields *rf = &data->rf;
 664	int gain, intg, ret, intg_time_idx, gain_idx;
 665
 666	ret = regmap_field_read(rf->gain, &gain_idx);
 667	if (ret)
 668		return ret;
 669
 670	ret = regmap_field_read(rf->intg_time, &intg_time_idx);
 671	if (ret)
 672		return ret;
 673
 674	gain = iio_gts_find_gain_by_sel(&data->gts, gain_idx);
 675	if (gain < 0)
 676		return gain;
 677
 678	intg = iio_gts_find_int_time_by_sel(&data->gts, intg_time_idx);
 679	if (intg < 0)
 680		return intg;
 681
 682	return iio_gts_get_scale(&data->gts, gain, intg, val, val2);
 683}
 684
 685static int apds9306_scale_set(struct apds9306_data *data, int val, int val2)
 686{
 687	struct apds9306_regfields *rf = &data->rf;
 688	int i, ret, time_sel, gain_sel, intg_time_idx;
 689
 690	ret = regmap_field_read(rf->intg_time, &intg_time_idx);
 691	if (ret)
 692		return ret;
 693
 694	ret = iio_gts_find_gain_sel_for_scale_using_time(&data->gts,
 695					intg_time_idx, val, val2, &gain_sel);
 696	if (ret) {
 697		for (i = 0; i < data->gts.num_itime; i++) {
 698			time_sel = data->gts.itime_table[i].sel;
 699
 700			if (time_sel == intg_time_idx)
 701				continue;
 702
 703			ret = iio_gts_find_gain_sel_for_scale_using_time(&data->gts,
 704						time_sel, val, val2, &gain_sel);
 705			if (!ret)
 706				break;
 707		}
 708		if (ret)
 709			return -EINVAL;
 710
 711		ret = regmap_field_write(rf->intg_time, time_sel);
 712		if (ret)
 713			return ret;
 714	}
 715
 716	return regmap_field_write(rf->gain, gain_sel);
 717}
 718
 719static int apds9306_event_period_get(struct apds9306_data *data, int *val)
 720{
 721	struct apds9306_regfields *rf = &data->rf;
 722	int period, ret;
 723
 724	ret = regmap_field_read(rf->int_persist_val, &period);
 725	if (ret)
 726		return ret;
 727
 728	if (!in_range(period, 0, APDS9306_ALS_PERSIST_NUM_VALS))
 729		return -EINVAL;
 730
 731	*val = period;
 732
 733	return ret;
 734}
 735
 736static int apds9306_event_period_set(struct apds9306_data *data, int val)
 737{
 738	struct apds9306_regfields *rf = &data->rf;
 739
 740	if (!in_range(val, 0, APDS9306_ALS_PERSIST_NUM_VALS))
 741		return -EINVAL;
 742
 743	return regmap_field_write(rf->int_persist_val, val);
 744}
 745
 746static int apds9306_get_thresh_reg(int dir)
 747{
 748	if (dir == IIO_EV_DIR_RISING)
 749		return APDS9306_ALS_THRES_UP_0_REG;
 750	else if (dir == IIO_EV_DIR_FALLING)
 751		return APDS9306_ALS_THRES_LOW_0_REG;
 752	else
 753		return -EINVAL;
 754}
 755
 756static int apds9306_event_thresh_get(struct apds9306_data *data, int dir,
 757				     int *val)
 758{
 759	int reg, ret;
 760	u8 buff[3];
 761
 762	reg = apds9306_get_thresh_reg(dir);
 763	if (reg < 0)
 764		return reg;
 765
 766	ret = regmap_bulk_read(data->regmap, reg, buff, sizeof(buff));
 767	if (ret)
 768		return ret;
 769
 770	*val = get_unaligned_le24(&buff);
 771
 772	return 0;
 773}
 774
 775static int apds9306_event_thresh_set(struct apds9306_data *data, int dir,
 776				     int val)
 777{
 778	int reg;
 779	u8 buff[3];
 780
 781	reg = apds9306_get_thresh_reg(dir);
 782	if (reg < 0)
 783		return reg;
 784
 785	if (!in_range(val, 0, APDS9306_ALS_THRES_VAL_MAX))
 786		return -EINVAL;
 787
 788	put_unaligned_le24(val, buff);
 789
 790	return regmap_bulk_write(data->regmap, reg, buff, sizeof(buff));
 791}
 792
 793static int apds9306_event_thresh_adaptive_get(struct apds9306_data *data, int *val)
 794{
 795	struct apds9306_regfields *rf = &data->rf;
 796	int thr_adpt, ret;
 797
 798	ret = regmap_field_read(rf->int_thresh_var_val, &thr_adpt);
 799	if (ret)
 800		return ret;
 801
 802	if (!in_range(thr_adpt, 0, APDS9306_ALS_THRES_VAR_NUM_VALS))
 803		return -EINVAL;
 804
 805	*val = thr_adpt;
 806
 807	return ret;
 808}
 809
 810static int apds9306_event_thresh_adaptive_set(struct apds9306_data *data, int val)
 811{
 812	struct apds9306_regfields *rf = &data->rf;
 813
 814	if (!in_range(val, 0, APDS9306_ALS_THRES_VAR_NUM_VALS))
 815		return -EINVAL;
 816
 817	return regmap_field_write(rf->int_thresh_var_val, val);
 818}
 819
 820static int apds9306_read_raw(struct iio_dev *indio_dev,
 821			     struct iio_chan_spec const *chan, int *val,
 822			     int *val2, long mask)
 823{
 824	struct apds9306_data *data = iio_priv(indio_dev);
 825	int ret, reg;
 826
 827	switch (mask) {
 828	case IIO_CHAN_INFO_RAW:
 829		if (chan->channel2 == IIO_MOD_LIGHT_CLEAR)
 830			reg = APDS9306_CLEAR_DATA_0_REG;
 831		else
 832			reg = APDS9306_ALS_DATA_0_REG;
 833		/*
 834		 * Changing device parameters during adc operation, resets
 835		 * the ADC which has to avoided.
 836		 */
 837		if (!iio_device_claim_direct(indio_dev))
 838			return -EBUSY;
 839		ret = apds9306_read_data(data, val, reg);
 840		iio_device_release_direct(indio_dev);
 841		if (ret)
 842			return ret;
 843
 844		return IIO_VAL_INT;
 845	case IIO_CHAN_INFO_INT_TIME:
 846		ret = apds9306_intg_time_get(data, val2);
 847		if (ret)
 848			return ret;
 849		*val = 0;
 850
 851		return IIO_VAL_INT_PLUS_MICRO;
 852	case IIO_CHAN_INFO_SAMP_FREQ:
 853		ret = apds9306_sampling_freq_get(data, val, val2);
 854		if (ret)
 855			return ret;
 856
 857		return IIO_VAL_INT_PLUS_MICRO;
 858	case IIO_CHAN_INFO_SCALE:
 859		ret = apds9306_scale_get(data, val, val2);
 860		if (ret)
 861			return ret;
 862
 863		return IIO_VAL_INT_PLUS_NANO;
 864	default:
 865		return -EINVAL;
 866	}
 867};
 868
 869static int apds9306_read_avail(struct iio_dev *indio_dev,
 870			       struct iio_chan_spec const *chan,
 871			       const int **vals, int *type, int *length,
 872			       long mask)
 873{
 874	struct apds9306_data *data = iio_priv(indio_dev);
 875
 876	switch (mask) {
 877	case IIO_CHAN_INFO_INT_TIME:
 878		return iio_gts_avail_times(&data->gts, vals, type, length);
 879	case IIO_CHAN_INFO_SCALE:
 880		return iio_gts_all_avail_scales(&data->gts, vals, type, length);
 881	case IIO_CHAN_INFO_SAMP_FREQ:
 882		*length = ARRAY_SIZE(apds9306_repeat_rate_freq) * 2;
 883		*vals = (const int *)apds9306_repeat_rate_freq;
 884		*type = IIO_VAL_INT_PLUS_MICRO;
 885
 886		return IIO_AVAIL_LIST;
 887	default:
 888		return -EINVAL;
 889	}
 890}
 891
 892static int apds9306_write_raw_get_fmt(struct iio_dev *indio_dev,
 893				      struct iio_chan_spec const *chan,
 894				      long mask)
 895{
 896	switch (mask) {
 897	case IIO_CHAN_INFO_SCALE:
 898		return IIO_VAL_INT_PLUS_NANO;
 899	case IIO_CHAN_INFO_INT_TIME:
 900		return IIO_VAL_INT_PLUS_MICRO;
 901	case IIO_CHAN_INFO_SAMP_FREQ:
 902		return IIO_VAL_INT_PLUS_MICRO;
 903	default:
 904		return -EINVAL;
 905	}
 906}
 907
 908static int apds9306_write_raw(struct iio_dev *indio_dev,
 909			      struct iio_chan_spec const *chan, int val,
 910			      int val2, long mask)
 911{
 912	struct apds9306_data *data = iio_priv(indio_dev);
 913
 914	guard(mutex)(&data->mutex);
 915
 916	switch (mask) {
 917	case IIO_CHAN_INFO_INT_TIME:
 918		if (val)
 919			return -EINVAL;
 920		return apds9306_intg_time_set(data, val2);
 921	case IIO_CHAN_INFO_SCALE:
 922		return apds9306_scale_set(data, val, val2);
 923	case IIO_CHAN_INFO_SAMP_FREQ:
 924		return apds9306_sampling_freq_set(data, val, val2);
 925	default:
 926		return -EINVAL;
 927	}
 928}
 929
 930static irqreturn_t apds9306_irq_handler(int irq, void *priv)
 931{
 932	struct iio_dev *indio_dev = priv;
 933	struct apds9306_data *data = iio_priv(indio_dev);
 934	struct apds9306_regfields *rf = &data->rf;
 935	u64 ev_code;
 936	int ret, status, int_src;
 937
 938	/*
 939	 * The interrupt line is released and the interrupt flag is
 940	 * cleared as a result of reading the status register. All the
 941	 * status flags are cleared as a result of this read.
 942	 */
 943	ret = regmap_read(data->regmap, APDS9306_MAIN_STATUS_REG, &status);
 944	if (ret < 0) {
 945		dev_err_ratelimited(data->dev, "status reg read failed\n");
 946		return IRQ_HANDLED;
 947	}
 948
 949	ret = regmap_field_read(rf->int_src, &int_src);
 950	if (ret)
 951		return ret;
 952
 953	if ((status & APDS9306_ALS_INT_STAT_MASK)) {
 954		if (int_src == APDS9306_INT_SRC_ALS)
 955			ev_code = IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0,
 956						       IIO_EV_TYPE_THRESH,
 957						       IIO_EV_DIR_EITHER);
 958		else
 959			ev_code = IIO_MOD_EVENT_CODE(IIO_INTENSITY, 0,
 960						     IIO_MOD_LIGHT_CLEAR,
 961						     IIO_EV_TYPE_THRESH,
 962						     IIO_EV_DIR_EITHER);
 963
 964		iio_push_event(indio_dev, ev_code, iio_get_time_ns(indio_dev));
 965	}
 966
 967	/*
 968	 * If a one-shot read through sysfs is underway at the same time
 969	 * as this interrupt handler is executing and a read data available
 970	 * flag was set, this flag is set to inform read_poll_timeout()
 971	 * to exit.
 972	 */
 973	if ((status & APDS9306_ALS_DATA_STAT_MASK))
 974		data->read_data_available = 1;
 975
 976	return IRQ_HANDLED;
 977}
 978
 979static int apds9306_read_event(struct iio_dev *indio_dev,
 980			       const struct iio_chan_spec *chan,
 981			       enum iio_event_type type,
 982			       enum iio_event_direction dir,
 983			       enum iio_event_info info,
 984			       int *val, int *val2)
 985{
 986	struct apds9306_data *data = iio_priv(indio_dev);
 987	int ret;
 988
 989	switch (type) {
 990	case IIO_EV_TYPE_THRESH:
 991		if (dir == IIO_EV_DIR_EITHER && info == IIO_EV_INFO_PERIOD)
 992			ret = apds9306_event_period_get(data, val);
 993		else
 994			ret = apds9306_event_thresh_get(data, dir, val);
 995		if (ret)
 996			return ret;
 997
 998		return IIO_VAL_INT;
 999	case IIO_EV_TYPE_THRESH_ADAPTIVE:
1000		ret = apds9306_event_thresh_adaptive_get(data, val);
1001		if (ret)
1002			return ret;
1003
1004		return IIO_VAL_INT;
1005	default:
1006		return -EINVAL;
1007	}
1008}
1009
1010static int apds9306_write_event(struct iio_dev *indio_dev,
1011				const struct iio_chan_spec *chan,
1012				enum iio_event_type type,
1013				enum iio_event_direction dir,
1014				enum iio_event_info info,
1015				int val, int val2)
1016{
1017	struct apds9306_data *data = iio_priv(indio_dev);
1018
1019	switch (type) {
1020	case IIO_EV_TYPE_THRESH:
1021		if (dir == IIO_EV_DIR_EITHER && info == IIO_EV_INFO_PERIOD)
1022			return apds9306_event_period_set(data, val);
1023
1024		return apds9306_event_thresh_set(data, dir, val);
1025	case IIO_EV_TYPE_THRESH_ADAPTIVE:
1026		return apds9306_event_thresh_adaptive_set(data, val);
1027	default:
1028		return -EINVAL;
1029	}
1030}
1031
1032static int apds9306_read_event_config(struct iio_dev *indio_dev,
1033				      const struct iio_chan_spec *chan,
1034				      enum iio_event_type type,
1035				      enum iio_event_direction dir)
1036{
1037	struct apds9306_data *data = iio_priv(indio_dev);
1038	struct apds9306_regfields *rf = &data->rf;
1039	int int_en, int_src, ret;
1040
1041	switch (type) {
1042	case IIO_EV_TYPE_THRESH: {
1043		guard(mutex)(&data->mutex);
1044
1045		ret = regmap_field_read(rf->int_src, &int_src);
1046		if (ret)
1047			return ret;
1048
1049		ret = regmap_field_read(rf->int_en, &int_en);
1050		if (ret)
1051			return ret;
1052
1053		if (chan->type == IIO_LIGHT)
1054			return int_en && (int_src == APDS9306_INT_SRC_ALS);
1055
1056		if (chan->type == IIO_INTENSITY)
1057			return int_en && (int_src == APDS9306_INT_SRC_CLEAR);
1058
1059		return -EINVAL;
1060	}
1061	case IIO_EV_TYPE_THRESH_ADAPTIVE:
1062		ret = regmap_field_read(rf->int_thresh_var_en, &int_en);
1063		if (ret)
1064			return ret;
1065
1066		return int_en;
1067	default:
1068		return -EINVAL;
1069	}
1070}
1071
1072static int apds9306_write_event_config(struct iio_dev *indio_dev,
1073				       const struct iio_chan_spec *chan,
1074				       enum iio_event_type type,
1075				       enum iio_event_direction dir,
1076				       bool state)
1077{
1078	struct apds9306_data *data = iio_priv(indio_dev);
1079	struct apds9306_regfields *rf = &data->rf;
1080	int ret, enabled;
1081
1082	switch (type) {
1083	case IIO_EV_TYPE_THRESH: {
1084		guard(mutex)(&data->mutex);
1085
1086		ret = regmap_field_read(rf->int_en, &enabled);
1087		if (ret)
1088			return ret;
1089
1090		/*
1091		 * If interrupt is enabled, the channel is set before enabling
1092		 * the interrupt. In case of disable, no need to switch
1093		 * channels. In case of different channel is selected while
1094		 * interrupt in on, just change the channel.
1095		 */
1096		if (state) {
1097			if (chan->type == IIO_LIGHT)
1098				ret = regmap_field_write(rf->int_src, 1);
1099			else if (chan->type == IIO_INTENSITY)
1100				ret = regmap_field_write(rf->int_src, 0);
1101			else
1102				return -EINVAL;
1103
1104			if (ret)
1105				return ret;
1106
1107			if (enabled)
1108				return 0;
1109
1110			ret = regmap_field_write(rf->int_en, 1);
1111			if (ret)
1112				return ret;
1113
1114			return pm_runtime_resume_and_get(data->dev);
1115		} else {
1116			if (!enabled)
1117				return 0;
1118
1119			ret = regmap_field_write(rf->int_en, 0);
1120			if (ret)
1121				return ret;
1122
1123			pm_runtime_put_autosuspend(data->dev);
1124
1125			return 0;
1126		}
1127	}
1128	case IIO_EV_TYPE_THRESH_ADAPTIVE:
1129		return regmap_field_write(rf->int_thresh_var_en, state);
1130	default:
1131		return -EINVAL;
1132	}
1133}
1134
1135static const struct iio_info apds9306_info_no_events = {
1136	.read_avail = apds9306_read_avail,
1137	.read_raw = apds9306_read_raw,
1138	.write_raw = apds9306_write_raw,
1139	.write_raw_get_fmt = apds9306_write_raw_get_fmt,
1140};
1141
1142static const struct iio_info apds9306_info = {
1143	.read_avail = apds9306_read_avail,
1144	.read_raw = apds9306_read_raw,
1145	.write_raw = apds9306_write_raw,
1146	.write_raw_get_fmt = apds9306_write_raw_get_fmt,
1147	.read_event_value = apds9306_read_event,
1148	.write_event_value = apds9306_write_event,
1149	.read_event_config = apds9306_read_event_config,
1150	.write_event_config = apds9306_write_event_config,
1151	.event_attrs = &apds9306_event_attr_group,
1152};
1153
1154static int apds9306_init_iio_gts(struct apds9306_data *data)
1155{
1156	int i, ret, part_id;
1157
1158	ret = regmap_read(data->regmap, APDS9306_PART_ID_REG, &part_id);
1159	if (ret)
1160		return ret;
1161
1162	for (i = 0; i < ARRAY_SIZE(apds9306_gts_mul); i++)
1163		if (part_id == apds9306_gts_mul[i].part_id)
1164			break;
1165
1166	if (i == ARRAY_SIZE(apds9306_gts_mul))
1167		return -ENOENT;
1168
1169	return devm_iio_init_iio_gts(data->dev,
1170				     apds9306_gts_mul[i].max_scale_int,
1171				     apds9306_gts_mul[i].max_scale_nano,
1172				     apds9306_gains, ARRAY_SIZE(apds9306_gains),
1173				     apds9306_itimes, ARRAY_SIZE(apds9306_itimes),
1174				     &data->gts);
1175}
1176
1177static void apds9306_powerdown(void *ptr)
1178{
1179	struct apds9306_data *data = (struct apds9306_data *)ptr;
1180	struct apds9306_regfields *rf = &data->rf;
1181	int ret;
1182
1183	ret = regmap_field_write(rf->int_thresh_var_en, 0);
1184	if (ret)
1185		return;
1186
1187	ret = regmap_field_write(rf->int_en, 0);
1188	if (ret)
1189		return;
1190
1191	apds9306_power_state(data, false);
1192}
1193
1194static int apds9306_device_init(struct apds9306_data *data)
1195{
1196	struct apds9306_regfields *rf = &data->rf;
1197	int ret;
1198
1199	ret = apds9306_init_iio_gts(data);
1200	if (ret)
1201		return ret;
1202
1203	ret = regmap_field_write(rf->intg_time, APDS9306_MEAS_MODE_100MS);
1204	if (ret)
1205		return ret;
1206
1207	ret = regmap_field_write(rf->repeat_rate, APDS9306_SAMP_FREQ_10HZ);
1208	if (ret)
1209		return ret;
1210
1211	ret = regmap_field_write(rf->gain, APDS9306_GSEL_3X);
1212	if (ret)
1213		return ret;
1214
1215	ret = regmap_field_write(rf->int_src, APDS9306_INT_SRC_ALS);
1216	if (ret)
1217		return ret;
1218
1219	ret = regmap_field_write(rf->int_en, 0);
1220	if (ret)
1221		return ret;
1222
1223	return regmap_field_write(rf->int_thresh_var_en, 0);
1224}
1225
1226static int apds9306_pm_init(struct apds9306_data *data)
1227{
1228	struct device *dev = data->dev;
1229	int ret;
1230
1231	ret = apds9306_power_state(data, true);
1232	if (ret)
1233		return ret;
1234
1235	ret = pm_runtime_set_active(dev);
1236	if (ret)
1237		return ret;
1238
1239	ret = devm_pm_runtime_enable(dev);
1240	if (ret)
1241		return ret;
1242
1243	pm_runtime_set_autosuspend_delay(dev, 5000);
1244	pm_runtime_use_autosuspend(dev);
1245	pm_runtime_get(dev);
1246
1247	return 0;
1248}
1249
1250static int apds9306_probe(struct i2c_client *client)
1251{
1252	struct device *dev = &client->dev;
1253	struct apds9306_data *data;
1254	struct iio_dev *indio_dev;
1255	int ret;
1256
1257	indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
1258	if (!indio_dev)
1259		return -ENOMEM;
1260
1261	data = iio_priv(indio_dev);
1262
1263	mutex_init(&data->mutex);
1264
1265	data->regmap = devm_regmap_init_i2c(client, &apds9306_regmap);
1266	if (IS_ERR(data->regmap))
1267		return dev_err_probe(dev, PTR_ERR(data->regmap),
1268				     "regmap initialization failed\n");
1269
1270	data->dev = dev;
1271	i2c_set_clientdata(client, indio_dev);
1272
1273	ret = apds9306_regfield_init(data);
1274	if (ret)
1275		return dev_err_probe(dev, ret, "regfield initialization failed\n");
1276
1277	ret = devm_regulator_get_enable(dev, "vdd");
1278	if (ret)
1279		return dev_err_probe(dev, ret, "Failed to enable regulator\n");
1280
1281	indio_dev->name = "apds9306";
1282	indio_dev->modes = INDIO_DIRECT_MODE;
1283	if (client->irq) {
1284		indio_dev->info = &apds9306_info;
1285		indio_dev->channels = apds9306_channels_with_events;
1286		indio_dev->num_channels = ARRAY_SIZE(apds9306_channels_with_events);
1287		ret = devm_request_threaded_irq(dev, client->irq, NULL,
1288						apds9306_irq_handler, IRQF_ONESHOT,
1289						"apds9306_event", indio_dev);
1290		if (ret)
1291			return dev_err_probe(dev, ret,
1292					     "failed to assign interrupt.\n");
1293	} else {
1294		indio_dev->info = &apds9306_info_no_events;
1295		indio_dev->channels = apds9306_channels_without_events;
1296		indio_dev->num_channels =
1297				ARRAY_SIZE(apds9306_channels_without_events);
1298	}
1299
1300	ret = apds9306_pm_init(data);
1301	if (ret)
1302		return dev_err_probe(dev, ret, "failed pm init\n");
1303
1304	ret = apds9306_device_init(data);
1305	if (ret)
1306		return dev_err_probe(dev, ret, "failed to init device\n");
1307
1308	ret = devm_add_action_or_reset(dev, apds9306_powerdown, data);
1309	if (ret)
1310		return ret;
1311
1312	ret = devm_iio_device_register(dev, indio_dev);
1313	if (ret)
1314		return dev_err_probe(dev, ret, "failed iio device registration\n");
1315
1316	pm_runtime_put_autosuspend(dev);
1317
1318	return 0;
1319}
1320
1321static int apds9306_runtime_suspend(struct device *dev)
1322{
1323	struct apds9306_data *data = iio_priv(dev_get_drvdata(dev));
1324
1325	return apds9306_power_state(data, false);
1326}
1327
1328static int apds9306_runtime_resume(struct device *dev)
1329{
1330	struct apds9306_data *data = iio_priv(dev_get_drvdata(dev));
1331
1332	return apds9306_power_state(data, true);
1333}
1334
1335static DEFINE_RUNTIME_DEV_PM_OPS(apds9306_pm_ops,
1336				 apds9306_runtime_suspend,
1337				 apds9306_runtime_resume,
1338				 NULL);
1339
1340static const struct of_device_id apds9306_of_match[] = {
1341	{ .compatible = "avago,apds9306" },
1342	{ }
1343};
1344MODULE_DEVICE_TABLE(of, apds9306_of_match);
1345
1346static struct i2c_driver apds9306_driver = {
1347	.driver = {
1348		.name = "apds9306",
1349		.pm = pm_ptr(&apds9306_pm_ops),
1350		.of_match_table = apds9306_of_match,
1351	},
1352	.probe = apds9306_probe,
1353};
1354module_i2c_driver(apds9306_driver);
1355
1356MODULE_AUTHOR("Subhajit Ghosh <subhajit.ghosh@tweaklogic.com>");
1357MODULE_DESCRIPTION("APDS9306 Ambient Light Sensor driver");
1358MODULE_LICENSE("GPL");
1359MODULE_IMPORT_NS("IIO_GTS_HELPER");