st_lsm6dsx_core.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * STMicroelectronics st_lsm6dsx sensor driver
   4 *
   5 * The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer
   6 * and 3D digital gyroscope system-in-package with a digital I2C/SPI serial
   7 * interface standard output.
   8 * LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale
   9 * acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of
  10 * +-125/+-245/+-500/+-1000/+-2000 dps
  11 * LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer
  12 * allowing dynamic batching of sensor data.
  13 * LSM9DSx series is similar but includes an additional magnetometer, handled
  14 * by a different driver.
  15 *
  16 * Supported sensors:
  17 *
  18 * - LSM6DS3
  19 *   - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416
  20 *   - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
  21 *   - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
  22 *   - FIFO size: 8KB
  23 *
  24 * - ISM330DLC
  25 * - LSM6DS3H
  26 * - LSM6DS3TR-C
  27 * - LSM6DSL
  28 * - LSM6DSM
  29 *   - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416
  30 *   - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
  31 *   - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
  32 *   - FIFO size: 4KB
  33 *
  34 * - ASM330LHH
  35 * - ASM330LHHX
  36 * - ASM330LHHXG1
  37 * - ISM330DHCX
  38 * - ISM330IS
  39 * - LSM6DSO
  40 * - LSM6DSO16IS
  41 * - LSM6DSOP
  42 * - LSM6DSOX
  43 * - LSM6DSR
  44 * - LSM6DST
  45 * - LSM6DSTX
  46 *   - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416,
  47 *     833
  48 *   - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
  49 *   - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
  50 *   - FIFO size: 3KB
  51 *
  52 * - LSM6DSV
  53 * - LSM6DSV16X
  54 *   - Accelerometer/Gyroscope supported ODR [Hz]: 7.5, 15, 30, 60, 120, 240,
  55 *     480, 960
  56 *   - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
  57 *   - Gyroscope supported full-scale [dps]: +-125/+-250/+-500/+-1000/+-2000
  58 *   - FIFO size: 3KB
  59 *
  60 * - LSM6DS0
  61 * - LSM9DS1
  62 *   - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952
  63 *   - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
  64 *   - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952
  65 *   - Gyroscope supported full-scale [dps]: +-245/+-500/+-2000
  66 *   - FIFO size: 32
  67 *
  68 * Copyright 2016 STMicroelectronics Inc.
  69 *
  70 * Lorenzo Bianconi <lorenzo.bianconi@st.com>
  71 * Denis Ciocca <denis.ciocca@st.com>
  72 */
  73
  74#include <linux/kernel.h>
  75#include <linux/module.h>
  76#include <linux/acpi.h>
  77#include <linux/delay.h>
  78#include <linux/iio/events.h>
  79#include <linux/iio/iio.h>
  80#include <linux/iio/sysfs.h>
  81#include <linux/iio/triggered_buffer.h>
  82#include <linux/iio/trigger_consumer.h>
  83#include <linux/interrupt.h>
  84#include <linux/irq.h>
  85#include <linux/minmax.h>
  86#include <linux/pm.h>
  87#include <linux/property.h>
  88#include <linux/regmap.h>
  89#include <linux/bitfield.h>
  90
  91#include <linux/platform_data/st_sensors_pdata.h>
  92
  93#include "st_lsm6dsx.h"
  94
  95#define ST_LSM6DSX_REG_WHOAMI_ADDR		0x0f
  96
  97static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = {
  98	ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0),
  99	ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1),
 100	ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2),
 101	IIO_CHAN_SOFT_TIMESTAMP(3),
 102};
 103
 104static const struct iio_chan_spec st_lsm6ds0_acc_channels[] = {
 105	ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x28, IIO_MOD_X, 0),
 106	ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1),
 107	ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2),
 108	IIO_CHAN_SOFT_TIMESTAMP(3),
 109};
 110
 111static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = {
 112	ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0),
 113	ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1),
 114	ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2),
 115	IIO_CHAN_SOFT_TIMESTAMP(3),
 116};
 117
 118static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = {
 119	ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0),
 120	ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1),
 121	ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2),
 122	IIO_CHAN_SOFT_TIMESTAMP(3),
 123};
 124
 125static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
 126	{
 127		.reset = {
 128			.addr = 0x22,
 129			.mask = BIT(0),
 130		},
 131		.boot = {
 132			.addr = 0x22,
 133			.mask = BIT(7),
 134		},
 135		.bdu = {
 136			.addr = 0x22,
 137			.mask = BIT(6),
 138		},
 139		.id = {
 140			{
 141				.hw_id = ST_LSM9DS1_ID,
 142				.name = ST_LSM9DS1_DEV_NAME,
 143				.wai = 0x68,
 144			}, {
 145				.hw_id = ST_LSM6DS0_ID,
 146				.name = ST_LSM6DS0_DEV_NAME,
 147				.wai = 0x68,
 148			},
 149		},
 150		.channels = {
 151			[ST_LSM6DSX_ID_ACC] = {
 152				.chan = st_lsm6ds0_acc_channels,
 153				.len = ARRAY_SIZE(st_lsm6ds0_acc_channels),
 154			},
 155			[ST_LSM6DSX_ID_GYRO] = {
 156				.chan = st_lsm6ds0_gyro_channels,
 157				.len = ARRAY_SIZE(st_lsm6ds0_gyro_channels),
 158			},
 159		},
 160		.odr_table = {
 161			[ST_LSM6DSX_ID_ACC] = {
 162				.reg = {
 163					.addr = 0x20,
 164					.mask = GENMASK(7, 5),
 165				},
 166				.odr_avl[0] = {  10000, 0x01 },
 167				.odr_avl[1] = {  50000, 0x02 },
 168				.odr_avl[2] = { 119000, 0x03 },
 169				.odr_avl[3] = { 238000, 0x04 },
 170				.odr_avl[4] = { 476000, 0x05 },
 171				.odr_avl[5] = { 952000, 0x06 },
 172				.odr_len = 6,
 173			},
 174			[ST_LSM6DSX_ID_GYRO] = {
 175				.reg = {
 176					.addr = 0x10,
 177					.mask = GENMASK(7, 5),
 178				},
 179				.odr_avl[0] = {  14900, 0x01 },
 180				.odr_avl[1] = {  59500, 0x02 },
 181				.odr_avl[2] = { 119000, 0x03 },
 182				.odr_avl[3] = { 238000, 0x04 },
 183				.odr_avl[4] = { 476000, 0x05 },
 184				.odr_avl[5] = { 952000, 0x06 },
 185				.odr_len = 6,
 186			},
 187		},
 188		.fs_table = {
 189			[ST_LSM6DSX_ID_ACC] = {
 190				.reg = {
 191					.addr = 0x20,
 192					.mask = GENMASK(4, 3),
 193				},
 194				.fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
 195				.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
 196				.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
 197				.fs_avl[3] = { IIO_G_TO_M_S_2(732000), 0x1 },
 198				.fs_len = 4,
 199			},
 200			[ST_LSM6DSX_ID_GYRO] = {
 201				.reg = {
 202					.addr = 0x10,
 203					.mask = GENMASK(4, 3),
 204				},
 205
 206				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
 207				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
 208				.fs_avl[2] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
 209				.fs_len = 3,
 210			},
 211		},
 212		.irq_config = {
 213			.irq1 = {
 214				.addr = 0x0c,
 215				.mask = BIT(3),
 216			},
 217			.irq2 = {
 218				.addr = 0x0d,
 219				.mask = BIT(3),
 220			},
 221			.hla = {
 222				.addr = 0x22,
 223				.mask = BIT(5),
 224			},
 225			.od = {
 226				.addr = 0x22,
 227				.mask = BIT(4),
 228			},
 229		},
 230		.fifo_ops = {
 231			.max_size = 32,
 232		},
 233	},
 234	{
 235		.reset = {
 236			.addr = 0x12,
 237			.mask = BIT(0),
 238		},
 239		.boot = {
 240			.addr = 0x12,
 241			.mask = BIT(7),
 242		},
 243		.bdu = {
 244			.addr = 0x12,
 245			.mask = BIT(6),
 246		},
 247		.id = {
 248			{
 249				.hw_id = ST_LSM6DS3_ID,
 250				.name = ST_LSM6DS3_DEV_NAME,
 251				.wai = 0x69,
 252			},
 253		},
 254		.channels = {
 255			[ST_LSM6DSX_ID_ACC] = {
 256				.chan = st_lsm6dsx_acc_channels,
 257				.len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
 258			},
 259			[ST_LSM6DSX_ID_GYRO] = {
 260				.chan = st_lsm6dsx_gyro_channels,
 261				.len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
 262			},
 263		},
 264		.odr_table = {
 265			[ST_LSM6DSX_ID_ACC] = {
 266				.reg = {
 267					.addr = 0x10,
 268					.mask = GENMASK(7, 4),
 269				},
 270				.odr_avl[0] = {  12500, 0x01 },
 271				.odr_avl[1] = {  26000, 0x02 },
 272				.odr_avl[2] = {  52000, 0x03 },
 273				.odr_avl[3] = { 104000, 0x04 },
 274				.odr_avl[4] = { 208000, 0x05 },
 275				.odr_avl[5] = { 416000, 0x06 },
 276				.odr_len = 6,
 277			},
 278			[ST_LSM6DSX_ID_GYRO] = {
 279				.reg = {
 280					.addr = 0x11,
 281					.mask = GENMASK(7, 4),
 282				},
 283				.odr_avl[0] = {  12500, 0x01 },
 284				.odr_avl[1] = {  26000, 0x02 },
 285				.odr_avl[2] = {  52000, 0x03 },
 286				.odr_avl[3] = { 104000, 0x04 },
 287				.odr_avl[4] = { 208000, 0x05 },
 288				.odr_avl[5] = { 416000, 0x06 },
 289				.odr_len = 6,
 290			},
 291		},
 292		.fs_table = {
 293			[ST_LSM6DSX_ID_ACC] = {
 294				.reg = {
 295					.addr = 0x10,
 296					.mask = GENMASK(3, 2),
 297				},
 298				.fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
 299				.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
 300				.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
 301				.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
 302				.fs_len = 4,
 303			},
 304			[ST_LSM6DSX_ID_GYRO] = {
 305				.reg = {
 306					.addr = 0x11,
 307					.mask = GENMASK(3, 2),
 308				},
 309				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
 310				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
 311				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
 312				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
 313				.fs_len = 4,
 314			},
 315		},
 316		.irq_config = {
 317			.irq1 = {
 318				.addr = 0x0d,
 319				.mask = BIT(3),
 320			},
 321			.irq2 = {
 322				.addr = 0x0e,
 323				.mask = BIT(3),
 324			},
 325			.lir = {
 326				.addr = 0x58,
 327				.mask = BIT(0),
 328			},
 329			.irq1_func = {
 330				.addr = 0x5e,
 331				.mask = BIT(5),
 332			},
 333			.irq2_func = {
 334				.addr = 0x5f,
 335				.mask = BIT(5),
 336			},
 337			.hla = {
 338				.addr = 0x12,
 339				.mask = BIT(5),
 340			},
 341			.od = {
 342				.addr = 0x12,
 343				.mask = BIT(4),
 344			},
 345		},
 346		.decimator = {
 347			[ST_LSM6DSX_ID_ACC] = {
 348				.addr = 0x08,
 349				.mask = GENMASK(2, 0),
 350			},
 351			[ST_LSM6DSX_ID_GYRO] = {
 352				.addr = 0x08,
 353				.mask = GENMASK(5, 3),
 354			},
 355		},
 356		.fifo_ops = {
 357			.update_fifo = st_lsm6dsx_update_fifo,
 358			.read_fifo = st_lsm6dsx_read_fifo,
 359			.fifo_th = {
 360				.addr = 0x06,
 361				.mask = GENMASK(11, 0),
 362			},
 363			.fifo_diff = {
 364				.addr = 0x3a,
 365				.mask = GENMASK(11, 0),
 366			},
 367			.max_size = 1365,
 368			.th_wl = 3, /* 1LSB = 2B */
 369		},
 370		.ts_settings = {
 371			.timer_en = {
 372				.addr = 0x58,
 373				.mask = BIT(7),
 374			},
 375			.hr_timer = {
 376				.addr = 0x5c,
 377				.mask = BIT(4),
 378			},
 379			.fifo_en = {
 380				.addr = 0x07,
 381				.mask = BIT(7),
 382			},
 383			.decimator = {
 384				.addr = 0x09,
 385				.mask = GENMASK(5, 3),
 386			},
 387		},
 388		.event_settings = {
 389			.wakeup_reg = {
 390				.addr = 0x5B,
 391				.mask = GENMASK(5, 0),
 392			},
 393			.wakeup_src_reg = 0x1b,
 394			.wakeup_src_status_mask = BIT(3),
 395			.wakeup_src_z_mask = BIT(0),
 396			.wakeup_src_y_mask = BIT(1),
 397			.wakeup_src_x_mask = BIT(2),
 398		},
 399	},
 400	{
 401		.reset = {
 402			.addr = 0x12,
 403			.mask = BIT(0),
 404		},
 405		.boot = {
 406			.addr = 0x12,
 407			.mask = BIT(7),
 408		},
 409		.bdu = {
 410			.addr = 0x12,
 411			.mask = BIT(6),
 412		},
 413		.id = {
 414			{
 415				.hw_id = ST_LSM6DS3H_ID,
 416				.name = ST_LSM6DS3H_DEV_NAME,
 417				.wai = 0x69,
 418			},
 419		},
 420		.channels = {
 421			[ST_LSM6DSX_ID_ACC] = {
 422				.chan = st_lsm6dsx_acc_channels,
 423				.len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
 424			},
 425			[ST_LSM6DSX_ID_GYRO] = {
 426				.chan = st_lsm6dsx_gyro_channels,
 427				.len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
 428			},
 429		},
 430		.odr_table = {
 431			[ST_LSM6DSX_ID_ACC] = {
 432				.reg = {
 433					.addr = 0x10,
 434					.mask = GENMASK(7, 4),
 435				},
 436				.odr_avl[0] = {  12500, 0x01 },
 437				.odr_avl[1] = {  26000, 0x02 },
 438				.odr_avl[2] = {  52000, 0x03 },
 439				.odr_avl[3] = { 104000, 0x04 },
 440				.odr_avl[4] = { 208000, 0x05 },
 441				.odr_avl[5] = { 416000, 0x06 },
 442				.odr_len = 6,
 443			},
 444			[ST_LSM6DSX_ID_GYRO] = {
 445				.reg = {
 446					.addr = 0x11,
 447					.mask = GENMASK(7, 4),
 448				},
 449				.odr_avl[0] = {  12500, 0x01 },
 450				.odr_avl[1] = {  26000, 0x02 },
 451				.odr_avl[2] = {  52000, 0x03 },
 452				.odr_avl[3] = { 104000, 0x04 },
 453				.odr_avl[4] = { 208000, 0x05 },
 454				.odr_avl[5] = { 416000, 0x06 },
 455				.odr_len = 6,
 456			},
 457		},
 458		.fs_table = {
 459			[ST_LSM6DSX_ID_ACC] = {
 460				.reg = {
 461					.addr = 0x10,
 462					.mask = GENMASK(3, 2),
 463				},
 464				.fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
 465				.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
 466				.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
 467				.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
 468				.fs_len = 4,
 469			},
 470			[ST_LSM6DSX_ID_GYRO] = {
 471				.reg = {
 472					.addr = 0x11,
 473					.mask = GENMASK(3, 2),
 474				},
 475				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
 476				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
 477				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
 478				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
 479				.fs_len = 4,
 480			},
 481		},
 482		.irq_config = {
 483			.irq1 = {
 484				.addr = 0x0d,
 485				.mask = BIT(3),
 486			},
 487			.irq2 = {
 488				.addr = 0x0e,
 489				.mask = BIT(3),
 490			},
 491			.lir = {
 492				.addr = 0x58,
 493				.mask = BIT(0),
 494			},
 495			.irq1_func = {
 496				.addr = 0x5e,
 497				.mask = BIT(5),
 498			},
 499			.irq2_func = {
 500				.addr = 0x5f,
 501				.mask = BIT(5),
 502			},
 503			.hla = {
 504				.addr = 0x12,
 505				.mask = BIT(5),
 506			},
 507			.od = {
 508				.addr = 0x12,
 509				.mask = BIT(4),
 510			},
 511		},
 512		.decimator = {
 513			[ST_LSM6DSX_ID_ACC] = {
 514				.addr = 0x08,
 515				.mask = GENMASK(2, 0),
 516			},
 517			[ST_LSM6DSX_ID_GYRO] = {
 518				.addr = 0x08,
 519				.mask = GENMASK(5, 3),
 520			},
 521		},
 522		.fifo_ops = {
 523			.update_fifo = st_lsm6dsx_update_fifo,
 524			.read_fifo = st_lsm6dsx_read_fifo,
 525			.fifo_th = {
 526				.addr = 0x06,
 527				.mask = GENMASK(11, 0),
 528			},
 529			.fifo_diff = {
 530				.addr = 0x3a,
 531				.mask = GENMASK(11, 0),
 532			},
 533			.max_size = 682,
 534			.th_wl = 3, /* 1LSB = 2B */
 535		},
 536		.ts_settings = {
 537			.timer_en = {
 538				.addr = 0x58,
 539				.mask = BIT(7),
 540			},
 541			.hr_timer = {
 542				.addr = 0x5c,
 543				.mask = BIT(4),
 544			},
 545			.fifo_en = {
 546				.addr = 0x07,
 547				.mask = BIT(7),
 548			},
 549			.decimator = {
 550				.addr = 0x09,
 551				.mask = GENMASK(5, 3),
 552			},
 553		},
 554		.event_settings = {
 555			.wakeup_reg = {
 556				.addr = 0x5B,
 557				.mask = GENMASK(5, 0),
 558			},
 559			.wakeup_src_reg = 0x1b,
 560			.wakeup_src_status_mask = BIT(3),
 561			.wakeup_src_z_mask = BIT(0),
 562			.wakeup_src_y_mask = BIT(1),
 563			.wakeup_src_x_mask = BIT(2),
 564		},
 565	},
 566	{
 567		.reset = {
 568			.addr = 0x12,
 569			.mask = BIT(0),
 570		},
 571		.boot = {
 572			.addr = 0x12,
 573			.mask = BIT(7),
 574		},
 575		.bdu = {
 576			.addr = 0x12,
 577			.mask = BIT(6),
 578		},
 579		.id = {
 580			{
 581				.hw_id = ST_LSM6DSL_ID,
 582				.name = ST_LSM6DSL_DEV_NAME,
 583				.wai = 0x6a,
 584			}, {
 585				.hw_id = ST_LSM6DSM_ID,
 586				.name = ST_LSM6DSM_DEV_NAME,
 587				.wai = 0x6a,
 588			}, {
 589				.hw_id = ST_ISM330DLC_ID,
 590				.name = ST_ISM330DLC_DEV_NAME,
 591				.wai = 0x6a,
 592			}, {
 593				.hw_id = ST_LSM6DS3TRC_ID,
 594				.name = ST_LSM6DS3TRC_DEV_NAME,
 595				.wai = 0x6a,
 596			},
 597		},
 598		.channels = {
 599			[ST_LSM6DSX_ID_ACC] = {
 600				.chan = st_lsm6dsx_acc_channels,
 601				.len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
 602			},
 603			[ST_LSM6DSX_ID_GYRO] = {
 604				.chan = st_lsm6dsx_gyro_channels,
 605				.len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
 606			},
 607		},
 608		.odr_table = {
 609			[ST_LSM6DSX_ID_ACC] = {
 610				.reg = {
 611					.addr = 0x10,
 612					.mask = GENMASK(7, 4),
 613				},
 614				.odr_avl[0] = {  12500, 0x01 },
 615				.odr_avl[1] = {  26000, 0x02 },
 616				.odr_avl[2] = {  52000, 0x03 },
 617				.odr_avl[3] = { 104000, 0x04 },
 618				.odr_avl[4] = { 208000, 0x05 },
 619				.odr_avl[5] = { 416000, 0x06 },
 620				.odr_len = 6,
 621			},
 622			[ST_LSM6DSX_ID_GYRO] = {
 623				.reg = {
 624					.addr = 0x11,
 625					.mask = GENMASK(7, 4),
 626				},
 627				.odr_avl[0] = {  12500, 0x01 },
 628				.odr_avl[1] = {  26000, 0x02 },
 629				.odr_avl[2] = {  52000, 0x03 },
 630				.odr_avl[3] = { 104000, 0x04 },
 631				.odr_avl[4] = { 208000, 0x05 },
 632				.odr_avl[5] = { 416000, 0x06 },
 633				.odr_len = 6,
 634			},
 635		},
 636		.fs_table = {
 637			[ST_LSM6DSX_ID_ACC] = {
 638				.reg = {
 639					.addr = 0x10,
 640					.mask = GENMASK(3, 2),
 641				},
 642				.fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
 643				.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
 644				.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
 645				.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
 646				.fs_len = 4,
 647			},
 648			[ST_LSM6DSX_ID_GYRO] = {
 649				.reg = {
 650					.addr = 0x11,
 651					.mask = GENMASK(3, 2),
 652				},
 653				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
 654				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
 655				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
 656				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
 657				.fs_len = 4,
 658			},
 659		},
 660		.samples_to_discard = {
 661			[ST_LSM6DSX_ID_ACC] = {
 662				.val[0] = {  12500, 1 },
 663				.val[1] = {  26000, 1 },
 664				.val[2] = {  52000, 1 },
 665				.val[3] = { 104000, 2 },
 666				.val[4] = { 208000, 2 },
 667				.val[5] = { 416000, 2 },
 668			},
 669			[ST_LSM6DSX_ID_GYRO] = {
 670				.val[0] = {  12500,  2 },
 671				.val[1] = {  26000,  5 },
 672				.val[2] = {  52000,  7 },
 673				.val[3] = { 104000, 12 },
 674				.val[4] = { 208000, 20 },
 675				.val[5] = { 416000, 36 },
 676			},
 677		},
 678		.irq_config = {
 679			.irq1 = {
 680				.addr = 0x0d,
 681				.mask = BIT(3),
 682			},
 683			.irq2 = {
 684				.addr = 0x0e,
 685				.mask = BIT(3),
 686			},
 687			.lir = {
 688				.addr = 0x58,
 689				.mask = BIT(0),
 690			},
 691			.irq1_func = {
 692				.addr = 0x5e,
 693				.mask = BIT(5),
 694			},
 695			.irq2_func = {
 696				.addr = 0x5f,
 697				.mask = BIT(5),
 698			},
 699			.hla = {
 700				.addr = 0x12,
 701				.mask = BIT(5),
 702			},
 703			.od = {
 704				.addr = 0x12,
 705				.mask = BIT(4),
 706			},
 707		},
 708		.decimator = {
 709			[ST_LSM6DSX_ID_ACC] = {
 710				.addr = 0x08,
 711				.mask = GENMASK(2, 0),
 712			},
 713			[ST_LSM6DSX_ID_GYRO] = {
 714				.addr = 0x08,
 715				.mask = GENMASK(5, 3),
 716			},
 717			[ST_LSM6DSX_ID_EXT0] = {
 718				.addr = 0x09,
 719				.mask = GENMASK(2, 0),
 720			},
 721		},
 722		.fifo_ops = {
 723			.update_fifo = st_lsm6dsx_update_fifo,
 724			.read_fifo = st_lsm6dsx_read_fifo,
 725			.fifo_th = {
 726				.addr = 0x06,
 727				.mask = GENMASK(10, 0),
 728			},
 729			.fifo_diff = {
 730				.addr = 0x3a,
 731				.mask = GENMASK(10, 0),
 732			},
 733			.max_size = 682,
 734			.th_wl = 3, /* 1LSB = 2B */
 735		},
 736		.ts_settings = {
 737			.timer_en = {
 738				.addr = 0x19,
 739				.mask = BIT(5),
 740			},
 741			.hr_timer = {
 742				.addr = 0x5c,
 743				.mask = BIT(4),
 744			},
 745			.fifo_en = {
 746				.addr = 0x07,
 747				.mask = BIT(7),
 748			},
 749			.decimator = {
 750				.addr = 0x09,
 751				.mask = GENMASK(5, 3),
 752			},
 753		},
 754		.shub_settings = {
 755			.page_mux = {
 756				.addr = 0x01,
 757				.mask = BIT(7),
 758			},
 759			.master_en = {
 760				.addr = 0x1a,
 761				.mask = BIT(0),
 762			},
 763			.pullup_en = {
 764				.addr = 0x1a,
 765				.mask = BIT(3),
 766			},
 767			.aux_sens = {
 768				.addr = 0x04,
 769				.mask = GENMASK(5, 4),
 770			},
 771			.wr_once = {
 772				.addr = 0x07,
 773				.mask = BIT(5),
 774			},
 775			.emb_func = {
 776				.addr = 0x19,
 777				.mask = BIT(2),
 778			},
 779			.num_ext_dev = 1,
 780			.shub_out = {
 781				.addr = 0x2e,
 782			},
 783			.slv0_addr = 0x02,
 784			.dw_slv0_addr = 0x0e,
 785			.pause = 0x7,
 786		},
 787		.event_settings = {
 788			.enable_reg = {
 789				.addr = 0x58,
 790				.mask = BIT(7),
 791			},
 792			.wakeup_reg = {
 793				.addr = 0x5B,
 794				.mask = GENMASK(5, 0),
 795			},
 796			.wakeup_src_reg = 0x1b,
 797			.wakeup_src_status_mask = BIT(3),
 798			.wakeup_src_z_mask = BIT(0),
 799			.wakeup_src_y_mask = BIT(1),
 800			.wakeup_src_x_mask = BIT(2),
 801		},
 802	},
 803	{
 804		.reset = {
 805			.addr = 0x12,
 806			.mask = BIT(0),
 807		},
 808		.boot = {
 809			.addr = 0x12,
 810			.mask = BIT(7),
 811		},
 812		.bdu = {
 813			.addr = 0x12,
 814			.mask = BIT(6),
 815		},
 816		.id = {
 817			{
 818				.hw_id = ST_LSM6DSR_ID,
 819				.name = ST_LSM6DSR_DEV_NAME,
 820				.wai = 0x6b,
 821			}, {
 822				.hw_id = ST_ISM330DHCX_ID,
 823				.name = ST_ISM330DHCX_DEV_NAME,
 824				.wai = 0x6b,
 825			}, {
 826				.hw_id = ST_LSM6DSRX_ID,
 827				.name = ST_LSM6DSRX_DEV_NAME,
 828				.wai = 0x6b,
 829			}, {
 830				.hw_id = ST_LSM6DSO_ID,
 831				.name = ST_LSM6DSO_DEV_NAME,
 832				.wai = 0x6c,
 833			}, {
 834				.hw_id = ST_LSM6DSOX_ID,
 835				.name = ST_LSM6DSOX_DEV_NAME,
 836				.wai = 0x6c,
 837			}, {
 838				.hw_id = ST_LSM6DST_ID,
 839				.name = ST_LSM6DST_DEV_NAME,
 840				.wai = 0x6d,
 841			}, {
 842				.hw_id = ST_ASM330LHHX_ID,
 843				.name = ST_ASM330LHHX_DEV_NAME,
 844				.wai = 0x6b,
 845			}, {
 846				.hw_id = ST_ASM330LHHXG1_ID,
 847				.name = ST_ASM330LHHXG1_DEV_NAME,
 848				.wai = 0x6b,
 849			}, {
 850				.hw_id = ST_LSM6DSTX_ID,
 851				.name = ST_LSM6DSTX_DEV_NAME,
 852				.wai = 0x6d,
 853			},
 854		},
 855		.channels = {
 856			[ST_LSM6DSX_ID_ACC] = {
 857				.chan = st_lsm6dsx_acc_channels,
 858				.len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
 859			},
 860			[ST_LSM6DSX_ID_GYRO] = {
 861				.chan = st_lsm6dsx_gyro_channels,
 862				.len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
 863			},
 864		},
 865		.drdy_mask = {
 866			.addr = 0x13,
 867			.mask = BIT(3),
 868		},
 869		.odr_table = {
 870			[ST_LSM6DSX_ID_ACC] = {
 871				.reg = {
 872					.addr = 0x10,
 873					.mask = GENMASK(7, 4),
 874				},
 875				.odr_avl[0] = {  12500, 0x01 },
 876				.odr_avl[1] = {  26000, 0x02 },
 877				.odr_avl[2] = {  52000, 0x03 },
 878				.odr_avl[3] = { 104000, 0x04 },
 879				.odr_avl[4] = { 208000, 0x05 },
 880				.odr_avl[5] = { 416000, 0x06 },
 881				.odr_avl[6] = { 833000, 0x07 },
 882				.odr_len = 7,
 883			},
 884			[ST_LSM6DSX_ID_GYRO] = {
 885				.reg = {
 886					.addr = 0x11,
 887					.mask = GENMASK(7, 4),
 888				},
 889				.odr_avl[0] = {  12500, 0x01 },
 890				.odr_avl[1] = {  26000, 0x02 },
 891				.odr_avl[2] = {  52000, 0x03 },
 892				.odr_avl[3] = { 104000, 0x04 },
 893				.odr_avl[4] = { 208000, 0x05 },
 894				.odr_avl[5] = { 416000, 0x06 },
 895				.odr_avl[6] = { 833000, 0x07 },
 896				.odr_len = 7,
 897			},
 898		},
 899		.fs_table = {
 900			[ST_LSM6DSX_ID_ACC] = {
 901				.reg = {
 902					.addr = 0x10,
 903					.mask = GENMASK(3, 2),
 904				},
 905				.fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
 906				.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
 907				.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
 908				.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
 909				.fs_len = 4,
 910			},
 911			[ST_LSM6DSX_ID_GYRO] = {
 912				.reg = {
 913					.addr = 0x11,
 914					.mask = GENMASK(3, 2),
 915				},
 916				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
 917				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
 918				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
 919				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
 920				.fs_len = 4,
 921			},
 922		},
 923		.irq_config = {
 924			.irq1 = {
 925				.addr = 0x0d,
 926				.mask = BIT(3),
 927			},
 928			.irq2 = {
 929				.addr = 0x0e,
 930				.mask = BIT(3),
 931			},
 932			.lir = {
 933				.addr = 0x56,
 934				.mask = BIT(0),
 935			},
 936			.clear_on_read = {
 937				.addr = 0x56,
 938				.mask = BIT(6),
 939			},
 940			.irq1_func = {
 941				.addr = 0x5e,
 942				.mask = BIT(5),
 943			},
 944			.irq2_func = {
 945				.addr = 0x5f,
 946				.mask = BIT(5),
 947			},
 948			.hla = {
 949				.addr = 0x12,
 950				.mask = BIT(5),
 951			},
 952			.od = {
 953				.addr = 0x12,
 954				.mask = BIT(4),
 955			},
 956		},
 957		.batch = {
 958			[ST_LSM6DSX_ID_ACC] = {
 959				.addr = 0x09,
 960				.mask = GENMASK(3, 0),
 961			},
 962			[ST_LSM6DSX_ID_GYRO] = {
 963				.addr = 0x09,
 964				.mask = GENMASK(7, 4),
 965			},
 966		},
 967		.fifo_ops = {
 968			.update_fifo = st_lsm6dsx_update_fifo,
 969			.read_fifo = st_lsm6dsx_read_tagged_fifo,
 970			.fifo_th = {
 971				.addr = 0x07,
 972				.mask = GENMASK(8, 0),
 973			},
 974			.fifo_diff = {
 975				.addr = 0x3a,
 976				.mask = GENMASK(9, 0),
 977			},
 978			.max_size = 512,
 979			.th_wl = 1,
 980		},
 981		.ts_settings = {
 982			.timer_en = {
 983				.addr = 0x19,
 984				.mask = BIT(5),
 985			},
 986			.decimator = {
 987				.addr = 0x0a,
 988				.mask = GENMASK(7, 6),
 989			},
 990			.freq_fine = 0x63,
 991			.ts_sensitivity = 25000,
 992			.ts_trim_coeff = 37500,
 993		},
 994		.shub_settings = {
 995			.page_mux = {
 996				.addr = 0x01,
 997				.mask = BIT(6),
 998			},
 999			.master_en = {
1000				.sec_page = true,
1001				.addr = 0x14,
1002				.mask = BIT(2),
1003			},
1004			.pullup_en = {
1005				.sec_page = true,
1006				.addr = 0x14,
1007				.mask = BIT(3),
1008			},
1009			.aux_sens = {
1010				.addr = 0x14,
1011				.mask = GENMASK(1, 0),
1012			},
1013			.wr_once = {
1014				.addr = 0x14,
1015				.mask = BIT(6),
1016			},
1017			.num_ext_dev = 3,
1018			.shub_out = {
1019				.sec_page = true,
1020				.addr = 0x02,
1021			},
1022			.slv0_addr = 0x15,
1023			.dw_slv0_addr = 0x21,
1024			.batch_en = BIT(3),
1025		},
1026		.event_settings = {
1027			.enable_reg = {
1028				.addr = 0x58,
1029				.mask = BIT(7),
1030			},
1031			.wakeup_reg = {
1032				.addr = 0x5b,
1033				.mask = GENMASK(5, 0),
1034			},
1035			.wakeup_src_reg = 0x1b,
1036			.wakeup_src_status_mask = BIT(3),
1037			.wakeup_src_z_mask = BIT(0),
1038			.wakeup_src_y_mask = BIT(1),
1039			.wakeup_src_x_mask = BIT(2),
1040		},
1041	},
1042	{
1043		.reset = {
1044			.addr = 0x12,
1045			.mask = BIT(0),
1046		},
1047		.boot = {
1048			.addr = 0x12,
1049			.mask = BIT(7),
1050		},
1051		.bdu = {
1052			.addr = 0x12,
1053			.mask = BIT(6),
1054		},
1055		.id = {
1056			{
1057				.hw_id = ST_ASM330LHH_ID,
1058				.name = ST_ASM330LHH_DEV_NAME,
1059				.wai = 0x6b,
1060			}, {
1061				.hw_id = ST_LSM6DSOP_ID,
1062				.name = ST_LSM6DSOP_DEV_NAME,
1063				.wai = 0x6c,
1064			}, {
1065				.hw_id = ST_ASM330LHB_ID,
1066				.name = ST_ASM330LHB_DEV_NAME,
1067				.wai = 0x6b,
1068			},
1069		},
1070		.channels = {
1071			[ST_LSM6DSX_ID_ACC] = {
1072				.chan = st_lsm6dsx_acc_channels,
1073				.len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
1074			},
1075			[ST_LSM6DSX_ID_GYRO] = {
1076				.chan = st_lsm6dsx_gyro_channels,
1077				.len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
1078			},
1079		},
1080		.drdy_mask = {
1081			.addr = 0x13,
1082			.mask = BIT(3),
1083		},
1084		.odr_table = {
1085			[ST_LSM6DSX_ID_ACC] = {
1086				.reg = {
1087					.addr = 0x10,
1088					.mask = GENMASK(7, 4),
1089				},
1090				.odr_avl[0] = {  12500, 0x01 },
1091				.odr_avl[1] = {  26000, 0x02 },
1092				.odr_avl[2] = {  52000, 0x03 },
1093				.odr_avl[3] = { 104000, 0x04 },
1094				.odr_avl[4] = { 208000, 0x05 },
1095				.odr_avl[5] = { 416000, 0x06 },
1096				.odr_avl[6] = { 833000, 0x07 },
1097				.odr_len = 7,
1098			},
1099			[ST_LSM6DSX_ID_GYRO] = {
1100				.reg = {
1101					.addr = 0x11,
1102					.mask = GENMASK(7, 4),
1103				},
1104				.odr_avl[0] = {  12500, 0x01 },
1105				.odr_avl[1] = {  26000, 0x02 },
1106				.odr_avl[2] = {  52000, 0x03 },
1107				.odr_avl[3] = { 104000, 0x04 },
1108				.odr_avl[4] = { 208000, 0x05 },
1109				.odr_avl[5] = { 416000, 0x06 },
1110				.odr_avl[6] = { 833000, 0x07 },
1111				.odr_len = 7,
1112			},
1113		},
1114		.fs_table = {
1115			[ST_LSM6DSX_ID_ACC] = {
1116				.reg = {
1117					.addr = 0x10,
1118					.mask = GENMASK(3, 2),
1119				},
1120				.fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
1121				.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
1122				.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
1123				.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
1124				.fs_len = 4,
1125			},
1126			[ST_LSM6DSX_ID_GYRO] = {
1127				.reg = {
1128					.addr = 0x11,
1129					.mask = GENMASK(3, 2),
1130				},
1131				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
1132				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
1133				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
1134				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
1135				.fs_len = 4,
1136			},
1137		},
1138		.irq_config = {
1139			.irq1 = {
1140				.addr = 0x0d,
1141				.mask = BIT(3),
1142			},
1143			.irq2 = {
1144				.addr = 0x0e,
1145				.mask = BIT(3),
1146			},
1147			.lir = {
1148				.addr = 0x56,
1149				.mask = BIT(0),
1150			},
1151			.clear_on_read = {
1152				.addr = 0x56,
1153				.mask = BIT(6),
1154			},
1155			.irq1_func = {
1156				.addr = 0x5e,
1157				.mask = BIT(5),
1158			},
1159			.irq2_func = {
1160				.addr = 0x5f,
1161				.mask = BIT(5),
1162			},
1163			.hla = {
1164				.addr = 0x12,
1165				.mask = BIT(5),
1166			},
1167			.od = {
1168				.addr = 0x12,
1169				.mask = BIT(4),
1170			},
1171		},
1172		.batch = {
1173			[ST_LSM6DSX_ID_ACC] = {
1174				.addr = 0x09,
1175				.mask = GENMASK(3, 0),
1176			},
1177			[ST_LSM6DSX_ID_GYRO] = {
1178				.addr = 0x09,
1179				.mask = GENMASK(7, 4),
1180			},
1181		},
1182		.fifo_ops = {
1183			.update_fifo = st_lsm6dsx_update_fifo,
1184			.read_fifo = st_lsm6dsx_read_tagged_fifo,
1185			.fifo_th = {
1186				.addr = 0x07,
1187				.mask = GENMASK(8, 0),
1188			},
1189			.fifo_diff = {
1190				.addr = 0x3a,
1191				.mask = GENMASK(9, 0),
1192			},
1193			.max_size = 512,
1194			.th_wl = 1,
1195		},
1196		.ts_settings = {
1197			.timer_en = {
1198				.addr = 0x19,
1199				.mask = BIT(5),
1200			},
1201			.decimator = {
1202				.addr = 0x0a,
1203				.mask = GENMASK(7, 6),
1204			},
1205			.freq_fine = 0x63,
1206			.ts_sensitivity = 25000,
1207			.ts_trim_coeff = 37500,
1208		},
1209		.event_settings = {
1210			.enable_reg = {
1211				.addr = 0x58,
1212				.mask = BIT(7),
1213			},
1214			.wakeup_reg = {
1215				.addr = 0x5B,
1216				.mask = GENMASK(5, 0),
1217			},
1218			.wakeup_src_reg = 0x1b,
1219			.wakeup_src_status_mask = BIT(3),
1220			.wakeup_src_z_mask = BIT(0),
1221			.wakeup_src_y_mask = BIT(1),
1222			.wakeup_src_x_mask = BIT(2),
1223		},
1224	},
1225	{
1226		.reset = {
1227			.addr = 0x12,
1228			.mask = BIT(0),
1229		},
1230		.boot = {
1231			.addr = 0x12,
1232			.mask = BIT(7),
1233		},
1234		.bdu = {
1235			.addr = 0x12,
1236			.mask = BIT(6),
1237		},
1238		.id = {
1239			{
1240				.hw_id = ST_LSM6DSV_ID,
1241				.name = ST_LSM6DSV_DEV_NAME,
1242				.wai = 0x70,
1243			}, {
1244				.hw_id = ST_LSM6DSV16X_ID,
1245				.name = ST_LSM6DSV16X_DEV_NAME,
1246				.wai = 0x70,
1247			},
1248		},
1249		.channels = {
1250			[ST_LSM6DSX_ID_ACC] = {
1251				.chan = st_lsm6dsx_acc_channels,
1252				.len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
1253			},
1254			[ST_LSM6DSX_ID_GYRO] = {
1255				.chan = st_lsm6dsx_gyro_channels,
1256				.len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
1257			},
1258		},
1259		.drdy_mask = {
1260			.addr = 0x13,
1261			.mask = BIT(3),
1262		},
1263		.odr_table = {
1264			[ST_LSM6DSX_ID_ACC] = {
1265				.reg = {
1266					.addr = 0x10,
1267					.mask = GENMASK(3, 0),
1268				},
1269				.odr_avl[0] = {   7500, 0x02 },
1270				.odr_avl[1] = {  15000, 0x03 },
1271				.odr_avl[2] = {  30000, 0x04 },
1272				.odr_avl[3] = {  60000, 0x05 },
1273				.odr_avl[4] = { 120000, 0x06 },
1274				.odr_avl[5] = { 240000, 0x07 },
1275				.odr_avl[6] = { 480000, 0x08 },
1276				.odr_avl[7] = { 960000, 0x09 },
1277				.odr_len = 8,
1278			},
1279			[ST_LSM6DSX_ID_GYRO] = {
1280				.reg = {
1281					.addr = 0x11,
1282					.mask = GENMASK(3, 0),
1283				},
1284				.odr_avl[0] = {   7500, 0x02 },
1285				.odr_avl[1] = {  15000, 0x03 },
1286				.odr_avl[2] = {  30000, 0x04 },
1287				.odr_avl[3] = {  60000, 0x05 },
1288				.odr_avl[4] = { 120000, 0x06 },
1289				.odr_avl[5] = { 240000, 0x07 },
1290				.odr_avl[6] = { 480000, 0x08 },
1291				.odr_avl[7] = { 960000, 0x09 },
1292				.odr_len = 8,
1293			},
1294		},
1295		.fs_table = {
1296			[ST_LSM6DSX_ID_ACC] = {
1297				.reg = {
1298					.addr = 0x17,
1299					.mask = GENMASK(1, 0),
1300				},
1301				.fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
1302				.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x1 },
1303				.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x2 },
1304				.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x3 },
1305				.fs_len = 4,
1306			},
1307			[ST_LSM6DSX_ID_GYRO] = {
1308				.reg = {
1309					.addr = 0x15,
1310					.mask = GENMASK(3, 0),
1311				},
1312				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x1 },
1313				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x2 },
1314				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x3 },
1315				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x4 },
1316				.fs_len = 4,
1317			},
1318		},
1319		.irq_config = {
1320			.irq1 = {
1321				.addr = 0x0d,
1322				.mask = BIT(3),
1323			},
1324			.irq2 = {
1325				.addr = 0x0e,
1326				.mask = BIT(3),
1327			},
1328			.lir = {
1329				.addr = 0x56,
1330				.mask = BIT(0),
1331			},
1332			.irq1_func = {
1333				.addr = 0x5e,
1334				.mask = BIT(5),
1335			},
1336			.irq2_func = {
1337				.addr = 0x5f,
1338				.mask = BIT(5),
1339			},
1340			.hla = {
1341				.addr = 0x03,
1342				.mask = BIT(4),
1343			},
1344			.od = {
1345				.addr = 0x03,
1346				.mask = BIT(3),
1347			},
1348		},
1349		.batch = {
1350			[ST_LSM6DSX_ID_ACC] = {
1351				.addr = 0x09,
1352				.mask = GENMASK(3, 0),
1353			},
1354			[ST_LSM6DSX_ID_GYRO] = {
1355				.addr = 0x09,
1356				.mask = GENMASK(7, 4),
1357			},
1358		},
1359		.fifo_ops = {
1360			.update_fifo = st_lsm6dsx_update_fifo,
1361			.read_fifo = st_lsm6dsx_read_tagged_fifo,
1362			.fifo_th = {
1363				.addr = 0x07,
1364				.mask = GENMASK(7, 0),
1365			},
1366			.fifo_diff = {
1367				.addr = 0x1b,
1368				.mask = GENMASK(8, 0),
1369			},
1370			.max_size = 512,
1371			.th_wl = 1,
1372		},
1373		.ts_settings = {
1374			.timer_en = {
1375				.addr = 0x50,
1376				.mask = BIT(6),
1377			},
1378			.decimator = {
1379				.addr = 0x0a,
1380				.mask = GENMASK(7, 6),
1381			},
1382			.freq_fine = 0x4f,
1383			.ts_sensitivity = 21701,
1384			.ts_trim_coeff = 28212,
1385		},
1386		.shub_settings = {
1387			.page_mux = {
1388				.addr = 0x01,
1389				.mask = BIT(6),
1390			},
1391			.master_en = {
1392				.sec_page = true,
1393				.addr = 0x14,
1394				.mask = BIT(2),
1395			},
1396			.pullup_en = {
1397				.addr = 0x03,
1398				.mask = BIT(6),
1399			},
1400			.aux_sens = {
1401				.addr = 0x14,
1402				.mask = GENMASK(1, 0),
1403			},
1404			.wr_once = {
1405				.addr = 0x14,
1406				.mask = BIT(6),
1407			},
1408			.num_ext_dev = 3,
1409			.shub_out = {
1410				.sec_page = true,
1411				.addr = 0x02,
1412			},
1413			.slv0_addr = 0x15,
1414			.dw_slv0_addr = 0x21,
1415			.batch_en = BIT(3),
1416		},
1417		.event_settings = {
1418			.enable_reg = {
1419				.addr = 0x50,
1420				.mask = BIT(7),
1421			},
1422			.wakeup_reg = {
1423				.addr = 0x5b,
1424				.mask = GENMASK(5, 0),
1425			},
1426			.wakeup_src_reg = 0x45,
1427			.wakeup_src_status_mask = BIT(3),
1428			.wakeup_src_z_mask = BIT(0),
1429			.wakeup_src_y_mask = BIT(1),
1430			.wakeup_src_x_mask = BIT(2),
1431		},
1432	},
1433	{
1434		.reset = {
1435			.addr = 0x12,
1436			.mask = BIT(0),
1437		},
1438		.boot = {
1439			.addr = 0x12,
1440			.mask = BIT(7),
1441		},
1442		.bdu = {
1443			.addr = 0x12,
1444			.mask = BIT(6),
1445		},
1446		.id = {
1447			{
1448				.hw_id = ST_LSM6DSO16IS_ID,
1449				.name = ST_LSM6DSO16IS_DEV_NAME,
1450				.wai = 0x22,
1451			}, {
1452				.hw_id = ST_ISM330IS_ID,
1453				.name = ST_ISM330IS_DEV_NAME,
1454				.wai = 0x22,
1455			}
1456		},
1457		.channels = {
1458			[ST_LSM6DSX_ID_ACC] = {
1459				.chan = st_lsm6ds0_acc_channels,
1460				.len = ARRAY_SIZE(st_lsm6ds0_acc_channels),
1461			},
1462			[ST_LSM6DSX_ID_GYRO] = {
1463				.chan = st_lsm6dsx_gyro_channels,
1464				.len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
1465			},
1466		},
1467		.odr_table = {
1468			[ST_LSM6DSX_ID_ACC] = {
1469				.reg = {
1470					.addr = 0x10,
1471					.mask = GENMASK(7, 4),
1472				},
1473				.odr_avl[0] = {  12500, 0x01 },
1474				.odr_avl[1] = {  26000, 0x02 },
1475				.odr_avl[2] = {  52000, 0x03 },
1476				.odr_avl[3] = { 104000, 0x04 },
1477				.odr_avl[4] = { 208000, 0x05 },
1478				.odr_avl[5] = { 416000, 0x06 },
1479				.odr_avl[6] = { 833000, 0x07 },
1480				.odr_len = 7,
1481			},
1482			[ST_LSM6DSX_ID_GYRO] = {
1483				.reg = {
1484					.addr = 0x11,
1485					.mask = GENMASK(7, 4),
1486				},
1487				.odr_avl[0] = {  12500, 0x01 },
1488				.odr_avl[1] = {  26000, 0x02 },
1489				.odr_avl[2] = {  52000, 0x03 },
1490				.odr_avl[3] = { 104000, 0x04 },
1491				.odr_avl[4] = { 208000, 0x05 },
1492				.odr_avl[5] = { 416000, 0x06 },
1493				.odr_avl[6] = { 833000, 0x07 },
1494				.odr_len = 7,
1495			},
1496		},
1497		.fs_table = {
1498			[ST_LSM6DSX_ID_ACC] = {
1499				.reg = {
1500					.addr = 0x10,
1501					.mask = GENMASK(3, 2),
1502				},
1503				.fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
1504				.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
1505				.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
1506				.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
1507				.fs_len = 4,
1508			},
1509			[ST_LSM6DSX_ID_GYRO] = {
1510				.reg = {
1511					.addr = 0x11,
1512					.mask = GENMASK(3, 2),
1513				},
1514				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
1515				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
1516				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
1517				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
1518				.fs_len = 4,
1519			},
1520		},
1521		.irq_config = {
1522			.hla = {
1523				.addr = 0x12,
1524				.mask = BIT(5),
1525			},
1526			.od = {
1527				.addr = 0x12,
1528				.mask = BIT(4),
1529			},
1530		},
1531		.shub_settings = {
1532			.page_mux = {
1533				.addr = 0x01,
1534				.mask = BIT(6),
1535			},
1536			.master_en = {
1537				.sec_page = true,
1538				.addr = 0x14,
1539				.mask = BIT(2),
1540			},
1541			.pullup_en = {
1542				.sec_page = true,
1543				.addr = 0x14,
1544				.mask = BIT(3),
1545			},
1546			.aux_sens = {
1547				.addr = 0x14,
1548				.mask = GENMASK(1, 0),
1549			},
1550			.wr_once = {
1551				.addr = 0x14,
1552				.mask = BIT(6),
1553			},
1554			.num_ext_dev = 3,
1555			.shub_out = {
1556				.sec_page = true,
1557				.addr = 0x02,
1558			},
1559			.slv0_addr = 0x15,
1560			.dw_slv0_addr = 0x21,
1561		},
1562	},
1563};
1564
1565int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable)
1566{
1567	const struct st_lsm6dsx_shub_settings *hub_settings;
1568	unsigned int data;
1569	int err;
1570
1571	hub_settings = &hw->settings->shub_settings;
1572	data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask);
1573	err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr,
1574				 hub_settings->page_mux.mask, data);
1575	usleep_range(100, 150);
1576
1577	return err;
1578}
1579
1580static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id,
1581				   const char **name)
1582{
1583	int err, i, j, data;
1584
1585	for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) {
1586		for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) {
1587			if (st_lsm6dsx_sensor_settings[i].id[j].name &&
1588			    id == st_lsm6dsx_sensor_settings[i].id[j].hw_id)
1589				break;
1590		}
1591		if (j < ST_LSM6DSX_MAX_ID)
1592			break;
1593	}
1594
1595	if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) {
1596		dev_err(hw->dev, "unsupported hw id [%02x]\n", id);
1597		return -ENODEV;
1598	}
1599
1600	err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data);
1601	if (err < 0) {
1602		dev_err(hw->dev, "failed to read whoami register\n");
1603		return err;
1604	}
1605
1606	if (data != st_lsm6dsx_sensor_settings[i].id[j].wai) {
1607		dev_err(hw->dev, "unsupported whoami [%02x]\n", data);
1608		return -ENODEV;
1609	}
1610
1611	*name = st_lsm6dsx_sensor_settings[i].id[j].name;
1612	hw->settings = &st_lsm6dsx_sensor_settings[i];
1613
1614	return 0;
1615}
1616
1617static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor,
1618				     u32 gain)
1619{
1620	const struct st_lsm6dsx_fs_table_entry *fs_table;
1621	unsigned int data;
1622	int i, err;
1623
1624	fs_table = &sensor->hw->settings->fs_table[sensor->id];
1625	for (i = 0; i < fs_table->fs_len; i++) {
1626		if (fs_table->fs_avl[i].gain == gain)
1627			break;
1628	}
1629
1630	if (i == fs_table->fs_len)
1631		return -EINVAL;
1632
1633	data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val,
1634				    fs_table->reg.mask);
1635	err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr,
1636					    fs_table->reg.mask, data);
1637	if (err < 0)
1638		return err;
1639
1640	sensor->gain = gain;
1641
1642	return 0;
1643}
1644
1645int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u32 odr, u8 *val)
1646{
1647	const struct st_lsm6dsx_odr_table_entry *odr_table;
1648	int i;
1649
1650	odr_table = &sensor->hw->settings->odr_table[sensor->id];
1651	for (i = 0; i < odr_table->odr_len; i++) {
1652		/*
1653		 * ext devices can run at different odr respect to
1654		 * accel sensor
1655		 */
1656		if (odr_table->odr_avl[i].milli_hz >= odr)
1657			break;
1658	}
1659
1660	if (i == odr_table->odr_len)
1661		return -EINVAL;
1662
1663	*val = odr_table->odr_avl[i].val;
1664	return odr_table->odr_avl[i].milli_hz;
1665}
1666
1667static int
1668st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u32 odr,
1669				enum st_lsm6dsx_sensor_id id)
1670{
1671	struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]);
1672
1673	if (odr > 0) {
1674		if (hw->enable_mask & BIT(id))
1675			return max_t(u32, ref->odr, odr);
1676		else
1677			return odr;
1678	} else {
1679		return (hw->enable_mask & BIT(id)) ? ref->odr : 0;
1680	}
1681}
1682
1683static int
1684st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr)
1685{
1686	struct st_lsm6dsx_sensor *ref_sensor = sensor;
1687	struct st_lsm6dsx_hw *hw = sensor->hw;
1688	const struct st_lsm6dsx_reg *reg;
1689	unsigned int data;
1690	u8 val = 0;
1691	int err;
1692
1693	switch (sensor->id) {
1694	case ST_LSM6DSX_ID_GYRO:
1695		break;
1696	case ST_LSM6DSX_ID_EXT0:
1697	case ST_LSM6DSX_ID_EXT1:
1698	case ST_LSM6DSX_ID_EXT2:
1699	case ST_LSM6DSX_ID_ACC: {
1700		u32 odr;
1701		int i;
1702
1703		/*
1704		 * i2c embedded controller relies on the accelerometer sensor as
1705		 * bus read/write trigger so we need to enable accel device
1706		 * at odr = max(accel_odr, ext_odr) in order to properly
1707		 * communicate with i2c slave devices
1708		 */
1709		ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
1710		for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) {
1711			if (!hw->iio_devs[i] || i == sensor->id)
1712				continue;
1713
1714			odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i);
1715			if (odr != req_odr)
1716				/* device already configured */
1717				return 0;
1718		}
1719		break;
1720	}
1721	default: /* should never occur */
1722		return -EINVAL;
1723	}
1724
1725	if (req_odr > 0) {
1726		err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val);
1727		if (err < 0)
1728			return err;
1729	}
1730
1731	reg = &hw->settings->odr_table[ref_sensor->id].reg;
1732	data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1733	return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data);
1734}
1735
1736static int
1737__st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1738			       bool enable)
1739{
1740	struct st_lsm6dsx_hw *hw = sensor->hw;
1741	u32 odr = enable ? sensor->odr : 0;
1742	int err;
1743
1744	err = st_lsm6dsx_set_odr(sensor, odr);
1745	if (err < 0)
1746		return err;
1747
1748	if (enable)
1749		hw->enable_mask |= BIT(sensor->id);
1750	else
1751		hw->enable_mask &= ~BIT(sensor->id);
1752
1753	return 0;
1754}
1755
1756static int
1757st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor, bool enable)
1758{
1759	struct st_lsm6dsx_hw *hw = sensor->hw;
1760
1761	if (sensor->id == ST_LSM6DSX_ID_GYRO || enable)
1762		return 0;
1763
1764	return hw->enable_event;
1765}
1766
1767int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1768				 bool enable)
1769{
1770	if (st_lsm6dsx_check_events(sensor, enable))
1771		return 0;
1772
1773	return __st_lsm6dsx_sensor_set_enable(sensor, enable);
1774}
1775
1776static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor,
1777				   u8 addr, int *val)
1778{
1779	struct st_lsm6dsx_hw *hw = sensor->hw;
1780	int err, delay;
1781	__le16 data;
1782
1783	err = st_lsm6dsx_sensor_set_enable(sensor, true);
1784	if (err < 0)
1785		return err;
1786
1787	/*
1788	 * we need to wait for sensor settling time before
1789	 * reading data in order to avoid corrupted samples
1790	 */
1791	delay = 1000000000 / sensor->odr;
1792	usleep_range(3 * delay, 4 * delay);
1793
1794	err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data));
1795	if (err < 0)
1796		return err;
1797
1798	if (!hw->enable_event) {
1799		err = st_lsm6dsx_sensor_set_enable(sensor, false);
1800		if (err < 0)
1801			return err;
1802	}
1803
1804	*val = (s16)le16_to_cpu(data);
1805
1806	return IIO_VAL_INT;
1807}
1808
1809static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev,
1810			       struct iio_chan_spec const *ch,
1811			       int *val, int *val2, long mask)
1812{
1813	struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1814	int ret;
1815
1816	switch (mask) {
1817	case IIO_CHAN_INFO_RAW:
1818		if (!iio_device_claim_direct(iio_dev))
1819			return -EBUSY;
1820
1821		ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val);
1822		iio_device_release_direct(iio_dev);
1823		break;
1824	case IIO_CHAN_INFO_SAMP_FREQ:
1825		*val = sensor->odr / 1000;
1826		*val2 = (sensor->odr % 1000) * 1000;
1827		ret = IIO_VAL_INT_PLUS_MICRO;
1828		break;
1829	case IIO_CHAN_INFO_SCALE:
1830		*val = 0;
1831		*val2 = sensor->gain;
1832		ret = IIO_VAL_INT_PLUS_NANO;
1833		break;
1834	default:
1835		ret = -EINVAL;
1836		break;
1837	}
1838
1839	return ret;
1840}
1841
1842static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev,
1843				struct iio_chan_spec const *chan,
1844				int val, int val2, long mask)
1845{
1846	struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1847	int err = 0;
1848
1849	if (!iio_device_claim_direct(iio_dev))
1850		return -EBUSY;
1851
1852	switch (mask) {
1853	case IIO_CHAN_INFO_SCALE:
1854		err = st_lsm6dsx_set_full_scale(sensor, val2);
1855		break;
1856	case IIO_CHAN_INFO_SAMP_FREQ: {
1857		u8 data;
1858
1859		val = val * 1000 + val2 / 1000;
1860		val = st_lsm6dsx_check_odr(sensor, val, &data);
1861		if (val < 0) {
1862			err = val;
1863		} else {
1864			sensor->odr = val;
1865			sensor->hwfifo_odr_mHz = val;
1866		}
1867		break;
1868	}
1869	default:
1870		err = -EINVAL;
1871		break;
1872	}
1873
1874	iio_device_release_direct(iio_dev);
1875
1876	return err;
1877}
1878
1879static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, bool state)
1880{
1881	const struct st_lsm6dsx_reg *reg;
1882	unsigned int data;
1883	int err;
1884
1885	if (!hw->settings->irq_config.irq1_func.addr)
1886		return -ENOTSUPP;
1887
1888	reg = &hw->settings->event_settings.enable_reg;
1889	if (reg->addr) {
1890		data = ST_LSM6DSX_SHIFT_VAL(state, reg->mask);
1891		err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
1892						    reg->mask, data);
1893		if (err < 0)
1894			return err;
1895	}
1896
1897	/* Enable wakeup interrupt */
1898	data = ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask);
1899	return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr,
1900					     hw->irq_routing->mask, data);
1901}
1902
1903static int st_lsm6dsx_read_event(struct iio_dev *iio_dev,
1904				 const struct iio_chan_spec *chan,
1905				 enum iio_event_type type,
1906				 enum iio_event_direction dir,
1907				 enum iio_event_info info,
1908				 int *val, int *val2)
1909{
1910	struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1911	struct st_lsm6dsx_hw *hw = sensor->hw;
1912
1913	if (type != IIO_EV_TYPE_THRESH)
1914		return -EINVAL;
1915
1916	*val2 = 0;
1917	*val = hw->event_threshold;
1918
1919	return IIO_VAL_INT;
1920}
1921
1922static int
1923st_lsm6dsx_write_event(struct iio_dev *iio_dev,
1924		       const struct iio_chan_spec *chan,
1925		       enum iio_event_type type,
1926		       enum iio_event_direction dir,
1927		       enum iio_event_info info,
1928		       int val, int val2)
1929{
1930	struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1931	struct st_lsm6dsx_hw *hw = sensor->hw;
1932	const struct st_lsm6dsx_reg *reg;
1933	unsigned int data;
1934	int err;
1935
1936	if (type != IIO_EV_TYPE_THRESH)
1937		return -EINVAL;
1938
1939	if (val < 0 || val > 31)
1940		return -EINVAL;
1941
1942	reg = &hw->settings->event_settings.wakeup_reg;
1943	data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1944	err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
1945					    reg->mask, data);
1946	if (err < 0)
1947		return -EINVAL;
1948
1949	hw->event_threshold = val;
1950
1951	return 0;
1952}
1953
1954static int
1955st_lsm6dsx_read_event_config(struct iio_dev *iio_dev,
1956			     const struct iio_chan_spec *chan,
1957			     enum iio_event_type type,
1958			     enum iio_event_direction dir)
1959{
1960	struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1961	struct st_lsm6dsx_hw *hw = sensor->hw;
1962
1963	if (type != IIO_EV_TYPE_THRESH)
1964		return -EINVAL;
1965
1966	return !!(hw->enable_event & BIT(chan->channel2));
1967}
1968
1969static int
1970st_lsm6dsx_write_event_config(struct iio_dev *iio_dev,
1971			      const struct iio_chan_spec *chan,
1972			      enum iio_event_type type,
1973			      enum iio_event_direction dir, bool state)
1974{
1975	struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1976	struct st_lsm6dsx_hw *hw = sensor->hw;
1977	u8 enable_event;
1978	int err;
1979
1980	if (type != IIO_EV_TYPE_THRESH)
1981		return -EINVAL;
1982
1983	if (state) {
1984		enable_event = hw->enable_event | BIT(chan->channel2);
1985
1986		/* do not enable events if they are already enabled */
1987		if (hw->enable_event)
1988			goto out;
1989	} else {
1990		enable_event = hw->enable_event & ~BIT(chan->channel2);
1991
1992		/* only turn off sensor if no events is enabled */
1993		if (enable_event)
1994			goto out;
1995	}
1996
1997	/* stop here if no changes have been made */
1998	if (hw->enable_event == enable_event)
1999		return 0;
2000
2001	err = st_lsm6dsx_event_setup(hw, state);
2002	if (err < 0)
2003		return err;
2004
2005	mutex_lock(&hw->conf_lock);
2006	if (enable_event || !(hw->fifo_mask & BIT(sensor->id)))
2007		err = __st_lsm6dsx_sensor_set_enable(sensor, state);
2008	mutex_unlock(&hw->conf_lock);
2009	if (err < 0)
2010		return err;
2011
2012out:
2013	hw->enable_event = enable_event;
2014
2015	return 0;
2016}
2017
2018int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val)
2019{
2020	struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2021	struct st_lsm6dsx_hw *hw = sensor->hw;
2022	int err;
2023
2024	val = clamp_val(val, 1, hw->settings->fifo_ops.max_size);
2025
2026	mutex_lock(&hw->conf_lock);
2027
2028	err = st_lsm6dsx_update_watermark(sensor, val);
2029
2030	mutex_unlock(&hw->conf_lock);
2031
2032	if (err < 0)
2033		return err;
2034
2035	sensor->watermark = val;
2036
2037	return 0;
2038}
2039
2040static ssize_t
2041st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev,
2042					  struct device_attribute *attr,
2043					  char *buf)
2044{
2045	struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev));
2046	const struct st_lsm6dsx_odr_table_entry *odr_table;
2047	int i, len = 0;
2048
2049	odr_table = &sensor->hw->settings->odr_table[sensor->id];
2050	for (i = 0; i < odr_table->odr_len; i++)
2051	     len += sysfs_emit_at(buf, len, "%d.%03d%c",
2052				  odr_table->odr_avl[i].milli_hz / 1000,
2053				  odr_table->odr_avl[i].milli_hz % 1000,
2054				  (i == odr_table->odr_len - 1) ? '\n' : ' ');
2055
2056	return len;
2057}
2058
2059static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev,
2060					    struct device_attribute *attr,
2061					    char *buf)
2062{
2063	struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev));
2064	const struct st_lsm6dsx_fs_table_entry *fs_table;
2065	struct st_lsm6dsx_hw *hw = sensor->hw;
2066	int i, len = 0;
2067
2068	fs_table = &hw->settings->fs_table[sensor->id];
2069	for (i = 0; i < fs_table->fs_len; i++)
2070	     len += sysfs_emit_at(buf, len, "0.%09u%c",
2071				  fs_table->fs_avl[i].gain,
2072				  (i == fs_table->fs_len - 1) ? '\n' : ' ');
2073
2074	return len;
2075}
2076
2077static int st_lsm6dsx_write_raw_get_fmt(struct iio_dev *indio_dev,
2078					struct iio_chan_spec const *chan,
2079					long mask)
2080{
2081	switch (mask) {
2082	case IIO_CHAN_INFO_SCALE:
2083		switch (chan->type) {
2084		case IIO_ANGL_VEL:
2085		case IIO_ACCEL:
2086			return IIO_VAL_INT_PLUS_NANO;
2087		default:
2088			return IIO_VAL_INT_PLUS_MICRO;
2089		}
2090	default:
2091		return IIO_VAL_INT_PLUS_MICRO;
2092	}
2093}
2094
2095static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail);
2096static IIO_DEVICE_ATTR(in_accel_scale_available, 0444,
2097		       st_lsm6dsx_sysfs_scale_avail, NULL, 0);
2098static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444,
2099		       st_lsm6dsx_sysfs_scale_avail, NULL, 0);
2100
2101static struct attribute *st_lsm6dsx_acc_attributes[] = {
2102	&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
2103	&iio_dev_attr_in_accel_scale_available.dev_attr.attr,
2104	NULL,
2105};
2106
2107static const struct attribute_group st_lsm6dsx_acc_attribute_group = {
2108	.attrs = st_lsm6dsx_acc_attributes,
2109};
2110
2111static const struct iio_info st_lsm6dsx_acc_info = {
2112	.attrs = &st_lsm6dsx_acc_attribute_group,
2113	.read_raw = st_lsm6dsx_read_raw,
2114	.write_raw = st_lsm6dsx_write_raw,
2115	.read_event_value = st_lsm6dsx_read_event,
2116	.write_event_value = st_lsm6dsx_write_event,
2117	.read_event_config = st_lsm6dsx_read_event_config,
2118	.write_event_config = st_lsm6dsx_write_event_config,
2119	.hwfifo_set_watermark = st_lsm6dsx_set_watermark,
2120	.write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
2121};
2122
2123static struct attribute *st_lsm6dsx_gyro_attributes[] = {
2124	&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
2125	&iio_dev_attr_in_anglvel_scale_available.dev_attr.attr,
2126	NULL,
2127};
2128
2129static const struct attribute_group st_lsm6dsx_gyro_attribute_group = {
2130	.attrs = st_lsm6dsx_gyro_attributes,
2131};
2132
2133static const struct iio_info st_lsm6dsx_gyro_info = {
2134	.attrs = &st_lsm6dsx_gyro_attribute_group,
2135	.read_raw = st_lsm6dsx_read_raw,
2136	.write_raw = st_lsm6dsx_write_raw,
2137	.hwfifo_set_watermark = st_lsm6dsx_set_watermark,
2138	.write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
2139};
2140
2141static int
2142st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw,
2143			const struct st_lsm6dsx_reg **drdy_reg)
2144{
2145	struct device *dev = hw->dev;
2146	const struct st_sensors_platform_data *pdata = dev_get_platdata(dev);
2147	int err = 0, drdy_pin;
2148
2149	if (device_property_read_u32(dev, "st,drdy-int-pin", &drdy_pin) < 0)
2150		drdy_pin = pdata ? pdata->drdy_int_pin : 1;
2151
2152	switch (drdy_pin) {
2153	case 1:
2154		hw->irq_routing = &hw->settings->irq_config.irq1_func;
2155		*drdy_reg = &hw->settings->irq_config.irq1;
2156		break;
2157	case 2:
2158		hw->irq_routing = &hw->settings->irq_config.irq2_func;
2159		*drdy_reg = &hw->settings->irq_config.irq2;
2160		break;
2161	default:
2162		dev_err(hw->dev, "unsupported data ready pin\n");
2163		err = -EINVAL;
2164		break;
2165	}
2166
2167	return err;
2168}
2169
2170static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw)
2171{
2172	const struct st_lsm6dsx_shub_settings *hub_settings;
2173	struct device *dev = hw->dev;
2174	const struct st_sensors_platform_data *pdata = dev_get_platdata(dev);
2175	unsigned int data;
2176	int err = 0;
2177
2178	hub_settings = &hw->settings->shub_settings;
2179
2180	if (device_property_read_bool(dev, "st,pullups") ||
2181	    (pdata && pdata->pullups)) {
2182		if (hub_settings->pullup_en.sec_page) {
2183			err = st_lsm6dsx_set_page(hw, true);
2184			if (err < 0)
2185				return err;
2186		}
2187
2188		data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask);
2189		err = regmap_update_bits(hw->regmap,
2190					 hub_settings->pullup_en.addr,
2191					 hub_settings->pullup_en.mask, data);
2192
2193		if (hub_settings->pullup_en.sec_page)
2194			st_lsm6dsx_set_page(hw, false);
2195
2196		if (err < 0)
2197			return err;
2198	}
2199
2200	if (hub_settings->aux_sens.addr) {
2201		/* configure aux sensors */
2202		err = st_lsm6dsx_set_page(hw, true);
2203		if (err < 0)
2204			return err;
2205
2206		data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask);
2207		err = regmap_update_bits(hw->regmap,
2208					 hub_settings->aux_sens.addr,
2209					 hub_settings->aux_sens.mask, data);
2210
2211		st_lsm6dsx_set_page(hw, false);
2212
2213		if (err < 0)
2214			return err;
2215	}
2216
2217	if (hub_settings->emb_func.addr) {
2218		data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->emb_func.mask);
2219		err = regmap_update_bits(hw->regmap,
2220					 hub_settings->emb_func.addr,
2221					 hub_settings->emb_func.mask, data);
2222	}
2223
2224	return err;
2225}
2226
2227static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw)
2228{
2229	const struct st_lsm6dsx_hw_ts_settings *ts_settings;
2230	int err, val;
2231
2232	ts_settings = &hw->settings->ts_settings;
2233	/* enable hw timestamp generation if necessary */
2234	if (ts_settings->timer_en.addr) {
2235		val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask);
2236		err = regmap_update_bits(hw->regmap,
2237					 ts_settings->timer_en.addr,
2238					 ts_settings->timer_en.mask, val);
2239		if (err < 0)
2240			return err;
2241	}
2242
2243	/* enable high resolution for hw ts timer if necessary */
2244	if (ts_settings->hr_timer.addr) {
2245		val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask);
2246		err = regmap_update_bits(hw->regmap,
2247					 ts_settings->hr_timer.addr,
2248					 ts_settings->hr_timer.mask, val);
2249		if (err < 0)
2250			return err;
2251	}
2252
2253	/* enable ts queueing in FIFO if necessary */
2254	if (ts_settings->fifo_en.addr) {
2255		val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask);
2256		err = regmap_update_bits(hw->regmap,
2257					 ts_settings->fifo_en.addr,
2258					 ts_settings->fifo_en.mask, val);
2259		if (err < 0)
2260			return err;
2261	}
2262
2263	/* calibrate timestamp sensitivity */
2264	hw->ts_gain = ts_settings->ts_sensitivity;
2265	if (ts_settings->freq_fine) {
2266		err = regmap_read(hw->regmap, ts_settings->freq_fine, &val);
2267		if (err < 0)
2268			return err;
2269
2270		hw->ts_gain -= ((s8)val * ts_settings->ts_trim_coeff) / 1000;
2271	}
2272
2273	return 0;
2274}
2275
2276static int st_lsm6dsx_reset_device(struct st_lsm6dsx_hw *hw)
2277{
2278	const struct st_lsm6dsx_reg *reg;
2279	int err;
2280
2281	/*
2282	 * flush hw FIFO before device reset in order to avoid
2283	 * possible races on interrupt line 1. If the first interrupt
2284	 * line is asserted during hw reset the device will work in
2285	 * I3C-only mode (if it is supported)
2286	 */
2287	err = st_lsm6dsx_flush_fifo(hw);
2288	if (err < 0 && err != -ENOTSUPP)
2289		return err;
2290
2291	/* device sw reset */
2292	reg = &hw->settings->reset;
2293	err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2294				 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2295	if (err < 0)
2296		return err;
2297
2298	msleep(50);
2299
2300	/* reload trimming parameter */
2301	reg = &hw->settings->boot;
2302	err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2303				 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2304	if (err < 0)
2305		return err;
2306
2307	msleep(50);
2308
2309	return 0;
2310}
2311
2312static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
2313{
2314	const struct st_lsm6dsx_reg *reg;
2315	int err;
2316
2317	err = st_lsm6dsx_reset_device(hw);
2318	if (err < 0)
2319		return err;
2320
2321	/* enable Block Data Update */
2322	reg = &hw->settings->bdu;
2323	err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2324				 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2325	if (err < 0)
2326		return err;
2327
2328	/* enable FIFO watermak interrupt */
2329	err = st_lsm6dsx_get_drdy_reg(hw, &reg);
2330	if (err < 0)
2331		return err;
2332
2333	err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2334				 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2335	if (err < 0)
2336		return err;
2337
2338	/* enable Latched interrupts for device events */
2339	if (hw->settings->irq_config.lir.addr) {
2340		reg = &hw->settings->irq_config.lir;
2341		err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2342					 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2343		if (err < 0)
2344			return err;
2345
2346		/* enable clear on read for latched interrupts */
2347		if (hw->settings->irq_config.clear_on_read.addr) {
2348			reg = &hw->settings->irq_config.clear_on_read;
2349			err = regmap_update_bits(hw->regmap,
2350					reg->addr, reg->mask,
2351					ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2352			if (err < 0)
2353				return err;
2354		}
2355	}
2356
2357	/* enable drdy-mas if available */
2358	if (hw->settings->drdy_mask.addr) {
2359		reg = &hw->settings->drdy_mask;
2360		err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2361					 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2362		if (err < 0)
2363			return err;
2364	}
2365
2366	err = st_lsm6dsx_init_shub(hw);
2367	if (err < 0)
2368		return err;
2369
2370	return st_lsm6dsx_init_hw_timer(hw);
2371}
2372
2373static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw,
2374					       enum st_lsm6dsx_sensor_id id,
2375					       const char *name)
2376{
2377	struct st_lsm6dsx_sensor *sensor;
2378	struct iio_dev *iio_dev;
2379
2380	iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor));
2381	if (!iio_dev)
2382		return NULL;
2383
2384	iio_dev->modes = INDIO_DIRECT_MODE;
2385	iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks;
2386	iio_dev->channels = hw->settings->channels[id].chan;
2387	iio_dev->num_channels = hw->settings->channels[id].len;
2388
2389	sensor = iio_priv(iio_dev);
2390	sensor->id = id;
2391	sensor->hw = hw;
2392	sensor->odr = hw->settings->odr_table[id].odr_avl[0].milli_hz;
2393	sensor->hwfifo_odr_mHz = sensor->odr;
2394	sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain;
2395	sensor->watermark = 1;
2396
2397	switch (id) {
2398	case ST_LSM6DSX_ID_ACC:
2399		iio_dev->info = &st_lsm6dsx_acc_info;
2400		scnprintf(sensor->name, sizeof(sensor->name), "%s_accel",
2401			  name);
2402		break;
2403	case ST_LSM6DSX_ID_GYRO:
2404		iio_dev->info = &st_lsm6dsx_gyro_info;
2405		scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro",
2406			  name);
2407		break;
2408	default:
2409		return NULL;
2410	}
2411	iio_dev->name = sensor->name;
2412
2413	return iio_dev;
2414}
2415
2416static bool
2417st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw)
2418{
2419	const struct st_lsm6dsx_event_settings *event_settings;
2420	int err, data;
2421	s64 timestamp;
2422
2423	if (!hw->enable_event)
2424		return false;
2425
2426	event_settings = &hw->settings->event_settings;
2427	err = st_lsm6dsx_read_locked(hw, event_settings->wakeup_src_reg,
2428				     &data, sizeof(data));
2429	if (err < 0)
2430		return false;
2431
2432	timestamp = iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
2433	if ((data & hw->settings->event_settings.wakeup_src_z_mask) &&
2434	    (hw->enable_event & BIT(IIO_MOD_Z)))
2435		iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2436			       IIO_MOD_EVENT_CODE(IIO_ACCEL,
2437						  0,
2438						  IIO_MOD_Z,
2439						  IIO_EV_TYPE_THRESH,
2440						  IIO_EV_DIR_EITHER),
2441						  timestamp);
2442
2443	if ((data & hw->settings->event_settings.wakeup_src_y_mask) &&
2444	    (hw->enable_event & BIT(IIO_MOD_Y)))
2445		iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2446			       IIO_MOD_EVENT_CODE(IIO_ACCEL,
2447						  0,
2448						  IIO_MOD_Y,
2449						  IIO_EV_TYPE_THRESH,
2450						  IIO_EV_DIR_EITHER),
2451						  timestamp);
2452
2453	if ((data & hw->settings->event_settings.wakeup_src_x_mask) &&
2454	    (hw->enable_event & BIT(IIO_MOD_X)))
2455		iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2456			       IIO_MOD_EVENT_CODE(IIO_ACCEL,
2457						  0,
2458						  IIO_MOD_X,
2459						  IIO_EV_TYPE_THRESH,
2460						  IIO_EV_DIR_EITHER),
2461						  timestamp);
2462
2463	return data & event_settings->wakeup_src_status_mask;
2464}
2465
2466static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private)
2467{
2468	struct st_lsm6dsx_hw *hw = private;
2469	int fifo_len = 0, len;
2470	bool event;
2471
2472	event = st_lsm6dsx_report_motion_event(hw);
2473
2474	if (!hw->settings->fifo_ops.read_fifo)
2475		return event ? IRQ_HANDLED : IRQ_NONE;
2476
2477	/*
2478	 * If we are using edge IRQs, new samples can arrive while
2479	 * processing current interrupt since there are no hw
2480	 * guarantees the irq line stays "low" long enough to properly
2481	 * detect the new interrupt. In this case the new sample will
2482	 * be missed.
2483	 * Polling FIFO status register allow us to read new
2484	 * samples even if the interrupt arrives while processing
2485	 * previous data and the timeslot where the line is "low" is
2486	 * too short to be properly detected.
2487	 */
2488	do {
2489		mutex_lock(&hw->fifo_lock);
2490		len = hw->settings->fifo_ops.read_fifo(hw);
2491		mutex_unlock(&hw->fifo_lock);
2492
2493		if (len > 0)
2494			fifo_len += len;
2495	} while (len > 0);
2496
2497	return fifo_len || event ? IRQ_HANDLED : IRQ_NONE;
2498}
2499
2500static irqreturn_t st_lsm6dsx_sw_trigger_handler_thread(int irq,
2501							void *private)
2502{
2503	struct iio_poll_func *pf = private;
2504	struct iio_dev *iio_dev = pf->indio_dev;
2505	struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2506	struct st_lsm6dsx_hw *hw = sensor->hw;
2507
2508	if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
2509	    sensor->id == ST_LSM6DSX_ID_EXT1 ||
2510	    sensor->id == ST_LSM6DSX_ID_EXT2)
2511		st_lsm6dsx_shub_read_output(hw,
2512					    (u8 *)hw->scan[sensor->id].channels,
2513					    sizeof(hw->scan[sensor->id].channels));
2514	else
2515		st_lsm6dsx_read_locked(hw, iio_dev->channels[0].address,
2516				       hw->scan[sensor->id].channels,
2517				       sizeof(hw->scan[sensor->id].channels));
2518
2519	iio_push_to_buffers_with_timestamp(iio_dev, &hw->scan[sensor->id],
2520					   iio_get_time_ns(iio_dev));
2521	iio_trigger_notify_done(iio_dev->trig);
2522
2523	return IRQ_HANDLED;
2524}
2525
2526static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw)
2527{
2528	const struct st_lsm6dsx_reg *reg;
2529	struct device *dev = hw->dev;
2530	const struct st_sensors_platform_data *pdata = dev_get_platdata(dev);
2531	unsigned long irq_type;
2532	bool irq_active_low;
2533	int err;
2534
2535	irq_type = irq_get_trigger_type(hw->irq);
2536	switch (irq_type) {
2537	case IRQF_TRIGGER_HIGH:
2538	case IRQF_TRIGGER_RISING:
2539		irq_active_low = false;
2540		break;
2541	case IRQF_TRIGGER_LOW:
2542	case IRQF_TRIGGER_FALLING:
2543		irq_active_low = true;
2544		break;
2545	default:
2546		dev_info(hw->dev, "mode %lx unsupported\n", irq_type);
2547		return -EINVAL;
2548	}
2549
2550	reg = &hw->settings->irq_config.hla;
2551	err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2552				 ST_LSM6DSX_SHIFT_VAL(irq_active_low,
2553						      reg->mask));
2554	if (err < 0)
2555		return err;
2556
2557	if (device_property_read_bool(dev, "drive-open-drain") ||
2558	    (pdata && pdata->open_drain)) {
2559		reg = &hw->settings->irq_config.od;
2560		err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2561					 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2562		if (err < 0)
2563			return err;
2564
2565		irq_type |= IRQF_SHARED;
2566	}
2567
2568	err = devm_request_threaded_irq(hw->dev, hw->irq,
2569					NULL,
2570					st_lsm6dsx_handler_thread,
2571					irq_type | IRQF_ONESHOT,
2572					"lsm6dsx", hw);
2573	if (err) {
2574		dev_err(hw->dev, "failed to request trigger irq %d\n",
2575			hw->irq);
2576		return err;
2577	}
2578
2579	return 0;
2580}
2581
2582static int st_lsm6dsx_sw_buffer_preenable(struct iio_dev *iio_dev)
2583{
2584	struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2585
2586	return st_lsm6dsx_device_set_enable(sensor, true);
2587}
2588
2589static int st_lsm6dsx_sw_buffer_postdisable(struct iio_dev *iio_dev)
2590{
2591	struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2592
2593	return st_lsm6dsx_device_set_enable(sensor, false);
2594}
2595
2596static const struct iio_buffer_setup_ops st_lsm6dsx_sw_buffer_ops = {
2597	.preenable = st_lsm6dsx_sw_buffer_preenable,
2598	.postdisable = st_lsm6dsx_sw_buffer_postdisable,
2599};
2600
2601static int st_lsm6dsx_sw_buffers_setup(struct st_lsm6dsx_hw *hw)
2602{
2603	int i;
2604
2605	for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2606		int err;
2607
2608		if (!hw->iio_devs[i])
2609			continue;
2610
2611		err = devm_iio_triggered_buffer_setup(hw->dev,
2612					hw->iio_devs[i], NULL,
2613					st_lsm6dsx_sw_trigger_handler_thread,
2614					&st_lsm6dsx_sw_buffer_ops);
2615		if (err)
2616			return err;
2617	}
2618
2619	return 0;
2620}
2621
2622static int st_lsm6dsx_init_regulators(struct device *dev)
2623{
2624	/* vdd-vddio power regulators */
2625	static const char * const regulators[] = { "vdd", "vddio" };
2626	int err;
2627
2628	err = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulators),
2629					     regulators);
2630	if (err)
2631		return dev_err_probe(dev, err, "failed to enable regulators\n");
2632
2633	msleep(50);
2634
2635	return 0;
2636}
2637
2638int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id,
2639		     struct regmap *regmap)
2640{
2641	const struct st_sensors_platform_data *pdata = dev_get_platdata(dev);
2642	const struct st_lsm6dsx_shub_settings *hub_settings;
2643	struct st_lsm6dsx_hw *hw;
2644	const char *name = NULL;
2645	int i, err;
2646
2647	hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL);
2648	if (!hw)
2649		return -ENOMEM;
2650
2651	dev_set_drvdata(dev, hw);
2652
2653	mutex_init(&hw->fifo_lock);
2654	mutex_init(&hw->conf_lock);
2655	mutex_init(&hw->page_lock);
2656
2657	err = st_lsm6dsx_init_regulators(dev);
2658	if (err)
2659		return err;
2660
2661	hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL);
2662	if (!hw->buff)
2663		return -ENOMEM;
2664
2665	hw->dev = dev;
2666	hw->irq = irq;
2667	hw->regmap = regmap;
2668
2669	err = st_lsm6dsx_check_whoami(hw, hw_id, &name);
2670	if (err < 0)
2671		return err;
2672
2673	for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) {
2674		hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name);
2675		if (!hw->iio_devs[i])
2676			return -ENOMEM;
2677	}
2678
2679	err = st_lsm6dsx_init_device(hw);
2680	if (err < 0)
2681		return err;
2682
2683	hub_settings = &hw->settings->shub_settings;
2684	if (hub_settings->master_en.addr &&
2685	    !device_property_read_bool(dev, "st,disable-sensor-hub")) {
2686		err = st_lsm6dsx_shub_probe(hw, name);
2687		if (err < 0)
2688			return err;
2689	}
2690
2691	if (hw->irq > 0) {
2692		err = st_lsm6dsx_irq_setup(hw);
2693		if (err < 0)
2694			return err;
2695
2696		err = st_lsm6dsx_fifo_setup(hw);
2697		if (err < 0)
2698			return err;
2699	}
2700
2701	if (!hw->irq || !hw->settings->fifo_ops.read_fifo) {
2702		/*
2703		 * Rely on sw triggers (e.g. hr-timers) if irq pin is not
2704		 * connected of if the device does not support HW FIFO
2705		 */
2706		err = st_lsm6dsx_sw_buffers_setup(hw);
2707		if (err)
2708			return err;
2709	}
2710
2711	if (!iio_read_acpi_mount_matrix(hw->dev, &hw->orientation, "ROTM")) {
2712		err = iio_read_mount_matrix(hw->dev, &hw->orientation);
2713		if (err)
2714			return err;
2715	}
2716
2717	for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2718		if (!hw->iio_devs[i])
2719			continue;
2720
2721		err = devm_iio_device_register(hw->dev, hw->iio_devs[i]);
2722		if (err)
2723			return err;
2724	}
2725
2726	if (device_property_read_bool(dev, "wakeup-source") ||
2727	    (pdata && pdata->wakeup_source)) {
2728		err = devm_device_init_wakeup(dev);
2729		if (err)
2730			return dev_err_probe(dev, err, "Failed to init wakeup\n");
2731	}
2732
2733	return 0;
2734}
2735EXPORT_SYMBOL_NS(st_lsm6dsx_probe, "IIO_LSM6DSX");
2736
2737static int st_lsm6dsx_suspend(struct device *dev)
2738{
2739	struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2740	struct st_lsm6dsx_sensor *sensor;
2741	int i, err = 0;
2742
2743	for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2744		if (!hw->iio_devs[i])
2745			continue;
2746
2747		sensor = iio_priv(hw->iio_devs[i]);
2748		if (!(hw->enable_mask & BIT(sensor->id)))
2749			continue;
2750
2751		if (device_may_wakeup(dev) &&
2752		    sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) {
2753			/* Enable wake from IRQ */
2754			enable_irq_wake(hw->irq);
2755			continue;
2756		}
2757
2758		err = st_lsm6dsx_device_set_enable(sensor, false);
2759		if (err < 0)
2760			return err;
2761
2762		hw->suspend_mask |= BIT(sensor->id);
2763	}
2764
2765	if (hw->fifo_mask)
2766		err = st_lsm6dsx_flush_fifo(hw);
2767
2768	return err;
2769}
2770
2771static int st_lsm6dsx_resume(struct device *dev)
2772{
2773	struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2774	struct st_lsm6dsx_sensor *sensor;
2775	int i, err = 0;
2776
2777	for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2778		if (!hw->iio_devs[i])
2779			continue;
2780
2781		sensor = iio_priv(hw->iio_devs[i]);
2782		if (device_may_wakeup(dev) &&
2783		    sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event)
2784			disable_irq_wake(hw->irq);
2785
2786		if (!(hw->suspend_mask & BIT(sensor->id)))
2787			continue;
2788
2789		err = st_lsm6dsx_device_set_enable(sensor, true);
2790		if (err < 0)
2791			return err;
2792
2793		hw->suspend_mask &= ~BIT(sensor->id);
2794	}
2795
2796	if (hw->fifo_mask)
2797		err = st_lsm6dsx_resume_fifo(hw);
2798
2799	return err;
2800}
2801
2802EXPORT_NS_SIMPLE_DEV_PM_OPS(st_lsm6dsx_pm_ops, st_lsm6dsx_suspend,
2803			    st_lsm6dsx_resume, IIO_LSM6DSX);
2804
2805MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>");
2806MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
2807MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver");
2808MODULE_LICENSE("GPL v2");