bmi323.h

  1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * IIO driver for Bosch BMI323 6-Axis IMU
  4 *
  5 * Copyright (C) 2023, Jagath Jog J <jagathjog1996@gmail.com>
  6 */
  7
  8#ifndef _BMI323_H_
  9#define _BMI323_H_
 10
 11#include <linux/bits.h>
 12#include <linux/regmap.h>
 13#include <linux/units.h>
 14
 15#define BMI323_I2C_DUMMY			2
 16#define BMI323_SPI_DUMMY			1
 17
 18/* Register map */
 19
 20#define BMI323_CHIP_ID_REG			0x00
 21#define BMI323_CHIP_ID_VAL			0x0043
 22#define BMI323_CHIP_ID_MSK			GENMASK(7, 0)
 23#define BMI323_ERR_REG				0x01
 24#define BMI323_STATUS_REG			0x02
 25#define BMI323_STATUS_POR_MSK			BIT(0)
 26
 27/* Accelero/Gyro/Temp data registers */
 28#define BMI323_ACCEL_X_REG			0x03
 29#define BMI323_GYRO_X_REG			0x06
 30#define BMI323_TEMP_REG				0x09
 31#define BMI323_ALL_CHAN_MSK			GENMASK(5, 0)
 32
 33/* Status registers */
 34#define BMI323_STATUS_INT1_REG			0x0D
 35#define BMI323_STATUS_INT2_REG			0x0E
 36#define BMI323_STATUS_NOMOTION_MSK		BIT(0)
 37#define BMI323_STATUS_MOTION_MSK		BIT(1)
 38#define BMI323_STATUS_STP_WTR_MSK		BIT(5)
 39#define BMI323_STATUS_TAP_MSK			BIT(8)
 40#define BMI323_STATUS_ERROR_MSK			BIT(10)
 41#define BMI323_STATUS_TMP_DRDY_MSK		BIT(11)
 42#define BMI323_STATUS_GYR_DRDY_MSK		BIT(12)
 43#define BMI323_STATUS_ACC_DRDY_MSK		BIT(13)
 44#define BMI323_STATUS_ACC_GYR_DRDY_MSK		GENMASK(13, 12)
 45#define BMI323_STATUS_FIFO_WTRMRK_MSK		BIT(14)
 46#define BMI323_STATUS_FIFO_FULL_MSK		BIT(15)
 47
 48/* Feature registers */
 49#define BMI323_FEAT_IO0_REG			0x10
 50#define BMI323_FEAT_IO0_XYZ_NOMOTION_MSK	GENMASK(2, 0)
 51#define BMI323_FEAT_IO0_XYZ_MOTION_MSK		GENMASK(5, 3)
 52#define BMI323_FEAT_XYZ_MSK			GENMASK(2, 0)
 53#define BMI323_FEAT_IO0_STP_CNT_MSK		BIT(9)
 54#define BMI323_FEAT_IO0_S_TAP_MSK		BIT(12)
 55#define BMI323_FEAT_IO0_D_TAP_MSK		BIT(13)
 56#define BMI323_FEAT_IO1_REG			0x11
 57#define BMI323_FEAT_IO1_ERR_MSK			GENMASK(3, 0)
 58#define BMI323_FEAT_IO2_REG			0x12
 59#define BMI323_FEAT_IO_STATUS_REG		0x14
 60#define BMI323_FEAT_IO_STATUS_MSK		BIT(0)
 61#define BMI323_FEAT_ENG_POLL			2000
 62#define BMI323_FEAT_ENG_TIMEOUT			10000
 63
 64/* FIFO registers */
 65#define BMI323_FIFO_FILL_LEVEL_REG		0x15
 66#define BMI323_FIFO_DATA_REG			0x16
 67
 68/* Accelero/Gyro config registers */
 69#define BMI323_ACC_CONF_REG			0x20
 70#define BMI323_GYRO_CONF_REG			0x21
 71#define BMI323_ACC_GYRO_CONF_MODE_MSK		GENMASK(14, 12)
 72#define BMI323_ACC_GYRO_CONF_ODR_MSK		GENMASK(3, 0)
 73#define BMI323_ACC_GYRO_CONF_SCL_MSK		GENMASK(6, 4)
 74#define BMI323_ACC_GYRO_CONF_BW_MSK		BIT(7)
 75#define BMI323_ACC_GYRO_CONF_AVG_MSK		GENMASK(10, 8)
 76
 77/* FIFO registers */
 78#define BMI323_FIFO_WTRMRK_REG			0x35
 79#define BMI323_FIFO_CONF_REG			0x36
 80#define BMI323_FIFO_CONF_STP_FUL_MSK		BIT(0)
 81#define BMI323_FIFO_CONF_ACC_GYR_EN_MSK		GENMASK(10, 9)
 82#define BMI323_FIFO_ACC_GYR_MSK			GENMASK(1, 0)
 83#define BMI323_FIFO_CTRL_REG			0x37
 84#define BMI323_FIFO_FLUSH_MSK			BIT(0)
 85
 86/* Interrupt pin config registers */
 87#define BMI323_IO_INT_CTR_REG			0x38
 88#define BMI323_IO_INT1_LVL_MSK			BIT(0)
 89#define BMI323_IO_INT1_OD_MSK			BIT(1)
 90#define BMI323_IO_INT1_OP_EN_MSK		BIT(2)
 91#define BMI323_IO_INT1_LVL_OD_OP_MSK		GENMASK(2, 0)
 92#define BMI323_IO_INT2_LVL_MSK			BIT(8)
 93#define BMI323_IO_INT2_OD_MSK			BIT(9)
 94#define BMI323_IO_INT2_OP_EN_MSK		BIT(10)
 95#define BMI323_IO_INT2_LVL_OD_OP_MSK		GENMASK(10, 8)
 96#define BMI323_IO_INT_CONF_REG			0x39
 97#define BMI323_IO_INT_LTCH_MSK			BIT(0)
 98#define BMI323_INT_MAP1_REG			0x3A
 99#define BMI323_INT_MAP2_REG			0x3B
100#define BMI323_NOMOTION_MSK			GENMASK(1, 0)
101#define BMI323_MOTION_MSK			GENMASK(3, 2)
102#define BMI323_STEP_CNT_MSK			GENMASK(11, 10)
103#define BMI323_TAP_MSK				GENMASK(1, 0)
104#define BMI323_TMP_DRDY_MSK			GENMASK(7, 6)
105#define BMI323_GYR_DRDY_MSK			GENMASK(9, 8)
106#define BMI323_ACC_DRDY_MSK			GENMASK(11, 10)
107#define BMI323_FIFO_WTRMRK_MSK			GENMASK(13, 12)
108#define BMI323_FIFO_FULL_MSK			GENMASK(15, 14)
109
110/* Feature registers */
111#define BMI323_FEAT_CTRL_REG			0x40
112#define BMI323_FEAT_ENG_EN_MSK			BIT(0)
113#define BMI323_FEAT_DATA_ADDR			0x41
114#define BMI323_FEAT_DATA_TX			0x42
115#define BMI323_FEAT_DATA_STATUS			0x43
116#define BMI323_FEAT_DATA_TX_RDY_MSK		BIT(1)
117#define BMI323_FEAT_EVNT_EXT_REG		0x47
118#define BMI323_FEAT_EVNT_EXT_S_MSK		BIT(3)
119#define BMI323_FEAT_EVNT_EXT_D_MSK		BIT(4)
120
121#define BMI323_CMD_REG				0x7E
122#define BMI323_RST_VAL				0xDEAF
123#define BMI323_CFG_RES_REG			0x7F
124
125/* Extended registers */
126#define BMI323_GEN_SET1_REG			0x02
127#define BMI323_GEN_SET1_MODE_MSK		BIT(0)
128#define BMI323_GEN_HOLD_DUR_MSK			GENMASK(4, 1)
129
130/* Any Motion/No Motion config registers */
131#define BMI323_ANYMO1_REG			0x05
132#define BMI323_NOMO1_REG			0x08
133#define BMI323_MO2_OFFSET			0x01
134#define BMI323_MO3_OFFSET			0x02
135#define BMI323_MO1_REF_UP_MSK			BIT(12)
136#define BMI323_MO1_SLOPE_TH_MSK			GENMASK(11, 0)
137#define BMI323_MO2_HYSTR_MSK			GENMASK(9, 0)
138#define BMI323_MO3_DURA_MSK			GENMASK(12, 0)
139
140/* Step counter config registers */
141#define BMI323_STEP_SC1_REG			0x10
142#define BMI323_STEP_SC1_WTRMRK_MSK		GENMASK(9, 0)
143#define BMI323_STEP_SC1_RST_CNT_MSK		BIT(10)
144#define BMI323_STEP_LEN				2
145
146/* Tap gesture config registers */
147#define BMI323_TAP1_REG				0x1E
148#define BMI323_TAP1_AXIS_SEL_MSK		GENMASK(1, 0)
149#define BMI323_AXIS_XYZ_MSK			GENMASK(1, 0)
150#define BMI323_TAP1_TIMOUT_MSK			BIT(2)
151#define BMI323_TAP1_MAX_PEAKS_MSK		GENMASK(5, 3)
152#define BMI323_TAP1_MODE_MSK			GENMASK(7, 6)
153#define BMI323_TAP2_REG				0x1F
154#define BMI323_TAP2_THRES_MSK			GENMASK(9, 0)
155#define BMI323_TAP2_MAX_DUR_MSK			GENMASK(15, 10)
156#define BMI323_TAP3_REG				0x20
157#define BMI323_TAP3_QUIET_TIM_MSK		GENMASK(15, 12)
158#define BMI323_TAP3_QT_BW_TAP_MSK		GENMASK(11, 8)
159#define BMI323_TAP3_QT_AFT_GES_MSK		GENMASK(15, 12)
160
161#define BMI323_MOTION_THRES_SCALE		512
162#define BMI323_MOTION_HYSTR_SCALE		512
163#define BMI323_MOTION_DURAT_SCALE		50
164#define BMI323_TAP_THRES_SCALE			512
165#define BMI323_DUR_BW_TAP_SCALE			200
166#define BMI323_QUITE_TIM_GES_SCALE		25
167#define BMI323_MAX_GES_DUR_SCALE		25
168
169/*
170 * The formula to calculate temperature in C.
171 * See datasheet section 6.1.1, Register Map Overview
172 *
173 * T_C = (temp_raw / 512) + 23
174 */
175#define BMI323_TEMP_OFFSET			11776
176#define BMI323_TEMP_SCALE			1953125
177
178/*
179 * The BMI323 features a FIFO with a capacity of 2048 bytes. Each frame
180 * consists of accelerometer (X, Y, Z) data and gyroscope (X, Y, Z) data,
181 * totaling 6 words or 12 bytes. The FIFO buffer can hold a total of
182 * 170 frames.
183 *
184 * If a watermark interrupt is configured for 170 frames, the interrupt will
185 * trigger when the FIFO reaches 169 frames, so limit the maximum watermark
186 * level to 169 frames. In terms of data, 169 frames would equal 1014 bytes,
187 * which is approximately 2 frames before the FIFO reaches its full capacity.
188 * See datasheet section 5.7.3 FIFO Buffer Interrupts
189 */
190#define BMI323_BYTES_PER_SAMPLE			2
191#define BMI323_FIFO_LENGTH_IN_BYTES		2048
192#define BMI323_FIFO_FRAME_LENGTH		6
193#define BMI323_FIFO_FULL_IN_FRAMES		\
194	((BMI323_FIFO_LENGTH_IN_BYTES /		\
195	(BMI323_BYTES_PER_SAMPLE * BMI323_FIFO_FRAME_LENGTH)) - 1)
196#define BMI323_FIFO_FULL_IN_WORDS		\
197	(BMI323_FIFO_FULL_IN_FRAMES * BMI323_FIFO_FRAME_LENGTH)
198
199#define BMI323_INT_MICRO_TO_RAW(val, val2, scale) ((val) * (scale) + \
200						  ((val2) * (scale)) / MEGA)
201
202#define BMI323_RAW_TO_MICRO(raw, scale) ((((raw) % (scale)) * MEGA) / scale)
203
204struct device;
205int bmi323_core_probe(struct device *dev);
206extern const struct regmap_config bmi323_regmap_config;
207extern const struct dev_pm_ops bmi323_core_pm_ops;
208
209#endif