max30102.c

  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * max30102.c - Support for MAX30102 heart rate and pulse oximeter sensor
  4 *
  5 * Copyright (C) 2017 Matt Ranostay <matt.ranostay@konsulko.com>
  6 *
  7 * Support for MAX30105 optical particle sensor
  8 * Copyright (C) 2017 Peter Meerwald-Stadler <pmeerw@pmeerw.net>
  9 *
 10 * 7-bit I2C chip address: 0x57
 11 * TODO: proximity power saving feature
 12 */
 13
 14#include <linux/module.h>
 15#include <linux/init.h>
 16#include <linux/interrupt.h>
 17#include <linux/delay.h>
 18#include <linux/err.h>
 19#include <linux/irq.h>
 20#include <linux/i2c.h>
 21#include <linux/mutex.h>
 22#include <linux/mod_devicetable.h>
 23#include <linux/regmap.h>
 24#include <linux/iio/iio.h>
 25#include <linux/iio/buffer.h>
 26#include <linux/iio/kfifo_buf.h>
 27
 28#define MAX30102_DRV_NAME	"max30102"
 29#define MAX30102_PART_NUMBER	0x15
 30
 31enum max30102_chip_id {
 32	max30102,
 33	max30105,
 34};
 35
 36enum max3012_led_idx {
 37	MAX30102_LED_RED,
 38	MAX30102_LED_IR,
 39	MAX30105_LED_GREEN,
 40};
 41
 42#define MAX30102_REG_INT_STATUS			0x00
 43#define MAX30102_REG_INT_STATUS_PWR_RDY		BIT(0)
 44#define MAX30102_REG_INT_STATUS_PROX_INT	BIT(4)
 45#define MAX30102_REG_INT_STATUS_ALC_OVF		BIT(5)
 46#define MAX30102_REG_INT_STATUS_PPG_RDY		BIT(6)
 47#define MAX30102_REG_INT_STATUS_FIFO_RDY	BIT(7)
 48
 49#define MAX30102_REG_INT_ENABLE			0x02
 50#define MAX30102_REG_INT_ENABLE_PROX_INT_EN	BIT(4)
 51#define MAX30102_REG_INT_ENABLE_ALC_OVF_EN	BIT(5)
 52#define MAX30102_REG_INT_ENABLE_PPG_EN		BIT(6)
 53#define MAX30102_REG_INT_ENABLE_FIFO_EN		BIT(7)
 54#define MAX30102_REG_INT_ENABLE_MASK		0xf0
 55#define MAX30102_REG_INT_ENABLE_MASK_SHIFT	4
 56
 57#define MAX30102_REG_FIFO_WR_PTR		0x04
 58#define MAX30102_REG_FIFO_OVR_CTR		0x05
 59#define MAX30102_REG_FIFO_RD_PTR		0x06
 60#define MAX30102_REG_FIFO_DATA			0x07
 61#define MAX30102_REG_FIFO_DATA_BYTES		3
 62
 63#define MAX30102_REG_FIFO_CONFIG		0x08
 64#define MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES	BIT(1)
 65#define MAX30102_REG_FIFO_CONFIG_AVG_SHIFT	5
 66#define MAX30102_REG_FIFO_CONFIG_AFULL		BIT(0)
 67
 68#define MAX30102_REG_MODE_CONFIG		0x09
 69#define MAX30102_REG_MODE_CONFIG_MODE_NONE	0x00
 70#define MAX30102_REG_MODE_CONFIG_MODE_HR	0x02 /* red LED */
 71#define MAX30102_REG_MODE_CONFIG_MODE_HR_SPO2	0x03 /* red + IR LED */
 72#define MAX30102_REG_MODE_CONFIG_MODE_MULTI	0x07 /* multi-LED mode */
 73#define MAX30102_REG_MODE_CONFIG_MODE_MASK	GENMASK(2, 0)
 74#define MAX30102_REG_MODE_CONFIG_PWR		BIT(7)
 75
 76#define MAX30102_REG_MODE_CONTROL_SLOT21	0x11 /* multi-LED control */
 77#define MAX30102_REG_MODE_CONTROL_SLOT43	0x12
 78#define MAX30102_REG_MODE_CONTROL_SLOT_MASK	(GENMASK(6, 4) | GENMASK(2, 0))
 79#define MAX30102_REG_MODE_CONTROL_SLOT_SHIFT	4
 80
 81#define MAX30102_REG_SPO2_CONFIG		0x0a
 82#define MAX30102_REG_SPO2_CONFIG_PULSE_411_US	0x03
 83#define MAX30102_REG_SPO2_CONFIG_SR_400HZ	0x03
 84#define MAX30102_REG_SPO2_CONFIG_SR_MASK	0x07
 85#define MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT	2
 86#define MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS	BIT(0)
 87#define MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT	5
 88
 89#define MAX30102_REG_RED_LED_CONFIG		0x0c
 90#define MAX30102_REG_IR_LED_CONFIG		0x0d
 91#define MAX30105_REG_GREEN_LED_CONFIG		0x0e
 92
 93#define MAX30102_REG_TEMP_CONFIG		0x21
 94#define MAX30102_REG_TEMP_CONFIG_TEMP_EN	BIT(0)
 95
 96#define MAX30102_REG_TEMP_INTEGER		0x1f
 97#define MAX30102_REG_TEMP_FRACTION		0x20
 98
 99#define MAX30102_REG_REV_ID			0xfe
100#define MAX30102_REG_PART_ID			0xff
101
102struct max30102_data {
103	struct i2c_client *client;
104	struct iio_dev *indio_dev;
105	struct mutex lock;
106	struct regmap *regmap;
107	enum max30102_chip_id chip_id;
108
109	u8 buffer[12];
110	__be32 processed_buffer[3]; /* 3 x 18-bit (padded to 32-bits) */
111};
112
113static const struct regmap_config max30102_regmap_config = {
114	.name = "max30102_regmap",
115
116	.reg_bits = 8,
117	.val_bits = 8,
118};
119
120static const unsigned long max30102_scan_masks[] = {
121	BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR),
122	0
123};
124
125static const unsigned long max30105_scan_masks[] = {
126	BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR),
127	BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR) |
128		BIT(MAX30105_LED_GREEN),
129	0
130};
131
132#define MAX30102_INTENSITY_CHANNEL(_si, _mod) { \
133		.type = IIO_INTENSITY, \
134		.channel2 = _mod, \
135		.modified = 1, \
136		.scan_index = _si, \
137		.scan_type = { \
138			.sign = 'u', \
139			.shift = 8, \
140			.realbits = 18, \
141			.storagebits = 32, \
142			.endianness = IIO_BE, \
143		}, \
144	}
145
146static const struct iio_chan_spec max30102_channels[] = {
147	MAX30102_INTENSITY_CHANNEL(MAX30102_LED_RED, IIO_MOD_LIGHT_RED),
148	MAX30102_INTENSITY_CHANNEL(MAX30102_LED_IR, IIO_MOD_LIGHT_IR),
149	{
150		.type = IIO_TEMP,
151		.info_mask_separate =
152			BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
153		.scan_index = -1,
154	},
155};
156
157static const struct iio_chan_spec max30105_channels[] = {
158	MAX30102_INTENSITY_CHANNEL(MAX30102_LED_RED, IIO_MOD_LIGHT_RED),
159	MAX30102_INTENSITY_CHANNEL(MAX30102_LED_IR, IIO_MOD_LIGHT_IR),
160	MAX30102_INTENSITY_CHANNEL(MAX30105_LED_GREEN, IIO_MOD_LIGHT_GREEN),
161	{
162		.type = IIO_TEMP,
163		.info_mask_separate =
164			BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
165		.scan_index = -1,
166	},
167};
168
169static int max30102_set_power(struct max30102_data *data, bool en)
170{
171	return regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
172				  MAX30102_REG_MODE_CONFIG_PWR,
173				  en ? 0 : MAX30102_REG_MODE_CONFIG_PWR);
174}
175
176static int max30102_set_powermode(struct max30102_data *data, u8 mode, bool en)
177{
178	u8 reg = mode;
179
180	if (!en)
181		reg |= MAX30102_REG_MODE_CONFIG_PWR;
182
183	return regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
184				  MAX30102_REG_MODE_CONFIG_PWR |
185				  MAX30102_REG_MODE_CONFIG_MODE_MASK, reg);
186}
187
188#define MAX30102_MODE_CONTROL_LED_SLOTS(slot2, slot1) \
189	((slot2 << MAX30102_REG_MODE_CONTROL_SLOT_SHIFT) | slot1)
190
191static int max30102_buffer_postenable(struct iio_dev *indio_dev)
192{
193	struct max30102_data *data = iio_priv(indio_dev);
194	int ret;
195	u8 reg;
196
197	switch (*indio_dev->active_scan_mask) {
198	case BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR):
199		reg = MAX30102_REG_MODE_CONFIG_MODE_HR_SPO2;
200		break;
201	case BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR) |
202	     BIT(MAX30105_LED_GREEN):
203		ret = regmap_update_bits(data->regmap,
204					 MAX30102_REG_MODE_CONTROL_SLOT21,
205					 MAX30102_REG_MODE_CONTROL_SLOT_MASK,
206					 MAX30102_MODE_CONTROL_LED_SLOTS(2, 1));
207		if (ret)
208			return ret;
209
210		ret = regmap_update_bits(data->regmap,
211					 MAX30102_REG_MODE_CONTROL_SLOT43,
212					 MAX30102_REG_MODE_CONTROL_SLOT_MASK,
213					 MAX30102_MODE_CONTROL_LED_SLOTS(0, 3));
214		if (ret)
215			return ret;
216
217		reg = MAX30102_REG_MODE_CONFIG_MODE_MULTI;
218		break;
219	default:
220		return -EINVAL;
221	}
222
223	return max30102_set_powermode(data, reg, true);
224}
225
226static int max30102_buffer_predisable(struct iio_dev *indio_dev)
227{
228	struct max30102_data *data = iio_priv(indio_dev);
229
230	return max30102_set_powermode(data, MAX30102_REG_MODE_CONFIG_MODE_NONE,
231				      false);
232}
233
234static const struct iio_buffer_setup_ops max30102_buffer_setup_ops = {
235	.postenable = max30102_buffer_postenable,
236	.predisable = max30102_buffer_predisable,
237};
238
239static inline int max30102_fifo_count(struct max30102_data *data)
240{
241	unsigned int val;
242	int ret;
243
244	ret = regmap_read(data->regmap, MAX30102_REG_INT_STATUS, &val);
245	if (ret)
246		return ret;
247
248	/* FIFO has one sample slot left */
249	if (val & MAX30102_REG_INT_STATUS_FIFO_RDY)
250		return 1;
251
252	return 0;
253}
254
255#define MAX30102_COPY_DATA(i) \
256	memcpy(&data->processed_buffer[(i)], \
257	       &buffer[(i) * MAX30102_REG_FIFO_DATA_BYTES], \
258	       MAX30102_REG_FIFO_DATA_BYTES)
259
260static int max30102_read_measurement(struct max30102_data *data,
261				     unsigned int measurements)
262{
263	int ret;
264	u8 *buffer = (u8 *) &data->buffer;
265
266	ret = i2c_smbus_read_i2c_block_data(data->client,
267					    MAX30102_REG_FIFO_DATA,
268					    measurements *
269					    MAX30102_REG_FIFO_DATA_BYTES,
270					    buffer);
271
272	switch (measurements) {
273	case 3:
274		MAX30102_COPY_DATA(2);
275		fallthrough;
276	case 2:
277		MAX30102_COPY_DATA(1);
278		fallthrough;
279	case 1:
280		MAX30102_COPY_DATA(0);
281		break;
282	default:
283		return -EINVAL;
284	}
285
286	return (ret == measurements * MAX30102_REG_FIFO_DATA_BYTES) ?
287	       0 : -EINVAL;
288}
289
290static irqreturn_t max30102_interrupt_handler(int irq, void *private)
291{
292	struct iio_dev *indio_dev = private;
293	struct max30102_data *data = iio_priv(indio_dev);
294	unsigned int measurements = bitmap_weight(indio_dev->active_scan_mask,
295						  iio_get_masklength(indio_dev));
296	int ret, cnt = 0;
297
298	mutex_lock(&data->lock);
299
300	while (cnt || (cnt = max30102_fifo_count(data)) > 0) {
301		ret = max30102_read_measurement(data, measurements);
302		if (ret)
303			break;
304
305		iio_push_to_buffers(data->indio_dev, data->processed_buffer);
306		cnt--;
307	}
308
309	mutex_unlock(&data->lock);
310
311	return IRQ_HANDLED;
312}
313
314static int max30102_get_current_idx(unsigned int val, int *reg)
315{
316	/* each step is 0.200 mA */
317	*reg = val / 200;
318
319	return *reg > 0xff ? -EINVAL : 0;
320}
321
322static int max30102_led_init(struct max30102_data *data)
323{
324	struct device *dev = &data->client->dev;
325	unsigned int val;
326	int reg, ret;
327
328	ret = device_property_read_u32(dev, "maxim,red-led-current-microamp", &val);
329	if (ret) {
330		dev_info(dev, "no red-led-current-microamp set\n");
331
332		/* Default to 7 mA RED LED */
333		val = 7000;
334	}
335
336	ret = max30102_get_current_idx(val, &reg);
337	if (ret) {
338		dev_err(dev, "invalid RED LED current setting %d\n", val);
339		return ret;
340	}
341
342	ret = regmap_write(data->regmap, MAX30102_REG_RED_LED_CONFIG, reg);
343	if (ret)
344		return ret;
345
346	if (data->chip_id == max30105) {
347		ret = device_property_read_u32(dev,
348			"maxim,green-led-current-microamp", &val);
349		if (ret) {
350			dev_info(dev, "no green-led-current-microamp set\n");
351
352			/* Default to 7 mA green LED */
353			val = 7000;
354		}
355
356		ret = max30102_get_current_idx(val, &reg);
357		if (ret) {
358			dev_err(dev, "invalid green LED current setting %d\n",
359				val);
360			return ret;
361		}
362
363		ret = regmap_write(data->regmap, MAX30105_REG_GREEN_LED_CONFIG,
364				   reg);
365		if (ret)
366			return ret;
367	}
368
369	ret = device_property_read_u32(dev, "maxim,ir-led-current-microamp", &val);
370	if (ret) {
371		dev_info(dev, "no ir-led-current-microamp set\n");
372
373		/* Default to 7 mA IR LED */
374		val = 7000;
375	}
376
377	ret = max30102_get_current_idx(val, &reg);
378	if (ret) {
379		dev_err(dev, "invalid IR LED current setting %d\n", val);
380		return ret;
381	}
382
383	return regmap_write(data->regmap, MAX30102_REG_IR_LED_CONFIG, reg);
384}
385
386static int max30102_chip_init(struct max30102_data *data)
387{
388	int ret;
389
390	/* setup LED current settings */
391	ret = max30102_led_init(data);
392	if (ret)
393		return ret;
394
395	/* configure 18-bit HR + SpO2 readings at 400Hz */
396	ret = regmap_write(data->regmap, MAX30102_REG_SPO2_CONFIG,
397				(MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS
398				 << MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT) |
399				(MAX30102_REG_SPO2_CONFIG_SR_400HZ
400				 << MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT) |
401				 MAX30102_REG_SPO2_CONFIG_PULSE_411_US);
402	if (ret)
403		return ret;
404
405	/* average 4 samples + generate FIFO interrupt */
406	ret = regmap_write(data->regmap, MAX30102_REG_FIFO_CONFIG,
407				(MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES
408				 << MAX30102_REG_FIFO_CONFIG_AVG_SHIFT) |
409				 MAX30102_REG_FIFO_CONFIG_AFULL);
410	if (ret)
411		return ret;
412
413	/* enable FIFO interrupt */
414	return regmap_update_bits(data->regmap, MAX30102_REG_INT_ENABLE,
415				 MAX30102_REG_INT_ENABLE_MASK,
416				 MAX30102_REG_INT_ENABLE_FIFO_EN);
417}
418
419static int max30102_read_temp(struct max30102_data *data, int *val)
420{
421	int ret;
422	unsigned int reg;
423
424	ret = regmap_read(data->regmap, MAX30102_REG_TEMP_INTEGER, &reg);
425	if (ret < 0)
426		return ret;
427	*val = reg << 4;
428
429	ret = regmap_read(data->regmap, MAX30102_REG_TEMP_FRACTION, &reg);
430	if (ret < 0)
431		return ret;
432
433	*val |= reg & 0xf;
434	*val = sign_extend32(*val, 11);
435
436	return 0;
437}
438
439static int max30102_get_temp(struct max30102_data *data, int *val, bool en)
440{
441	int ret;
442
443	if (en) {
444		ret = max30102_set_power(data, true);
445		if (ret)
446			return ret;
447	}
448
449	/* start acquisition */
450	ret = regmap_set_bits(data->regmap, MAX30102_REG_TEMP_CONFIG,
451			      MAX30102_REG_TEMP_CONFIG_TEMP_EN);
452	if (ret)
453		goto out;
454
455	msleep(35);
456	ret = max30102_read_temp(data, val);
457
458out:
459	if (en)
460		max30102_set_power(data, false);
461
462	return ret;
463}
464
465static int max30102_read_raw(struct iio_dev *indio_dev,
466			     struct iio_chan_spec const *chan,
467			     int *val, int *val2, long mask)
468{
469	struct max30102_data *data = iio_priv(indio_dev);
470	int ret = -EINVAL;
471
472	switch (mask) {
473	case IIO_CHAN_INFO_RAW:
474		/*
475		 * Temperature reading can only be acquired when not in
476		 * shutdown; leave shutdown briefly when buffer not running
477		 */
478any_mode_retry:
479		if (iio_device_claim_buffer_mode(indio_dev)) {
480			/*
481			 * This one is a *bit* hacky. If we cannot claim buffer
482			 * mode, then try direct mode so that we make sure
483			 * things cannot concurrently change. And we just keep
484			 * trying until we get one of the modes...
485			 */
486			if (!iio_device_claim_direct(indio_dev))
487				goto any_mode_retry;
488
489			ret = max30102_get_temp(data, val, true);
490			iio_device_release_direct(indio_dev);
491		} else {
492			ret = max30102_get_temp(data, val, false);
493			iio_device_release_buffer_mode(indio_dev);
494		}
495		if (ret)
496			return ret;
497
498		ret = IIO_VAL_INT;
499		break;
500	case IIO_CHAN_INFO_SCALE:
501		*val = 1000;  /* 62.5 */
502		*val2 = 16;
503		ret = IIO_VAL_FRACTIONAL;
504		break;
505	}
506
507	return ret;
508}
509
510static const struct iio_info max30102_info = {
511	.read_raw = max30102_read_raw,
512};
513
514static int max30102_probe(struct i2c_client *client)
515{
516	const struct i2c_device_id *id = i2c_client_get_device_id(client);
517	struct max30102_data *data;
518	struct iio_dev *indio_dev;
519	int ret;
520	unsigned int reg;
521
522	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
523	if (!indio_dev)
524		return -ENOMEM;
525
526	indio_dev->name = MAX30102_DRV_NAME;
527	indio_dev->info = &max30102_info;
528	indio_dev->modes = INDIO_DIRECT_MODE;
529
530	data = iio_priv(indio_dev);
531	data->indio_dev = indio_dev;
532	data->client = client;
533	data->chip_id = id->driver_data;
534
535	mutex_init(&data->lock);
536	i2c_set_clientdata(client, indio_dev);
537
538	switch (data->chip_id) {
539	case max30105:
540		indio_dev->channels = max30105_channels;
541		indio_dev->num_channels = ARRAY_SIZE(max30105_channels);
542		indio_dev->available_scan_masks = max30105_scan_masks;
543		break;
544	case max30102:
545		indio_dev->channels = max30102_channels;
546		indio_dev->num_channels = ARRAY_SIZE(max30102_channels);
547		indio_dev->available_scan_masks = max30102_scan_masks;
548		break;
549	default:
550		return -ENODEV;
551	}
552
553	ret = devm_iio_kfifo_buffer_setup(&client->dev, indio_dev,
554					  &max30102_buffer_setup_ops);
555	if (ret)
556		return ret;
557
558	data->regmap = devm_regmap_init_i2c(client, &max30102_regmap_config);
559	if (IS_ERR(data->regmap)) {
560		dev_err(&client->dev, "regmap initialization failed\n");
561		return PTR_ERR(data->regmap);
562	}
563
564	/* check part ID */
565	ret = regmap_read(data->regmap, MAX30102_REG_PART_ID, &reg);
566	if (ret)
567		return ret;
568	if (reg != MAX30102_PART_NUMBER)
569		return -ENODEV;
570
571	/* show revision ID */
572	ret = regmap_read(data->regmap, MAX30102_REG_REV_ID, &reg);
573	if (ret)
574		return ret;
575	dev_dbg(&client->dev, "max3010x revision %02x\n", reg);
576
577	/* clear mode setting, chip shutdown */
578	ret = max30102_set_powermode(data, MAX30102_REG_MODE_CONFIG_MODE_NONE,
579				     false);
580	if (ret)
581		return ret;
582
583	ret = max30102_chip_init(data);
584	if (ret)
585		return ret;
586
587	if (client->irq <= 0) {
588		dev_err(&client->dev, "no valid irq defined\n");
589		return -EINVAL;
590	}
591
592	ret = devm_request_threaded_irq(&client->dev, client->irq,
593					NULL, max30102_interrupt_handler,
594					IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
595					"max30102_irq", indio_dev);
596	if (ret) {
597		dev_err(&client->dev, "request irq (%d) failed\n", client->irq);
598		return ret;
599	}
600
601	return iio_device_register(indio_dev);
602}
603
604static void max30102_remove(struct i2c_client *client)
605{
606	struct iio_dev *indio_dev = i2c_get_clientdata(client);
607	struct max30102_data *data = iio_priv(indio_dev);
608
609	iio_device_unregister(indio_dev);
610	max30102_set_power(data, false);
611}
612
613static const struct i2c_device_id max30102_id[] = {
614	{ "max30101", max30105 },
615	{ "max30102", max30102 },
616	{ "max30105", max30105 },
617	{ }
618};
619MODULE_DEVICE_TABLE(i2c, max30102_id);
620
621static const struct of_device_id max30102_dt_ids[] = {
622	{ .compatible = "maxim,max30101" },
623	{ .compatible = "maxim,max30102" },
624	{ .compatible = "maxim,max30105" },
625	{ }
626};
627MODULE_DEVICE_TABLE(of, max30102_dt_ids);
628
629static struct i2c_driver max30102_driver = {
630	.driver = {
631		.name	= MAX30102_DRV_NAME,
632		.of_match_table	= max30102_dt_ids,
633	},
634	.probe		= max30102_probe,
635	.remove		= max30102_remove,
636	.id_table	= max30102_id,
637};
638module_i2c_driver(max30102_driver);
639
640MODULE_AUTHOR("Matt Ranostay <matt.ranostay@konsulko.com>");
641MODULE_DESCRIPTION("MAX30102 heart rate/pulse oximeter and MAX30105 particle sensor driver");
642MODULE_LICENSE("GPL");