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ltc2688.c
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linux-6.19.14/drivers/iio/dac/ltc2688.c
1// SPDX-License-Identifier: GPL-2.0 2/* 3 * LTC2688 16 channel, 16 bit Voltage Output SoftSpan DAC driver 4 * 5 * Copyright 2022 Analog Devices Inc. 6 */ 7#include <linux/bitfield.h> 8#include <linux/bits.h> 9#include <linux/cleanup.h> 10#include <linux/clk.h> 11#include <linux/device.h> 12#include <linux/gpio/consumer.h> 13#include <linux/iio/iio.h> 14#include <linux/limits.h> 15#include <linux/kernel.h> 16#include <linux/module.h> 17#include <linux/mod_devicetable.h> 18#include <linux/mutex.h> 19#include <linux/of.h> 20#include <linux/property.h> 21#include <linux/regmap.h> 22#include <linux/regulator/consumer.h> 23#include <linux/spi/spi.h> 24 25#define LTC2688_DAC_CHANNELS 16 26 27#define LTC2688_CMD_CH_CODE(x) (0x00 + (x)) 28#define LTC2688_CMD_CH_SETTING(x) (0x10 + (x)) 29#define LTC2688_CMD_CH_OFFSET(x) (0X20 + (x)) 30#define LTC2688_CMD_CH_GAIN(x) (0x30 + (x)) 31#define LTC2688_CMD_CH_CODE_UPDATE(x) (0x40 + (x)) 32 33#define LTC2688_CMD_CONFIG 0x70 34#define LTC2688_CMD_POWERDOWN 0x71 35#define LTC2688_CMD_A_B_SELECT 0x72 36#define LTC2688_CMD_SW_TOGGLE 0x73 37#define LTC2688_CMD_TOGGLE_DITHER_EN 0x74 38#define LTC2688_CMD_THERMAL_STAT 0x77 39#define LTC2688_CMD_UPDATE_ALL 0x7C 40#define LTC2688_CMD_NOOP 0xFF 41 42#define LTC2688_READ_OPERATION 0x80 43 44/* Channel Settings */ 45#define LTC2688_CH_SPAN_MSK GENMASK(2, 0) 46#define LTC2688_CH_OVERRANGE_MSK BIT(3) 47#define LTC2688_CH_TD_SEL_MSK GENMASK(5, 4) 48#define LTC2688_CH_TGP_MAX 3 49#define LTC2688_CH_DIT_PER_MSK GENMASK(8, 6) 50#define LTC2688_CH_DIT_PH_MSK GENMASK(10, 9) 51#define LTC2688_CH_MODE_MSK BIT(11) 52 53#define LTC2688_DITHER_RAW_MASK GENMASK(15, 2) 54#define LTC2688_CH_CALIBBIAS_MASK GENMASK(15, 2) 55#define LTC2688_DITHER_RAW_MAX_VAL (BIT(14) - 1) 56#define LTC2688_CH_CALIBBIAS_MAX_VAL (BIT(14) - 1) 57 58/* Configuration register */ 59#define LTC2688_CONFIG_RST BIT(15) 60#define LTC2688_CONFIG_EXT_REF BIT(1) 61 62#define LTC2688_DITHER_FREQ_AVAIL_N 5 63 64enum { 65 LTC2688_SPAN_RANGE_0V_5V, 66 LTC2688_SPAN_RANGE_0V_10V, 67 LTC2688_SPAN_RANGE_M5V_5V, 68 LTC2688_SPAN_RANGE_M10V_10V, 69 LTC2688_SPAN_RANGE_M15V_15V, 70 LTC2688_SPAN_RANGE_MAX 71}; 72 73enum { 74 LTC2688_MODE_DEFAULT, 75 LTC2688_MODE_DITHER_TOGGLE, 76}; 77 78struct ltc2688_chan { 79 long dither_frequency[LTC2688_DITHER_FREQ_AVAIL_N]; 80 bool overrange; 81 bool toggle_chan; 82 u8 mode; 83}; 84 85struct ltc2688_state { 86 struct spi_device *spi; 87 struct regmap *regmap; 88 struct ltc2688_chan channels[LTC2688_DAC_CHANNELS]; 89 struct iio_chan_spec *iio_chan; 90 /* lock to protect against multiple access to the device and shared data */ 91 struct mutex lock; 92 int vref; 93 /* 94 * DMA (thus cache coherency maintenance) may require the 95 * transfer buffers to live in their own cache lines. 96 */ 97 u8 tx_data[6] __aligned(IIO_DMA_MINALIGN); 98 u8 rx_data[3]; 99}; 100 101static int ltc2688_spi_read(void *context, const void *reg, size_t reg_size, 102 void *val, size_t val_size) 103{ 104 struct ltc2688_state *st = context; 105 struct spi_transfer xfers[] = { 106 { 107 .tx_buf = st->tx_data, 108 .len = reg_size + val_size, 109 .cs_change = 1, 110 }, { 111 .tx_buf = st->tx_data + 3, 112 .rx_buf = st->rx_data, 113 .len = reg_size + val_size, 114 }, 115 }; 116 int ret; 117 118 memcpy(st->tx_data, reg, reg_size); 119 120 ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers)); 121 if (ret) 122 return ret; 123 124 memcpy(val, &st->rx_data[1], val_size); 125 126 return 0; 127} 128 129static int ltc2688_spi_write(void *context, const void *data, size_t count) 130{ 131 struct ltc2688_state *st = context; 132 133 return spi_write(st->spi, data, count); 134} 135 136static int ltc2688_span_get(const struct ltc2688_state *st, int c) 137{ 138 int ret, reg, span; 139 140 ret = regmap_read(st->regmap, LTC2688_CMD_CH_SETTING(c), ®); 141 if (ret) 142 return ret; 143 144 span = FIELD_GET(LTC2688_CH_SPAN_MSK, reg); 145 /* sanity check to make sure we don't get any weird value from the HW */ 146 if (span >= LTC2688_SPAN_RANGE_MAX) 147 return -EIO; 148 149 return span; 150} 151 152static const int ltc2688_span_helper[LTC2688_SPAN_RANGE_MAX][2] = { 153 {0, 5000}, {0, 10000}, {-5000, 5000}, {-10000, 10000}, {-15000, 15000}, 154}; 155 156static int ltc2688_scale_get(const struct ltc2688_state *st, int c, int *val) 157{ 158 const struct ltc2688_chan *chan = &st->channels[c]; 159 int span, fs; 160 161 span = ltc2688_span_get(st, c); 162 if (span < 0) 163 return span; 164 165 fs = ltc2688_span_helper[span][1] - ltc2688_span_helper[span][0]; 166 if (chan->overrange) 167 fs = mult_frac(fs, 105, 100); 168 169 *val = DIV_ROUND_CLOSEST(fs * st->vref, 4096); 170 171 return 0; 172} 173 174static int ltc2688_offset_get(const struct ltc2688_state *st, int c, int *val) 175{ 176 int span; 177 178 span = ltc2688_span_get(st, c); 179 if (span < 0) 180 return span; 181 182 if (ltc2688_span_helper[span][0] < 0) 183 *val = -32768; 184 else 185 *val = 0; 186 187 return 0; 188} 189 190enum { 191 LTC2688_INPUT_A, 192 LTC2688_INPUT_B, 193 LTC2688_INPUT_B_AVAIL, 194 LTC2688_DITHER_OFF, 195 LTC2688_DITHER_FREQ_AVAIL, 196}; 197 198static int ltc2688_dac_code_write(struct ltc2688_state *st, u32 chan, u32 input, 199 u16 code) 200{ 201 struct ltc2688_chan *c = &st->channels[chan]; 202 int ret, reg; 203 204 /* 2 LSBs set to 0 if writing dither amplitude */ 205 if (!c->toggle_chan && input == LTC2688_INPUT_B) { 206 if (code > LTC2688_DITHER_RAW_MAX_VAL) 207 return -EINVAL; 208 209 code = FIELD_PREP(LTC2688_DITHER_RAW_MASK, code); 210 } 211 212 guard(mutex)(&st->lock); 213 /* select the correct input register to read from */ 214 ret = regmap_update_bits(st->regmap, LTC2688_CMD_A_B_SELECT, BIT(chan), 215 input << chan); 216 if (ret) 217 return ret; 218 219 /* 220 * If in dither/toggle mode the dac should be updated by an 221 * external signal (or sw toggle) and not here. 222 */ 223 if (c->mode == LTC2688_MODE_DEFAULT) 224 reg = LTC2688_CMD_CH_CODE_UPDATE(chan); 225 else 226 reg = LTC2688_CMD_CH_CODE(chan); 227 228 return regmap_write(st->regmap, reg, code); 229} 230 231static int ltc2688_dac_code_read(struct ltc2688_state *st, u32 chan, u32 input, 232 u32 *code) 233{ 234 struct ltc2688_chan *c = &st->channels[chan]; 235 int ret; 236 237 guard(mutex)(&st->lock); 238 ret = regmap_update_bits(st->regmap, LTC2688_CMD_A_B_SELECT, BIT(chan), 239 input << chan); 240 if (ret) 241 return ret; 242 243 ret = regmap_read(st->regmap, LTC2688_CMD_CH_CODE(chan), code); 244 if (ret) 245 return ret; 246 247 if (!c->toggle_chan && input == LTC2688_INPUT_B) 248 *code = FIELD_GET(LTC2688_DITHER_RAW_MASK, *code); 249 250 return 0; 251} 252 253static const int ltc2688_raw_range[] = {0, 1, U16_MAX}; 254 255static int ltc2688_read_avail(struct iio_dev *indio_dev, 256 struct iio_chan_spec const *chan, 257 const int **vals, int *type, int *length, 258 long info) 259{ 260 switch (info) { 261 case IIO_CHAN_INFO_RAW: 262 *vals = ltc2688_raw_range; 263 *type = IIO_VAL_INT; 264 return IIO_AVAIL_RANGE; 265 default: 266 return -EINVAL; 267 } 268} 269 270static int ltc2688_read_raw(struct iio_dev *indio_dev, 271 struct iio_chan_spec const *chan, int *val, 272 int *val2, long info) 273{ 274 struct ltc2688_state *st = iio_priv(indio_dev); 275 int ret; 276 277 switch (info) { 278 case IIO_CHAN_INFO_RAW: 279 ret = ltc2688_dac_code_read(st, chan->channel, LTC2688_INPUT_A, 280 val); 281 if (ret) 282 return ret; 283 284 return IIO_VAL_INT; 285 case IIO_CHAN_INFO_OFFSET: 286 ret = ltc2688_offset_get(st, chan->channel, val); 287 if (ret) 288 return ret; 289 290 return IIO_VAL_INT; 291 case IIO_CHAN_INFO_SCALE: 292 ret = ltc2688_scale_get(st, chan->channel, val); 293 if (ret) 294 return ret; 295 296 *val2 = 16; 297 return IIO_VAL_FRACTIONAL_LOG2; 298 case IIO_CHAN_INFO_CALIBBIAS: 299 ret = regmap_read(st->regmap, 300 LTC2688_CMD_CH_OFFSET(chan->channel), val); 301 if (ret) 302 return ret; 303 304 *val = FIELD_GET(LTC2688_CH_CALIBBIAS_MASK, *val); 305 return IIO_VAL_INT; 306 case IIO_CHAN_INFO_CALIBSCALE: 307 ret = regmap_read(st->regmap, 308 LTC2688_CMD_CH_GAIN(chan->channel), val); 309 if (ret) 310 return ret; 311 312 return IIO_VAL_INT; 313 default: 314 return -EINVAL; 315 } 316} 317 318static int ltc2688_write_raw(struct iio_dev *indio_dev, 319 struct iio_chan_spec const *chan, int val, 320 int val2, long info) 321{ 322 struct ltc2688_state *st = iio_priv(indio_dev); 323 324 switch (info) { 325 case IIO_CHAN_INFO_RAW: 326 if (val > U16_MAX || val < 0) 327 return -EINVAL; 328 329 return ltc2688_dac_code_write(st, chan->channel, 330 LTC2688_INPUT_A, val); 331 case IIO_CHAN_INFO_CALIBBIAS: 332 if (val > LTC2688_CH_CALIBBIAS_MAX_VAL) 333 return -EINVAL; 334 335 return regmap_write(st->regmap, 336 LTC2688_CMD_CH_OFFSET(chan->channel), 337 FIELD_PREP(LTC2688_CH_CALIBBIAS_MASK, val)); 338 case IIO_CHAN_INFO_CALIBSCALE: 339 return regmap_write(st->regmap, 340 LTC2688_CMD_CH_GAIN(chan->channel), val); 341 default: 342 return -EINVAL; 343 } 344} 345 346static ssize_t ltc2688_dither_toggle_set(struct iio_dev *indio_dev, 347 uintptr_t private, 348 const struct iio_chan_spec *chan, 349 const char *buf, size_t len) 350{ 351 struct ltc2688_state *st = iio_priv(indio_dev); 352 struct ltc2688_chan *c = &st->channels[chan->channel]; 353 int ret; 354 bool en; 355 356 ret = kstrtobool(buf, &en); 357 if (ret) 358 return ret; 359 360 guard(mutex)(&st->lock); 361 ret = regmap_update_bits(st->regmap, LTC2688_CMD_TOGGLE_DITHER_EN, 362 BIT(chan->channel), en << chan->channel); 363 if (ret) 364 return ret; 365 366 c->mode = en ? LTC2688_MODE_DITHER_TOGGLE : LTC2688_MODE_DEFAULT; 367 368 return len; 369} 370 371static ssize_t ltc2688_reg_bool_get(struct iio_dev *indio_dev, 372 uintptr_t private, 373 const struct iio_chan_spec *chan, 374 char *buf) 375{ 376 const struct ltc2688_state *st = iio_priv(indio_dev); 377 int ret; 378 u32 val; 379 380 ret = regmap_read(st->regmap, private, &val); 381 if (ret) 382 return ret; 383 384 return sysfs_emit(buf, "%u\n", !!(val & BIT(chan->channel))); 385} 386 387static ssize_t ltc2688_reg_bool_set(struct iio_dev *indio_dev, 388 uintptr_t private, 389 const struct iio_chan_spec *chan, 390 const char *buf, size_t len) 391{ 392 const struct ltc2688_state *st = iio_priv(indio_dev); 393 int ret; 394 bool en; 395 396 ret = kstrtobool(buf, &en); 397 if (ret) 398 return ret; 399 400 ret = regmap_update_bits(st->regmap, private, BIT(chan->channel), 401 en << chan->channel); 402 if (ret) 403 return ret; 404 405 return len; 406} 407 408static ssize_t ltc2688_dither_freq_avail(const struct ltc2688_state *st, 409 const struct ltc2688_chan *chan, 410 char *buf) 411{ 412 int sz = 0; 413 u32 f; 414 415 for (f = 0; f < ARRAY_SIZE(chan->dither_frequency); f++) 416 sz += sysfs_emit_at(buf, sz, "%ld ", chan->dither_frequency[f]); 417 418 buf[sz - 1] = '\n'; 419 420 return sz; 421} 422 423static ssize_t ltc2688_dither_freq_get(struct iio_dev *indio_dev, 424 uintptr_t private, 425 const struct iio_chan_spec *chan, 426 char *buf) 427{ 428 const struct ltc2688_state *st = iio_priv(indio_dev); 429 const struct ltc2688_chan *c = &st->channels[chan->channel]; 430 u32 reg, freq; 431 int ret; 432 433 if (private == LTC2688_DITHER_FREQ_AVAIL) 434 return ltc2688_dither_freq_avail(st, c, buf); 435 436 ret = regmap_read(st->regmap, LTC2688_CMD_CH_SETTING(chan->channel), 437 ®); 438 if (ret) 439 return ret; 440 441 freq = FIELD_GET(LTC2688_CH_DIT_PER_MSK, reg); 442 if (freq >= ARRAY_SIZE(c->dither_frequency)) 443 return -EIO; 444 445 return sysfs_emit(buf, "%ld\n", c->dither_frequency[freq]); 446} 447 448static ssize_t ltc2688_dither_freq_set(struct iio_dev *indio_dev, 449 uintptr_t private, 450 const struct iio_chan_spec *chan, 451 const char *buf, size_t len) 452{ 453 const struct ltc2688_state *st = iio_priv(indio_dev); 454 const struct ltc2688_chan *c = &st->channels[chan->channel]; 455 long val; 456 u32 freq; 457 int ret; 458 459 if (private == LTC2688_DITHER_FREQ_AVAIL) 460 return -EINVAL; 461 462 ret = kstrtol(buf, 10, &val); 463 if (ret) 464 return ret; 465 466 for (freq = 0; freq < ARRAY_SIZE(c->dither_frequency); freq++) { 467 if (val == c->dither_frequency[freq]) 468 break; 469 } 470 471 if (freq == ARRAY_SIZE(c->dither_frequency)) 472 return -EINVAL; 473 474 ret = regmap_update_bits(st->regmap, 475 LTC2688_CMD_CH_SETTING(chan->channel), 476 LTC2688_CH_DIT_PER_MSK, 477 FIELD_PREP(LTC2688_CH_DIT_PER_MSK, freq)); 478 if (ret) 479 return ret; 480 481 return len; 482} 483 484static ssize_t ltc2688_dac_input_read(struct iio_dev *indio_dev, 485 uintptr_t private, 486 const struct iio_chan_spec *chan, 487 char *buf) 488{ 489 struct ltc2688_state *st = iio_priv(indio_dev); 490 int ret; 491 u32 val; 492 493 if (private == LTC2688_INPUT_B_AVAIL) 494 return sysfs_emit(buf, "[%u %u %u]\n", ltc2688_raw_range[0], 495 ltc2688_raw_range[1], 496 ltc2688_raw_range[2] / 4); 497 498 if (private == LTC2688_DITHER_OFF) 499 return sysfs_emit(buf, "0\n"); 500 501 ret = ltc2688_dac_code_read(st, chan->channel, private, &val); 502 if (ret) 503 return ret; 504 505 return sysfs_emit(buf, "%u\n", val); 506} 507 508static ssize_t ltc2688_dac_input_write(struct iio_dev *indio_dev, 509 uintptr_t private, 510 const struct iio_chan_spec *chan, 511 const char *buf, size_t len) 512{ 513 struct ltc2688_state *st = iio_priv(indio_dev); 514 int ret; 515 u16 val; 516 517 if (private == LTC2688_INPUT_B_AVAIL || private == LTC2688_DITHER_OFF) 518 return -EINVAL; 519 520 ret = kstrtou16(buf, 10, &val); 521 if (ret) 522 return ret; 523 524 ret = ltc2688_dac_code_write(st, chan->channel, private, val); 525 if (ret) 526 return ret; 527 528 return len; 529} 530 531static int ltc2688_get_dither_phase(struct iio_dev *dev, 532 const struct iio_chan_spec *chan) 533{ 534 struct ltc2688_state *st = iio_priv(dev); 535 int ret, regval; 536 537 ret = regmap_read(st->regmap, LTC2688_CMD_CH_SETTING(chan->channel), 538 ®val); 539 if (ret) 540 return ret; 541 542 return FIELD_GET(LTC2688_CH_DIT_PH_MSK, regval); 543} 544 545static int ltc2688_set_dither_phase(struct iio_dev *dev, 546 const struct iio_chan_spec *chan, 547 unsigned int phase) 548{ 549 struct ltc2688_state *st = iio_priv(dev); 550 551 return regmap_update_bits(st->regmap, 552 LTC2688_CMD_CH_SETTING(chan->channel), 553 LTC2688_CH_DIT_PH_MSK, 554 FIELD_PREP(LTC2688_CH_DIT_PH_MSK, phase)); 555} 556 557static int ltc2688_reg_access(struct iio_dev *indio_dev, 558 unsigned int reg, 559 unsigned int writeval, 560 unsigned int *readval) 561{ 562 struct ltc2688_state *st = iio_priv(indio_dev); 563 564 if (readval) 565 return regmap_read(st->regmap, reg, readval); 566 567 return regmap_write(st->regmap, reg, writeval); 568} 569 570static const char * const ltc2688_dither_phase[] = { 571 "0", "1.5708", "3.14159", "4.71239", 572}; 573 574static const struct iio_enum ltc2688_dither_phase_enum = { 575 .items = ltc2688_dither_phase, 576 .num_items = ARRAY_SIZE(ltc2688_dither_phase), 577 .set = ltc2688_set_dither_phase, 578 .get = ltc2688_get_dither_phase, 579}; 580 581#define LTC2688_CHAN_EXT_INFO(_name, _what, _shared, _read, _write) { \ 582 .name = _name, \ 583 .read = (_read), \ 584 .write = (_write), \ 585 .private = (_what), \ 586 .shared = (_shared), \ 587} 588 589/* 590 * For toggle mode we only expose the symbol attr (sw_toggle) in case a TGPx is 591 * not provided in dts. 592 */ 593static const struct iio_chan_spec_ext_info ltc2688_toggle_sym_ext_info[] = { 594 LTC2688_CHAN_EXT_INFO("raw0", LTC2688_INPUT_A, IIO_SEPARATE, 595 ltc2688_dac_input_read, ltc2688_dac_input_write), 596 LTC2688_CHAN_EXT_INFO("raw1", LTC2688_INPUT_B, IIO_SEPARATE, 597 ltc2688_dac_input_read, ltc2688_dac_input_write), 598 LTC2688_CHAN_EXT_INFO("toggle_en", LTC2688_CMD_TOGGLE_DITHER_EN, 599 IIO_SEPARATE, ltc2688_reg_bool_get, 600 ltc2688_dither_toggle_set), 601 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE, 602 ltc2688_reg_bool_get, ltc2688_reg_bool_set), 603 LTC2688_CHAN_EXT_INFO("symbol", LTC2688_CMD_SW_TOGGLE, IIO_SEPARATE, 604 ltc2688_reg_bool_get, ltc2688_reg_bool_set), 605 { } 606}; 607 608static const struct iio_chan_spec_ext_info ltc2688_toggle_ext_info[] = { 609 LTC2688_CHAN_EXT_INFO("raw0", LTC2688_INPUT_A, IIO_SEPARATE, 610 ltc2688_dac_input_read, ltc2688_dac_input_write), 611 LTC2688_CHAN_EXT_INFO("raw1", LTC2688_INPUT_B, IIO_SEPARATE, 612 ltc2688_dac_input_read, ltc2688_dac_input_write), 613 LTC2688_CHAN_EXT_INFO("toggle_en", LTC2688_CMD_TOGGLE_DITHER_EN, 614 IIO_SEPARATE, ltc2688_reg_bool_get, 615 ltc2688_dither_toggle_set), 616 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE, 617 ltc2688_reg_bool_get, ltc2688_reg_bool_set), 618 { } 619}; 620 621static const struct iio_chan_spec_ext_info ltc2688_dither_ext_info[] = { 622 LTC2688_CHAN_EXT_INFO("dither_raw", LTC2688_INPUT_B, IIO_SEPARATE, 623 ltc2688_dac_input_read, ltc2688_dac_input_write), 624 LTC2688_CHAN_EXT_INFO("dither_raw_available", LTC2688_INPUT_B_AVAIL, 625 IIO_SEPARATE, ltc2688_dac_input_read, 626 ltc2688_dac_input_write), 627 LTC2688_CHAN_EXT_INFO("dither_offset", LTC2688_DITHER_OFF, IIO_SEPARATE, 628 ltc2688_dac_input_read, ltc2688_dac_input_write), 629 /* 630 * Not IIO_ENUM because the available freq needs to be computed at 631 * probe. We could still use it, but it didn't felt much right. 632 */ 633 LTC2688_CHAN_EXT_INFO("dither_frequency", 0, IIO_SEPARATE, 634 ltc2688_dither_freq_get, ltc2688_dither_freq_set), 635 LTC2688_CHAN_EXT_INFO("dither_frequency_available", 636 LTC2688_DITHER_FREQ_AVAIL, IIO_SEPARATE, 637 ltc2688_dither_freq_get, ltc2688_dither_freq_set), 638 IIO_ENUM("dither_phase", IIO_SEPARATE, <c2688_dither_phase_enum), 639 IIO_ENUM_AVAILABLE("dither_phase", IIO_SEPARATE, 640 <c2688_dither_phase_enum), 641 LTC2688_CHAN_EXT_INFO("dither_en", LTC2688_CMD_TOGGLE_DITHER_EN, 642 IIO_SEPARATE, ltc2688_reg_bool_get, 643 ltc2688_dither_toggle_set), 644 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE, 645 ltc2688_reg_bool_get, ltc2688_reg_bool_set), 646 { } 647}; 648 649static const struct iio_chan_spec_ext_info ltc2688_ext_info[] = { 650 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE, 651 ltc2688_reg_bool_get, ltc2688_reg_bool_set), 652 { } 653}; 654 655#define LTC2688_CHANNEL(_chan) { \ 656 .type = IIO_VOLTAGE, \ 657 .indexed = 1, \ 658 .output = 1, \ 659 .channel = (_chan), \ 660 .info_mask_separate = BIT(IIO_CHAN_INFO_CALIBSCALE) | \ 661 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET) | \ 662 BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_RAW), \ 663 .info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW), \ 664 .ext_info = ltc2688_ext_info, \ 665} 666 667static const struct iio_chan_spec ltc2688_channels[] = { 668 LTC2688_CHANNEL(0), 669 LTC2688_CHANNEL(1), 670 LTC2688_CHANNEL(2), 671 LTC2688_CHANNEL(3), 672 LTC2688_CHANNEL(4), 673 LTC2688_CHANNEL(5), 674 LTC2688_CHANNEL(6), 675 LTC2688_CHANNEL(7), 676 LTC2688_CHANNEL(8), 677 LTC2688_CHANNEL(9), 678 LTC2688_CHANNEL(10), 679 LTC2688_CHANNEL(11), 680 LTC2688_CHANNEL(12), 681 LTC2688_CHANNEL(13), 682 LTC2688_CHANNEL(14), 683 LTC2688_CHANNEL(15), 684}; 685 686static void ltc2688_clk_disable(void *clk) 687{ 688 clk_disable_unprepare(clk); 689} 690 691static const int ltc2688_period[LTC2688_DITHER_FREQ_AVAIL_N] = { 692 4, 8, 16, 32, 64, 693}; 694 695static int ltc2688_tgp_clk_setup(struct ltc2688_state *st, 696 struct ltc2688_chan *chan, 697 struct fwnode_handle *node, int tgp) 698{ 699 struct device *dev = &st->spi->dev; 700 unsigned long rate; 701 struct clk *clk; 702 int ret, f; 703 704 clk = devm_get_clk_from_child(dev, to_of_node(node), NULL); 705 if (IS_ERR(clk)) 706 return dev_err_probe(dev, PTR_ERR(clk), "failed to get tgp clk.\n"); 707 708 ret = clk_prepare_enable(clk); 709 if (ret) 710 return dev_err_probe(dev, ret, "failed to enable tgp clk.\n"); 711 712 ret = devm_add_action_or_reset(dev, ltc2688_clk_disable, clk); 713 if (ret) 714 return ret; 715 716 if (chan->toggle_chan) 717 return 0; 718 719 /* calculate available dither frequencies */ 720 rate = clk_get_rate(clk); 721 for (f = 0; f < ARRAY_SIZE(chan->dither_frequency); f++) 722 chan->dither_frequency[f] = DIV_ROUND_CLOSEST(rate, ltc2688_period[f]); 723 724 return 0; 725} 726 727static int ltc2688_span_lookup(const struct ltc2688_state *st, int min, int max) 728{ 729 u32 span; 730 731 for (span = 0; span < ARRAY_SIZE(ltc2688_span_helper); span++) { 732 if (min == ltc2688_span_helper[span][0] && 733 max == ltc2688_span_helper[span][1]) 734 return span; 735 } 736 737 return -EINVAL; 738} 739 740static int ltc2688_channel_config(struct ltc2688_state *st) 741{ 742 struct device *dev = &st->spi->dev; 743 u32 reg, clk_input, val, tmp[2]; 744 int ret, span; 745 746 device_for_each_child_node_scoped(dev, child) { 747 struct ltc2688_chan *chan; 748 749 ret = fwnode_property_read_u32(child, "reg", ®); 750 if (ret) 751 return dev_err_probe(dev, ret, 752 "Failed to get reg property\n"); 753 754 if (reg >= LTC2688_DAC_CHANNELS) 755 return dev_err_probe(dev, -EINVAL, 756 "reg bigger than: %d\n", 757 LTC2688_DAC_CHANNELS); 758 759 val = 0; 760 chan = &st->channels[reg]; 761 if (fwnode_property_read_bool(child, "adi,toggle-mode")) { 762 chan->toggle_chan = true; 763 /* assume sw toggle ABI */ 764 st->iio_chan[reg].ext_info = ltc2688_toggle_sym_ext_info; 765 /* 766 * Clear IIO_CHAN_INFO_RAW bit as toggle channels expose 767 * out_voltage_raw{0|1} files. 768 */ 769 __clear_bit(IIO_CHAN_INFO_RAW, 770 &st->iio_chan[reg].info_mask_separate); 771 } 772 773 ret = fwnode_property_read_u32_array(child, "adi,output-range-microvolt", 774 tmp, ARRAY_SIZE(tmp)); 775 if (!ret) { 776 span = ltc2688_span_lookup(st, (int)tmp[0] / 1000, 777 tmp[1] / 1000); 778 if (span < 0) 779 return dev_err_probe(dev, span, 780 "output range not valid:[%d %d]\n", 781 tmp[0], tmp[1]); 782 783 val |= FIELD_PREP(LTC2688_CH_SPAN_MSK, span); 784 } 785 786 ret = fwnode_property_read_u32(child, "adi,toggle-dither-input", 787 &clk_input); 788 if (!ret) { 789 if (clk_input >= LTC2688_CH_TGP_MAX) { 790 return dev_err_probe(dev, -EINVAL, 791 "toggle-dither-input inv value(%d)\n", 792 clk_input); 793 } 794 795 ret = ltc2688_tgp_clk_setup(st, chan, child, clk_input); 796 if (ret) 797 return ret; 798 799 /* 800 * 0 means software toggle which is the default mode. 801 * Hence the +1. 802 */ 803 val |= FIELD_PREP(LTC2688_CH_TD_SEL_MSK, clk_input + 1); 804 805 /* 806 * If a TGPx is given, we automatically assume a dither 807 * capable channel (unless toggle is already enabled). 808 * On top of this we just set here the dither bit in the 809 * channel settings. It won't have any effect until the 810 * global toggle/dither bit is enabled. 811 */ 812 if (!chan->toggle_chan) { 813 val |= FIELD_PREP(LTC2688_CH_MODE_MSK, 1); 814 st->iio_chan[reg].ext_info = ltc2688_dither_ext_info; 815 } else { 816 /* wait, no sw toggle after all */ 817 st->iio_chan[reg].ext_info = ltc2688_toggle_ext_info; 818 } 819 } 820 821 if (fwnode_property_read_bool(child, "adi,overrange")) { 822 chan->overrange = true; 823 val |= LTC2688_CH_OVERRANGE_MSK; 824 } 825 826 if (!val) 827 continue; 828 829 ret = regmap_write(st->regmap, LTC2688_CMD_CH_SETTING(reg), 830 val); 831 if (ret) 832 return dev_err_probe(dev, ret, 833 "failed to set chan settings\n"); 834 } 835 836 return 0; 837} 838 839static int ltc2688_setup(struct ltc2688_state *st, bool has_external_vref) 840{ 841 struct device *dev = &st->spi->dev; 842 struct gpio_desc *gpio; 843 int ret; 844 845 /* 846 * If we have a reset pin, use that to reset the board, If not, use 847 * the reset bit. 848 */ 849 gpio = devm_gpiod_get_optional(dev, "clr", GPIOD_OUT_HIGH); 850 if (IS_ERR(gpio)) 851 return dev_err_probe(dev, PTR_ERR(gpio), "Failed to get reset gpio"); 852 if (gpio) { 853 usleep_range(1000, 1200); 854 /* bring device out of reset */ 855 gpiod_set_value_cansleep(gpio, 0); 856 } else { 857 ret = regmap_set_bits(st->regmap, LTC2688_CMD_CONFIG, 858 LTC2688_CONFIG_RST); 859 if (ret) 860 return ret; 861 } 862 863 usleep_range(10000, 12000); 864 865 /* 866 * Duplicate the default channel configuration as it can change during 867 * @ltc2688_channel_config() 868 */ 869 st->iio_chan = devm_kmemdup(dev, ltc2688_channels, 870 sizeof(ltc2688_channels), GFP_KERNEL); 871 if (!st->iio_chan) 872 return -ENOMEM; 873 874 ret = ltc2688_channel_config(st); 875 if (ret) 876 return ret; 877 878 if (!has_external_vref) 879 return 0; 880 881 return regmap_set_bits(st->regmap, LTC2688_CMD_CONFIG, 882 LTC2688_CONFIG_EXT_REF); 883} 884 885static bool ltc2688_reg_readable(struct device *dev, unsigned int reg) 886{ 887 switch (reg) { 888 case LTC2688_CMD_CH_CODE(0) ... LTC2688_CMD_CH_GAIN(15): 889 return true; 890 case LTC2688_CMD_CONFIG ... LTC2688_CMD_THERMAL_STAT: 891 return true; 892 default: 893 return false; 894 } 895} 896 897static bool ltc2688_reg_writable(struct device *dev, unsigned int reg) 898{ 899 /* 900 * There's a jump from 0x76 to 0x78 in the write codes and the thermal 901 * status code is 0x77 (which is read only) so that we need to check 902 * that special condition. 903 */ 904 if (reg <= LTC2688_CMD_UPDATE_ALL && reg != LTC2688_CMD_THERMAL_STAT) 905 return true; 906 907 return false; 908} 909 910static const struct regmap_bus ltc2688_regmap_bus = { 911 .read = ltc2688_spi_read, 912 .write = ltc2688_spi_write, 913 .read_flag_mask = LTC2688_READ_OPERATION, 914 .reg_format_endian_default = REGMAP_ENDIAN_BIG, 915 .val_format_endian_default = REGMAP_ENDIAN_BIG, 916}; 917 918static const struct regmap_config ltc2688_regmap_config = { 919 .reg_bits = 8, 920 .val_bits = 16, 921 .readable_reg = ltc2688_reg_readable, 922 .writeable_reg = ltc2688_reg_writable, 923 /* ignoring the no op command */ 924 .max_register = LTC2688_CMD_UPDATE_ALL, 925}; 926 927static const struct iio_info ltc2688_info = { 928 .write_raw = ltc2688_write_raw, 929 .read_raw = ltc2688_read_raw, 930 .read_avail = ltc2688_read_avail, 931 .debugfs_reg_access = ltc2688_reg_access, 932}; 933 934static int ltc2688_probe(struct spi_device *spi) 935{ 936 static const char * const regulators[] = { "vcc", "iovcc" }; 937 struct ltc2688_state *st; 938 struct iio_dev *indio_dev; 939 struct device *dev = &spi->dev; 940 bool has_external_vref; 941 int ret; 942 943 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 944 if (!indio_dev) 945 return -ENOMEM; 946 947 st = iio_priv(indio_dev); 948 st->spi = spi; 949 950 /* Just write this once. No need to do it in every regmap read. */ 951 st->tx_data[3] = LTC2688_CMD_NOOP; 952 ret = devm_mutex_init(dev, &st->lock); 953 if (ret) 954 return ret; 955 956 st->regmap = devm_regmap_init(dev, <c2688_regmap_bus, st, 957 <c2688_regmap_config); 958 if (IS_ERR(st->regmap)) 959 return dev_err_probe(dev, PTR_ERR(st->regmap), 960 "Failed to init regmap"); 961 962 ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulators), 963 regulators); 964 if (ret) 965 return dev_err_probe(dev, ret, "Failed to enable regulators\n"); 966 967 ret = devm_regulator_get_enable_read_voltage(dev, "vref"); 968 if (ret < 0 && ret != -ENODEV) 969 return dev_err_probe(dev, ret, 970 "Failed to get vref regulator voltage\n"); 971 972 has_external_vref = ret != -ENODEV; 973 st->vref = has_external_vref ? ret / 1000 : 0; 974 975 ret = ltc2688_setup(st, has_external_vref); 976 if (ret) 977 return ret; 978 979 indio_dev->name = "ltc2688"; 980 indio_dev->info = <c2688_info; 981 indio_dev->modes = INDIO_DIRECT_MODE; 982 indio_dev->channels = st->iio_chan; 983 indio_dev->num_channels = ARRAY_SIZE(ltc2688_channels); 984 985 return devm_iio_device_register(dev, indio_dev); 986} 987 988static const struct of_device_id ltc2688_of_id[] = { 989 { .compatible = "adi,ltc2688" }, 990 { } 991}; 992MODULE_DEVICE_TABLE(of, ltc2688_of_id); 993 994static const struct spi_device_id ltc2688_id[] = { 995 { "ltc2688" }, 996 { } 997}; 998MODULE_DEVICE_TABLE(spi, ltc2688_id); 999 1000static struct spi_driver ltc2688_driver = { 1001 .driver = { 1002 .name = "ltc2688", 1003 .of_match_table = ltc2688_of_id, 1004 }, 1005 .probe = ltc2688_probe, 1006 .id_table = ltc2688_id, 1007}; 1008module_spi_driver(ltc2688_driver); 1009 1010MODULE_AUTHOR("Nuno Sá <nuno.sa@analog.com>"); 1011MODULE_DESCRIPTION("Analog Devices LTC2688 DAC"); 1012MODULE_LICENSE("GPL");
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