FILE
twl4030-madc.c
File preview with syntax highlighting.
linux-6.19.14/drivers/iio/adc/twl4030-madc.c
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * 4 * TWL4030 MADC module driver-This driver monitors the real time 5 * conversion of analog signals like battery temperature, 6 * battery type, battery level etc. 7 * 8 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 9 * J Keerthy <j-keerthy@ti.com> 10 * 11 * Based on twl4030-madc.c 12 * Copyright (C) 2008 Nokia Corporation 13 * Mikko Ylinen <mikko.k.ylinen@nokia.com> 14 * 15 * Amit Kucheria <amit.kucheria@canonical.com> 16 */ 17 18#include <linux/device.h> 19#include <linux/interrupt.h> 20#include <linux/kernel.h> 21#include <linux/delay.h> 22#include <linux/mod_devicetable.h> 23#include <linux/module.h> 24#include <linux/platform_device.h> 25#include <linux/property.h> 26#include <linux/slab.h> 27#include <linux/mfd/twl.h> 28#include <linux/stddef.h> 29#include <linux/mutex.h> 30#include <linux/bitops.h> 31#include <linux/jiffies.h> 32#include <linux/types.h> 33#include <linux/gfp.h> 34#include <linux/err.h> 35#include <linux/regulator/consumer.h> 36 37#include <linux/iio/iio.h> 38 39#define TWL4030_MADC_MAX_CHANNELS 16 40 41#define TWL4030_MADC_CTRL1 0x00 42#define TWL4030_MADC_CTRL2 0x01 43 44#define TWL4030_MADC_RTSELECT_LSB 0x02 45#define TWL4030_MADC_SW1SELECT_LSB 0x06 46#define TWL4030_MADC_SW2SELECT_LSB 0x0A 47 48#define TWL4030_MADC_RTAVERAGE_LSB 0x04 49#define TWL4030_MADC_SW1AVERAGE_LSB 0x08 50#define TWL4030_MADC_SW2AVERAGE_LSB 0x0C 51 52#define TWL4030_MADC_CTRL_SW1 0x12 53#define TWL4030_MADC_CTRL_SW2 0x13 54 55#define TWL4030_MADC_RTCH0_LSB 0x17 56#define TWL4030_MADC_GPCH0_LSB 0x37 57 58#define TWL4030_MADC_MADCON (1 << 0) /* MADC power on */ 59#define TWL4030_MADC_BUSY (1 << 0) /* MADC busy */ 60/* MADC conversion completion */ 61#define TWL4030_MADC_EOC_SW (1 << 1) 62/* MADC SWx start conversion */ 63#define TWL4030_MADC_SW_START (1 << 5) 64#define TWL4030_MADC_ADCIN0 (1 << 0) 65#define TWL4030_MADC_ADCIN1 (1 << 1) 66#define TWL4030_MADC_ADCIN2 (1 << 2) 67#define TWL4030_MADC_ADCIN3 (1 << 3) 68#define TWL4030_MADC_ADCIN4 (1 << 4) 69#define TWL4030_MADC_ADCIN5 (1 << 5) 70#define TWL4030_MADC_ADCIN6 (1 << 6) 71#define TWL4030_MADC_ADCIN7 (1 << 7) 72#define TWL4030_MADC_ADCIN8 (1 << 8) 73#define TWL4030_MADC_ADCIN9 (1 << 9) 74#define TWL4030_MADC_ADCIN10 (1 << 10) 75#define TWL4030_MADC_ADCIN11 (1 << 11) 76#define TWL4030_MADC_ADCIN12 (1 << 12) 77#define TWL4030_MADC_ADCIN13 (1 << 13) 78#define TWL4030_MADC_ADCIN14 (1 << 14) 79#define TWL4030_MADC_ADCIN15 (1 << 15) 80 81/* Fixed channels */ 82#define TWL4030_MADC_BTEMP TWL4030_MADC_ADCIN1 83#define TWL4030_MADC_VBUS TWL4030_MADC_ADCIN8 84#define TWL4030_MADC_VBKB TWL4030_MADC_ADCIN9 85#define TWL4030_MADC_ICHG TWL4030_MADC_ADCIN10 86#define TWL4030_MADC_VCHG TWL4030_MADC_ADCIN11 87#define TWL4030_MADC_VBAT TWL4030_MADC_ADCIN12 88 89/* Step size and prescaler ratio */ 90#define TEMP_STEP_SIZE 147 91#define TEMP_PSR_R 100 92#define CURR_STEP_SIZE 147 93#define CURR_PSR_R1 44 94#define CURR_PSR_R2 88 95 96#define TWL4030_BCI_BCICTL1 0x23 97#define TWL4030_BCI_CGAIN 0x020 98#define TWL4030_BCI_MESBAT (1 << 1) 99#define TWL4030_BCI_TYPEN (1 << 4) 100#define TWL4030_BCI_ITHEN (1 << 3) 101 102#define REG_BCICTL2 0x024 103#define TWL4030_BCI_ITHSENS 0x007 104 105/* Register and bits for GPBR1 register */ 106#define TWL4030_REG_GPBR1 0x0c 107#define TWL4030_GPBR1_MADC_HFCLK_EN (1 << 7) 108 109#define TWL4030_USB_SEL_MADC_MCPC (1<<3) 110#define TWL4030_USB_CARKIT_ANA_CTRL 0xBB 111 112struct twl4030_madc_conversion_method { 113 u8 sel; 114 u8 avg; 115 u8 rbase; 116 u8 ctrl; 117}; 118 119/** 120 * struct twl4030_madc_request - madc request packet for channel conversion 121 * @channels: 16 bit bitmap for individual channels 122 * @do_avg: sample the input channel for 4 consecutive cycles 123 * @method: RT, SW1, SW2 124 * @type: Polling or interrupt based method 125 * @active: Flag if request is active 126 * @result_pending: Flag from irq handler, that result is ready 127 * @raw: Return raw value, do not convert it 128 * @rbuf: Result buffer 129 */ 130struct twl4030_madc_request { 131 unsigned long channels; 132 bool do_avg; 133 u16 method; 134 u16 type; 135 bool active; 136 bool result_pending; 137 bool raw; 138 int rbuf[TWL4030_MADC_MAX_CHANNELS]; 139}; 140 141enum conversion_methods { 142 TWL4030_MADC_RT, 143 TWL4030_MADC_SW1, 144 TWL4030_MADC_SW2, 145 TWL4030_MADC_NUM_METHODS 146}; 147 148enum sample_type { 149 TWL4030_MADC_WAIT, 150 TWL4030_MADC_IRQ_ONESHOT, 151 TWL4030_MADC_IRQ_REARM 152}; 153 154/** 155 * struct twl4030_madc_data - a container for madc info 156 * @dev: Pointer to device structure for madc 157 * @lock: Mutex protecting this data structure 158 * @usb3v1: Pointer to bias regulator for madc 159 * @requests: Array of request struct corresponding to SW1, SW2 and RT 160 * @use_second_irq: IRQ selection (main or co-processor) 161 * @imr: Interrupt mask register of MADC 162 * @isr: Interrupt status register of MADC 163 */ 164struct twl4030_madc_data { 165 struct device *dev; 166 struct mutex lock; 167 struct regulator *usb3v1; 168 struct twl4030_madc_request requests[TWL4030_MADC_NUM_METHODS]; 169 bool use_second_irq; 170 u8 imr; 171 u8 isr; 172}; 173 174static int twl4030_madc_conversion(struct twl4030_madc_request *req); 175 176static int twl4030_madc_read(struct iio_dev *iio_dev, 177 const struct iio_chan_spec *chan, 178 int *val, int *val2, long mask) 179{ 180 struct twl4030_madc_data *madc = iio_priv(iio_dev); 181 struct twl4030_madc_request req; 182 int ret; 183 184 req.method = madc->use_second_irq ? TWL4030_MADC_SW2 : TWL4030_MADC_SW1; 185 186 req.channels = BIT(chan->channel); 187 req.active = false; 188 req.type = TWL4030_MADC_WAIT; 189 req.raw = !(mask == IIO_CHAN_INFO_PROCESSED); 190 req.do_avg = (mask == IIO_CHAN_INFO_AVERAGE_RAW); 191 192 ret = twl4030_madc_conversion(&req); 193 if (ret < 0) 194 return ret; 195 196 *val = req.rbuf[chan->channel]; 197 198 return IIO_VAL_INT; 199} 200 201static const struct iio_info twl4030_madc_iio_info = { 202 .read_raw = &twl4030_madc_read, 203}; 204 205#define TWL4030_ADC_CHANNEL(_channel, _type, _name) { \ 206 .type = _type, \ 207 .channel = _channel, \ 208 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 209 BIT(IIO_CHAN_INFO_AVERAGE_RAW) | \ 210 BIT(IIO_CHAN_INFO_PROCESSED), \ 211 .datasheet_name = _name, \ 212 .indexed = 1, \ 213} 214 215static const struct iio_chan_spec twl4030_madc_iio_channels[] = { 216 TWL4030_ADC_CHANNEL(0, IIO_VOLTAGE, "ADCIN0"), 217 TWL4030_ADC_CHANNEL(1, IIO_TEMP, "ADCIN1"), 218 TWL4030_ADC_CHANNEL(2, IIO_VOLTAGE, "ADCIN2"), 219 TWL4030_ADC_CHANNEL(3, IIO_VOLTAGE, "ADCIN3"), 220 TWL4030_ADC_CHANNEL(4, IIO_VOLTAGE, "ADCIN4"), 221 TWL4030_ADC_CHANNEL(5, IIO_VOLTAGE, "ADCIN5"), 222 TWL4030_ADC_CHANNEL(6, IIO_VOLTAGE, "ADCIN6"), 223 TWL4030_ADC_CHANNEL(7, IIO_VOLTAGE, "ADCIN7"), 224 TWL4030_ADC_CHANNEL(8, IIO_VOLTAGE, "ADCIN8"), 225 TWL4030_ADC_CHANNEL(9, IIO_VOLTAGE, "ADCIN9"), 226 TWL4030_ADC_CHANNEL(10, IIO_CURRENT, "ADCIN10"), 227 TWL4030_ADC_CHANNEL(11, IIO_VOLTAGE, "ADCIN11"), 228 TWL4030_ADC_CHANNEL(12, IIO_VOLTAGE, "ADCIN12"), 229 TWL4030_ADC_CHANNEL(13, IIO_VOLTAGE, "ADCIN13"), 230 TWL4030_ADC_CHANNEL(14, IIO_VOLTAGE, "ADCIN14"), 231 TWL4030_ADC_CHANNEL(15, IIO_VOLTAGE, "ADCIN15"), 232}; 233 234static struct twl4030_madc_data *twl4030_madc; 235 236static const struct s16_fract twl4030_divider_ratios[16] = { 237 {1, 1}, /* CHANNEL 0 No Prescaler */ 238 {1, 1}, /* CHANNEL 1 No Prescaler */ 239 {6, 10}, /* CHANNEL 2 */ 240 {6, 10}, /* CHANNEL 3 */ 241 {6, 10}, /* CHANNEL 4 */ 242 {6, 10}, /* CHANNEL 5 */ 243 {6, 10}, /* CHANNEL 6 */ 244 {6, 10}, /* CHANNEL 7 */ 245 {3, 14}, /* CHANNEL 8 */ 246 {1, 3}, /* CHANNEL 9 */ 247 {1, 1}, /* CHANNEL 10 No Prescaler */ 248 {15, 100}, /* CHANNEL 11 */ 249 {1, 4}, /* CHANNEL 12 */ 250 {1, 1}, /* CHANNEL 13 Reserved channels */ 251 {1, 1}, /* CHANNEL 14 Reserved channels */ 252 {5, 11}, /* CHANNEL 15 */ 253}; 254 255/* Conversion table from -3 to 55 degrees Celcius */ 256static int twl4030_therm_tbl[] = { 257 30800, 29500, 28300, 27100, 258 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 259 17900, 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 260 12600, 12100, 11600, 11200, 10800, 10400, 10000, 9630, 9280, 261 8950, 8620, 8310, 8020, 7730, 7460, 7200, 6950, 6710, 262 6470, 6250, 6040, 5830, 5640, 5450, 5260, 5090, 4920, 263 4760, 4600, 4450, 4310, 4170, 4040, 3910, 3790, 3670, 264 3550 265}; 266 267/* 268 * Structure containing the registers 269 * of different conversion methods supported by MADC. 270 * Hardware or RT real time conversion request initiated by external host 271 * processor for RT Signal conversions. 272 * External host processors can also request for non RT conversions 273 * SW1 and SW2 software conversions also called asynchronous or GPC request. 274 */ 275static 276const struct twl4030_madc_conversion_method twl4030_conversion_methods[] = { 277 [TWL4030_MADC_RT] = { 278 .sel = TWL4030_MADC_RTSELECT_LSB, 279 .avg = TWL4030_MADC_RTAVERAGE_LSB, 280 .rbase = TWL4030_MADC_RTCH0_LSB, 281 }, 282 [TWL4030_MADC_SW1] = { 283 .sel = TWL4030_MADC_SW1SELECT_LSB, 284 .avg = TWL4030_MADC_SW1AVERAGE_LSB, 285 .rbase = TWL4030_MADC_GPCH0_LSB, 286 .ctrl = TWL4030_MADC_CTRL_SW1, 287 }, 288 [TWL4030_MADC_SW2] = { 289 .sel = TWL4030_MADC_SW2SELECT_LSB, 290 .avg = TWL4030_MADC_SW2AVERAGE_LSB, 291 .rbase = TWL4030_MADC_GPCH0_LSB, 292 .ctrl = TWL4030_MADC_CTRL_SW2, 293 }, 294}; 295 296/** 297 * twl4030_madc_channel_raw_read() - Function to read a particular channel value 298 * @madc: pointer to struct twl4030_madc_data 299 * @reg: lsb of ADC Channel 300 * 301 * Return: 0 on success, an error code otherwise. 302 */ 303static int twl4030_madc_channel_raw_read(struct twl4030_madc_data *madc, u8 reg) 304{ 305 u16 val; 306 int ret; 307 /* 308 * For each ADC channel, we have MSB and LSB register pair. MSB address 309 * is always LSB address+1. reg parameter is the address of LSB register 310 */ 311 ret = twl_i2c_read_u16(TWL4030_MODULE_MADC, &val, reg); 312 if (ret) { 313 dev_err(madc->dev, "unable to read register 0x%X\n", reg); 314 return ret; 315 } 316 317 return (int)(val >> 6); 318} 319 320/* 321 * Return battery temperature in degrees Celsius 322 * Or < 0 on failure. 323 */ 324static int twl4030battery_temperature(int raw_volt) 325{ 326 u8 val; 327 int temp, curr, volt, res, ret; 328 329 volt = (raw_volt * TEMP_STEP_SIZE) / TEMP_PSR_R; 330 /* Getting and calculating the supply current in micro amperes */ 331 ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE, &val, 332 REG_BCICTL2); 333 if (ret < 0) 334 return ret; 335 336 curr = ((val & TWL4030_BCI_ITHSENS) + 1) * 10; 337 /* Getting and calculating the thermistor resistance in ohms */ 338 res = volt * 1000 / curr; 339 /* calculating temperature */ 340 for (temp = 58; temp >= 0; temp--) { 341 int actual = twl4030_therm_tbl[temp]; 342 if ((actual - res) >= 0) 343 break; 344 } 345 346 return temp + 1; 347} 348 349static int twl4030battery_current(int raw_volt) 350{ 351 int ret; 352 u8 val; 353 354 ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE, &val, 355 TWL4030_BCI_BCICTL1); 356 if (ret) 357 return ret; 358 if (val & TWL4030_BCI_CGAIN) /* slope of 0.44 mV/mA */ 359 return (raw_volt * CURR_STEP_SIZE) / CURR_PSR_R1; 360 else /* slope of 0.88 mV/mA */ 361 return (raw_volt * CURR_STEP_SIZE) / CURR_PSR_R2; 362} 363 364/* 365 * Function to read channel values 366 * @madc - pointer to twl4030_madc_data struct 367 * @reg_base - Base address of the first channel 368 * @Channels - 16 bit bitmap. If the bit is set, channel's value is read 369 * @buf - The channel values are stored here. if read fails error 370 * @raw - Return raw values without conversion 371 * value is stored 372 * Returns the number of successfully read channels. 373 */ 374static int twl4030_madc_read_channels(struct twl4030_madc_data *madc, 375 u8 reg_base, unsigned 376 long channels, int *buf, 377 bool raw) 378{ 379 int count = 0; 380 int i; 381 u8 reg; 382 383 for_each_set_bit(i, &channels, TWL4030_MADC_MAX_CHANNELS) { 384 reg = reg_base + (2 * i); 385 buf[i] = twl4030_madc_channel_raw_read(madc, reg); 386 if (buf[i] < 0) { 387 dev_err(madc->dev, "Unable to read register 0x%X\n", 388 reg); 389 return buf[i]; 390 } 391 if (raw) { 392 count++; 393 continue; 394 } 395 switch (i) { 396 case 10: 397 buf[i] = twl4030battery_current(buf[i]); 398 if (buf[i] < 0) { 399 dev_err(madc->dev, "err reading current\n"); 400 return buf[i]; 401 } else { 402 count++; 403 buf[i] = buf[i] - 750; 404 } 405 break; 406 case 1: 407 buf[i] = twl4030battery_temperature(buf[i]); 408 if (buf[i] < 0) { 409 dev_err(madc->dev, "err reading temperature\n"); 410 return buf[i]; 411 } else { 412 buf[i] -= 3; 413 count++; 414 } 415 break; 416 default: 417 count++; 418 /* Analog Input (V) = conv_result * step_size / R 419 * conv_result = decimal value of 10-bit conversion 420 * result 421 * step size = 1.5 / (2 ^ 10 -1) 422 * R = Prescaler ratio for input channels. 423 * Result given in mV hence multiplied by 1000. 424 */ 425 buf[i] = (buf[i] * 3 * 1000 * 426 twl4030_divider_ratios[i].denominator) 427 / (2 * 1023 * 428 twl4030_divider_ratios[i].numerator); 429 } 430 } 431 432 return count; 433} 434 435/* 436 * Disables irq. 437 * @madc - pointer to twl4030_madc_data struct 438 * @id - irq number to be disabled 439 * can take one of TWL4030_MADC_RT, TWL4030_MADC_SW1, TWL4030_MADC_SW2 440 * corresponding to RT, SW1, SW2 conversion requests. 441 * Returns error if i2c read/write fails. 442 */ 443static int twl4030_madc_disable_irq(struct twl4030_madc_data *madc, u8 id) 444{ 445 u8 val; 446 int ret; 447 448 ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &val, madc->imr); 449 if (ret) { 450 dev_err(madc->dev, "unable to read imr register 0x%X\n", 451 madc->imr); 452 return ret; 453 } 454 val |= (1 << id); 455 ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, val, madc->imr); 456 if (ret) { 457 dev_err(madc->dev, 458 "unable to write imr register 0x%X\n", madc->imr); 459 return ret; 460 } 461 462 return 0; 463} 464 465static irqreturn_t twl4030_madc_threaded_irq_handler(int irq, void *_madc) 466{ 467 struct twl4030_madc_data *madc = _madc; 468 const struct twl4030_madc_conversion_method *method; 469 u8 isr_val, imr_val; 470 int i, ret; 471 struct twl4030_madc_request *r; 472 473 mutex_lock(&madc->lock); 474 ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &isr_val, madc->isr); 475 if (ret) { 476 dev_err(madc->dev, "unable to read isr register 0x%X\n", 477 madc->isr); 478 goto err_i2c; 479 } 480 ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &imr_val, madc->imr); 481 if (ret) { 482 dev_err(madc->dev, "unable to read imr register 0x%X\n", 483 madc->imr); 484 goto err_i2c; 485 } 486 isr_val &= ~imr_val; 487 for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) { 488 if (!(isr_val & (1 << i))) 489 continue; 490 ret = twl4030_madc_disable_irq(madc, i); 491 if (ret < 0) 492 dev_dbg(madc->dev, "Disable interrupt failed %d\n", i); 493 madc->requests[i].result_pending = true; 494 } 495 for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) { 496 r = &madc->requests[i]; 497 /* No pending results for this method, move to next one */ 498 if (!r->result_pending) 499 continue; 500 method = &twl4030_conversion_methods[r->method]; 501 /* Read results */ 502 twl4030_madc_read_channels(madc, method->rbase, 503 r->channels, r->rbuf, r->raw); 504 /* Free request */ 505 r->result_pending = false; 506 r->active = false; 507 } 508 mutex_unlock(&madc->lock); 509 510 return IRQ_HANDLED; 511 512err_i2c: 513 /* 514 * In case of error check whichever request is active 515 * and service the same. 516 */ 517 for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) { 518 r = &madc->requests[i]; 519 if (!r->active) 520 continue; 521 method = &twl4030_conversion_methods[r->method]; 522 /* Read results */ 523 twl4030_madc_read_channels(madc, method->rbase, 524 r->channels, r->rbuf, r->raw); 525 /* Free request */ 526 r->result_pending = false; 527 r->active = false; 528 } 529 mutex_unlock(&madc->lock); 530 531 return IRQ_HANDLED; 532} 533 534/* 535 * Function which enables the madc conversion 536 * by writing to the control register. 537 * @madc - pointer to twl4030_madc_data struct 538 * @conv_method - can be TWL4030_MADC_RT, TWL4030_MADC_SW2, TWL4030_MADC_SW1 539 * corresponding to RT SW1 or SW2 conversion methods. 540 * Returns 0 if succeeds else a negative error value 541 */ 542static int twl4030_madc_start_conversion(struct twl4030_madc_data *madc, 543 int conv_method) 544{ 545 const struct twl4030_madc_conversion_method *method; 546 int ret = 0; 547 548 if (conv_method != TWL4030_MADC_SW1 && conv_method != TWL4030_MADC_SW2) 549 return -ENOTSUPP; 550 551 method = &twl4030_conversion_methods[conv_method]; 552 ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, TWL4030_MADC_SW_START, 553 method->ctrl); 554 if (ret) { 555 dev_err(madc->dev, "unable to write ctrl register 0x%X\n", 556 method->ctrl); 557 return ret; 558 } 559 560 return 0; 561} 562 563/* 564 * Function that waits for conversion to be ready 565 * @madc - pointer to twl4030_madc_data struct 566 * @timeout_ms - timeout value in milliseconds 567 * @status_reg - ctrl register 568 * returns 0 if succeeds else a negative error value 569 */ 570static int twl4030_madc_wait_conversion_ready(struct twl4030_madc_data *madc, 571 unsigned int timeout_ms, 572 u8 status_reg) 573{ 574 unsigned long timeout; 575 int ret; 576 577 timeout = jiffies + msecs_to_jiffies(timeout_ms); 578 do { 579 u8 reg; 580 581 ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, ®, status_reg); 582 if (ret) { 583 dev_err(madc->dev, 584 "unable to read status register 0x%X\n", 585 status_reg); 586 return ret; 587 } 588 if (!(reg & TWL4030_MADC_BUSY) && (reg & TWL4030_MADC_EOC_SW)) 589 return 0; 590 usleep_range(500, 2000); 591 } while (!time_after(jiffies, timeout)); 592 dev_err(madc->dev, "conversion timeout!\n"); 593 594 return -EAGAIN; 595} 596 597/* 598 * An exported function which can be called from other kernel drivers. 599 * @req twl4030_madc_request structure 600 * req->rbuf will be filled with read values of channels based on the 601 * channel index. If a particular channel reading fails there will 602 * be a negative error value in the corresponding array element. 603 * returns 0 if succeeds else error value 604 */ 605static int twl4030_madc_conversion(struct twl4030_madc_request *req) 606{ 607 const struct twl4030_madc_conversion_method *method; 608 int ret; 609 610 if (!req || !twl4030_madc) 611 return -EINVAL; 612 613 mutex_lock(&twl4030_madc->lock); 614 if (req->method < TWL4030_MADC_RT || req->method > TWL4030_MADC_SW2) { 615 ret = -EINVAL; 616 goto out; 617 } 618 /* Do we have a conversion request ongoing */ 619 if (twl4030_madc->requests[req->method].active) { 620 ret = -EBUSY; 621 goto out; 622 } 623 method = &twl4030_conversion_methods[req->method]; 624 /* Select channels to be converted */ 625 ret = twl_i2c_write_u16(TWL4030_MODULE_MADC, req->channels, method->sel); 626 if (ret) { 627 dev_err(twl4030_madc->dev, 628 "unable to write sel register 0x%X\n", method->sel); 629 goto out; 630 } 631 /* Select averaging for all channels if do_avg is set */ 632 if (req->do_avg) { 633 ret = twl_i2c_write_u16(TWL4030_MODULE_MADC, req->channels, 634 method->avg); 635 if (ret) { 636 dev_err(twl4030_madc->dev, 637 "unable to write avg register 0x%X\n", 638 method->avg); 639 goto out; 640 } 641 } 642 /* With RT method we should not be here anymore */ 643 if (req->method == TWL4030_MADC_RT) { 644 ret = -EINVAL; 645 goto out; 646 } 647 ret = twl4030_madc_start_conversion(twl4030_madc, req->method); 648 if (ret < 0) 649 goto out; 650 twl4030_madc->requests[req->method].active = true; 651 /* Wait until conversion is ready (ctrl register returns EOC) */ 652 ret = twl4030_madc_wait_conversion_ready(twl4030_madc, 5, method->ctrl); 653 if (ret) { 654 twl4030_madc->requests[req->method].active = false; 655 goto out; 656 } 657 ret = twl4030_madc_read_channels(twl4030_madc, method->rbase, 658 req->channels, req->rbuf, req->raw); 659 twl4030_madc->requests[req->method].active = false; 660 661out: 662 mutex_unlock(&twl4030_madc->lock); 663 664 return ret; 665} 666 667/** 668 * twl4030_madc_set_current_generator() - setup bias current 669 * 670 * @madc: pointer to twl4030_madc_data struct 671 * @chan: can be one of the two values: 672 * 0 - Enables bias current for main battery type reading 673 * 1 - Enables bias current for main battery temperature sensing 674 * @on: enable or disable chan. 675 * 676 * Function to enable or disable bias current for 677 * main battery type reading or temperature sensing 678 */ 679static int twl4030_madc_set_current_generator(struct twl4030_madc_data *madc, 680 int chan, int on) 681{ 682 int ret; 683 int regmask; 684 u8 regval; 685 686 ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE, 687 ®val, TWL4030_BCI_BCICTL1); 688 if (ret) { 689 dev_err(madc->dev, "unable to read BCICTL1 reg 0x%X", 690 TWL4030_BCI_BCICTL1); 691 return ret; 692 } 693 694 regmask = chan ? TWL4030_BCI_ITHEN : TWL4030_BCI_TYPEN; 695 if (on) 696 regval |= regmask; 697 else 698 regval &= ~regmask; 699 700 ret = twl_i2c_write_u8(TWL_MODULE_MAIN_CHARGE, 701 regval, TWL4030_BCI_BCICTL1); 702 if (ret) { 703 dev_err(madc->dev, "unable to write BCICTL1 reg 0x%X\n", 704 TWL4030_BCI_BCICTL1); 705 return ret; 706 } 707 708 return 0; 709} 710 711/* 712 * Function that sets MADC software power on bit to enable MADC 713 * @madc - pointer to twl4030_madc_data struct 714 * @on - Enable or disable MADC software power on bit. 715 * returns error if i2c read/write fails else 0 716 */ 717static int twl4030_madc_set_power(struct twl4030_madc_data *madc, int on) 718{ 719 u8 regval; 720 int ret; 721 722 ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE, 723 ®val, TWL4030_MADC_CTRL1); 724 if (ret) { 725 dev_err(madc->dev, "unable to read madc ctrl1 reg 0x%X\n", 726 TWL4030_MADC_CTRL1); 727 return ret; 728 } 729 if (on) 730 regval |= TWL4030_MADC_MADCON; 731 else 732 regval &= ~TWL4030_MADC_MADCON; 733 ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, regval, TWL4030_MADC_CTRL1); 734 if (ret) { 735 dev_err(madc->dev, "unable to write madc ctrl1 reg 0x%X\n", 736 TWL4030_MADC_CTRL1); 737 return ret; 738 } 739 740 return 0; 741} 742 743/* 744 * Initialize MADC and request for threaded irq 745 */ 746static int twl4030_madc_probe(struct platform_device *pdev) 747{ 748 struct device *dev = &pdev->dev; 749 struct twl4030_madc_platform_data *pdata = dev_get_platdata(dev); 750 struct twl4030_madc_data *madc; 751 int irq, ret; 752 u8 regval; 753 struct iio_dev *iio_dev = NULL; 754 755 if (!pdata && !dev_fwnode(dev)) { 756 dev_err(&pdev->dev, "neither platform data nor Device Tree node available\n"); 757 return -EINVAL; 758 } 759 760 iio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*madc)); 761 if (!iio_dev) 762 return -ENOMEM; 763 764 madc = iio_priv(iio_dev); 765 madc->dev = &pdev->dev; 766 767 iio_dev->name = dev_name(&pdev->dev); 768 iio_dev->info = &twl4030_madc_iio_info; 769 iio_dev->modes = INDIO_DIRECT_MODE; 770 iio_dev->channels = twl4030_madc_iio_channels; 771 iio_dev->num_channels = ARRAY_SIZE(twl4030_madc_iio_channels); 772 773 /* 774 * Phoenix provides 2 interrupt lines. The first one is connected to 775 * the OMAP. The other one can be connected to the other processor such 776 * as modem. Hence two separate ISR and IMR registers. 777 */ 778 if (pdata) 779 madc->use_second_irq = (pdata->irq_line != 1); 780 else 781 madc->use_second_irq = device_property_read_bool(dev, 782 "ti,system-uses-second-madc-irq"); 783 784 madc->imr = madc->use_second_irq ? TWL4030_MADC_IMR2 : 785 TWL4030_MADC_IMR1; 786 madc->isr = madc->use_second_irq ? TWL4030_MADC_ISR2 : 787 TWL4030_MADC_ISR1; 788 789 ret = twl4030_madc_set_power(madc, 1); 790 if (ret < 0) 791 return ret; 792 ret = twl4030_madc_set_current_generator(madc, 0, 1); 793 if (ret < 0) 794 goto err_current_generator; 795 796 ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE, 797 ®val, TWL4030_BCI_BCICTL1); 798 if (ret) { 799 dev_err(&pdev->dev, "unable to read reg BCI CTL1 0x%X\n", 800 TWL4030_BCI_BCICTL1); 801 goto err_i2c; 802 } 803 regval |= TWL4030_BCI_MESBAT; 804 ret = twl_i2c_write_u8(TWL_MODULE_MAIN_CHARGE, 805 regval, TWL4030_BCI_BCICTL1); 806 if (ret) { 807 dev_err(&pdev->dev, "unable to write reg BCI Ctl1 0x%X\n", 808 TWL4030_BCI_BCICTL1); 809 goto err_i2c; 810 } 811 812 /* Check that MADC clock is on */ 813 ret = twl_i2c_read_u8(TWL4030_MODULE_INTBR, ®val, TWL4030_REG_GPBR1); 814 if (ret) { 815 dev_err(&pdev->dev, "unable to read reg GPBR1 0x%X\n", 816 TWL4030_REG_GPBR1); 817 goto err_i2c; 818 } 819 820 /* If MADC clk is not on, turn it on */ 821 if (!(regval & TWL4030_GPBR1_MADC_HFCLK_EN)) { 822 dev_info(&pdev->dev, "clk disabled, enabling\n"); 823 regval |= TWL4030_GPBR1_MADC_HFCLK_EN; 824 ret = twl_i2c_write_u8(TWL4030_MODULE_INTBR, regval, 825 TWL4030_REG_GPBR1); 826 if (ret) { 827 dev_err(&pdev->dev, "unable to write reg GPBR1 0x%X\n", 828 TWL4030_REG_GPBR1); 829 goto err_i2c; 830 } 831 } 832 833 platform_set_drvdata(pdev, iio_dev); 834 mutex_init(&madc->lock); 835 836 irq = platform_get_irq(pdev, 0); 837 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, 838 twl4030_madc_threaded_irq_handler, 839 IRQF_TRIGGER_RISING | IRQF_ONESHOT, 840 "twl4030_madc", madc); 841 if (ret) { 842 dev_err(&pdev->dev, "could not request irq\n"); 843 goto err_i2c; 844 } 845 twl4030_madc = madc; 846 847 /* Configure MADC[3:6] */ 848 ret = twl_i2c_read_u8(TWL_MODULE_USB, ®val, 849 TWL4030_USB_CARKIT_ANA_CTRL); 850 if (ret) { 851 dev_err(&pdev->dev, "unable to read reg CARKIT_ANA_CTRL 0x%X\n", 852 TWL4030_USB_CARKIT_ANA_CTRL); 853 goto err_i2c; 854 } 855 regval |= TWL4030_USB_SEL_MADC_MCPC; 856 ret = twl_i2c_write_u8(TWL_MODULE_USB, regval, 857 TWL4030_USB_CARKIT_ANA_CTRL); 858 if (ret) { 859 dev_err(&pdev->dev, "unable to write reg CARKIT_ANA_CTRL 0x%X\n", 860 TWL4030_USB_CARKIT_ANA_CTRL); 861 goto err_i2c; 862 } 863 864 /* Enable 3v1 bias regulator for MADC[3:6] */ 865 madc->usb3v1 = devm_regulator_get(madc->dev, "vusb3v1"); 866 if (IS_ERR(madc->usb3v1)) { 867 ret = -ENODEV; 868 goto err_i2c; 869 } 870 871 ret = regulator_enable(madc->usb3v1); 872 if (ret) { 873 dev_err(madc->dev, "could not enable 3v1 bias regulator\n"); 874 goto err_i2c; 875 } 876 877 ret = iio_device_register(iio_dev); 878 if (ret) { 879 dev_err(&pdev->dev, "could not register iio device\n"); 880 goto err_usb3v1; 881 } 882 883 return 0; 884 885err_usb3v1: 886 regulator_disable(madc->usb3v1); 887err_i2c: 888 twl4030_madc_set_current_generator(madc, 0, 0); 889err_current_generator: 890 twl4030_madc_set_power(madc, 0); 891 return ret; 892} 893 894static void twl4030_madc_remove(struct platform_device *pdev) 895{ 896 struct iio_dev *iio_dev = platform_get_drvdata(pdev); 897 struct twl4030_madc_data *madc = iio_priv(iio_dev); 898 899 iio_device_unregister(iio_dev); 900 901 twl4030_madc_set_current_generator(madc, 0, 0); 902 twl4030_madc_set_power(madc, 0); 903 904 regulator_disable(madc->usb3v1); 905} 906 907static const struct of_device_id twl_madc_of_match[] = { 908 { .compatible = "ti,twl4030-madc", }, 909 { } 910}; 911MODULE_DEVICE_TABLE(of, twl_madc_of_match); 912 913static struct platform_driver twl4030_madc_driver = { 914 .probe = twl4030_madc_probe, 915 .remove = twl4030_madc_remove, 916 .driver = { 917 .name = "twl4030_madc", 918 .of_match_table = twl_madc_of_match, 919 }, 920}; 921 922module_platform_driver(twl4030_madc_driver); 923 924MODULE_DESCRIPTION("TWL4030 ADC driver"); 925MODULE_LICENSE("GPL"); 926MODULE_AUTHOR("J Keerthy"); 927MODULE_ALIAS("platform:twl4030_madc");
~/
Read-only file preview.