ti-lmp92064.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Texas Instruments LMP92064 SPI ADC driver
  4 *
  5 * Copyright (c) 2022 Leonard Göhrs <kernel@pengutronix.de>, Pengutronix
  6 *
  7 * Based on linux/drivers/iio/adc/ti-tsc2046.c
  8 * Copyright (c) 2021 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
  9 */
 10
 11#include <linux/delay.h>
 12#include <linux/gpio/consumer.h>
 13#include <linux/module.h>
 14#include <linux/regmap.h>
 15#include <linux/regulator/consumer.h>
 16#include <linux/spi/spi.h>
 17
 18#include <linux/iio/iio.h>
 19#include <linux/iio/buffer.h>
 20#include <linux/iio/driver.h>
 21#include <linux/iio/triggered_buffer.h>
 22#include <linux/iio/trigger_consumer.h>
 23
 24#define TI_LMP92064_REG_CONFIG_A 0x0000
 25#define TI_LMP92064_REG_CONFIG_B 0x0001
 26#define TI_LMP92064_REG_CHIP_REV 0x0006
 27
 28#define TI_LMP92064_REG_MFR_ID1 0x000C
 29#define TI_LMP92064_REG_MFR_ID2 0x000D
 30
 31#define TI_LMP92064_REG_REG_UPDATE 0x000F
 32#define TI_LMP92064_REG_CONFIG_REG 0x0100
 33#define TI_LMP92064_REG_STATUS 0x0103
 34
 35#define TI_LMP92064_REG_DATA_VOUT_LSB 0x0200
 36#define TI_LMP92064_REG_DATA_VOUT_MSB 0x0201
 37#define TI_LMP92064_REG_DATA_COUT_LSB 0x0202
 38#define TI_LMP92064_REG_DATA_COUT_MSB 0x0203
 39
 40#define TI_LMP92064_VAL_CONFIG_A 0x99
 41#define TI_LMP92064_VAL_CONFIG_B 0x00
 42#define TI_LMP92064_VAL_STATUS_OK 0x01
 43
 44/*
 45 * Channel number definitions for the two channels of the device
 46 * - IN Current (INC)
 47 * - IN Voltage (INV)
 48 */
 49#define TI_LMP92064_CHAN_INC 0
 50#define TI_LMP92064_CHAN_INV 1
 51
 52static const struct regmap_range lmp92064_readable_reg_ranges[] = {
 53	regmap_reg_range(TI_LMP92064_REG_CONFIG_A, TI_LMP92064_REG_CHIP_REV),
 54	regmap_reg_range(TI_LMP92064_REG_MFR_ID1, TI_LMP92064_REG_MFR_ID2),
 55	regmap_reg_range(TI_LMP92064_REG_REG_UPDATE, TI_LMP92064_REG_REG_UPDATE),
 56	regmap_reg_range(TI_LMP92064_REG_CONFIG_REG, TI_LMP92064_REG_CONFIG_REG),
 57	regmap_reg_range(TI_LMP92064_REG_STATUS, TI_LMP92064_REG_STATUS),
 58	regmap_reg_range(TI_LMP92064_REG_DATA_VOUT_LSB, TI_LMP92064_REG_DATA_COUT_MSB),
 59};
 60
 61static const struct regmap_access_table lmp92064_readable_regs = {
 62	.yes_ranges = lmp92064_readable_reg_ranges,
 63	.n_yes_ranges = ARRAY_SIZE(lmp92064_readable_reg_ranges),
 64};
 65
 66static const struct regmap_range lmp92064_writable_reg_ranges[] = {
 67	regmap_reg_range(TI_LMP92064_REG_CONFIG_A, TI_LMP92064_REG_CONFIG_B),
 68	regmap_reg_range(TI_LMP92064_REG_REG_UPDATE, TI_LMP92064_REG_REG_UPDATE),
 69	regmap_reg_range(TI_LMP92064_REG_CONFIG_REG, TI_LMP92064_REG_CONFIG_REG),
 70};
 71
 72static const struct regmap_access_table lmp92064_writable_regs = {
 73	.yes_ranges = lmp92064_writable_reg_ranges,
 74	.n_yes_ranges = ARRAY_SIZE(lmp92064_writable_reg_ranges),
 75};
 76
 77static const struct regmap_config lmp92064_spi_regmap_config = {
 78	.reg_bits = 16,
 79	.val_bits = 8,
 80	.max_register = TI_LMP92064_REG_DATA_COUT_MSB,
 81	.rd_table = &lmp92064_readable_regs,
 82	.wr_table = &lmp92064_writable_regs,
 83};
 84
 85struct lmp92064_adc_priv {
 86	int shunt_resistor_uohm;
 87	struct spi_device *spi;
 88	struct regmap *regmap;
 89};
 90
 91static const struct iio_chan_spec lmp92064_adc_channels[] = {
 92	{
 93		.type = IIO_CURRENT,
 94		.address = TI_LMP92064_CHAN_INC,
 95		.info_mask_separate =
 96			BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
 97		.scan_index = TI_LMP92064_CHAN_INC,
 98		.scan_type = {
 99			.sign = 'u',
100			.realbits = 12,
101			.storagebits = 16,
102		},
103		.datasheet_name = "INC",
104	},
105	{
106		.type = IIO_VOLTAGE,
107		.address = TI_LMP92064_CHAN_INV,
108		.info_mask_separate =
109			BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
110		.scan_index = TI_LMP92064_CHAN_INV,
111		.scan_type = {
112			.sign = 'u',
113			.realbits = 12,
114			.storagebits = 16,
115		},
116		.datasheet_name = "INV",
117	},
118	IIO_CHAN_SOFT_TIMESTAMP(2),
119};
120
121static const unsigned long lmp92064_scan_masks[] = {
122	BIT(TI_LMP92064_CHAN_INC) | BIT(TI_LMP92064_CHAN_INV),
123	0
124};
125
126static int lmp92064_read_meas(struct lmp92064_adc_priv *priv, u16 *res)
127{
128	__be16 raw[2];
129	int ret;
130
131	/*
132	 * The ADC only latches in new samples if all DATA registers are read
133	 * in descending sequential order.
134	 * The ADC auto-decrements the register index with each clocked byte.
135	 * Read both channels in single SPI transfer by selecting the highest
136	 * register using the command below and clocking out all four data
137	 * bytes.
138	 */
139
140	ret = regmap_bulk_read(priv->regmap, TI_LMP92064_REG_DATA_COUT_MSB,
141			 &raw, sizeof(raw));
142
143	if (ret) {
144		dev_err(&priv->spi->dev, "regmap_bulk_read failed: %pe\n",
145			ERR_PTR(ret));
146		return ret;
147	}
148
149	res[0] = be16_to_cpu(raw[0]);
150	res[1] = be16_to_cpu(raw[1]);
151
152	return 0;
153}
154
155static int lmp92064_read_raw(struct iio_dev *indio_dev,
156			     struct iio_chan_spec const *chan, int *val,
157			     int *val2, long mask)
158{
159	struct lmp92064_adc_priv *priv = iio_priv(indio_dev);
160	u16 raw[2];
161	int ret;
162
163	switch (mask) {
164	case IIO_CHAN_INFO_RAW:
165		ret = lmp92064_read_meas(priv, raw);
166		if (ret < 0)
167			return ret;
168
169		*val = (chan->address == TI_LMP92064_CHAN_INC) ? raw[0] : raw[1];
170
171		return IIO_VAL_INT;
172	case IIO_CHAN_INFO_SCALE:
173		if (chan->address == TI_LMP92064_CHAN_INC) {
174			/*
175			 * processed (mA) = raw * current_lsb (mA)
176			 * current_lsb (mA) = shunt_voltage_lsb (nV) / shunt_resistor (uOhm)
177			 * shunt_voltage_lsb (nV) = 81920000 / 4096 = 20000
178			 */
179			*val = 20000;
180			*val2 = priv->shunt_resistor_uohm;
181		} else {
182			/*
183			 * processed (mV) = raw * voltage_lsb (mV)
184			 * voltage_lsb (mV) = 2048 / 4096
185			 */
186			*val = 2048;
187			*val2 = 4096;
188		}
189		return IIO_VAL_FRACTIONAL;
190	default:
191		return -EINVAL;
192	}
193}
194
195static irqreturn_t lmp92064_trigger_handler(int irq, void *p)
196{
197	struct iio_poll_func *pf = p;
198	struct iio_dev *indio_dev = pf->indio_dev;
199	struct lmp92064_adc_priv *priv = iio_priv(indio_dev);
200	struct {
201		u16 values[2];
202		aligned_s64 timestamp;
203	} data = { };
204	int ret;
205
206	ret = lmp92064_read_meas(priv, data.values);
207	if (ret)
208		goto err;
209
210	iio_push_to_buffers_with_ts(indio_dev, &data, sizeof(data),
211				    iio_get_time_ns(indio_dev));
212
213err:
214	iio_trigger_notify_done(indio_dev->trig);
215
216	return IRQ_HANDLED;
217}
218
219static int lmp92064_reset(struct lmp92064_adc_priv *priv,
220			  struct gpio_desc *gpio_reset)
221{
222	unsigned int status;
223	int ret, i;
224
225	if (gpio_reset) {
226		/*
227		 * Perform a hard reset if gpio_reset is available.
228		 * The datasheet specifies a very low 3.5ns reset pulse duration and does not
229		 * specify how long to wait after a reset to access the device.
230		 * Use more conservative pulse lengths to allow analog RC filtering of the
231		 * reset line at the board level (as recommended in the datasheet).
232		 */
233		gpiod_set_value_cansleep(gpio_reset, 1);
234		usleep_range(1, 10);
235		gpiod_set_value_cansleep(gpio_reset, 0);
236		usleep_range(500, 750);
237	} else {
238		/*
239		 * Perform a soft-reset if not.
240		 * Also write default values to the config registers that are not
241		 * affected by soft reset.
242		 */
243		ret = regmap_write(priv->regmap, TI_LMP92064_REG_CONFIG_A,
244				   TI_LMP92064_VAL_CONFIG_A);
245		if (ret < 0)
246			return ret;
247
248		ret = regmap_write(priv->regmap, TI_LMP92064_REG_CONFIG_B,
249				   TI_LMP92064_VAL_CONFIG_B);
250		if (ret < 0)
251			return ret;
252	}
253
254	/*
255	 * Wait for the device to signal readiness to prevent reading bogus data
256	 * and make sure device is actually connected.
257	 * The datasheet does not specify how long this takes but usually it is
258	 * not more than 3-4 iterations of this loop.
259	 */
260	for (i = 0; i < 10; i++) {
261		ret = regmap_read(priv->regmap, TI_LMP92064_REG_STATUS, &status);
262		if (ret < 0)
263			return ret;
264
265		if (status == TI_LMP92064_VAL_STATUS_OK)
266			return 0;
267
268		usleep_range(1000, 2000);
269	}
270
271	/*
272	 * No (correct) response received.
273	 * Device is mostly likely not connected to the bus.
274	 */
275	return -ENXIO;
276}
277
278static const struct iio_info lmp92064_adc_info = {
279	.read_raw = lmp92064_read_raw,
280};
281
282static int lmp92064_adc_probe(struct spi_device *spi)
283{
284	struct device *dev = &spi->dev;
285	struct lmp92064_adc_priv *priv;
286	struct gpio_desc *gpio_reset;
287	struct iio_dev *indio_dev;
288	u32 shunt_resistor_uohm;
289	struct regmap *regmap;
290	int ret;
291
292	ret = spi_setup(spi);
293	if (ret < 0)
294		return dev_err_probe(dev, ret, "Error in SPI setup\n");
295
296	regmap = devm_regmap_init_spi(spi, &lmp92064_spi_regmap_config);
297	if (IS_ERR(regmap))
298		return dev_err_probe(dev, PTR_ERR(regmap),
299				     "Failed to set up SPI regmap\n");
300
301	indio_dev = devm_iio_device_alloc(dev, sizeof(*priv));
302	if (!indio_dev)
303		return -ENOMEM;
304
305	priv = iio_priv(indio_dev);
306
307	priv->spi = spi;
308	priv->regmap = regmap;
309
310	ret = device_property_read_u32(dev, "shunt-resistor-micro-ohms",
311				       &shunt_resistor_uohm);
312	if (ret < 0)
313		return dev_err_probe(dev, ret,
314				     "Failed to get shunt-resistor value\n");
315
316	/*
317	 * The shunt resistance is passed to userspace as the denominator of an iio
318	 * fraction. Make sure it is in range for that.
319	 */
320	if (shunt_resistor_uohm == 0 || shunt_resistor_uohm > INT_MAX) {
321		dev_err(dev, "Shunt resistance is out of range\n");
322		return -EINVAL;
323	}
324
325	priv->shunt_resistor_uohm = shunt_resistor_uohm;
326
327	ret = devm_regulator_get_enable(dev, "vdd");
328	if (ret)
329		return ret;
330
331	ret = devm_regulator_get_enable(dev, "vdig");
332	if (ret)
333		return ret;
334
335	gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
336	if (IS_ERR(gpio_reset))
337		return dev_err_probe(dev, PTR_ERR(gpio_reset),
338				     "Failed to get GPIO reset pin\n");
339
340	ret = lmp92064_reset(priv, gpio_reset);
341	if (ret < 0)
342		return dev_err_probe(dev, ret, "Failed to reset device\n");
343
344	indio_dev->name = "lmp92064";
345	indio_dev->modes = INDIO_DIRECT_MODE;
346	indio_dev->channels = lmp92064_adc_channels;
347	indio_dev->num_channels = ARRAY_SIZE(lmp92064_adc_channels);
348	indio_dev->info = &lmp92064_adc_info;
349	indio_dev->available_scan_masks = lmp92064_scan_masks;
350
351	ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
352					      lmp92064_trigger_handler, NULL);
353	if (ret)
354		return dev_err_probe(dev, ret, "Failed to setup buffered read\n");
355
356	return devm_iio_device_register(dev, indio_dev);
357}
358
359static const struct spi_device_id lmp92064_id_table[] = {
360	{ "lmp92064" },
361	{ }
362};
363MODULE_DEVICE_TABLE(spi, lmp92064_id_table);
364
365static const struct of_device_id lmp92064_of_table[] = {
366	{ .compatible = "ti,lmp92064" },
367	{ }
368};
369MODULE_DEVICE_TABLE(of, lmp92064_of_table);
370
371static struct spi_driver lmp92064_adc_driver = {
372	.driver = {
373		.name = "lmp92064",
374		.of_match_table = lmp92064_of_table,
375	},
376	.probe = lmp92064_adc_probe,
377	.id_table = lmp92064_id_table,
378};
379module_spi_driver(lmp92064_adc_driver);
380
381MODULE_AUTHOR("Leonard Göhrs <kernel@pengutronix.de>");
382MODULE_DESCRIPTION("TI LMP92064 ADC");
383MODULE_LICENSE("GPL");