ti-adc12138.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * ADC12130/ADC12132/ADC12138 12-bit plus sign ADC driver
  4 *
  5 * Copyright (c) 2016 Akinobu Mita <akinobu.mita@gmail.com>
  6 *
  7 * Datasheet: http://www.ti.com/lit/ds/symlink/adc12138.pdf
  8 */
  9
 10#include <linux/module.h>
 11#include <linux/interrupt.h>
 12#include <linux/completion.h>
 13#include <linux/clk.h>
 14#include <linux/property.h>
 15#include <linux/spi/spi.h>
 16#include <linux/iio/iio.h>
 17#include <linux/iio/buffer.h>
 18#include <linux/iio/trigger.h>
 19#include <linux/iio/triggered_buffer.h>
 20#include <linux/iio/trigger_consumer.h>
 21#include <linux/regulator/consumer.h>
 22
 23#define ADC12138_MODE_AUTO_CAL			0x08
 24#define ADC12138_MODE_READ_STATUS		0x0c
 25#define ADC12138_MODE_ACQUISITION_TIME_6	0x0e
 26#define ADC12138_MODE_ACQUISITION_TIME_10	0x4e
 27#define ADC12138_MODE_ACQUISITION_TIME_18	0x8e
 28#define ADC12138_MODE_ACQUISITION_TIME_34	0xce
 29
 30#define ADC12138_STATUS_CAL			BIT(6)
 31
 32enum {
 33	adc12130,
 34	adc12132,
 35	adc12138,
 36};
 37
 38struct adc12138 {
 39	struct spi_device *spi;
 40	unsigned int id;
 41	/* positive analog voltage reference */
 42	struct regulator *vref_p;
 43	/* negative analog voltage reference */
 44	struct regulator *vref_n;
 45	struct mutex lock;
 46	struct completion complete;
 47	/* The number of conversion clock periods for the S/H's acquisition time */
 48	unsigned int acquisition_time;
 49	/*
 50	 * Maximum size needed: 16x 2 bytes ADC data + 8 bytes timestamp.
 51	 * Less may be need if not all channels are enabled, as long as
 52	 * the 8 byte alignment of the timestamp is maintained.
 53	 */
 54	__be16 data[20] __aligned(8);
 55
 56	u8 tx_buf[2] __aligned(IIO_DMA_MINALIGN);
 57	u8 rx_buf[2];
 58};
 59
 60#define ADC12138_VOLTAGE_CHANNEL(chan)					\
 61	{								\
 62		.type = IIO_VOLTAGE,					\
 63		.indexed = 1,						\
 64		.channel = chan,					\
 65		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
 66		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE)	\
 67					| BIT(IIO_CHAN_INFO_OFFSET),	\
 68		.scan_index = chan,					\
 69		.scan_type = {						\
 70			.sign = 's',					\
 71			.realbits = 13,					\
 72			.storagebits = 16,				\
 73			.shift = 3,					\
 74			.endianness = IIO_BE,				\
 75		},							\
 76	}
 77
 78#define ADC12138_VOLTAGE_CHANNEL_DIFF(chan1, chan2, si)			\
 79	{								\
 80		.type = IIO_VOLTAGE,					\
 81		.indexed = 1,						\
 82		.channel = (chan1),					\
 83		.channel2 = (chan2),					\
 84		.differential = 1,					\
 85		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
 86		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE)	\
 87					| BIT(IIO_CHAN_INFO_OFFSET),	\
 88		.scan_index = si,					\
 89		.scan_type = {						\
 90			.sign = 's',					\
 91			.realbits = 13,					\
 92			.storagebits = 16,				\
 93			.shift = 3,					\
 94			.endianness = IIO_BE,				\
 95		},							\
 96	}
 97
 98static const struct iio_chan_spec adc12132_channels[] = {
 99	ADC12138_VOLTAGE_CHANNEL(0),
100	ADC12138_VOLTAGE_CHANNEL(1),
101	ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 2),
102	ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 3),
103	IIO_CHAN_SOFT_TIMESTAMP(4),
104};
105
106static const struct iio_chan_spec adc12138_channels[] = {
107	ADC12138_VOLTAGE_CHANNEL(0),
108	ADC12138_VOLTAGE_CHANNEL(1),
109	ADC12138_VOLTAGE_CHANNEL(2),
110	ADC12138_VOLTAGE_CHANNEL(3),
111	ADC12138_VOLTAGE_CHANNEL(4),
112	ADC12138_VOLTAGE_CHANNEL(5),
113	ADC12138_VOLTAGE_CHANNEL(6),
114	ADC12138_VOLTAGE_CHANNEL(7),
115	ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 8),
116	ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 9),
117	ADC12138_VOLTAGE_CHANNEL_DIFF(2, 3, 10),
118	ADC12138_VOLTAGE_CHANNEL_DIFF(3, 2, 11),
119	ADC12138_VOLTAGE_CHANNEL_DIFF(4, 5, 12),
120	ADC12138_VOLTAGE_CHANNEL_DIFF(5, 4, 13),
121	ADC12138_VOLTAGE_CHANNEL_DIFF(6, 7, 14),
122	ADC12138_VOLTAGE_CHANNEL_DIFF(7, 6, 15),
123	IIO_CHAN_SOFT_TIMESTAMP(16),
124};
125
126static int adc12138_mode_programming(struct adc12138 *adc, u8 mode,
127				     void *rx_buf, int len)
128{
129	struct spi_transfer xfer = {
130		.tx_buf = adc->tx_buf,
131		.rx_buf = adc->rx_buf,
132		.len = len,
133	};
134	int ret;
135
136	/* Skip unused bits for ADC12130 and ADC12132 */
137	if (adc->id != adc12138)
138		mode = (mode & 0xc0) | ((mode & 0x0f) << 2);
139
140	adc->tx_buf[0] = mode;
141
142	ret = spi_sync_transfer(adc->spi, &xfer, 1);
143	if (ret)
144		return ret;
145
146	memcpy(rx_buf, adc->rx_buf, len);
147
148	return 0;
149}
150
151static int adc12138_read_status(struct adc12138 *adc)
152{
153	u8 rx_buf[2];
154	int ret;
155
156	ret = adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
157					rx_buf, 2);
158	if (ret)
159		return ret;
160
161	return (rx_buf[0] << 1) | (rx_buf[1] >> 7);
162}
163
164static int __adc12138_start_conv(struct adc12138 *adc,
165				 struct iio_chan_spec const *channel,
166				 void *data, int len)
167
168{
169	static const u8 ch_to_mux[] = { 0, 4, 1, 5, 2, 6, 3, 7 };
170	u8 mode = (ch_to_mux[channel->channel] << 4) |
171		  (channel->differential ? 0 : 0x80);
172
173	return adc12138_mode_programming(adc, mode, data, len);
174}
175
176static int adc12138_start_conv(struct adc12138 *adc,
177			       struct iio_chan_spec const *channel)
178{
179	u8 trash;
180
181	return __adc12138_start_conv(adc, channel, &trash, 1);
182}
183
184static int adc12138_start_and_read_conv(struct adc12138 *adc,
185					struct iio_chan_spec const *channel,
186					__be16 *data)
187{
188	return __adc12138_start_conv(adc, channel, data, 2);
189}
190
191static int adc12138_read_conv_data(struct adc12138 *adc, __be16 *value)
192{
193	/* Issue a read status instruction and read previous conversion data */
194	return adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
195					 value, sizeof(*value));
196}
197
198static int adc12138_wait_eoc(struct adc12138 *adc, unsigned long timeout)
199{
200	if (!wait_for_completion_timeout(&adc->complete, timeout))
201		return -ETIMEDOUT;
202
203	return 0;
204}
205
206static int adc12138_adc_conversion(struct adc12138 *adc,
207				   struct iio_chan_spec const *channel,
208				   __be16 *value)
209{
210	int ret;
211
212	reinit_completion(&adc->complete);
213
214	ret = adc12138_start_conv(adc, channel);
215	if (ret)
216		return ret;
217
218	ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
219	if (ret)
220		return ret;
221
222	return adc12138_read_conv_data(adc, value);
223}
224
225static int adc12138_read_raw(struct iio_dev *iio,
226			     struct iio_chan_spec const *channel, int *value,
227			     int *shift, long mask)
228{
229	struct adc12138 *adc = iio_priv(iio);
230	int ret;
231	__be16 data;
232
233	switch (mask) {
234	case IIO_CHAN_INFO_RAW:
235		mutex_lock(&adc->lock);
236		ret = adc12138_adc_conversion(adc, channel, &data);
237		mutex_unlock(&adc->lock);
238		if (ret)
239			return ret;
240
241		*value = sign_extend32(be16_to_cpu(data) >> channel->scan_type.shift,
242				       channel->scan_type.realbits - 1);
243
244		return IIO_VAL_INT;
245	case IIO_CHAN_INFO_SCALE:
246		ret = regulator_get_voltage(adc->vref_p);
247		if (ret < 0)
248			return ret;
249		*value = ret;
250
251		if (!IS_ERR(adc->vref_n)) {
252			ret = regulator_get_voltage(adc->vref_n);
253			if (ret < 0)
254				return ret;
255			*value -= ret;
256		}
257
258		/* convert regulator output voltage to mV */
259		*value /= 1000;
260		*shift = channel->scan_type.realbits - 1;
261
262		return IIO_VAL_FRACTIONAL_LOG2;
263	case IIO_CHAN_INFO_OFFSET:
264		if (!IS_ERR(adc->vref_n)) {
265			*value = regulator_get_voltage(adc->vref_n);
266			if (*value < 0)
267				return *value;
268		} else {
269			*value = 0;
270		}
271
272		/* convert regulator output voltage to mV */
273		*value /= 1000;
274
275		return IIO_VAL_INT;
276	}
277
278	return -EINVAL;
279}
280
281static const struct iio_info adc12138_info = {
282	.read_raw = adc12138_read_raw,
283};
284
285static int adc12138_init(struct adc12138 *adc)
286{
287	int ret;
288	int status;
289	u8 mode;
290	u8 trash;
291
292	reinit_completion(&adc->complete);
293
294	ret = adc12138_mode_programming(adc, ADC12138_MODE_AUTO_CAL, &trash, 1);
295	if (ret)
296		return ret;
297
298	/* data output at this time has no significance */
299	status = adc12138_read_status(adc);
300	if (status < 0)
301		return status;
302
303	adc12138_wait_eoc(adc, msecs_to_jiffies(100));
304
305	status = adc12138_read_status(adc);
306	if (status & ADC12138_STATUS_CAL) {
307		dev_warn(&adc->spi->dev,
308			"Auto Cal sequence is still in progress: %#x\n",
309			status);
310		return -EIO;
311	}
312
313	switch (adc->acquisition_time) {
314	case 6:
315		mode = ADC12138_MODE_ACQUISITION_TIME_6;
316		break;
317	case 10:
318		mode = ADC12138_MODE_ACQUISITION_TIME_10;
319		break;
320	case 18:
321		mode = ADC12138_MODE_ACQUISITION_TIME_18;
322		break;
323	case 34:
324		mode = ADC12138_MODE_ACQUISITION_TIME_34;
325		break;
326	default:
327		return -EINVAL;
328	}
329
330	return adc12138_mode_programming(adc, mode, &trash, 1);
331}
332
333static irqreturn_t adc12138_trigger_handler(int irq, void *p)
334{
335	struct iio_poll_func *pf = p;
336	struct iio_dev *indio_dev = pf->indio_dev;
337	struct adc12138 *adc = iio_priv(indio_dev);
338	__be16 trash;
339	int ret;
340	int scan_index;
341	int i = 0;
342
343	mutex_lock(&adc->lock);
344
345	iio_for_each_active_channel(indio_dev, scan_index) {
346		const struct iio_chan_spec *scan_chan =
347				&indio_dev->channels[scan_index];
348
349		reinit_completion(&adc->complete);
350
351		ret = adc12138_start_and_read_conv(adc, scan_chan,
352					i ? &adc->data[i - 1] : &trash);
353		if (ret) {
354			dev_warn(&adc->spi->dev,
355				 "failed to start conversion\n");
356			goto out;
357		}
358
359		ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
360		if (ret) {
361			dev_warn(&adc->spi->dev, "wait eoc timeout\n");
362			goto out;
363		}
364
365		i++;
366	}
367
368	if (i) {
369		ret = adc12138_read_conv_data(adc, &adc->data[i - 1]);
370		if (ret) {
371			dev_warn(&adc->spi->dev,
372				 "failed to get conversion data\n");
373			goto out;
374		}
375	}
376
377	iio_push_to_buffers_with_ts(indio_dev, adc->data, sizeof(adc->data),
378				    iio_get_time_ns(indio_dev));
379out:
380	mutex_unlock(&adc->lock);
381
382	iio_trigger_notify_done(indio_dev->trig);
383
384	return IRQ_HANDLED;
385}
386
387static irqreturn_t adc12138_eoc_handler(int irq, void *p)
388{
389	struct iio_dev *indio_dev = p;
390	struct adc12138 *adc = iio_priv(indio_dev);
391
392	complete(&adc->complete);
393
394	return IRQ_HANDLED;
395}
396
397static int adc12138_probe(struct spi_device *spi)
398{
399	struct iio_dev *indio_dev;
400	struct adc12138 *adc;
401	struct clk *cclk;
402	int ret;
403
404	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
405	if (!indio_dev)
406		return -ENOMEM;
407
408	adc = iio_priv(indio_dev);
409	adc->spi = spi;
410	adc->id = spi_get_device_id(spi)->driver_data;
411	mutex_init(&adc->lock);
412	init_completion(&adc->complete);
413
414	indio_dev->name = spi_get_device_id(spi)->name;
415	indio_dev->info = &adc12138_info;
416	indio_dev->modes = INDIO_DIRECT_MODE;
417
418	switch (adc->id) {
419	case adc12130:
420	case adc12132:
421		indio_dev->channels = adc12132_channels;
422		indio_dev->num_channels = ARRAY_SIZE(adc12132_channels);
423		break;
424	case adc12138:
425		indio_dev->channels = adc12138_channels;
426		indio_dev->num_channels = ARRAY_SIZE(adc12138_channels);
427		break;
428	default:
429		return -EINVAL;
430	}
431
432	ret = device_property_read_u32(&spi->dev, "ti,acquisition-time",
433				       &adc->acquisition_time);
434	if (ret)
435		adc->acquisition_time = 10;
436
437	ret = devm_request_irq(&spi->dev, spi->irq, adc12138_eoc_handler,
438			       IRQF_TRIGGER_RISING, indio_dev->name, indio_dev);
439	if (ret)
440		return ret;
441
442	cclk = devm_clk_get_enabled(&spi->dev, NULL);
443	if (IS_ERR(cclk))
444		return PTR_ERR(cclk);
445
446	adc->vref_p = devm_regulator_get(&spi->dev, "vref-p");
447	if (IS_ERR(adc->vref_p))
448		return PTR_ERR(adc->vref_p);
449
450	adc->vref_n = devm_regulator_get_optional(&spi->dev, "vref-n");
451	if (IS_ERR(adc->vref_n)) {
452		/*
453		 * Assume vref_n is 0V if an optional regulator is not
454		 * specified, otherwise return the error code.
455		 */
456		ret = PTR_ERR(adc->vref_n);
457		if (ret != -ENODEV)
458			return ret;
459	}
460
461	ret = regulator_enable(adc->vref_p);
462	if (ret)
463		return ret;
464
465	if (!IS_ERR(adc->vref_n)) {
466		ret = regulator_enable(adc->vref_n);
467		if (ret)
468			goto err_vref_p_disable;
469	}
470
471	ret = adc12138_init(adc);
472	if (ret)
473		goto err_vref_n_disable;
474
475	spi_set_drvdata(spi, indio_dev);
476
477	ret = iio_triggered_buffer_setup(indio_dev, NULL,
478					 adc12138_trigger_handler, NULL);
479	if (ret)
480		goto err_vref_n_disable;
481
482	ret = iio_device_register(indio_dev);
483	if (ret)
484		goto err_buffer_cleanup;
485
486	return 0;
487err_buffer_cleanup:
488	iio_triggered_buffer_cleanup(indio_dev);
489err_vref_n_disable:
490	if (!IS_ERR(adc->vref_n))
491		regulator_disable(adc->vref_n);
492err_vref_p_disable:
493	regulator_disable(adc->vref_p);
494
495	return ret;
496}
497
498static void adc12138_remove(struct spi_device *spi)
499{
500	struct iio_dev *indio_dev = spi_get_drvdata(spi);
501	struct adc12138 *adc = iio_priv(indio_dev);
502
503	iio_device_unregister(indio_dev);
504	iio_triggered_buffer_cleanup(indio_dev);
505	if (!IS_ERR(adc->vref_n))
506		regulator_disable(adc->vref_n);
507	regulator_disable(adc->vref_p);
508}
509
510static const struct of_device_id adc12138_dt_ids[] = {
511	{ .compatible = "ti,adc12130", },
512	{ .compatible = "ti,adc12132", },
513	{ .compatible = "ti,adc12138", },
514	{ }
515};
516MODULE_DEVICE_TABLE(of, adc12138_dt_ids);
517
518static const struct spi_device_id adc12138_id[] = {
519	{ "adc12130", adc12130 },
520	{ "adc12132", adc12132 },
521	{ "adc12138", adc12138 },
522	{ }
523};
524MODULE_DEVICE_TABLE(spi, adc12138_id);
525
526static struct spi_driver adc12138_driver = {
527	.driver = {
528		.name = "adc12138",
529		.of_match_table = adc12138_dt_ids,
530	},
531	.probe = adc12138_probe,
532	.remove = adc12138_remove,
533	.id_table = adc12138_id,
534};
535module_spi_driver(adc12138_driver);
536
537MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>");
538MODULE_DESCRIPTION("ADC12130/ADC12132/ADC12138 driver");
539MODULE_LICENSE("GPL v2");