pac1934.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * IIO driver for PAC1934 Multi-Channel DC Power/Energy Monitor
   4 *
   5 * Copyright (C) 2017-2024 Microchip Technology Inc. and its subsidiaries
   6 *
   7 * Author: Bogdan Bolocan <bogdan.bolocan@microchip.com>
   8 * Author: Victor Tudose
   9 * Author: Marius Cristea <marius.cristea@microchip.com>
  10 *
  11 * Datasheet for PAC1931, PAC1932, PAC1933 and PAC1934 can be found here:
  12 * https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/DataSheets/PAC1931-Family-Data-Sheet-DS20005850E.pdf
  13 */
  14
  15#include <linux/acpi.h>
  16#include <linux/bitfield.h>
  17#include <linux/delay.h>
  18#include <linux/device.h>
  19#include <linux/i2c.h>
  20#include <linux/iio/iio.h>
  21#include <linux/iio/sysfs.h>
  22#include <linux/unaligned.h>
  23
  24/*
  25 * maximum accumulation time should be (17 * 60 * 1000) around 17 minutes@1024 sps
  26 * till PAC1934 accumulation registers starts to saturate
  27 */
  28#define PAC1934_MAX_RFSH_LIMIT_MS		60000
  29/* 50msec is the timeout for validity of the cached registers */
  30#define PAC1934_MIN_POLLING_TIME_MS		50
  31/*
  32 * 1000usec is the minimum wait time for normal conversions when sample
  33 * rate doesn't change
  34 */
  35#define PAC1934_MIN_UPDATE_WAIT_TIME_US		1000
  36
  37/* 32000mV */
  38#define PAC1934_VOLTAGE_MILLIVOLTS_MAX		32000
  39/* voltage bits resolution when set for unsigned values */
  40#define PAC1934_VOLTAGE_U_RES			16
  41/* voltage bits resolution when set for signed values */
  42#define PAC1934_VOLTAGE_S_RES			15
  43
  44/*
  45 * max signed value that can be stored on 32 bits and 8 digits fractional value
  46 * (2^31 - 1) * 10^8 + 99999999
  47 */
  48#define PAC_193X_MAX_POWER_ACC			214748364799999999LL
  49/*
  50 * min signed value that can be stored on 32 bits and 8 digits fractional value
  51 * -(2^31) * 10^8 - 99999999
  52 */
  53#define PAC_193X_MIN_POWER_ACC			-214748364899999999LL
  54
  55#define PAC1934_MAX_NUM_CHANNELS		4
  56
  57#define PAC1934_MEAS_REG_LEN			76
  58#define PAC1934_CTRL_REG_LEN			12
  59
  60#define PAC1934_DEFAULT_CHIP_SAMP_SPEED_HZ	1024
  61
  62/* I2C address map */
  63#define PAC1934_REFRESH_REG_ADDR		0x00
  64#define PAC1934_CTRL_REG_ADDR			0x01
  65#define PAC1934_ACC_COUNT_REG_ADDR		0x02
  66#define PAC1934_VPOWER_ACC_1_ADDR		0x03
  67#define PAC1934_VPOWER_ACC_2_ADDR		0x04
  68#define PAC1934_VPOWER_ACC_3_ADDR		0x05
  69#define PAC1934_VPOWER_ACC_4_ADDR		0x06
  70#define PAC1934_VBUS_1_ADDR			0x07
  71#define PAC1934_VBUS_2_ADDR			0x08
  72#define PAC1934_VBUS_3_ADDR			0x09
  73#define PAC1934_VBUS_4_ADDR			0x0A
  74#define PAC1934_VSENSE_1_ADDR			0x0B
  75#define PAC1934_VSENSE_2_ADDR			0x0C
  76#define PAC1934_VSENSE_3_ADDR			0x0D
  77#define PAC1934_VSENSE_4_ADDR			0x0E
  78#define PAC1934_VBUS_AVG_1_ADDR			0x0F
  79#define PAC1934_VBUS_AVG_2_ADDR			0x10
  80#define PAC1934_VBUS_AVG_3_ADDR			0x11
  81#define PAC1934_VBUS_AVG_4_ADDR			0x12
  82#define PAC1934_VSENSE_AVG_1_ADDR		0x13
  83#define PAC1934_VSENSE_AVG_2_ADDR		0x14
  84#define PAC1934_VSENSE_AVG_3_ADDR		0x15
  85#define PAC1934_VSENSE_AVG_4_ADDR		0x16
  86#define PAC1934_VPOWER_1_ADDR			0x17
  87#define PAC1934_VPOWER_2_ADDR			0x18
  88#define PAC1934_VPOWER_3_ADDR			0x19
  89#define PAC1934_VPOWER_4_ADDR			0x1A
  90#define PAC1934_REFRESH_V_REG_ADDR		0x1F
  91#define PAC1934_SLOW_REG_ADDR			0x20
  92#define PAC1934_CTRL_STAT_REGS_ADDR		0x1C
  93#define PAC1934_PID_REG_ADDR			0xFD
  94#define PAC1934_MID_REG_ADDR			0xFE
  95#define PAC1934_RID_REG_ADDR			0xFF
  96
  97/* PRODUCT ID REGISTER + MANUFACTURER ID REGISTER + REVISION ID REGISTER */
  98#define PAC1934_ID_REG_LEN			3
  99#define PAC1934_PID_IDX				0
 100#define PAC1934_MID_IDX				1
 101#define PAC1934_RID_IDX				2
 102
 103#define PAC1934_ACPI_GET_NAMES_AND_MOHMS_VALS	1
 104#define PAC1934_ACPI_GET_UOHMS_VALS		2
 105#define PAC1934_ACPI_GET_BIPOLAR_SETTINGS	4
 106#define PAC1934_ACPI_GET_SAMP			5
 107
 108#define PAC1934_SAMPLE_RATE_SHIFT		6
 109
 110#define PAC1934_VBUS_SENSE_REG_LEN		2
 111#define PAC1934_ACC_REG_LEN			3
 112#define PAC1934_VPOWER_REG_LEN			4
 113#define PAC1934_VPOWER_ACC_REG_LEN		6
 114#define PAC1934_MAX_REGISTER_LENGTH		6
 115
 116#define PAC1934_CUSTOM_ATTR_FOR_CHANNEL		1
 117
 118/*
 119 * relative offsets when using multi-byte reads/writes even though these
 120 * bytes are read one after the other, they are not at adjacent memory
 121 * locations within the I2C memory map. The chip can skip some addresses
 122 */
 123#define PAC1934_CHANNEL_DIS_REG_OFF		0
 124#define PAC1934_NEG_PWR_REG_OFF			1
 125
 126/*
 127 * when reading/writing multiple bytes from offset PAC1934_CHANNEL_DIS_REG_OFF,
 128 * the chip jumps over the 0x1E (REFRESH_G) and 0x1F (REFRESH_V) offsets
 129 */
 130#define PAC1934_SLOW_REG_OFF			2
 131#define PAC1934_CTRL_ACT_REG_OFF		3
 132#define PAC1934_CHANNEL_DIS_ACT_REG_OFF		4
 133#define PAC1934_NEG_PWR_ACT_REG_OFF		5
 134#define PAC1934_CTRL_LAT_REG_OFF		6
 135#define PAC1934_CHANNEL_DIS_LAT_REG_OFF		7
 136#define PAC1934_NEG_PWR_LAT_REG_OFF		8
 137#define PAC1934_PID_REG_OFF			9
 138#define PAC1934_MID_REG_OFF			10
 139#define PAC1934_REV_REG_OFF			11
 140#define PAC1934_CTRL_STATUS_INFO_LEN		12
 141
 142#define PAC1934_MID				0x5D
 143#define PAC1931_PID				0x58
 144#define PAC1932_PID				0x59
 145#define PAC1933_PID				0x5A
 146#define PAC1934_PID				0x5B
 147
 148/* Scale constant = (10^3 * 3.2 * 10^9 / 2^28) for mili Watt-second */
 149#define PAC1934_SCALE_CONSTANT			11921
 150
 151#define PAC1934_MAX_VPOWER_RSHIFTED_BY_28B	11921
 152#define PAC1934_MAX_VSENSE_RSHIFTED_BY_16B	1525
 153
 154#define PAC1934_DEV_ATTR(name) (&iio_dev_attr_##name.dev_attr.attr)
 155
 156#define PAC1934_CRTL_SAMPLE_RATE_MASK	GENMASK(7, 6)
 157#define PAC1934_CHAN_SLEEP_MASK		BIT(5)
 158#define PAC1934_CHAN_SLEEP_SET		BIT(5)
 159#define PAC1934_CHAN_SINGLE_MASK	BIT(4)
 160#define PAC1934_CHAN_SINGLE_SHOT_SET	BIT(4)
 161#define PAC1934_CHAN_ALERT_MASK		BIT(3)
 162#define PAC1934_CHAN_ALERT_EN		BIT(3)
 163#define PAC1934_CHAN_ALERT_CC_MASK	BIT(2)
 164#define PAC1934_CHAN_ALERT_CC_EN	BIT(2)
 165#define PAC1934_CHAN_OVF_ALERT_MASK	BIT(1)
 166#define PAC1934_CHAN_OVF_ALERT_EN	BIT(1)
 167#define PAC1934_CHAN_OVF_MASK		BIT(0)
 168
 169#define PAC1934_CHAN_DIS_CH1_OFF_MASK	BIT(7)
 170#define PAC1934_CHAN_DIS_CH2_OFF_MASK	BIT(6)
 171#define PAC1934_CHAN_DIS_CH3_OFF_MASK	BIT(5)
 172#define PAC1934_CHAN_DIS_CH4_OFF_MASK	BIT(4)
 173#define PAC1934_SMBUS_TIMEOUT_MASK	BIT(3)
 174#define PAC1934_SMBUS_BYTECOUNT_MASK	BIT(2)
 175#define PAC1934_SMBUS_NO_SKIP_MASK	BIT(1)
 176
 177#define PAC1934_NEG_PWR_CH1_BIDI_MASK	BIT(7)
 178#define PAC1934_NEG_PWR_CH2_BIDI_MASK	BIT(6)
 179#define PAC1934_NEG_PWR_CH3_BIDI_MASK	BIT(5)
 180#define PAC1934_NEG_PWR_CH4_BIDI_MASK	BIT(4)
 181#define PAC1934_NEG_PWR_CH1_BIDV_MASK	BIT(3)
 182#define PAC1934_NEG_PWR_CH2_BIDV_MASK	BIT(2)
 183#define PAC1934_NEG_PWR_CH3_BIDV_MASK	BIT(1)
 184#define PAC1934_NEG_PWR_CH4_BIDV_MASK	BIT(0)
 185
 186/*
 187 * Universal Unique Identifier (UUID),
 188 * 033771E0-1705-47B4-9535-D1BBE14D9A09,
 189 * is reserved to Microchip for the PAC1934.
 190 */
 191#define PAC1934_DSM_UUID		"033771E0-1705-47B4-9535-D1BBE14D9A09"
 192
 193enum pac1934_ids {
 194	PAC1931,
 195	PAC1932,
 196	PAC1933,
 197	PAC1934
 198};
 199
 200enum pac1934_samps {
 201	PAC1934_SAMP_1024SPS,
 202	PAC1934_SAMP_256SPS,
 203	PAC1934_SAMP_64SPS,
 204	PAC1934_SAMP_8SPS
 205};
 206
 207/*
 208 * these indexes are exactly describing the element order within a single
 209 * PAC1934 phys channel IIO channel descriptor; see the static const struct
 210 * iio_chan_spec pac1934_single_channel[] declaration
 211 */
 212enum pac1934_ch_idx {
 213	PAC1934_CH_ENERGY,
 214	PAC1934_CH_POWER,
 215	PAC1934_CH_VOLTAGE,
 216	PAC1934_CH_CURRENT,
 217	PAC1934_CH_VOLTAGE_AVERAGE,
 218	PAC1934_CH_CURRENT_AVERAGE
 219};
 220
 221/**
 222 * struct pac1934_features - features of a pac1934 instance
 223 * @phys_channels:	number of physical channels supported by the chip
 224 * @name:		chip's name
 225 */
 226struct pac1934_features {
 227	u8		phys_channels;
 228	const char	*name;
 229};
 230
 231static const unsigned int samp_rate_map_tbl[] = {
 232	[PAC1934_SAMP_1024SPS] = 1024,
 233	[PAC1934_SAMP_256SPS] = 256,
 234	[PAC1934_SAMP_64SPS] = 64,
 235	[PAC1934_SAMP_8SPS] = 8,
 236};
 237
 238static const struct pac1934_features pac1934_chip_config[] = {
 239	[PAC1931] = {
 240	    .phys_channels = 1,
 241	    .name = "pac1931",
 242	},
 243	[PAC1932] = {
 244	    .phys_channels = 2,
 245	    .name = "pac1932",
 246	},
 247	[PAC1933] = {
 248	    .phys_channels = 3,
 249	    .name = "pac1933",
 250	},
 251	[PAC1934] = {
 252	    .phys_channels = 4,
 253	    .name = "pac1934",
 254	},
 255};
 256
 257/**
 258 * struct reg_data - data from the registers
 259 * @meas_regs:			snapshot of raw measurements registers
 260 * @ctrl_regs:			snapshot of control registers
 261 * @energy_sec_acc:		snapshot of energy values
 262 * @vpower_acc:			accumulated vpower values
 263 * @vpower:			snapshot of vpower registers
 264 * @vbus:			snapshot of vbus registers
 265 * @vbus_avg:			averages of vbus registers
 266 * @vsense:			snapshot of vsense registers
 267 * @vsense_avg:			averages of vsense registers
 268 * @num_enabled_channels:	count of how many chip channels are currently enabled
 269 */
 270struct reg_data {
 271	u8	meas_regs[PAC1934_MEAS_REG_LEN];
 272	u8	ctrl_regs[PAC1934_CTRL_REG_LEN];
 273	s64	energy_sec_acc[PAC1934_MAX_NUM_CHANNELS];
 274	s64	vpower_acc[PAC1934_MAX_NUM_CHANNELS];
 275	s32	vpower[PAC1934_MAX_NUM_CHANNELS];
 276	s32	vbus[PAC1934_MAX_NUM_CHANNELS];
 277	s32	vbus_avg[PAC1934_MAX_NUM_CHANNELS];
 278	s32	vsense[PAC1934_MAX_NUM_CHANNELS];
 279	s32	vsense_avg[PAC1934_MAX_NUM_CHANNELS];
 280	u8	num_enabled_channels;
 281};
 282
 283/**
 284 * struct pac1934_chip_info - information about the chip
 285 * @client:			the i2c-client attached to the device
 286 * @lock:			synchronize access to driver's state members
 287 * @work_chip_rfsh:		work queue used for refresh commands
 288 * @phys_channels:		phys channels count
 289 * @active_channels:		array of values, true means that channel is active
 290 * @enable_energy:		array of values, true means that channel energy is measured
 291 * @bi_dir:			array of bools, true means that channel is bidirectional
 292 * @chip_variant:		chip variant
 293 * @chip_revision:		chip revision
 294 * @shunts:			shunts
 295 * @chip_reg_data:		chip reg data
 296 * @sample_rate_value:		sampling frequency
 297 * @labels:			table with channels labels
 298 * @iio_info:			iio_info
 299 * @tstamp:			chip's uptime
 300 */
 301struct pac1934_chip_info {
 302	struct i2c_client	*client;
 303	struct mutex		lock; /* synchronize access to driver's state members */
 304	struct delayed_work	work_chip_rfsh;
 305	u8			phys_channels;
 306	bool			active_channels[PAC1934_MAX_NUM_CHANNELS];
 307	bool			enable_energy[PAC1934_MAX_NUM_CHANNELS];
 308	bool			bi_dir[PAC1934_MAX_NUM_CHANNELS];
 309	u8			chip_variant;
 310	u8			chip_revision;
 311	u32			shunts[PAC1934_MAX_NUM_CHANNELS];
 312	struct reg_data		chip_reg_data;
 313	s32			sample_rate_value;
 314	char			*labels[PAC1934_MAX_NUM_CHANNELS];
 315	struct iio_info		iio_info;
 316	unsigned long		tstamp;
 317};
 318
 319#define TO_PAC1934_CHIP_INFO(d) container_of(d, struct pac1934_chip_info, work_chip_rfsh)
 320
 321#define PAC1934_VPOWER_ACC_CHANNEL(_index, _si, _address) {			\
 322	.type = IIO_ENERGY,							\
 323	.address = (_address),							\
 324	.indexed = 1,								\
 325	.channel = (_index),							\
 326	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW)	|			\
 327			      BIT(IIO_CHAN_INFO_SCALE)	|			\
 328			      BIT(IIO_CHAN_INFO_ENABLE),			\
 329	.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),		\
 330	.info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ),	\
 331	.scan_index = (_si),							\
 332	.scan_type = {								\
 333		.sign = 'u',							\
 334		.realbits = 48,							\
 335		.storagebits = 64,						\
 336		.endianness = IIO_CPU,						\
 337	}									\
 338}
 339
 340#define PAC1934_VBUS_CHANNEL(_index, _si, _address) {				\
 341	.type = IIO_VOLTAGE,							\
 342	.address = (_address),							\
 343	.indexed = 1,								\
 344	.channel = (_index),							\
 345	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW)	|			\
 346			      BIT(IIO_CHAN_INFO_SCALE),				\
 347	.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),		\
 348	.info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ),	\
 349	.scan_index = (_si),							\
 350	.scan_type = {								\
 351		.sign = 'u',							\
 352		.realbits = 16,							\
 353		.storagebits = 16,						\
 354		.endianness = IIO_CPU,						\
 355	}									\
 356}
 357
 358#define PAC1934_VBUS_AVG_CHANNEL(_index, _si, _address) {			\
 359	.type = IIO_VOLTAGE,							\
 360	.address = (_address),							\
 361	.indexed = 1,								\
 362	.channel = (_index),							\
 363	.info_mask_separate = BIT(IIO_CHAN_INFO_AVERAGE_RAW)	|		\
 364			      BIT(IIO_CHAN_INFO_SCALE),				\
 365	.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),		\
 366	.info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ),	\
 367	.scan_index = (_si),							\
 368	.scan_type = {								\
 369		.sign = 'u',							\
 370		.realbits = 16,							\
 371		.storagebits = 16,						\
 372		.endianness = IIO_CPU,						\
 373	}									\
 374}
 375
 376#define PAC1934_VSENSE_CHANNEL(_index, _si, _address) {				\
 377	.type = IIO_CURRENT,							\
 378	.address = (_address),							\
 379	.indexed = 1,								\
 380	.channel = (_index),							\
 381	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW)	|			\
 382			      BIT(IIO_CHAN_INFO_SCALE),				\
 383	.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),		\
 384	.info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ),	\
 385	.scan_index = (_si),							\
 386	.scan_type = {								\
 387		.sign = 'u',							\
 388		.realbits = 16,							\
 389		.storagebits = 16,						\
 390		.endianness = IIO_CPU,						\
 391	}									\
 392}
 393
 394#define PAC1934_VSENSE_AVG_CHANNEL(_index, _si, _address) {			\
 395	.type = IIO_CURRENT,							\
 396	.address = (_address),							\
 397	.indexed = 1,								\
 398	.channel = (_index),							\
 399	.info_mask_separate = BIT(IIO_CHAN_INFO_AVERAGE_RAW)	|		\
 400			      BIT(IIO_CHAN_INFO_SCALE),				\
 401	.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),		\
 402	.info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ),	\
 403	.scan_index = (_si),							\
 404	.scan_type = {								\
 405		.sign = 'u',							\
 406		.realbits = 16,							\
 407		.storagebits = 16,						\
 408		.endianness = IIO_CPU,						\
 409	}									\
 410}
 411
 412#define PAC1934_VPOWER_CHANNEL(_index, _si, _address) {				\
 413	.type = IIO_POWER,							\
 414	.address = (_address),							\
 415	.indexed = 1,								\
 416	.channel = (_index),							\
 417	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW)	|			\
 418			      BIT(IIO_CHAN_INFO_SCALE),				\
 419	.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),		\
 420	.info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ),	\
 421	.scan_index = (_si),							\
 422	.scan_type = {								\
 423		.sign = 'u',							\
 424		.realbits = 28,							\
 425		.storagebits = 32,						\
 426		.shift = 4,							\
 427		.endianness = IIO_CPU,						\
 428	}									\
 429}
 430
 431static const struct iio_chan_spec pac1934_single_channel[] = {
 432	PAC1934_VPOWER_ACC_CHANNEL(0, 0, PAC1934_VPOWER_ACC_1_ADDR),
 433	PAC1934_VPOWER_CHANNEL(0, 0, PAC1934_VPOWER_1_ADDR),
 434	PAC1934_VBUS_CHANNEL(0, 0, PAC1934_VBUS_1_ADDR),
 435	PAC1934_VSENSE_CHANNEL(0, 0, PAC1934_VSENSE_1_ADDR),
 436	PAC1934_VBUS_AVG_CHANNEL(0, 0, PAC1934_VBUS_AVG_1_ADDR),
 437	PAC1934_VSENSE_AVG_CHANNEL(0, 0, PAC1934_VSENSE_AVG_1_ADDR),
 438};
 439
 440/* Low-level I2c functions used to transfer up to 76 bytes at once */
 441static int pac1934_i2c_read(struct i2c_client *client, u8 reg_addr,
 442			    void *databuf, u8 len)
 443{
 444	int ret;
 445	struct i2c_msg msgs[2] = {
 446		{
 447			.addr = client->addr,
 448			.len = 1,
 449			.buf = (u8 *)&reg_addr,
 450		},
 451		{
 452			.addr = client->addr,
 453			.len = len,
 454			.buf = databuf,
 455			.flags = I2C_M_RD
 456		}
 457	};
 458
 459	ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
 460	if (ret < 0)
 461		return ret;
 462
 463	return 0;
 464}
 465
 466static int pac1934_get_samp_rate_idx(struct pac1934_chip_info *info,
 467				     u32 new_samp_rate)
 468{
 469	int cnt;
 470
 471	for (cnt = 0; cnt < ARRAY_SIZE(samp_rate_map_tbl); cnt++)
 472		if (new_samp_rate == samp_rate_map_tbl[cnt])
 473			return cnt;
 474
 475	/* not a valid sample rate value */
 476	return -EINVAL;
 477}
 478
 479static ssize_t pac1934_shunt_value_show(struct device *dev,
 480					struct device_attribute *attr,
 481					char *buf)
 482{
 483	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 484	struct pac1934_chip_info *info = iio_priv(indio_dev);
 485	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 486
 487	return sysfs_emit(buf, "%u\n", info->shunts[this_attr->address]);
 488}
 489
 490static ssize_t pac1934_shunt_value_store(struct device *dev,
 491					 struct device_attribute *attr,
 492					 const char *buf, size_t count)
 493{
 494	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 495	struct pac1934_chip_info *info = iio_priv(indio_dev);
 496	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 497	int sh_val;
 498
 499	if (kstrtouint(buf, 10, &sh_val)) {
 500		dev_err(dev, "Shunt value is not valid\n");
 501		return -EINVAL;
 502	}
 503
 504	scoped_guard(mutex, &info->lock)
 505		info->shunts[this_attr->address] = sh_val;
 506
 507	return count;
 508}
 509
 510static int pac1934_read_avail(struct iio_dev *indio_dev,
 511			      struct iio_chan_spec const *channel,
 512			      const int **vals, int *type, int *length, long mask)
 513{
 514	switch (mask) {
 515	case IIO_CHAN_INFO_SAMP_FREQ:
 516		*type = IIO_VAL_INT;
 517		*vals = samp_rate_map_tbl;
 518		*length = ARRAY_SIZE(samp_rate_map_tbl);
 519		return IIO_AVAIL_LIST;
 520	}
 521
 522	return -EINVAL;
 523}
 524
 525static int pac1934_send_refresh(struct pac1934_chip_info *info,
 526				u8 refresh_cmd, u32 wait_time)
 527{
 528	/* this function only sends REFRESH or REFRESH_V */
 529	struct i2c_client *client = info->client;
 530	int ret;
 531	u8 bidir_reg;
 532	bool revision_bug = false;
 533
 534	if (info->chip_revision == 2 || info->chip_revision == 3) {
 535		/*
 536		 * chip rev 2 and 3 bug workaround
 537		 * see: PAC1934 Family Data Sheet Errata DS80000836A.pdf
 538		 */
 539		revision_bug = true;
 540
 541		bidir_reg =
 542			FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDI_MASK, info->bi_dir[0]) |
 543			FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDI_MASK, info->bi_dir[1]) |
 544			FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDI_MASK, info->bi_dir[2]) |
 545			FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDI_MASK, info->bi_dir[3]) |
 546			FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDV_MASK, info->bi_dir[0]) |
 547			FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDV_MASK, info->bi_dir[1]) |
 548			FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDV_MASK, info->bi_dir[2]) |
 549			FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDV_MASK, info->bi_dir[3]);
 550
 551		ret = i2c_smbus_write_byte_data(client,
 552						PAC1934_CTRL_STAT_REGS_ADDR +
 553						PAC1934_NEG_PWR_REG_OFF,
 554						bidir_reg);
 555		if (ret)
 556			return ret;
 557	}
 558
 559	ret = i2c_smbus_write_byte(client, refresh_cmd);
 560	if (ret) {
 561		dev_err(&client->dev, "%s - cannot send 0x%02X\n",
 562			__func__, refresh_cmd);
 563		return ret;
 564	}
 565
 566	if (revision_bug) {
 567		/*
 568		 * chip rev 2 and 3 bug workaround - write again the same
 569		 * register write the updated registers back
 570		 */
 571		ret = i2c_smbus_write_byte_data(client,
 572						PAC1934_CTRL_STAT_REGS_ADDR +
 573						PAC1934_NEG_PWR_REG_OFF, bidir_reg);
 574		if (ret)
 575			return ret;
 576	}
 577
 578	/* register data retrieval timestamp */
 579	info->tstamp = jiffies;
 580
 581	/* wait till the data is available */
 582	usleep_range(wait_time, wait_time + 100);
 583
 584	return ret;
 585}
 586
 587static int pac1934_reg_snapshot(struct pac1934_chip_info *info,
 588				bool do_refresh, u8 refresh_cmd, u32 wait_time)
 589{
 590	int ret;
 591	struct i2c_client *client = info->client;
 592	u8 samp_shift, ctrl_regs_tmp;
 593	u8 *offset_reg_data_p;
 594	u16 tmp_value;
 595	u32 samp_rate, cnt, tmp;
 596	s64 curr_energy, inc;
 597	u64 tmp_energy;
 598	struct reg_data *reg_data;
 599
 600	guard(mutex)(&info->lock);
 601
 602	if (do_refresh) {
 603		ret = pac1934_send_refresh(info, refresh_cmd, wait_time);
 604		if (ret < 0) {
 605			dev_err(&client->dev,
 606				"%s - cannot send refresh\n",
 607				__func__);
 608			return ret;
 609		}
 610	}
 611
 612	ret = i2c_smbus_read_i2c_block_data(client, PAC1934_CTRL_STAT_REGS_ADDR,
 613					    PAC1934_CTRL_REG_LEN,
 614					    (u8 *)info->chip_reg_data.ctrl_regs);
 615	if (ret < 0) {
 616		dev_err(&client->dev,
 617			"%s - cannot read ctrl/status registers\n",
 618			__func__);
 619		return ret;
 620	}
 621
 622	reg_data = &info->chip_reg_data;
 623
 624	/* read the data registers */
 625	ret = pac1934_i2c_read(client, PAC1934_ACC_COUNT_REG_ADDR,
 626			       (u8 *)reg_data->meas_regs, PAC1934_MEAS_REG_LEN);
 627	if (ret) {
 628		dev_err(&client->dev,
 629			"%s - cannot read ACC_COUNT register: %d:%d\n",
 630			__func__, ret, PAC1934_MEAS_REG_LEN);
 631		return ret;
 632	}
 633
 634	/* see how much shift is required by the sample rate */
 635	samp_rate = samp_rate_map_tbl[((reg_data->ctrl_regs[PAC1934_CTRL_LAT_REG_OFF]) >> 6)];
 636	samp_shift = get_count_order(samp_rate);
 637
 638	ctrl_regs_tmp = reg_data->ctrl_regs[PAC1934_CHANNEL_DIS_LAT_REG_OFF];
 639	offset_reg_data_p = &reg_data->meas_regs[PAC1934_ACC_REG_LEN];
 640
 641	/* start with VPOWER_ACC */
 642	for (cnt = 0; cnt < info->phys_channels; cnt++) {
 643		/* check if the channel is active, skip all fields if disabled */
 644		if ((ctrl_regs_tmp << cnt) & 0x80)
 645			continue;
 646
 647		/* skip if the energy accumulation is disabled */
 648		if (info->enable_energy[cnt]) {
 649			curr_energy = info->chip_reg_data.energy_sec_acc[cnt];
 650
 651			tmp_energy = get_unaligned_be48(offset_reg_data_p);
 652
 653			if (info->bi_dir[cnt])
 654				reg_data->vpower_acc[cnt] = sign_extend64(tmp_energy, 47);
 655			else
 656				reg_data->vpower_acc[cnt] = tmp_energy;
 657
 658			/*
 659			 * compute the scaled to 1 second accumulated energy value;
 660			 * energy accumulator scaled to 1sec = VPOWER_ACC/2^samp_shift
 661			 * the chip's sampling rate is 2^samp_shift samples/sec
 662			 */
 663			inc = (reg_data->vpower_acc[cnt] >> samp_shift);
 664
 665			/* add the power_acc field */
 666			curr_energy += inc;
 667
 668			reg_data->energy_sec_acc[cnt] = clamp(curr_energy,
 669							      PAC_193X_MIN_POWER_ACC,
 670							      PAC_193X_MAX_POWER_ACC);
 671		}
 672
 673		offset_reg_data_p += PAC1934_VPOWER_ACC_REG_LEN;
 674	}
 675
 676	/* continue with VBUS */
 677	for (cnt = 0; cnt < info->phys_channels; cnt++) {
 678		if ((ctrl_regs_tmp << cnt) & 0x80)
 679			continue;
 680
 681		tmp_value = get_unaligned_be16(offset_reg_data_p);
 682
 683		if (info->bi_dir[cnt])
 684			reg_data->vbus[cnt] = sign_extend32((u32)(tmp_value), 15);
 685		else
 686			reg_data->vbus[cnt] = tmp_value;
 687
 688		offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN;
 689	}
 690
 691	/* VSENSE */
 692	for (cnt = 0; cnt < info->phys_channels; cnt++) {
 693		if ((ctrl_regs_tmp << cnt) & 0x80)
 694			continue;
 695
 696		tmp_value = get_unaligned_be16(offset_reg_data_p);
 697
 698		if (info->bi_dir[cnt])
 699			reg_data->vsense[cnt] = sign_extend32((u32)(tmp_value), 15);
 700		else
 701			reg_data->vsense[cnt] = tmp_value;
 702
 703		offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN;
 704	}
 705
 706	/* VBUS_AVG */
 707	for (cnt = 0; cnt < info->phys_channels; cnt++) {
 708		if ((ctrl_regs_tmp << cnt) & 0x80)
 709			continue;
 710
 711		tmp_value = get_unaligned_be16(offset_reg_data_p);
 712
 713		if (info->bi_dir[cnt])
 714			reg_data->vbus_avg[cnt] = sign_extend32((u32)(tmp_value), 15);
 715		else
 716			reg_data->vbus_avg[cnt] = tmp_value;
 717
 718		offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN;
 719	}
 720
 721	/* VSENSE_AVG */
 722	for (cnt = 0; cnt < info->phys_channels; cnt++) {
 723		if ((ctrl_regs_tmp << cnt) & 0x80)
 724			continue;
 725
 726		tmp_value = get_unaligned_be16(offset_reg_data_p);
 727
 728		if (info->bi_dir[cnt])
 729			reg_data->vsense_avg[cnt] = sign_extend32((u32)(tmp_value), 15);
 730		else
 731			reg_data->vsense_avg[cnt] = tmp_value;
 732
 733		offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN;
 734	}
 735
 736	/* VPOWER */
 737	for (cnt = 0; cnt < info->phys_channels; cnt++) {
 738		if ((ctrl_regs_tmp << cnt) & 0x80)
 739			continue;
 740
 741		tmp = get_unaligned_be32(offset_reg_data_p) >> 4;
 742
 743		if (info->bi_dir[cnt])
 744			reg_data->vpower[cnt] = sign_extend32(tmp, 27);
 745		else
 746			reg_data->vpower[cnt] = tmp;
 747
 748		offset_reg_data_p += PAC1934_VPOWER_REG_LEN;
 749	}
 750
 751	return 0;
 752}
 753
 754static int pac1934_retrieve_data(struct pac1934_chip_info *info,
 755				 u32 wait_time)
 756{
 757	int ret = 0;
 758
 759	/*
 760	 * check if the minimal elapsed time has passed and if so,
 761	 * re-read the chip, otherwise the cached info is just fine
 762	 */
 763	if (time_after(jiffies, info->tstamp + msecs_to_jiffies(PAC1934_MIN_POLLING_TIME_MS))) {
 764		ret = pac1934_reg_snapshot(info, true, PAC1934_REFRESH_REG_ADDR,
 765					   wait_time);
 766
 767		/*
 768		 * Re-schedule the work for the read registers on timeout
 769		 * (to prevent chip registers saturation)
 770		 */
 771		mod_delayed_work(system_percpu_wq, &info->work_chip_rfsh,
 772				 msecs_to_jiffies(PAC1934_MAX_RFSH_LIMIT_MS));
 773	}
 774
 775	return ret;
 776}
 777
 778static int pac1934_read_raw(struct iio_dev *indio_dev,
 779			    struct iio_chan_spec const *chan, int *val,
 780			    int *val2, long mask)
 781{
 782	struct pac1934_chip_info *info = iio_priv(indio_dev);
 783	s64 curr_energy;
 784	int ret, channel = chan->channel - 1;
 785
 786	/*
 787	 * For AVG the index should be between 5 to 8.
 788	 * To calculate PAC1934_CH_VOLTAGE_AVERAGE,
 789	 * respectively PAC1934_CH_CURRENT real index, we need
 790	 * to remove the added offset (PAC1934_MAX_NUM_CHANNELS).
 791	 */
 792	if (channel >= PAC1934_MAX_NUM_CHANNELS)
 793		channel = channel - PAC1934_MAX_NUM_CHANNELS;
 794
 795	ret = pac1934_retrieve_data(info, PAC1934_MIN_UPDATE_WAIT_TIME_US);
 796	if (ret < 0)
 797		return ret;
 798
 799	switch (mask) {
 800	case IIO_CHAN_INFO_RAW:
 801		switch (chan->type) {
 802		case IIO_VOLTAGE:
 803			*val = info->chip_reg_data.vbus[channel];
 804			return IIO_VAL_INT;
 805		case IIO_CURRENT:
 806			*val = info->chip_reg_data.vsense[channel];
 807			return IIO_VAL_INT;
 808		case IIO_POWER:
 809			*val = info->chip_reg_data.vpower[channel];
 810			return IIO_VAL_INT;
 811		case IIO_ENERGY:
 812			curr_energy = info->chip_reg_data.energy_sec_acc[channel];
 813			*val = (u32)curr_energy;
 814			*val2 = (u32)(curr_energy >> 32);
 815			return IIO_VAL_INT_64;
 816		default:
 817			return -EINVAL;
 818		}
 819	case IIO_CHAN_INFO_AVERAGE_RAW:
 820		switch (chan->type) {
 821		case IIO_VOLTAGE:
 822			*val = info->chip_reg_data.vbus_avg[channel];
 823			return IIO_VAL_INT;
 824		case IIO_CURRENT:
 825			*val = info->chip_reg_data.vsense_avg[channel];
 826			return IIO_VAL_INT;
 827		default:
 828			return -EINVAL;
 829		}
 830	case IIO_CHAN_INFO_SCALE:
 831		switch (chan->address) {
 832		/* Voltages - scale for millivolts */
 833		case PAC1934_VBUS_1_ADDR:
 834		case PAC1934_VBUS_2_ADDR:
 835		case PAC1934_VBUS_3_ADDR:
 836		case PAC1934_VBUS_4_ADDR:
 837		case PAC1934_VBUS_AVG_1_ADDR:
 838		case PAC1934_VBUS_AVG_2_ADDR:
 839		case PAC1934_VBUS_AVG_3_ADDR:
 840		case PAC1934_VBUS_AVG_4_ADDR:
 841			*val = PAC1934_VOLTAGE_MILLIVOLTS_MAX;
 842			if (chan->scan_type.sign == 'u')
 843				*val2 = PAC1934_VOLTAGE_U_RES;
 844			else
 845				*val2 = PAC1934_VOLTAGE_S_RES;
 846			return IIO_VAL_FRACTIONAL_LOG2;
 847		/*
 848		 * Currents - scale for mA - depends on the
 849		 * channel's shunt value
 850		 * (100mV * 1000000) / (2^16 * shunt(uohm))
 851		 */
 852		case PAC1934_VSENSE_1_ADDR:
 853		case PAC1934_VSENSE_2_ADDR:
 854		case PAC1934_VSENSE_3_ADDR:
 855		case PAC1934_VSENSE_4_ADDR:
 856		case PAC1934_VSENSE_AVG_1_ADDR:
 857		case PAC1934_VSENSE_AVG_2_ADDR:
 858		case PAC1934_VSENSE_AVG_3_ADDR:
 859		case PAC1934_VSENSE_AVG_4_ADDR:
 860			*val = PAC1934_MAX_VSENSE_RSHIFTED_BY_16B;
 861			if (chan->scan_type.sign == 'u')
 862				*val2 = info->shunts[channel];
 863			else
 864				*val2 = info->shunts[channel] >> 1;
 865			return IIO_VAL_FRACTIONAL;
 866		/*
 867		 * Power - uW - it will use the combined scale
 868		 * for current and voltage
 869		 * current(mA) * voltage(mV) = power (uW)
 870		 */
 871		case PAC1934_VPOWER_1_ADDR:
 872		case PAC1934_VPOWER_2_ADDR:
 873		case PAC1934_VPOWER_3_ADDR:
 874		case PAC1934_VPOWER_4_ADDR:
 875			*val = PAC1934_MAX_VPOWER_RSHIFTED_BY_28B;
 876			if (chan->scan_type.sign == 'u')
 877				*val2 = info->shunts[channel];
 878			else
 879				*val2 = info->shunts[channel] >> 1;
 880			return IIO_VAL_FRACTIONAL;
 881		case PAC1934_VPOWER_ACC_1_ADDR:
 882		case PAC1934_VPOWER_ACC_2_ADDR:
 883		case PAC1934_VPOWER_ACC_3_ADDR:
 884		case PAC1934_VPOWER_ACC_4_ADDR:
 885			/*
 886			 * expresses the 32 bit scale value here compute
 887			 * the scale for energy (miliWatt-second or miliJoule)
 888			 */
 889			*val = PAC1934_SCALE_CONSTANT;
 890
 891			if (chan->scan_type.sign == 'u')
 892				*val2 = info->shunts[channel];
 893			else
 894				*val2 = info->shunts[channel] >> 1;
 895			return IIO_VAL_FRACTIONAL;
 896		default:
 897			return -EINVAL;
 898		}
 899	case IIO_CHAN_INFO_SAMP_FREQ:
 900		*val = info->sample_rate_value;
 901		return IIO_VAL_INT;
 902	case IIO_CHAN_INFO_ENABLE:
 903		*val = info->enable_energy[channel];
 904		return IIO_VAL_INT;
 905	default:
 906		return -EINVAL;
 907	}
 908}
 909
 910static int pac1934_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan,
 911			     int val, int val2, long mask)
 912{
 913	struct pac1934_chip_info *info = iio_priv(indio_dev);
 914	struct i2c_client *client = info->client;
 915	int ret = -EINVAL;
 916	s32 old_samp_rate;
 917	u8 ctrl_reg;
 918
 919	switch (mask) {
 920	case IIO_CHAN_INFO_SAMP_FREQ:
 921		ret = pac1934_get_samp_rate_idx(info, val);
 922		if (ret < 0)
 923			return ret;
 924
 925		/* write the new sampling value and trigger a snapshot(incl refresh) */
 926		scoped_guard(mutex, &info->lock) {
 927			ctrl_reg = FIELD_PREP(PAC1934_CRTL_SAMPLE_RATE_MASK, ret);
 928			ret = i2c_smbus_write_byte_data(client, PAC1934_CTRL_REG_ADDR, ctrl_reg);
 929			if (ret) {
 930				dev_err(&client->dev,
 931					"%s - can't update sample rate\n",
 932					__func__);
 933				return ret;
 934			}
 935		}
 936
 937		old_samp_rate = info->sample_rate_value;
 938		info->sample_rate_value = val;
 939
 940		/*
 941		 * now, force a snapshot with refresh - call retrieve
 942		 * data in order to update the refresh timer
 943		 * alter the timestamp in order to force trigger a
 944		 * register snapshot and a timestamp update
 945		 */
 946		info->tstamp -= msecs_to_jiffies(PAC1934_MIN_POLLING_TIME_MS);
 947		ret = pac1934_retrieve_data(info, (1024 / old_samp_rate) * 1000);
 948		if (ret < 0) {
 949			dev_err(&client->dev,
 950				"%s - cannot snapshot ctrl and measurement regs\n",
 951				__func__);
 952			return ret;
 953		}
 954
 955		return 0;
 956	case IIO_CHAN_INFO_ENABLE:
 957		scoped_guard(mutex, &info->lock) {
 958			info->enable_energy[chan->channel - 1] = val ? true : false;
 959			if (!val)
 960				info->chip_reg_data.energy_sec_acc[chan->channel - 1] = 0;
 961		}
 962
 963		return 0;
 964	default:
 965		return -EINVAL;
 966	}
 967}
 968
 969static int pac1934_read_label(struct iio_dev *indio_dev,
 970			      struct iio_chan_spec const *chan, char *label)
 971{
 972	struct pac1934_chip_info *info = iio_priv(indio_dev);
 973
 974	switch (chan->address) {
 975	case PAC1934_VBUS_1_ADDR:
 976	case PAC1934_VBUS_2_ADDR:
 977	case PAC1934_VBUS_3_ADDR:
 978	case PAC1934_VBUS_4_ADDR:
 979		return sysfs_emit(label, "%s_VBUS_%d\n",
 980				  info->labels[chan->scan_index],
 981				  chan->scan_index + 1);
 982	case PAC1934_VBUS_AVG_1_ADDR:
 983	case PAC1934_VBUS_AVG_2_ADDR:
 984	case PAC1934_VBUS_AVG_3_ADDR:
 985	case PAC1934_VBUS_AVG_4_ADDR:
 986		return sysfs_emit(label, "%s_VBUS_AVG_%d\n",
 987				  info->labels[chan->scan_index],
 988				  chan->scan_index + 1);
 989	case PAC1934_VSENSE_1_ADDR:
 990	case PAC1934_VSENSE_2_ADDR:
 991	case PAC1934_VSENSE_3_ADDR:
 992	case PAC1934_VSENSE_4_ADDR:
 993		return sysfs_emit(label, "%s_IBUS_%d\n",
 994				  info->labels[chan->scan_index],
 995				  chan->scan_index + 1);
 996	case PAC1934_VSENSE_AVG_1_ADDR:
 997	case PAC1934_VSENSE_AVG_2_ADDR:
 998	case PAC1934_VSENSE_AVG_3_ADDR:
 999	case PAC1934_VSENSE_AVG_4_ADDR:
1000		return sysfs_emit(label, "%s_IBUS_AVG_%d\n",
1001				  info->labels[chan->scan_index],
1002				  chan->scan_index + 1);
1003	case PAC1934_VPOWER_1_ADDR:
1004	case PAC1934_VPOWER_2_ADDR:
1005	case PAC1934_VPOWER_3_ADDR:
1006	case PAC1934_VPOWER_4_ADDR:
1007		return sysfs_emit(label, "%s_POWER_%d\n",
1008				  info->labels[chan->scan_index],
1009				  chan->scan_index + 1);
1010	case PAC1934_VPOWER_ACC_1_ADDR:
1011	case PAC1934_VPOWER_ACC_2_ADDR:
1012	case PAC1934_VPOWER_ACC_3_ADDR:
1013	case PAC1934_VPOWER_ACC_4_ADDR:
1014		return sysfs_emit(label, "%s_ENERGY_%d\n",
1015				  info->labels[chan->scan_index],
1016				  chan->scan_index + 1);
1017	}
1018
1019	return 0;
1020}
1021
1022static void pac1934_work_periodic_rfsh(struct work_struct *work)
1023{
1024	struct pac1934_chip_info *info = TO_PAC1934_CHIP_INFO((struct delayed_work *)work);
1025	struct device *dev = &info->client->dev;
1026
1027	dev_dbg(dev, "%s - Periodic refresh\n", __func__);
1028
1029	/* do a REFRESH, then read */
1030	pac1934_reg_snapshot(info, true, PAC1934_REFRESH_REG_ADDR,
1031			     PAC1934_MIN_UPDATE_WAIT_TIME_US);
1032
1033	schedule_delayed_work(&info->work_chip_rfsh,
1034			      msecs_to_jiffies(PAC1934_MAX_RFSH_LIMIT_MS));
1035}
1036
1037static int pac1934_read_revision(struct pac1934_chip_info *info, u8 *buf)
1038{
1039	int ret;
1040	struct i2c_client *client = info->client;
1041
1042	ret = i2c_smbus_read_i2c_block_data(client, PAC1934_PID_REG_ADDR,
1043					    PAC1934_ID_REG_LEN,
1044					    buf);
1045	if (ret < 0) {
1046		dev_err(&client->dev, "cannot read revision\n");
1047		return ret;
1048	}
1049
1050	return 0;
1051}
1052
1053static int pac1934_chip_identify(struct pac1934_chip_info *info)
1054{
1055	u8 rev_info[PAC1934_ID_REG_LEN];
1056	struct device *dev = &info->client->dev;
1057	int ret = 0;
1058
1059	ret = pac1934_read_revision(info, (u8 *)rev_info);
1060	if (ret)
1061		return ret;
1062
1063	info->chip_variant = rev_info[PAC1934_PID_IDX];
1064	info->chip_revision = rev_info[PAC1934_RID_IDX];
1065
1066	dev_dbg(dev, "Chip variant: 0x%02X\n", info->chip_variant);
1067	dev_dbg(dev, "Chip revision: 0x%02X\n", info->chip_revision);
1068
1069	switch (info->chip_variant) {
1070	case PAC1934_PID:
1071		return PAC1934;
1072	case PAC1933_PID:
1073		return PAC1933;
1074	case PAC1932_PID:
1075		return PAC1932;
1076	case PAC1931_PID:
1077		return PAC1931;
1078	default:
1079		return -EINVAL;
1080	}
1081}
1082
1083/*
1084 * documentation related to the ACPI device definition
1085 * https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ApplicationNotes/ApplicationNotes/PAC193X-Integration-Notes-for-Microsoft-Windows-10-and-Windows-11-Driver-Support-DS00002534.pdf
1086 */
1087static int pac1934_acpi_parse_channel_config(struct i2c_client *client,
1088					     struct pac1934_chip_info *info)
1089{
1090	acpi_handle handle;
1091	union acpi_object *rez;
1092	struct device *dev = &client->dev;
1093	unsigned short bi_dir_mask;
1094	int idx, i;
1095	guid_t guid;
1096
1097	handle = ACPI_HANDLE(dev);
1098
1099	guid_parse(PAC1934_DSM_UUID, &guid);
1100
1101	rez = acpi_evaluate_dsm(handle, &guid, 0, PAC1934_ACPI_GET_NAMES_AND_MOHMS_VALS, NULL);
1102	if (!rez)
1103		return -EINVAL;
1104
1105	for (i = 0; i < rez->package.count; i += 2) {
1106		idx = i / 2;
1107		info->labels[idx] =
1108			devm_kmemdup(dev, rez->package.elements[i].string.pointer,
1109				     (size_t)rez->package.elements[i].string.length + 1,
1110				     GFP_KERNEL);
1111		info->labels[idx][rez->package.elements[i].string.length] = '\0';
1112		info->shunts[idx] = rez->package.elements[i + 1].integer.value * 1000;
1113		info->active_channels[idx] = (info->shunts[idx] != 0);
1114	}
1115
1116	ACPI_FREE(rez);
1117
1118	rez = acpi_evaluate_dsm(handle, &guid, 1, PAC1934_ACPI_GET_UOHMS_VALS, NULL);
1119	if (!rez) {
1120		/*
1121		 * initializing with default values
1122		 * we assume all channels are unidirectional(the mask is zero)
1123		 * and assign the default sampling rate
1124		 */
1125		info->sample_rate_value = PAC1934_DEFAULT_CHIP_SAMP_SPEED_HZ;
1126		return 0;
1127	}
1128
1129	for (i = 0; i < rez->package.count; i++) {
1130		idx = i;
1131		info->shunts[idx] = rez->package.elements[i].integer.value;
1132		info->active_channels[idx] = (info->shunts[idx] != 0);
1133	}
1134
1135	ACPI_FREE(rez);
1136
1137	rez = acpi_evaluate_dsm(handle, &guid, 1, PAC1934_ACPI_GET_BIPOLAR_SETTINGS, NULL);
1138	if (!rez)
1139		return -EINVAL;
1140
1141	bi_dir_mask = rez->package.elements[0].integer.value;
1142	info->bi_dir[0] = ((bi_dir_mask & (1 << 3)) | (bi_dir_mask & (1 << 7))) != 0;
1143	info->bi_dir[1] = ((bi_dir_mask & (1 << 2)) | (bi_dir_mask & (1 << 6))) != 0;
1144	info->bi_dir[2] = ((bi_dir_mask & (1 << 1)) | (bi_dir_mask & (1 << 5))) != 0;
1145	info->bi_dir[3] = ((bi_dir_mask & (1 << 0)) | (bi_dir_mask & (1 << 4))) != 0;
1146
1147	ACPI_FREE(rez);
1148
1149	rez = acpi_evaluate_dsm(handle, &guid, 1, PAC1934_ACPI_GET_SAMP, NULL);
1150	if (!rez)
1151		return -EINVAL;
1152
1153	info->sample_rate_value = rez->package.elements[0].integer.value;
1154
1155	ACPI_FREE(rez);
1156
1157	return 0;
1158}
1159
1160static int pac1934_fw_parse_channel_config(struct i2c_client *client,
1161					   struct pac1934_chip_info *info)
1162{
1163	struct device *dev = &client->dev;
1164	unsigned int current_channel;
1165	int idx, ret;
1166
1167	info->sample_rate_value = 1024;
1168	current_channel = 1;
1169
1170	device_for_each_child_node_scoped(dev, node) {
1171		ret = fwnode_property_read_u32(node, "reg", &idx);
1172		if (ret)
1173			return dev_err_probe(dev, ret,
1174					     "reading invalid channel index\n");
1175
1176		/* adjust idx to match channel index (1 to 4) from the datasheet */
1177		idx--;
1178
1179		if (current_channel >= (info->phys_channels + 1) ||
1180		    idx >= info->phys_channels || idx < 0)
1181			return dev_err_probe(dev, -EINVAL,
1182					     "%s: invalid channel_index %d value\n",
1183					     fwnode_get_name(node), idx);
1184
1185		/* enable channel */
1186		info->active_channels[idx] = true;
1187
1188		ret = fwnode_property_read_u32(node, "shunt-resistor-micro-ohms",
1189					       &info->shunts[idx]);
1190		if (ret)
1191			return dev_err_probe(dev, ret,
1192					     "%s: invalid shunt-resistor value: %d\n",
1193					     fwnode_get_name(node), info->shunts[idx]);
1194
1195		if (fwnode_property_present(node, "label")) {
1196			ret = fwnode_property_read_string(node, "label",
1197							  (const char **)&info->labels[idx]);
1198			if (ret)
1199				return dev_err_probe(dev, ret,
1200						     "%s: invalid rail-name value\n",
1201						     fwnode_get_name(node));
1202		}
1203
1204		info->bi_dir[idx] = fwnode_property_read_bool(node, "bipolar");
1205
1206		current_channel++;
1207	}
1208
1209	return 0;
1210}
1211
1212static void pac1934_cancel_delayed_work(void *dwork)
1213{
1214	cancel_delayed_work_sync(dwork);
1215}
1216
1217static int pac1934_chip_configure(struct pac1934_chip_info *info)
1218{
1219	int cnt, ret;
1220	struct i2c_client *client = info->client;
1221	u8 regs[PAC1934_CTRL_STATUS_INFO_LEN], idx, ctrl_reg;
1222	u32 wait_time;
1223
1224	info->chip_reg_data.num_enabled_channels = 0;
1225	for (cnt = 0;  cnt < info->phys_channels; cnt++) {
1226		if (info->active_channels[cnt])
1227			info->chip_reg_data.num_enabled_channels++;
1228	}
1229
1230	/*
1231	 * read whatever information was gathered before the driver was loaded
1232	 * establish which channels are enabled/disabled and then establish the
1233	 * information retrieval mode (using SKIP or no).
1234	 * Read the chip ID values
1235	 */
1236	ret = i2c_smbus_read_i2c_block_data(client, PAC1934_CTRL_STAT_REGS_ADDR,
1237					    ARRAY_SIZE(regs),
1238					    (u8 *)regs);
1239	if (ret < 0) {
1240		dev_err_probe(&client->dev, ret,
1241			      "%s - cannot read regs from 0x%02X\n",
1242			      __func__, PAC1934_CTRL_STAT_REGS_ADDR);
1243		return ret;
1244	}
1245
1246	/* write the CHANNEL_DIS and the NEG_PWR registers */
1247	regs[PAC1934_CHANNEL_DIS_REG_OFF] =
1248		FIELD_PREP(PAC1934_CHAN_DIS_CH1_OFF_MASK, info->active_channels[0] ? 0 : 1) |
1249		FIELD_PREP(PAC1934_CHAN_DIS_CH2_OFF_MASK, info->active_channels[1] ? 0 : 1) |
1250		FIELD_PREP(PAC1934_CHAN_DIS_CH3_OFF_MASK, info->active_channels[2] ? 0 : 1) |
1251		FIELD_PREP(PAC1934_CHAN_DIS_CH4_OFF_MASK, info->active_channels[3] ? 0 : 1) |
1252		FIELD_PREP(PAC1934_SMBUS_TIMEOUT_MASK, 0) |
1253		FIELD_PREP(PAC1934_SMBUS_BYTECOUNT_MASK, 0) |
1254		FIELD_PREP(PAC1934_SMBUS_NO_SKIP_MASK, 0);
1255
1256	regs[PAC1934_NEG_PWR_REG_OFF] =
1257		FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDI_MASK, info->bi_dir[0]) |
1258		FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDI_MASK, info->bi_dir[1]) |
1259		FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDI_MASK, info->bi_dir[2]) |
1260		FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDI_MASK, info->bi_dir[3]) |
1261		FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDV_MASK, info->bi_dir[0]) |
1262		FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDV_MASK, info->bi_dir[1]) |
1263		FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDV_MASK, info->bi_dir[2]) |
1264		FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDV_MASK, info->bi_dir[3]);
1265
1266	/* no SLOW triggered REFRESH, clear POR */
1267	regs[PAC1934_SLOW_REG_OFF] = 0;
1268
1269	/*
1270	 * Write the three bytes sequentially, as the device does not support
1271	 * block write.
1272	 */
1273	ret = i2c_smbus_write_byte_data(client, PAC1934_CTRL_STAT_REGS_ADDR,
1274					regs[PAC1934_CHANNEL_DIS_REG_OFF]);
1275	if (ret)
1276		return ret;
1277
1278	ret = i2c_smbus_write_byte_data(client,
1279					PAC1934_CTRL_STAT_REGS_ADDR + PAC1934_NEG_PWR_REG_OFF,
1280					regs[PAC1934_NEG_PWR_REG_OFF]);
1281	if (ret)
1282		return ret;
1283
1284	ret = i2c_smbus_write_byte_data(client, PAC1934_SLOW_REG_ADDR,
1285					regs[PAC1934_SLOW_REG_OFF]);
1286	if (ret)
1287		return ret;
1288
1289	/* Default sampling rate */
1290	ctrl_reg = FIELD_PREP(PAC1934_CRTL_SAMPLE_RATE_MASK, PAC1934_SAMP_1024SPS);
1291
1292	ret = i2c_smbus_write_byte_data(client, PAC1934_CTRL_REG_ADDR, ctrl_reg);
1293	if (ret)
1294		return ret;
1295
1296	/*
1297	 * send a REFRESH to the chip, so the new settings take place
1298	 * as well as resetting the accumulators
1299	 */
1300	ret = i2c_smbus_write_byte(client, PAC1934_REFRESH_REG_ADDR);
1301	if (ret) {
1302		dev_err(&client->dev,
1303			"%s - cannot send 0x%02X\n",
1304			__func__, PAC1934_REFRESH_REG_ADDR);
1305		return ret;
1306	}
1307
1308	/*
1309	 * get the current(in the chip) sampling speed and compute the
1310	 * required timeout based on its value
1311	 * the timeout is 1/sampling_speed
1312	 */
1313	idx = regs[PAC1934_CTRL_ACT_REG_OFF] >> PAC1934_SAMPLE_RATE_SHIFT;
1314	wait_time = (1024 / samp_rate_map_tbl[idx]) * 1000;
1315
1316	/*
1317	 * wait the maximum amount of time to be on the safe side
1318	 * the maximum wait time is for 8sps
1319	 */
1320	usleep_range(wait_time, wait_time + 100);
1321
1322	INIT_DELAYED_WORK(&info->work_chip_rfsh, pac1934_work_periodic_rfsh);
1323	/* Setup the latest moment for reading the regs before saturation */
1324	schedule_delayed_work(&info->work_chip_rfsh,
1325			      msecs_to_jiffies(PAC1934_MAX_RFSH_LIMIT_MS));
1326
1327	return devm_add_action_or_reset(&client->dev, pac1934_cancel_delayed_work,
1328					&info->work_chip_rfsh);
1329}
1330
1331static int pac1934_prep_iio_channels(struct pac1934_chip_info *info, struct iio_dev *indio_dev)
1332{
1333	struct iio_chan_spec *ch_sp;
1334	int channel_size, attribute_count, cnt;
1335	void *dyn_ch_struct, *tmp_data;
1336	struct device *dev = &info->client->dev;
1337
1338	/* find out dynamically how many IIO channels we need */
1339	attribute_count = 0;
1340	channel_size = 0;
1341	for (cnt = 0; cnt < info->phys_channels; cnt++) {
1342		if (!info->active_channels[cnt])
1343			continue;
1344
1345		/* add the size of the properties of one chip physical channel */
1346		channel_size += sizeof(pac1934_single_channel);
1347		/* count how many enabled channels we have */
1348		attribute_count += ARRAY_SIZE(pac1934_single_channel);
1349		dev_dbg(dev, ":%s: Channel %d active\n", __func__, cnt + 1);
1350	}
1351
1352	dyn_ch_struct = devm_kzalloc(dev, channel_size, GFP_KERNEL);
1353	if (!dyn_ch_struct)
1354		return -EINVAL;
1355
1356	tmp_data = dyn_ch_struct;
1357
1358	/* populate the dynamic channels and make all the adjustments */
1359	for (cnt = 0; cnt < info->phys_channels; cnt++) {
1360		if (!info->active_channels[cnt])
1361			continue;
1362
1363		memcpy(tmp_data, pac1934_single_channel, sizeof(pac1934_single_channel));
1364		ch_sp = (struct iio_chan_spec *)tmp_data;
1365		ch_sp[PAC1934_CH_ENERGY].channel = cnt + 1;
1366		ch_sp[PAC1934_CH_ENERGY].scan_index = cnt;
1367		ch_sp[PAC1934_CH_ENERGY].address = cnt + PAC1934_VPOWER_ACC_1_ADDR;
1368		ch_sp[PAC1934_CH_POWER].channel = cnt + 1;
1369		ch_sp[PAC1934_CH_POWER].scan_index = cnt;
1370		ch_sp[PAC1934_CH_POWER].address = cnt + PAC1934_VPOWER_1_ADDR;
1371		ch_sp[PAC1934_CH_VOLTAGE].channel = cnt + 1;
1372		ch_sp[PAC1934_CH_VOLTAGE].scan_index = cnt;
1373		ch_sp[PAC1934_CH_VOLTAGE].address = cnt + PAC1934_VBUS_1_ADDR;
1374		ch_sp[PAC1934_CH_CURRENT].channel = cnt + 1;
1375		ch_sp[PAC1934_CH_CURRENT].scan_index = cnt;
1376		ch_sp[PAC1934_CH_CURRENT].address = cnt + PAC1934_VSENSE_1_ADDR;
1377
1378		/*
1379		 * In order to be able to use labels for PAC1934_CH_VOLTAGE, and
1380		 * PAC1934_CH_VOLTAGE_AVERAGE,respectively PAC1934_CH_CURRENT
1381		 * and PAC1934_CH_CURRENT_AVERAGE we need to use different
1382		 * channel numbers. We will add +5 (+1 to maximum PAC channels).
1383		 */
1384		ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].channel = cnt + 5;
1385		ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].scan_index = cnt;
1386		ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].address = cnt + PAC1934_VBUS_AVG_1_ADDR;
1387		ch_sp[PAC1934_CH_CURRENT_AVERAGE].channel = cnt + 5;
1388		ch_sp[PAC1934_CH_CURRENT_AVERAGE].scan_index = cnt;
1389		ch_sp[PAC1934_CH_CURRENT_AVERAGE].address = cnt + PAC1934_VSENSE_AVG_1_ADDR;
1390
1391		/*
1392		 * now modify the parameters in all channels if the
1393		 * whole chip rail(channel) is bi-directional
1394		 */
1395		if (info->bi_dir[cnt]) {
1396			ch_sp[PAC1934_CH_ENERGY].scan_type.sign = 's';
1397			ch_sp[PAC1934_CH_ENERGY].scan_type.realbits = 47;
1398			ch_sp[PAC1934_CH_POWER].scan_type.sign = 's';
1399			ch_sp[PAC1934_CH_POWER].scan_type.realbits = 27;
1400			ch_sp[PAC1934_CH_VOLTAGE].scan_type.sign = 's';
1401			ch_sp[PAC1934_CH_VOLTAGE].scan_type.realbits = 15;
1402			ch_sp[PAC1934_CH_CURRENT].scan_type.sign = 's';
1403			ch_sp[PAC1934_CH_CURRENT].scan_type.realbits = 15;
1404			ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].scan_type.sign = 's';
1405			ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].scan_type.realbits = 15;
1406			ch_sp[PAC1934_CH_CURRENT_AVERAGE].scan_type.sign = 's';
1407			ch_sp[PAC1934_CH_CURRENT_AVERAGE].scan_type.realbits = 15;
1408		}
1409		tmp_data += sizeof(pac1934_single_channel);
1410	}
1411
1412	/*
1413	 * send the updated dynamic channel structure information towards IIO
1414	 * prepare the required field for IIO class registration
1415	 */
1416	indio_dev->num_channels = attribute_count;
1417	indio_dev->channels = (const struct iio_chan_spec *)dyn_ch_struct;
1418
1419	return 0;
1420}
1421
1422static IIO_DEVICE_ATTR(in_shunt_resistor1, 0644,
1423		       pac1934_shunt_value_show, pac1934_shunt_value_store, 0);
1424static IIO_DEVICE_ATTR(in_shunt_resistor2, 0644,
1425		       pac1934_shunt_value_show, pac1934_shunt_value_store, 1);
1426static IIO_DEVICE_ATTR(in_shunt_resistor3, 0644,
1427		       pac1934_shunt_value_show, pac1934_shunt_value_store, 2);
1428static IIO_DEVICE_ATTR(in_shunt_resistor4, 0644,
1429		       pac1934_shunt_value_show, pac1934_shunt_value_store, 3);
1430
1431static int pac1934_prep_custom_attributes(struct pac1934_chip_info *info,
1432					  struct iio_dev *indio_dev)
1433{
1434	int i, active_channels_count = 0;
1435	struct attribute **pac1934_custom_attr;
1436	struct attribute_group *pac1934_group;
1437	struct device *dev = &info->client->dev;
1438
1439	for (i = 0 ; i < info->phys_channels; i++)
1440		if (info->active_channels[i])
1441			active_channels_count++;
1442
1443	pac1934_group = devm_kzalloc(dev, sizeof(*pac1934_group), GFP_KERNEL);
1444	if (!pac1934_group)
1445		return -ENOMEM;
1446
1447	pac1934_custom_attr = devm_kzalloc(dev,
1448					   (PAC1934_CUSTOM_ATTR_FOR_CHANNEL *
1449					   active_channels_count)
1450					   * sizeof(*pac1934_group) + 1,
1451					   GFP_KERNEL);
1452	if (!pac1934_custom_attr)
1453		return -ENOMEM;
1454
1455	i = 0;
1456	if (info->active_channels[0])
1457		pac1934_custom_attr[i++] = PAC1934_DEV_ATTR(in_shunt_resistor1);
1458
1459	if (info->active_channels[1])
1460		pac1934_custom_attr[i++] = PAC1934_DEV_ATTR(in_shunt_resistor2);
1461
1462	if (info->active_channels[2])
1463		pac1934_custom_attr[i++] = PAC1934_DEV_ATTR(in_shunt_resistor3);
1464
1465	if (info->active_channels[3])
1466		pac1934_custom_attr[i] = PAC1934_DEV_ATTR(in_shunt_resistor4);
1467
1468	pac1934_group->attrs = pac1934_custom_attr;
1469	info->iio_info.attrs = pac1934_group;
1470
1471	return 0;
1472}
1473
1474static const struct iio_info pac1934_info = {
1475	.read_raw = pac1934_read_raw,
1476	.write_raw = pac1934_write_raw,
1477	.read_avail = pac1934_read_avail,
1478	.read_label = pac1934_read_label,
1479};
1480
1481static int pac1934_probe(struct i2c_client *client)
1482{
1483	struct pac1934_chip_info *info;
1484	const struct pac1934_features *chip;
1485	struct iio_dev *indio_dev;
1486	int cnt, ret;
1487	struct device *dev = &client->dev;
1488
1489	indio_dev = devm_iio_device_alloc(dev, sizeof(*info));
1490	if (!indio_dev)
1491		return -ENOMEM;
1492
1493	info = iio_priv(indio_dev);
1494
1495	info->client = client;
1496
1497	/* always start with energy accumulation enabled */
1498	for (cnt = 0; cnt < PAC1934_MAX_NUM_CHANNELS; cnt++)
1499		info->enable_energy[cnt] = true;
1500
1501	ret = pac1934_chip_identify(info);
1502	if (ret < 0) {
1503		/*
1504		 * If failed to identify the hardware based on internal
1505		 * registers, try using fallback compatible in device tree
1506		 * to deal with some newer part number.
1507		 */
1508		chip = i2c_get_match_data(client);
1509		if (!chip)
1510			return -EINVAL;
1511
1512		info->phys_channels = chip->phys_channels;
1513		indio_dev->name = chip->name;
1514	} else {
1515		info->phys_channels = pac1934_chip_config[ret].phys_channels;
1516		indio_dev->name = pac1934_chip_config[ret].name;
1517	}
1518
1519	if (is_acpi_device_node(dev_fwnode(dev)))
1520		ret = pac1934_acpi_parse_channel_config(client, info);
1521	else
1522		/*
1523		 * This makes it possible to use also ACPI PRP0001 for
1524		 * registering the device using device tree properties.
1525		 */
1526		ret = pac1934_fw_parse_channel_config(client, info);
1527
1528	if (ret)
1529		return dev_err_probe(dev, ret,
1530				     "parameter parsing returned an error\n");
1531
1532	ret = devm_mutex_init(dev, &info->lock);
1533	if (ret < 0)
1534		return ret;
1535
1536	/*
1537	 * do now any chip specific initialization (e.g. read/write
1538	 * some registers), enable/disable certain channels, change the sampling
1539	 * rate to the requested value
1540	 */
1541	ret = pac1934_chip_configure(info);
1542	if (ret < 0)
1543		return ret;
1544
1545	/* prepare the channel information */
1546	ret = pac1934_prep_iio_channels(info, indio_dev);
1547	if (ret < 0)
1548		return ret;
1549
1550	info->iio_info = pac1934_info;
1551	indio_dev->info = &info->iio_info;
1552	indio_dev->modes = INDIO_DIRECT_MODE;
1553
1554	ret = pac1934_prep_custom_attributes(info, indio_dev);
1555	if (ret < 0)
1556		return dev_err_probe(dev, ret,
1557				     "Can't configure custom attributes for PAC1934 device\n");
1558
1559	/*
1560	 * read whatever has been accumulated in the chip so far
1561	 * and reset the accumulators
1562	 */
1563	ret = pac1934_reg_snapshot(info, true, PAC1934_REFRESH_REG_ADDR,
1564				   PAC1934_MIN_UPDATE_WAIT_TIME_US);
1565	if (ret < 0)
1566		return ret;
1567
1568	ret = devm_iio_device_register(dev, indio_dev);
1569	if (ret < 0)
1570		return dev_err_probe(dev, ret,
1571				     "Can't register IIO device\n");
1572
1573	return 0;
1574}
1575
1576static const struct i2c_device_id pac1934_id[] = {
1577	{ .name = "pac1931", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1931] },
1578	{ .name = "pac1932", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1932] },
1579	{ .name = "pac1933", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1933] },
1580	{ .name = "pac1934", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1934] },
1581	{ }
1582};
1583MODULE_DEVICE_TABLE(i2c, pac1934_id);
1584
1585static const struct of_device_id pac1934_of_match[] = {
1586	{
1587		.compatible = "microchip,pac1931",
1588		.data = &pac1934_chip_config[PAC1931]
1589	},
1590	{
1591		.compatible = "microchip,pac1932",
1592		.data = &pac1934_chip_config[PAC1932]
1593	},
1594	{
1595		.compatible = "microchip,pac1933",
1596		.data = &pac1934_chip_config[PAC1933]
1597	},
1598	{
1599		.compatible = "microchip,pac1934",
1600		.data = &pac1934_chip_config[PAC1934]
1601	},
1602	{ }
1603};
1604MODULE_DEVICE_TABLE(of, pac1934_of_match);
1605
1606/*
1607 * using MCHP1930 to be compatible with BIOS ACPI. See example:
1608 * https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ApplicationNotes/ApplicationNotes/PAC1934-Integration-Notes-for-Microsoft-Windows-10-and-Windows-11-Driver-Support-DS00002534.pdf
1609 */
1610static const struct acpi_device_id pac1934_acpi_match[] = {
1611	{ "MCHP1930", .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1934] },
1612	{ }
1613};
1614MODULE_DEVICE_TABLE(acpi, pac1934_acpi_match);
1615
1616static struct i2c_driver pac1934_driver = {
1617	.driver	 = {
1618		.name = "pac1934",
1619		.of_match_table = pac1934_of_match,
1620		.acpi_match_table = pac1934_acpi_match
1621	},
1622	.probe = pac1934_probe,
1623	.id_table = pac1934_id,
1624};
1625
1626module_i2c_driver(pac1934_driver);
1627
1628MODULE_AUTHOR("Bogdan Bolocan <bogdan.bolocan@microchip.com>");
1629MODULE_AUTHOR("Victor Tudose");
1630MODULE_AUTHOR("Marius Cristea <marius.cristea@microchip.com>");
1631MODULE_DESCRIPTION("IIO driver for PAC1934 Multi-Channel DC Power/Energy Monitor");
1632MODULE_LICENSE("GPL");