ina2xx-adc.c

   1/*
   2 * INA2XX Current and Power Monitors
   3 *
   4 * Copyright 2015 Baylibre SAS.
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License version 2 as
   8 * published by the Free Software Foundation.
   9 *
  10 * Based on linux/drivers/iio/adc/ad7291.c
  11 * Copyright 2010-2011 Analog Devices Inc.
  12 *
  13 * Based on linux/drivers/hwmon/ina2xx.c
  14 * Copyright 2012 Lothar Felten <l-felten@ti.com>
  15 *
  16 * Licensed under the GPL-2 or later.
  17 *
  18 * IIO driver for INA219-220-226-230-231
  19 *
  20 * Configurable 7-bit I2C slave address from 0x40 to 0x4F
  21 */
  22
  23#include <linux/delay.h>
  24#include <linux/i2c.h>
  25#include <linux/iio/iio.h>
  26#include <linux/iio/buffer.h>
  27#include <linux/iio/kfifo_buf.h>
  28#include <linux/iio/sysfs.h>
  29#include <linux/kthread.h>
  30#include <linux/module.h>
  31#include <linux/of.h>
  32#include <linux/regmap.h>
  33#include <linux/sched/task.h>
  34#include <linux/util_macros.h>
  35
  36#include <linux/platform_data/ina2xx.h>
  37
  38/* INA2XX registers definition */
  39#define INA2XX_CONFIG                   0x00
  40#define INA2XX_SHUNT_VOLTAGE            0x01	/* readonly */
  41#define INA2XX_BUS_VOLTAGE              0x02	/* readonly */
  42#define INA2XX_POWER                    0x03	/* readonly */
  43#define INA2XX_CURRENT                  0x04	/* readonly */
  44#define INA2XX_CALIBRATION              0x05
  45
  46#define INA226_MASK_ENABLE		0x06
  47#define INA226_CVRF			BIT(3)
  48
  49#define INA2XX_MAX_REGISTERS            8
  50
  51/* settings - depend on use case */
  52#define INA219_CONFIG_DEFAULT           0x399F	/* PGA=1/8, BRNG=32V */
  53#define INA219_DEFAULT_IT		532
  54#define INA219_DEFAULT_BRNG             1   /* 32V */
  55#define INA219_DEFAULT_PGA              125 /* 1000/8 */
  56#define INA226_CONFIG_DEFAULT           0x4327
  57#define INA226_DEFAULT_AVG              4
  58#define INA226_DEFAULT_IT		1110
  59
  60#define INA2XX_RSHUNT_DEFAULT           10000
  61
  62/*
  63 * bit masks for reading the settings in the configuration register
  64 * FIXME: use regmap_fields.
  65 */
  66#define INA2XX_MODE_MASK	GENMASK(3, 0)
  67
  68/* Gain for VShunt: 1/8 (default), 1/4, 1/2, 1 */
  69#define INA219_PGA_MASK		GENMASK(12, 11)
  70#define INA219_SHIFT_PGA(val)	((val) << 11)
  71
  72/* VBus range: 32V (default), 16V */
  73#define INA219_BRNG_MASK	BIT(13)
  74#define INA219_SHIFT_BRNG(val)	((val) << 13)
  75
  76/* Averaging for VBus/VShunt/Power */
  77#define INA226_AVG_MASK		GENMASK(11, 9)
  78#define INA226_SHIFT_AVG(val)	((val) << 9)
  79
  80/* Integration time for VBus */
  81#define INA219_ITB_MASK		GENMASK(10, 7)
  82#define INA219_SHIFT_ITB(val)	((val) << 7)
  83#define INA226_ITB_MASK		GENMASK(8, 6)
  84#define INA226_SHIFT_ITB(val)	((val) << 6)
  85
  86/* Integration time for VShunt */
  87#define INA219_ITS_MASK		GENMASK(6, 3)
  88#define INA219_SHIFT_ITS(val)	((val) << 3)
  89#define INA226_ITS_MASK		GENMASK(5, 3)
  90#define INA226_SHIFT_ITS(val)	((val) << 3)
  91
  92/* INA219 Bus voltage register, low bits are flags */
  93#define INA219_OVF		BIT(0)
  94#define INA219_CNVR		BIT(1)
  95#define INA219_BUS_VOLTAGE_SHIFT	3
  96
  97/* Cosmetic macro giving the sampling period for a full P=UxI cycle */
  98#define SAMPLING_PERIOD(c)	((c->int_time_vbus + c->int_time_vshunt) \
  99				 * c->avg)
 100
 101static bool ina2xx_is_writeable_reg(struct device *dev, unsigned int reg)
 102{
 103	return (reg == INA2XX_CONFIG) || (reg > INA2XX_CURRENT);
 104}
 105
 106static bool ina2xx_is_volatile_reg(struct device *dev, unsigned int reg)
 107{
 108	return (reg != INA2XX_CONFIG);
 109}
 110
 111static inline bool is_signed_reg(unsigned int reg)
 112{
 113	return (reg == INA2XX_SHUNT_VOLTAGE) || (reg == INA2XX_CURRENT);
 114}
 115
 116static const struct regmap_config ina2xx_regmap_config = {
 117	.reg_bits = 8,
 118	.val_bits = 16,
 119	.max_register = INA2XX_MAX_REGISTERS,
 120	.writeable_reg = ina2xx_is_writeable_reg,
 121	.volatile_reg = ina2xx_is_volatile_reg,
 122};
 123
 124enum ina2xx_ids { ina219, ina226 };
 125
 126struct ina2xx_config {
 127	const char *name;
 128	u16 config_default;
 129	int calibration_value;
 130	int shunt_voltage_lsb;	/* nV */
 131	int bus_voltage_shift;	/* position of lsb */
 132	int bus_voltage_lsb;	/* uV */
 133	/* fixed relation between current and power lsb, uW/uA */
 134	int power_lsb_factor;
 135	enum ina2xx_ids chip_id;
 136};
 137
 138struct ina2xx_chip_info {
 139	struct regmap *regmap;
 140	struct task_struct *task;
 141	const struct ina2xx_config *config;
 142	struct mutex state_lock;
 143	unsigned int shunt_resistor_uohm;
 144	int avg;
 145	int int_time_vbus; /* Bus voltage integration time uS */
 146	int int_time_vshunt; /* Shunt voltage integration time uS */
 147	int range_vbus; /* Bus voltage maximum in V */
 148	int pga_gain_vshunt; /* Shunt voltage PGA gain */
 149	bool allow_async_readout;
 150	/* data buffer needs space for channel data and timestamp */
 151	struct {
 152		u16 chan[4];
 153		aligned_s64 ts;
 154	} scan;
 155};
 156
 157static const struct ina2xx_config ina2xx_config[] = {
 158	[ina219] = {
 159		.name = "ina219",
 160		.config_default = INA219_CONFIG_DEFAULT,
 161		.calibration_value = 4096,
 162		.shunt_voltage_lsb = 10000,
 163		.bus_voltage_shift = INA219_BUS_VOLTAGE_SHIFT,
 164		.bus_voltage_lsb = 4000,
 165		.power_lsb_factor = 20,
 166		.chip_id = ina219,
 167	},
 168	[ina226] = {
 169		.name = "ina226",
 170		.config_default = INA226_CONFIG_DEFAULT,
 171		.calibration_value = 2048,
 172		.shunt_voltage_lsb = 2500,
 173		.bus_voltage_shift = 0,
 174		.bus_voltage_lsb = 1250,
 175		.power_lsb_factor = 25,
 176		.chip_id = ina226,
 177	},
 178};
 179
 180static int ina2xx_read_raw(struct iio_dev *indio_dev,
 181			   struct iio_chan_spec const *chan,
 182			   int *val, int *val2, long mask)
 183{
 184	int ret;
 185	struct ina2xx_chip_info *chip = iio_priv(indio_dev);
 186	unsigned int regval;
 187
 188	switch (mask) {
 189	case IIO_CHAN_INFO_RAW:
 190		ret = regmap_read(chip->regmap, chan->address, &regval);
 191		if (ret)
 192			return ret;
 193
 194		if (is_signed_reg(chan->address))
 195			*val = (s16) regval;
 196		else
 197			*val  = regval;
 198
 199		if (chan->address == INA2XX_BUS_VOLTAGE)
 200			*val >>= chip->config->bus_voltage_shift;
 201
 202		return IIO_VAL_INT;
 203
 204	case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
 205		*val = chip->avg;
 206		return IIO_VAL_INT;
 207
 208	case IIO_CHAN_INFO_INT_TIME:
 209		*val = 0;
 210		if (chan->address == INA2XX_SHUNT_VOLTAGE)
 211			*val2 = chip->int_time_vshunt;
 212		else
 213			*val2 = chip->int_time_vbus;
 214
 215		return IIO_VAL_INT_PLUS_MICRO;
 216
 217	case IIO_CHAN_INFO_SAMP_FREQ:
 218		/*
 219		 * Sample freq is read only, it is a consequence of
 220		 * 1/AVG*(CT_bus+CT_shunt).
 221		 */
 222		*val = DIV_ROUND_CLOSEST(1000000, SAMPLING_PERIOD(chip));
 223
 224		return IIO_VAL_INT;
 225
 226	case IIO_CHAN_INFO_SCALE:
 227		switch (chan->address) {
 228		case INA2XX_SHUNT_VOLTAGE:
 229			/* processed (mV) = raw * lsb(nV) / 1000000 */
 230			*val = chip->config->shunt_voltage_lsb;
 231			*val2 = 1000000;
 232			return IIO_VAL_FRACTIONAL;
 233
 234		case INA2XX_BUS_VOLTAGE:
 235			/* processed (mV) = raw * lsb (uV) / 1000 */
 236			*val = chip->config->bus_voltage_lsb;
 237			*val2 = 1000;
 238			return IIO_VAL_FRACTIONAL;
 239
 240		case INA2XX_CURRENT:
 241			/*
 242			 * processed (mA) = raw * current_lsb (mA)
 243			 * current_lsb (mA) = shunt_voltage_lsb (nV) /
 244			 *                    shunt_resistor (uOhm)
 245			 */
 246			*val = chip->config->shunt_voltage_lsb;
 247			*val2 = chip->shunt_resistor_uohm;
 248			return IIO_VAL_FRACTIONAL;
 249
 250		case INA2XX_POWER:
 251			/*
 252			 * processed (mW) = raw * power_lsb (mW)
 253			 * power_lsb (mW) = power_lsb_factor (mW/mA) *
 254			 *                  current_lsb (mA)
 255			 */
 256			*val = chip->config->power_lsb_factor *
 257			       chip->config->shunt_voltage_lsb;
 258			*val2 = chip->shunt_resistor_uohm;
 259			return IIO_VAL_FRACTIONAL;
 260		}
 261		return -EINVAL;
 262
 263	case IIO_CHAN_INFO_HARDWAREGAIN:
 264		switch (chan->address) {
 265		case INA2XX_SHUNT_VOLTAGE:
 266			*val = chip->pga_gain_vshunt;
 267			*val2 = 1000;
 268			return IIO_VAL_FRACTIONAL;
 269
 270		case INA2XX_BUS_VOLTAGE:
 271			*val = chip->range_vbus == 32 ? 1 : 2;
 272			return IIO_VAL_INT;
 273		}
 274		return -EINVAL;
 275	}
 276
 277	return -EINVAL;
 278}
 279
 280/*
 281 * Available averaging rates for ina226. The indices correspond with
 282 * the bit values expected by the chip (according to the ina226 datasheet,
 283 * table 3 AVG bit settings, found at
 284 * https://www.ti.com/lit/ds/symlink/ina226.pdf.
 285 */
 286static const int ina226_avg_tab[] = { 1, 4, 16, 64, 128, 256, 512, 1024 };
 287
 288static int ina226_set_average(struct ina2xx_chip_info *chip, unsigned int val,
 289			      unsigned int *config)
 290{
 291	int bits;
 292
 293	if (val > 1024 || val < 1)
 294		return -EINVAL;
 295
 296	bits = find_closest(val, ina226_avg_tab,
 297			    ARRAY_SIZE(ina226_avg_tab));
 298
 299	chip->avg = ina226_avg_tab[bits];
 300
 301	*config &= ~INA226_AVG_MASK;
 302	*config |= INA226_SHIFT_AVG(bits) & INA226_AVG_MASK;
 303
 304	return 0;
 305}
 306
 307/* Conversion times in uS */
 308static const int ina226_conv_time_tab[] = { 140, 204, 332, 588, 1100,
 309					    2116, 4156, 8244 };
 310
 311static int ina226_set_int_time_vbus(struct ina2xx_chip_info *chip,
 312				    unsigned int val_us, unsigned int *config)
 313{
 314	int bits;
 315
 316	if (val_us > 8244 || val_us < 140)
 317		return -EINVAL;
 318
 319	bits = find_closest(val_us, ina226_conv_time_tab,
 320			    ARRAY_SIZE(ina226_conv_time_tab));
 321
 322	chip->int_time_vbus = ina226_conv_time_tab[bits];
 323
 324	*config &= ~INA226_ITB_MASK;
 325	*config |= INA226_SHIFT_ITB(bits) & INA226_ITB_MASK;
 326
 327	return 0;
 328}
 329
 330static int ina226_set_int_time_vshunt(struct ina2xx_chip_info *chip,
 331				      unsigned int val_us, unsigned int *config)
 332{
 333	int bits;
 334
 335	if (val_us > 8244 || val_us < 140)
 336		return -EINVAL;
 337
 338	bits = find_closest(val_us, ina226_conv_time_tab,
 339			    ARRAY_SIZE(ina226_conv_time_tab));
 340
 341	chip->int_time_vshunt = ina226_conv_time_tab[bits];
 342
 343	*config &= ~INA226_ITS_MASK;
 344	*config |= INA226_SHIFT_ITS(bits) & INA226_ITS_MASK;
 345
 346	return 0;
 347}
 348
 349/* Conversion times in uS. */
 350static const int ina219_conv_time_tab_subsample[] = { 84, 148, 276, 532 };
 351static const int ina219_conv_time_tab_average[] = { 532, 1060, 2130, 4260,
 352						    8510, 17020, 34050, 68100};
 353
 354static int ina219_lookup_int_time(unsigned int *val_us, int *bits)
 355{
 356	if (*val_us > 68100 || *val_us < 84)
 357		return -EINVAL;
 358
 359	if (*val_us <= 532) {
 360		*bits = find_closest(*val_us, ina219_conv_time_tab_subsample,
 361				    ARRAY_SIZE(ina219_conv_time_tab_subsample));
 362		*val_us = ina219_conv_time_tab_subsample[*bits];
 363	} else {
 364		*bits = find_closest(*val_us, ina219_conv_time_tab_average,
 365				    ARRAY_SIZE(ina219_conv_time_tab_average));
 366		*val_us = ina219_conv_time_tab_average[*bits];
 367		*bits |= 0x8;
 368	}
 369
 370	return 0;
 371}
 372
 373static int ina219_set_int_time_vbus(struct ina2xx_chip_info *chip,
 374				    unsigned int val_us, unsigned int *config)
 375{
 376	int bits, ret;
 377	unsigned int val_us_best = val_us;
 378
 379	ret = ina219_lookup_int_time(&val_us_best, &bits);
 380	if (ret)
 381		return ret;
 382
 383	chip->int_time_vbus = val_us_best;
 384
 385	*config &= ~INA219_ITB_MASK;
 386	*config |= INA219_SHIFT_ITB(bits) & INA219_ITB_MASK;
 387
 388	return 0;
 389}
 390
 391static int ina219_set_int_time_vshunt(struct ina2xx_chip_info *chip,
 392				      unsigned int val_us, unsigned int *config)
 393{
 394	int bits, ret;
 395	unsigned int val_us_best = val_us;
 396
 397	ret = ina219_lookup_int_time(&val_us_best, &bits);
 398	if (ret)
 399		return ret;
 400
 401	chip->int_time_vshunt = val_us_best;
 402
 403	*config &= ~INA219_ITS_MASK;
 404	*config |= INA219_SHIFT_ITS(bits) & INA219_ITS_MASK;
 405
 406	return 0;
 407}
 408
 409static const int ina219_vbus_range_tab[] = { 1, 2 };
 410static int ina219_set_vbus_range_denom(struct ina2xx_chip_info *chip,
 411				       unsigned int range,
 412				       unsigned int *config)
 413{
 414	if (range == 1)
 415		chip->range_vbus = 32;
 416	else if (range == 2)
 417		chip->range_vbus = 16;
 418	else
 419		return -EINVAL;
 420
 421	*config &= ~INA219_BRNG_MASK;
 422	*config |= INA219_SHIFT_BRNG(range == 1 ? 1 : 0) & INA219_BRNG_MASK;
 423
 424	return 0;
 425}
 426
 427static const int ina219_vshunt_gain_tab[] = { 125, 250, 500, 1000 };
 428static const int ina219_vshunt_gain_frac[] = {
 429	125, 1000, 250, 1000, 500, 1000, 1000, 1000 };
 430
 431static int ina219_set_vshunt_pga_gain(struct ina2xx_chip_info *chip,
 432				      unsigned int gain,
 433				      unsigned int *config)
 434{
 435	int bits;
 436
 437	if (gain < 125 || gain > 1000)
 438		return -EINVAL;
 439
 440	bits = find_closest(gain, ina219_vshunt_gain_tab,
 441			    ARRAY_SIZE(ina219_vshunt_gain_tab));
 442
 443	chip->pga_gain_vshunt = ina219_vshunt_gain_tab[bits];
 444	bits = 3 - bits;
 445
 446	*config &= ~INA219_PGA_MASK;
 447	*config |= INA219_SHIFT_PGA(bits) & INA219_PGA_MASK;
 448
 449	return 0;
 450}
 451
 452static int ina2xx_read_avail(struct iio_dev *indio_dev,
 453			     struct iio_chan_spec const *chan,
 454			     const int **vals, int *type, int *length,
 455			     long mask)
 456{
 457	switch (mask) {
 458	case IIO_CHAN_INFO_HARDWAREGAIN:
 459		switch (chan->address) {
 460		case INA2XX_SHUNT_VOLTAGE:
 461			*type = IIO_VAL_FRACTIONAL;
 462			*length = sizeof(ina219_vshunt_gain_frac) / sizeof(int);
 463			*vals = ina219_vshunt_gain_frac;
 464			return IIO_AVAIL_LIST;
 465
 466		case INA2XX_BUS_VOLTAGE:
 467			*type = IIO_VAL_INT;
 468			*length = sizeof(ina219_vbus_range_tab) / sizeof(int);
 469			*vals = ina219_vbus_range_tab;
 470			return IIO_AVAIL_LIST;
 471		}
 472	}
 473
 474	return -EINVAL;
 475}
 476
 477static int ina2xx_write_raw(struct iio_dev *indio_dev,
 478			    struct iio_chan_spec const *chan,
 479			    int val, int val2, long mask)
 480{
 481	struct ina2xx_chip_info *chip = iio_priv(indio_dev);
 482	unsigned int config, tmp;
 483	int ret;
 484
 485	if (iio_buffer_enabled(indio_dev))
 486		return -EBUSY;
 487
 488	mutex_lock(&chip->state_lock);
 489
 490	ret = regmap_read(chip->regmap, INA2XX_CONFIG, &config);
 491	if (ret)
 492		goto err;
 493
 494	tmp = config;
 495
 496	switch (mask) {
 497	case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
 498		ret = ina226_set_average(chip, val, &tmp);
 499		break;
 500
 501	case IIO_CHAN_INFO_INT_TIME:
 502		if (chip->config->chip_id == ina226) {
 503			if (chan->address == INA2XX_SHUNT_VOLTAGE)
 504				ret = ina226_set_int_time_vshunt(chip, val2,
 505								 &tmp);
 506			else
 507				ret = ina226_set_int_time_vbus(chip, val2,
 508							       &tmp);
 509		} else {
 510			if (chan->address == INA2XX_SHUNT_VOLTAGE)
 511				ret = ina219_set_int_time_vshunt(chip, val2,
 512								 &tmp);
 513			else
 514				ret = ina219_set_int_time_vbus(chip, val2,
 515							       &tmp);
 516		}
 517		break;
 518
 519	case IIO_CHAN_INFO_HARDWAREGAIN:
 520		if (chan->address == INA2XX_SHUNT_VOLTAGE)
 521			ret = ina219_set_vshunt_pga_gain(chip, val * 1000 +
 522							 val2 / 1000, &tmp);
 523		else
 524			ret = ina219_set_vbus_range_denom(chip, val, &tmp);
 525		break;
 526
 527	default:
 528		ret = -EINVAL;
 529	}
 530
 531	if (!ret && (tmp != config))
 532		ret = regmap_write(chip->regmap, INA2XX_CONFIG, tmp);
 533err:
 534	mutex_unlock(&chip->state_lock);
 535
 536	return ret;
 537}
 538
 539static ssize_t ina2xx_allow_async_readout_show(struct device *dev,
 540					   struct device_attribute *attr,
 541					   char *buf)
 542{
 543	struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
 544
 545	return sysfs_emit(buf, "%d\n", chip->allow_async_readout);
 546}
 547
 548static ssize_t ina2xx_allow_async_readout_store(struct device *dev,
 549				struct device_attribute *attr,
 550				const char *buf, size_t len)
 551{
 552	struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
 553	bool val;
 554	int ret;
 555
 556	ret = kstrtobool(buf, &val);
 557	if (ret)
 558		return ret;
 559
 560	chip->allow_async_readout = val;
 561
 562	return len;
 563}
 564
 565/*
 566 * Calibration register is set to the best value, which eliminates
 567 * truncation errors on calculating current register in hardware.
 568 * According to datasheet (INA 226: eq. 3, INA219: eq. 4) the best values
 569 * are 2048 for ina226 and 4096 for ina219. They are hardcoded as
 570 * calibration_value.
 571 */
 572static int ina2xx_set_calibration(struct ina2xx_chip_info *chip)
 573{
 574	return regmap_write(chip->regmap, INA2XX_CALIBRATION,
 575			    chip->config->calibration_value);
 576}
 577
 578static int set_shunt_resistor(struct ina2xx_chip_info *chip, unsigned int val)
 579{
 580	if (val == 0 || val > INT_MAX)
 581		return -EINVAL;
 582
 583	chip->shunt_resistor_uohm = val;
 584
 585	return 0;
 586}
 587
 588static ssize_t ina2xx_shunt_resistor_show(struct device *dev,
 589					  struct device_attribute *attr,
 590					  char *buf)
 591{
 592	struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
 593	int vals[2] = { chip->shunt_resistor_uohm, 1000000 };
 594
 595	return iio_format_value(buf, IIO_VAL_FRACTIONAL, 1, vals);
 596}
 597
 598static ssize_t ina2xx_shunt_resistor_store(struct device *dev,
 599					   struct device_attribute *attr,
 600					   const char *buf, size_t len)
 601{
 602	struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
 603	int val, val_fract, ret;
 604
 605	ret = iio_str_to_fixpoint(buf, 100000, &val, &val_fract);
 606	if (ret)
 607		return ret;
 608
 609	ret = set_shunt_resistor(chip, val * 1000000 + val_fract);
 610	if (ret)
 611		return ret;
 612
 613	return len;
 614}
 615
 616#define INA219_CHAN(_type, _index, _address) { \
 617	.type = (_type), \
 618	.address = (_address), \
 619	.indexed = 1, \
 620	.channel = (_index), \
 621	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
 622			      BIT(IIO_CHAN_INFO_SCALE), \
 623	.info_mask_shared_by_dir = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
 624	.scan_index = (_index), \
 625	.scan_type = { \
 626		.sign = 'u', \
 627		.realbits = 16, \
 628		.storagebits = 16, \
 629		.endianness = IIO_CPU, \
 630	} \
 631}
 632
 633#define INA226_CHAN(_type, _index, _address) { \
 634	.type = (_type), \
 635	.address = (_address), \
 636	.indexed = 1, \
 637	.channel = (_index), \
 638	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
 639			      BIT(IIO_CHAN_INFO_SCALE), \
 640	.info_mask_shared_by_dir = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
 641				   BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
 642	.scan_index = (_index), \
 643	.scan_type = { \
 644		.sign = 'u', \
 645		.realbits = 16, \
 646		.storagebits = 16, \
 647		.endianness = IIO_CPU, \
 648	} \
 649}
 650
 651/*
 652 * Sampling Freq is a consequence of the integration times of
 653 * the Voltage channels.
 654 */
 655#define INA219_CHAN_VOLTAGE(_index, _address, _shift) { \
 656	.type = IIO_VOLTAGE, \
 657	.address = (_address), \
 658	.indexed = 1, \
 659	.channel = (_index), \
 660	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
 661			      BIT(IIO_CHAN_INFO_SCALE) | \
 662			      BIT(IIO_CHAN_INFO_INT_TIME) | \
 663			      BIT(IIO_CHAN_INFO_HARDWAREGAIN), \
 664	.info_mask_separate_available = \
 665			      BIT(IIO_CHAN_INFO_HARDWAREGAIN), \
 666	.info_mask_shared_by_dir = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
 667	.scan_index = (_index), \
 668	.scan_type = { \
 669		.sign = 'u', \
 670		.shift = _shift, \
 671		.realbits = 16 - _shift, \
 672		.storagebits = 16, \
 673		.endianness = IIO_LE, \
 674	} \
 675}
 676
 677#define INA226_CHAN_VOLTAGE(_index, _address) { \
 678	.type = IIO_VOLTAGE, \
 679	.address = (_address), \
 680	.indexed = 1, \
 681	.channel = (_index), \
 682	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
 683			      BIT(IIO_CHAN_INFO_SCALE) | \
 684			      BIT(IIO_CHAN_INFO_INT_TIME), \
 685	.info_mask_shared_by_dir = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
 686				   BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
 687	.scan_index = (_index), \
 688	.scan_type = { \
 689		.sign = 'u', \
 690		.realbits = 16, \
 691		.storagebits = 16, \
 692		.endianness = IIO_LE, \
 693	} \
 694}
 695
 696
 697static const struct iio_chan_spec ina226_channels[] = {
 698	INA226_CHAN_VOLTAGE(0, INA2XX_SHUNT_VOLTAGE),
 699	INA226_CHAN_VOLTAGE(1, INA2XX_BUS_VOLTAGE),
 700	INA226_CHAN(IIO_POWER, 2, INA2XX_POWER),
 701	INA226_CHAN(IIO_CURRENT, 3, INA2XX_CURRENT),
 702	IIO_CHAN_SOFT_TIMESTAMP(4),
 703};
 704
 705static const struct iio_chan_spec ina219_channels[] = {
 706	INA219_CHAN_VOLTAGE(0, INA2XX_SHUNT_VOLTAGE, 0),
 707	INA219_CHAN_VOLTAGE(1, INA2XX_BUS_VOLTAGE, INA219_BUS_VOLTAGE_SHIFT),
 708	INA219_CHAN(IIO_POWER, 2, INA2XX_POWER),
 709	INA219_CHAN(IIO_CURRENT, 3, INA2XX_CURRENT),
 710	IIO_CHAN_SOFT_TIMESTAMP(4),
 711};
 712
 713static int ina2xx_conversion_ready(struct iio_dev *indio_dev)
 714{
 715	struct ina2xx_chip_info *chip = iio_priv(indio_dev);
 716	int ret;
 717	unsigned int alert;
 718
 719	/*
 720	 * Because the timer thread and the chip conversion clock
 721	 * are asynchronous, the period difference will eventually
 722	 * result in reading V[k-1] again, or skip V[k] at time Tk.
 723	 * In order to resync the timer with the conversion process
 724	 * we check the ConVersionReadyFlag.
 725	 * On hardware that supports using the ALERT pin to toggle a
 726	 * GPIO a triggered buffer could be used instead.
 727	 * For now, we do an extra read of the MASK_ENABLE register (INA226)
 728	 * resp. the BUS_VOLTAGE register (INA219).
 729	 */
 730	if (chip->config->chip_id == ina226) {
 731		ret = regmap_read(chip->regmap,
 732				  INA226_MASK_ENABLE, &alert);
 733		alert &= INA226_CVRF;
 734	} else {
 735		ret = regmap_read(chip->regmap,
 736				  INA2XX_BUS_VOLTAGE, &alert);
 737		alert &= INA219_CNVR;
 738	}
 739
 740	if (ret < 0)
 741		return ret;
 742
 743	return !!alert;
 744}
 745
 746static int ina2xx_work_buffer(struct iio_dev *indio_dev)
 747{
 748	struct ina2xx_chip_info *chip = iio_priv(indio_dev);
 749	int bit, ret, i = 0;
 750	s64 time;
 751
 752	time = iio_get_time_ns(indio_dev);
 753
 754	/*
 755	 * Single register reads: bulk_read will not work with ina226/219
 756	 * as there is no auto-increment of the register pointer.
 757	 */
 758	iio_for_each_active_channel(indio_dev, bit) {
 759		unsigned int val;
 760
 761		ret = regmap_read(chip->regmap,
 762				  INA2XX_SHUNT_VOLTAGE + bit, &val);
 763		if (ret < 0)
 764			return ret;
 765
 766		chip->scan.chan[i++] = val;
 767	}
 768
 769	iio_push_to_buffers_with_ts(indio_dev, &chip->scan, sizeof(chip->scan), time);
 770
 771	return 0;
 772};
 773
 774static int ina2xx_capture_thread(void *data)
 775{
 776	struct iio_dev *indio_dev = data;
 777	struct ina2xx_chip_info *chip = iio_priv(indio_dev);
 778	int sampling_us = SAMPLING_PERIOD(chip);
 779	int ret;
 780	struct timespec64 next, now, delta;
 781	s64 delay_us;
 782
 783	/*
 784	 * Poll a bit faster than the chip internal Fs, in case
 785	 * we wish to sync with the conversion ready flag.
 786	 */
 787	if (!chip->allow_async_readout)
 788		sampling_us -= 200;
 789
 790	ktime_get_ts64(&next);
 791
 792	do {
 793		while (!chip->allow_async_readout) {
 794			ret = ina2xx_conversion_ready(indio_dev);
 795			if (ret < 0)
 796				return ret;
 797
 798			/*
 799			 * If the conversion was not yet finished,
 800			 * reset the reference timestamp.
 801			 */
 802			if (ret == 0)
 803				ktime_get_ts64(&next);
 804			else
 805				break;
 806		}
 807
 808		ret = ina2xx_work_buffer(indio_dev);
 809		if (ret < 0)
 810			return ret;
 811
 812		ktime_get_ts64(&now);
 813
 814		/*
 815		 * Advance the timestamp for the next poll by one sampling
 816		 * interval, and sleep for the remainder (next - now)
 817		 * In case "next" has already passed, the interval is added
 818		 * multiple times, i.e. samples are dropped.
 819		 */
 820		do {
 821			timespec64_add_ns(&next, 1000 * sampling_us);
 822			delta = timespec64_sub(next, now);
 823			delay_us = div_s64(timespec64_to_ns(&delta), 1000);
 824		} while (delay_us <= 0);
 825
 826		usleep_range(delay_us, (delay_us * 3) >> 1);
 827
 828	} while (!kthread_should_stop());
 829
 830	return 0;
 831}
 832
 833static int ina2xx_buffer_enable(struct iio_dev *indio_dev)
 834{
 835	struct ina2xx_chip_info *chip = iio_priv(indio_dev);
 836	unsigned int sampling_us = SAMPLING_PERIOD(chip);
 837	struct task_struct *task;
 838
 839	dev_dbg(&indio_dev->dev, "Enabling buffer w/ scan_mask %02x, freq = %d, avg =%u\n",
 840		(unsigned int)(*indio_dev->active_scan_mask),
 841		1000000 / sampling_us, chip->avg);
 842
 843	dev_dbg(&indio_dev->dev, "Expected work period: %u us\n", sampling_us);
 844	dev_dbg(&indio_dev->dev, "Async readout mode: %d\n",
 845		chip->allow_async_readout);
 846
 847	task = kthread_run(ina2xx_capture_thread, (void *)indio_dev,
 848			   "%s:%d-%uus", indio_dev->name,
 849			   iio_device_id(indio_dev),
 850			   sampling_us);
 851	if (IS_ERR(task))
 852		return PTR_ERR(task);
 853
 854	chip->task = task;
 855
 856	return 0;
 857}
 858
 859static int ina2xx_buffer_disable(struct iio_dev *indio_dev)
 860{
 861	struct ina2xx_chip_info *chip = iio_priv(indio_dev);
 862
 863	if (chip->task) {
 864		kthread_stop(chip->task);
 865		chip->task = NULL;
 866	}
 867
 868	return 0;
 869}
 870
 871static const struct iio_buffer_setup_ops ina2xx_setup_ops = {
 872	.postenable = &ina2xx_buffer_enable,
 873	.predisable = &ina2xx_buffer_disable,
 874};
 875
 876static int ina2xx_debug_reg(struct iio_dev *indio_dev,
 877			    unsigned reg, unsigned writeval, unsigned *readval)
 878{
 879	struct ina2xx_chip_info *chip = iio_priv(indio_dev);
 880
 881	if (!readval)
 882		return regmap_write(chip->regmap, reg, writeval);
 883
 884	return regmap_read(chip->regmap, reg, readval);
 885}
 886
 887/* Possible integration times for vshunt and vbus */
 888static IIO_CONST_ATTR_NAMED(ina219_integration_time_available,
 889			    integration_time_available,
 890			    "0.000084 0.000148 0.000276 0.000532 0.001060 0.002130 0.004260 0.008510 0.017020 0.034050 0.068100");
 891
 892static IIO_CONST_ATTR_NAMED(ina226_integration_time_available,
 893			    integration_time_available,
 894			    "0.000140 0.000204 0.000332 0.000588 0.001100 0.002116 0.004156 0.008244");
 895
 896static IIO_DEVICE_ATTR(in_allow_async_readout, S_IRUGO | S_IWUSR,
 897		       ina2xx_allow_async_readout_show,
 898		       ina2xx_allow_async_readout_store, 0);
 899
 900static IIO_DEVICE_ATTR(in_shunt_resistor, S_IRUGO | S_IWUSR,
 901		       ina2xx_shunt_resistor_show,
 902		       ina2xx_shunt_resistor_store, 0);
 903
 904static struct attribute *ina219_attributes[] = {
 905	&iio_dev_attr_in_allow_async_readout.dev_attr.attr,
 906	&iio_const_attr_ina219_integration_time_available.dev_attr.attr,
 907	&iio_dev_attr_in_shunt_resistor.dev_attr.attr,
 908	NULL,
 909};
 910
 911static struct attribute *ina226_attributes[] = {
 912	&iio_dev_attr_in_allow_async_readout.dev_attr.attr,
 913	&iio_const_attr_ina226_integration_time_available.dev_attr.attr,
 914	&iio_dev_attr_in_shunt_resistor.dev_attr.attr,
 915	NULL,
 916};
 917
 918static const struct attribute_group ina219_attribute_group = {
 919	.attrs = ina219_attributes,
 920};
 921
 922static const struct attribute_group ina226_attribute_group = {
 923	.attrs = ina226_attributes,
 924};
 925
 926static const struct iio_info ina219_info = {
 927	.attrs = &ina219_attribute_group,
 928	.read_raw = ina2xx_read_raw,
 929	.read_avail = ina2xx_read_avail,
 930	.write_raw = ina2xx_write_raw,
 931	.debugfs_reg_access = ina2xx_debug_reg,
 932};
 933
 934static const struct iio_info ina226_info = {
 935	.attrs = &ina226_attribute_group,
 936	.read_raw = ina2xx_read_raw,
 937	.write_raw = ina2xx_write_raw,
 938	.debugfs_reg_access = ina2xx_debug_reg,
 939};
 940
 941/* Initialize the configuration and calibration registers. */
 942static int ina2xx_init(struct ina2xx_chip_info *chip, unsigned int config)
 943{
 944	int ret = regmap_write(chip->regmap, INA2XX_CONFIG, config);
 945	if (ret)
 946		return ret;
 947
 948	return ina2xx_set_calibration(chip);
 949}
 950
 951static int ina2xx_probe(struct i2c_client *client)
 952{
 953	const struct i2c_device_id *id = i2c_client_get_device_id(client);
 954	struct ina2xx_chip_info *chip;
 955	struct iio_dev *indio_dev;
 956	unsigned int val;
 957	enum ina2xx_ids type;
 958	int ret;
 959
 960	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
 961	if (!indio_dev)
 962		return -ENOMEM;
 963
 964	chip = iio_priv(indio_dev);
 965
 966	/* This is only used for device removal purposes. */
 967	i2c_set_clientdata(client, indio_dev);
 968
 969	chip->regmap = devm_regmap_init_i2c(client, &ina2xx_regmap_config);
 970	if (IS_ERR(chip->regmap)) {
 971		dev_err(&client->dev, "failed to allocate register map\n");
 972		return PTR_ERR(chip->regmap);
 973	}
 974
 975	if (client->dev.of_node)
 976		type = (uintptr_t)of_device_get_match_data(&client->dev);
 977	else
 978		type = id->driver_data;
 979	chip->config = &ina2xx_config[type];
 980
 981	mutex_init(&chip->state_lock);
 982
 983	if (of_property_read_u32(client->dev.of_node,
 984				 "shunt-resistor", &val) < 0) {
 985		struct ina2xx_platform_data *pdata =
 986		    dev_get_platdata(&client->dev);
 987
 988		if (pdata)
 989			val = pdata->shunt_uohms;
 990		else
 991			val = INA2XX_RSHUNT_DEFAULT;
 992	}
 993
 994	ret = set_shunt_resistor(chip, val);
 995	if (ret)
 996		return ret;
 997
 998	/* Patch the current config register with default. */
 999	val = chip->config->config_default;
1000
1001	if (type == ina226) {
1002		ina226_set_average(chip, INA226_DEFAULT_AVG, &val);
1003		ina226_set_int_time_vbus(chip, INA226_DEFAULT_IT, &val);
1004		ina226_set_int_time_vshunt(chip, INA226_DEFAULT_IT, &val);
1005	} else {
1006		chip->avg = 1;
1007		ina219_set_int_time_vbus(chip, INA219_DEFAULT_IT, &val);
1008		ina219_set_int_time_vshunt(chip, INA219_DEFAULT_IT, &val);
1009		ina219_set_vbus_range_denom(chip, INA219_DEFAULT_BRNG, &val);
1010		ina219_set_vshunt_pga_gain(chip, INA219_DEFAULT_PGA, &val);
1011	}
1012
1013	ret = ina2xx_init(chip, val);
1014	if (ret) {
1015		dev_err(&client->dev, "error configuring the device\n");
1016		return ret;
1017	}
1018
1019	indio_dev->modes = INDIO_DIRECT_MODE;
1020	if (type == ina226) {
1021		indio_dev->channels = ina226_channels;
1022		indio_dev->num_channels = ARRAY_SIZE(ina226_channels);
1023		indio_dev->info = &ina226_info;
1024	} else {
1025		indio_dev->channels = ina219_channels;
1026		indio_dev->num_channels = ARRAY_SIZE(ina219_channels);
1027		indio_dev->info = &ina219_info;
1028	}
1029	indio_dev->name = id ? id->name : chip->config->name;
1030
1031	ret = devm_iio_kfifo_buffer_setup(&client->dev, indio_dev,
1032					  &ina2xx_setup_ops);
1033	if (ret)
1034		return ret;
1035
1036	return iio_device_register(indio_dev);
1037}
1038
1039static void ina2xx_remove(struct i2c_client *client)
1040{
1041	struct iio_dev *indio_dev = i2c_get_clientdata(client);
1042	struct ina2xx_chip_info *chip = iio_priv(indio_dev);
1043	int ret;
1044
1045	iio_device_unregister(indio_dev);
1046
1047	/* Powerdown */
1048	ret = regmap_clear_bits(chip->regmap, INA2XX_CONFIG, INA2XX_MODE_MASK);
1049	if (ret)
1050		dev_warn(&client->dev, "Failed to power down device (%pe)\n",
1051			 ERR_PTR(ret));
1052}
1053
1054static const struct i2c_device_id ina2xx_id[] = {
1055	{ "ina219", ina219 },
1056	{ "ina220", ina219 },
1057	{ "ina226", ina226 },
1058	{ "ina230", ina226 },
1059	{ "ina231", ina226 },
1060	{ }
1061};
1062MODULE_DEVICE_TABLE(i2c, ina2xx_id);
1063
1064static const struct of_device_id ina2xx_of_match[] = {
1065	{
1066		.compatible = "ti,ina219",
1067		.data = (void *)ina219
1068	},
1069	{
1070		.compatible = "ti,ina220",
1071		.data = (void *)ina219
1072	},
1073	{
1074		.compatible = "ti,ina226",
1075		.data = (void *)ina226
1076	},
1077	{
1078		.compatible = "ti,ina230",
1079		.data = (void *)ina226
1080	},
1081	{
1082		.compatible = "ti,ina231",
1083		.data = (void *)ina226
1084	},
1085	{ }
1086};
1087MODULE_DEVICE_TABLE(of, ina2xx_of_match);
1088
1089static struct i2c_driver ina2xx_driver = {
1090	.driver = {
1091		   .name = KBUILD_MODNAME,
1092		   .of_match_table = ina2xx_of_match,
1093	},
1094	.probe = ina2xx_probe,
1095	.remove = ina2xx_remove,
1096	.id_table = ina2xx_id,
1097};
1098module_i2c_driver(ina2xx_driver);
1099
1100MODULE_AUTHOR("Marc Titinger <marc.titinger@baylibre.com>");
1101MODULE_DESCRIPTION("Texas Instruments INA2XX ADC driver");
1102MODULE_LICENSE("GPL v2");