ad7791.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * AD7787/AD7788/AD7789/AD7790/AD7791 SPI ADC driver
  4 *
  5 * Copyright 2012 Analog Devices Inc.
  6 *  Author: Lars-Peter Clausen <lars@metafoo.de>
  7 */
  8
  9#include <linux/interrupt.h>
 10#include <linux/device.h>
 11#include <linux/kernel.h>
 12#include <linux/slab.h>
 13#include <linux/sysfs.h>
 14#include <linux/spi/spi.h>
 15#include <linux/regulator/consumer.h>
 16#include <linux/err.h>
 17#include <linux/sched.h>
 18#include <linux/delay.h>
 19#include <linux/module.h>
 20
 21#include <linux/iio/iio.h>
 22#include <linux/iio/sysfs.h>
 23#include <linux/iio/buffer.h>
 24#include <linux/iio/trigger.h>
 25#include <linux/iio/trigger_consumer.h>
 26#include <linux/iio/triggered_buffer.h>
 27#include <linux/iio/adc/ad_sigma_delta.h>
 28
 29#include <linux/platform_data/ad7791.h>
 30
 31#define AD7791_REG_COMM			0x0 /* For writes */
 32#define AD7791_REG_STATUS		0x0 /* For reads */
 33#define AD7791_REG_MODE			0x1
 34#define AD7791_REG_FILTER		0x2
 35#define AD7791_REG_DATA			0x3
 36
 37#define AD7791_MODE_CONTINUOUS		0x00
 38#define AD7791_MODE_SINGLE		0x02
 39#define AD7791_MODE_POWERDOWN		0x03
 40
 41#define AD7791_CH_AIN1P_AIN1N		0x00
 42#define AD7791_CH_AIN2			0x01
 43#define AD7791_CH_AIN1N_AIN1N		0x02
 44#define AD7791_CH_AVDD_MONITOR		0x03
 45
 46#define AD7791_FILTER_CLK_DIV_1		(0x0 << 4)
 47#define AD7791_FILTER_CLK_DIV_2		(0x1 << 4)
 48#define AD7791_FILTER_CLK_DIV_4		(0x2 << 4)
 49#define AD7791_FILTER_CLK_DIV_8		(0x3 << 4)
 50#define AD7791_FILTER_CLK_MASK		(0x3 << 4)
 51#define AD7791_FILTER_RATE_120		0x0
 52#define AD7791_FILTER_RATE_100		0x1
 53#define AD7791_FILTER_RATE_33_3		0x2
 54#define AD7791_FILTER_RATE_20		0x3
 55#define AD7791_FILTER_RATE_16_6		0x4
 56#define AD7791_FILTER_RATE_16_7		0x5
 57#define AD7791_FILTER_RATE_13_3		0x6
 58#define AD7791_FILTER_RATE_9_5		0x7
 59#define AD7791_FILTER_RATE_MASK		0x7
 60
 61#define AD7791_MODE_BUFFER		BIT(1)
 62#define AD7791_MODE_UNIPOLAR		BIT(2)
 63#define AD7791_MODE_BURNOUT		BIT(3)
 64#define AD7791_MODE_SEL_MASK		(0x3 << 6)
 65#define AD7791_MODE_SEL(x)		((x) << 6)
 66
 67#define __AD7991_CHANNEL(_si, _channel1, _channel2, _address, _bits, \
 68	_storagebits, _shift, _extend_name, _type, _mask_all) \
 69	{ \
 70		.type = (_type), \
 71		.differential = (_channel2 == -1 ? 0 : 1), \
 72		.indexed = 1, \
 73		.channel = (_channel1), \
 74		.channel2 = (_channel2), \
 75		.address = (_address), \
 76		.extend_name = (_extend_name), \
 77		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
 78			BIT(IIO_CHAN_INFO_OFFSET), \
 79		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
 80		.info_mask_shared_by_all = _mask_all, \
 81		.scan_index = (_si), \
 82		.scan_type = { \
 83			.sign = 'u', \
 84			.realbits = (_bits), \
 85			.storagebits = (_storagebits), \
 86			.shift = (_shift), \
 87			.endianness = IIO_BE, \
 88		}, \
 89	}
 90
 91#define AD7991_SHORTED_CHANNEL(_si, _channel, _address, _bits, \
 92	_storagebits, _shift) \
 93	__AD7991_CHANNEL(_si, _channel, _channel, _address, _bits, \
 94		_storagebits, _shift, "shorted", IIO_VOLTAGE, \
 95		BIT(IIO_CHAN_INFO_SAMP_FREQ))
 96
 97#define AD7991_CHANNEL(_si, _channel, _address, _bits, \
 98	_storagebits, _shift) \
 99	__AD7991_CHANNEL(_si, _channel, -1, _address, _bits, \
100		_storagebits, _shift, NULL, IIO_VOLTAGE, \
101		 BIT(IIO_CHAN_INFO_SAMP_FREQ))
102
103#define AD7991_DIFF_CHANNEL(_si, _channel1, _channel2, _address, _bits, \
104	_storagebits, _shift) \
105	__AD7991_CHANNEL(_si, _channel1, _channel2, _address, _bits, \
106		_storagebits, _shift, NULL, IIO_VOLTAGE, \
107		BIT(IIO_CHAN_INFO_SAMP_FREQ))
108
109#define AD7991_SUPPLY_CHANNEL(_si, _channel, _address, _bits, _storagebits, \
110	_shift) \
111	__AD7991_CHANNEL(_si, _channel, -1, _address, _bits, \
112		_storagebits, _shift, "supply", IIO_VOLTAGE, \
113		BIT(IIO_CHAN_INFO_SAMP_FREQ))
114
115#define DECLARE_AD7787_CHANNELS(name, bits, storagebits) \
116const struct iio_chan_spec name[] = { \
117	AD7991_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \
118		(bits), (storagebits), 0), \
119	AD7991_CHANNEL(1, 1, AD7791_CH_AIN2, (bits), (storagebits), 0), \
120	AD7991_SHORTED_CHANNEL(2, 0, AD7791_CH_AIN1N_AIN1N, \
121		(bits), (storagebits), 0), \
122	AD7991_SUPPLY_CHANNEL(3, 2, AD7791_CH_AVDD_MONITOR,  \
123		(bits), (storagebits), 0), \
124	IIO_CHAN_SOFT_TIMESTAMP(4), \
125}
126
127#define DECLARE_AD7791_CHANNELS(name, bits, storagebits) \
128const struct iio_chan_spec name[] = { \
129	AD7991_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \
130		(bits), (storagebits), 0), \
131	AD7991_SHORTED_CHANNEL(1, 0, AD7791_CH_AIN1N_AIN1N, \
132		(bits), (storagebits), 0), \
133	AD7991_SUPPLY_CHANNEL(2, 1, AD7791_CH_AVDD_MONITOR, \
134		(bits), (storagebits), 0), \
135	IIO_CHAN_SOFT_TIMESTAMP(3), \
136}
137
138static DECLARE_AD7787_CHANNELS(ad7787_channels, 24, 32);
139static DECLARE_AD7791_CHANNELS(ad7790_channels, 16, 16);
140static DECLARE_AD7791_CHANNELS(ad7791_channels, 24, 32);
141
142enum {
143	AD7787,
144	AD7788,
145	AD7789,
146	AD7790,
147	AD7791,
148};
149
150enum ad7791_chip_info_flags {
151	AD7791_FLAG_HAS_FILTER		= (1 << 0),
152	AD7791_FLAG_HAS_BUFFER		= (1 << 1),
153	AD7791_FLAG_HAS_UNIPOLAR	= (1 << 2),
154	AD7791_FLAG_HAS_BURNOUT		= (1 << 3),
155};
156
157struct ad7791_chip_info {
158	const struct iio_chan_spec *channels;
159	unsigned int num_channels;
160	enum ad7791_chip_info_flags flags;
161};
162
163static const struct ad7791_chip_info ad7791_chip_infos[] = {
164	[AD7787] = {
165		.channels = ad7787_channels,
166		.num_channels = ARRAY_SIZE(ad7787_channels),
167		.flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |
168			AD7791_FLAG_HAS_UNIPOLAR | AD7791_FLAG_HAS_BURNOUT,
169	},
170	[AD7788] = {
171		.channels = ad7790_channels,
172		.num_channels = ARRAY_SIZE(ad7790_channels),
173		.flags = AD7791_FLAG_HAS_UNIPOLAR,
174	},
175	[AD7789] = {
176		.channels = ad7791_channels,
177		.num_channels = ARRAY_SIZE(ad7791_channels),
178		.flags = AD7791_FLAG_HAS_UNIPOLAR,
179	},
180	[AD7790] = {
181		.channels = ad7790_channels,
182		.num_channels = ARRAY_SIZE(ad7790_channels),
183		.flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |
184			AD7791_FLAG_HAS_BURNOUT,
185	},
186	[AD7791] = {
187		.channels = ad7791_channels,
188		.num_channels = ARRAY_SIZE(ad7791_channels),
189		.flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |
190			AD7791_FLAG_HAS_UNIPOLAR | AD7791_FLAG_HAS_BURNOUT,
191	},
192};
193
194struct ad7791_state {
195	struct ad_sigma_delta sd;
196	uint8_t mode;
197	uint8_t filter;
198
199	struct regulator *reg;
200	const struct ad7791_chip_info *info;
201};
202
203static const int ad7791_sample_freq_avail[8][2] = {
204	[AD7791_FILTER_RATE_120] =  { 120, 0 },
205	[AD7791_FILTER_RATE_100] =  { 100, 0 },
206	[AD7791_FILTER_RATE_33_3] = { 33,  300000 },
207	[AD7791_FILTER_RATE_20] =   { 20,  0 },
208	[AD7791_FILTER_RATE_16_6] = { 16,  600000 },
209	[AD7791_FILTER_RATE_16_7] = { 16,  700000 },
210	[AD7791_FILTER_RATE_13_3] = { 13,  300000 },
211	[AD7791_FILTER_RATE_9_5] =  { 9,   500000 },
212};
213
214static struct ad7791_state *ad_sigma_delta_to_ad7791(struct ad_sigma_delta *sd)
215{
216	return container_of(sd, struct ad7791_state, sd);
217}
218
219static int ad7791_set_channel(struct ad_sigma_delta *sd, unsigned int channel)
220{
221	ad_sd_set_comm(sd, channel);
222
223	return 0;
224}
225
226static int ad7791_set_mode(struct ad_sigma_delta *sd,
227	enum ad_sigma_delta_mode mode)
228{
229	struct ad7791_state *st = ad_sigma_delta_to_ad7791(sd);
230
231	switch (mode) {
232	case AD_SD_MODE_CONTINUOUS:
233		mode = AD7791_MODE_CONTINUOUS;
234		break;
235	case AD_SD_MODE_SINGLE:
236		mode = AD7791_MODE_SINGLE;
237		break;
238	case AD_SD_MODE_IDLE:
239	case AD_SD_MODE_POWERDOWN:
240		mode = AD7791_MODE_POWERDOWN;
241		break;
242	}
243
244	st->mode &= ~AD7791_MODE_SEL_MASK;
245	st->mode |= AD7791_MODE_SEL(mode);
246
247	return ad_sd_write_reg(sd, AD7791_REG_MODE, sizeof(st->mode), st->mode);
248}
249
250static const struct ad_sigma_delta_info ad7791_sigma_delta_info = {
251	.set_channel = ad7791_set_channel,
252	.set_mode = ad7791_set_mode,
253	.has_registers = true,
254	.addr_shift = 4,
255	.read_mask = BIT(3),
256	.irq_flags = IRQF_TRIGGER_FALLING,
257	.num_resetclks = 32,
258};
259
260static int ad7791_read_raw(struct iio_dev *indio_dev,
261	const struct iio_chan_spec *chan, int *val, int *val2, long info)
262{
263	struct ad7791_state *st = iio_priv(indio_dev);
264	bool unipolar = !!(st->mode & AD7791_MODE_UNIPOLAR);
265	unsigned int rate;
266
267	switch (info) {
268	case IIO_CHAN_INFO_RAW:
269		return ad_sigma_delta_single_conversion(indio_dev, chan, val);
270	case IIO_CHAN_INFO_OFFSET:
271		/**
272		 * Unipolar: 0 to VREF
273		 * Bipolar -VREF to VREF
274		 **/
275		if (unipolar)
276			*val = 0;
277		else
278			*val = -(1 << (chan->scan_type.realbits - 1));
279		return IIO_VAL_INT;
280	case IIO_CHAN_INFO_SCALE:
281		/* The monitor channel uses an internal reference. */
282		if (chan->address == AD7791_CH_AVDD_MONITOR) {
283			/*
284			 * The signal is attenuated by a factor of 5 and
285			 * compared against a 1.17V internal reference.
286			 */
287			*val = 1170 * 5;
288		} else {
289			int voltage_uv;
290
291			voltage_uv = regulator_get_voltage(st->reg);
292			if (voltage_uv < 0)
293				return voltage_uv;
294
295			*val = voltage_uv / 1000;
296		}
297		if (unipolar)
298			*val2 = chan->scan_type.realbits;
299		else
300			*val2 = chan->scan_type.realbits - 1;
301
302		return IIO_VAL_FRACTIONAL_LOG2;
303	case IIO_CHAN_INFO_SAMP_FREQ:
304		rate = st->filter & AD7791_FILTER_RATE_MASK;
305		*val = ad7791_sample_freq_avail[rate][0];
306		*val2 = ad7791_sample_freq_avail[rate][1];
307		return IIO_VAL_INT_PLUS_MICRO;
308	}
309
310	return -EINVAL;
311}
312
313static int __ad7791_write_raw(struct iio_dev *indio_dev,
314	struct iio_chan_spec const *chan, int val, int val2, long mask)
315{
316	struct ad7791_state *st = iio_priv(indio_dev);
317	int i;
318
319	switch (mask) {
320	case IIO_CHAN_INFO_SAMP_FREQ:
321		for (i = 0; i < ARRAY_SIZE(ad7791_sample_freq_avail); i++) {
322			if (ad7791_sample_freq_avail[i][0] == val &&
323			    ad7791_sample_freq_avail[i][1] == val2)
324				break;
325		}
326
327		if (i == ARRAY_SIZE(ad7791_sample_freq_avail))
328			return -EINVAL;
329
330		st->filter &= ~AD7791_FILTER_RATE_MASK;
331		st->filter |= i;
332		ad_sd_write_reg(&st->sd, AD7791_REG_FILTER,
333				sizeof(st->filter),
334				st->filter);
335		return 0;
336	default:
337		return -EINVAL;
338	}
339}
340
341static int ad7791_write_raw(struct iio_dev *indio_dev,
342	struct iio_chan_spec const *chan, int val, int val2, long mask)
343{
344	int ret;
345
346	if (!iio_device_claim_direct(indio_dev))
347		return -EBUSY;
348
349	ret = __ad7791_write_raw(indio_dev, chan, val, val2, mask);
350
351	iio_device_release_direct(indio_dev);
352	return ret;
353}
354
355static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("120 100 33.3 20 16.7 16.6 13.3 9.5");
356
357static struct attribute *ad7791_attributes[] = {
358	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
359	NULL
360};
361
362static const struct attribute_group ad7791_attribute_group = {
363	.attrs = ad7791_attributes,
364};
365
366static const struct iio_info ad7791_info = {
367	.read_raw = &ad7791_read_raw,
368	.write_raw = &ad7791_write_raw,
369	.attrs = &ad7791_attribute_group,
370	.validate_trigger = ad_sd_validate_trigger,
371};
372
373static const struct iio_info ad7791_no_filter_info = {
374	.read_raw = &ad7791_read_raw,
375	.write_raw = &ad7791_write_raw,
376	.validate_trigger = ad_sd_validate_trigger,
377};
378
379static int ad7791_setup(struct ad7791_state *st,
380			const struct ad7791_platform_data *pdata)
381{
382	/* Set to poweron-reset default values */
383	st->mode = AD7791_MODE_BUFFER;
384	st->filter = AD7791_FILTER_RATE_16_6;
385
386	if (!pdata)
387		return 0;
388
389	if ((st->info->flags & AD7791_FLAG_HAS_BUFFER) && !pdata->buffered)
390		st->mode &= ~AD7791_MODE_BUFFER;
391
392	if ((st->info->flags & AD7791_FLAG_HAS_BURNOUT) &&
393		pdata->burnout_current)
394		st->mode |= AD7791_MODE_BURNOUT;
395
396	if ((st->info->flags & AD7791_FLAG_HAS_UNIPOLAR) && pdata->unipolar)
397		st->mode |= AD7791_MODE_UNIPOLAR;
398
399	return ad_sd_write_reg(&st->sd, AD7791_REG_MODE, sizeof(st->mode),
400		st->mode);
401}
402
403static void ad7791_reg_disable(void *reg)
404{
405	regulator_disable(reg);
406}
407
408static int ad7791_probe(struct spi_device *spi)
409{
410	const struct ad7791_platform_data *pdata = dev_get_platdata(&spi->dev);
411	struct iio_dev *indio_dev;
412	struct ad7791_state *st;
413	int ret;
414
415	if (!spi->irq) {
416		dev_err(&spi->dev, "Missing IRQ.\n");
417		return -ENXIO;
418	}
419
420	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
421	if (!indio_dev)
422		return -ENOMEM;
423
424	st = iio_priv(indio_dev);
425
426	st->reg = devm_regulator_get(&spi->dev, "refin");
427	if (IS_ERR(st->reg))
428		return PTR_ERR(st->reg);
429
430	ret = regulator_enable(st->reg);
431	if (ret)
432		return ret;
433
434	ret = devm_add_action_or_reset(&spi->dev, ad7791_reg_disable, st->reg);
435	if (ret)
436		return ret;
437
438	st->info = &ad7791_chip_infos[spi_get_device_id(spi)->driver_data];
439	ad_sd_init(&st->sd, indio_dev, spi, &ad7791_sigma_delta_info);
440
441	indio_dev->name = spi_get_device_id(spi)->name;
442	indio_dev->modes = INDIO_DIRECT_MODE;
443	indio_dev->channels = st->info->channels;
444	indio_dev->num_channels = st->info->num_channels;
445	if (st->info->flags & AD7791_FLAG_HAS_FILTER)
446		indio_dev->info = &ad7791_info;
447	else
448		indio_dev->info = &ad7791_no_filter_info;
449
450	ret = devm_ad_sd_setup_buffer_and_trigger(&spi->dev, indio_dev);
451	if (ret)
452		return ret;
453
454	ret = ad7791_setup(st, pdata);
455	if (ret)
456		return ret;
457
458	return devm_iio_device_register(&spi->dev, indio_dev);
459}
460
461static const struct spi_device_id ad7791_spi_ids[] = {
462	{ "ad7787", AD7787 },
463	{ "ad7788", AD7788 },
464	{ "ad7789", AD7789 },
465	{ "ad7790", AD7790 },
466	{ "ad7791", AD7791 },
467	{ }
468};
469MODULE_DEVICE_TABLE(spi, ad7791_spi_ids);
470
471static struct spi_driver ad7791_driver = {
472	.driver = {
473		.name	= "ad7791",
474	},
475	.probe		= ad7791_probe,
476	.id_table	= ad7791_spi_ids,
477};
478module_spi_driver(ad7791_driver);
479
480MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
481MODULE_DESCRIPTION("Analog Devices AD7787/AD7788/AD7789/AD7790/AD7791 ADC driver");
482MODULE_LICENSE("GPL v2");
483MODULE_IMPORT_NS("IIO_AD_SIGMA_DELTA");