ad7606.h

  1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * AD7606 ADC driver
  4 *
  5 * Copyright 2011 Analog Devices Inc.
  6 */
  7
  8#ifndef IIO_ADC_AD7606_H_
  9#define IIO_ADC_AD7606_H_
 10
 11#define AD760X_MAX_CHANNELS	16
 12
 13#define AD7616_CONFIGURATION_REGISTER	0x02
 14#define AD7616_OS_MASK			GENMASK(4, 2)
 15#define AD7616_BURST_MODE		BIT(6)
 16#define AD7616_SEQEN_MODE		BIT(5)
 17#define AD7616_RANGE_CH_A_ADDR_OFF	0x04
 18#define AD7616_RANGE_CH_B_ADDR_OFF	0x06
 19/*
 20 * Range of channels from a group are stored in 2 registers.
 21 * 0, 1, 2, 3 in a register followed by 4, 5, 6, 7 in second register.
 22 * For channels from second group(8-15) the order is the same, only with
 23 * an offset of 2 for register address.
 24 */
 25#define AD7616_RANGE_CH_ADDR(ch)	((ch) >> 2)
 26/* The range of the channel is stored in 2 bits */
 27#define AD7616_RANGE_CH_MSK(ch)		(0b11 << (((ch) & 0b11) * 2))
 28#define AD7616_RANGE_CH_MODE(ch, mode)	((mode) << ((((ch) & 0b11)) * 2))
 29
 30#define AD7606_CONFIGURATION_REGISTER	0x02
 31#define AD7606_SINGLE_DOUT		0x00
 32
 33/*
 34 * Range for AD7606B channels are stored in registers starting with address 0x3.
 35 * Each register stores range for 2 channels(4 bits per channel).
 36 */
 37#define AD7606_RANGE_CH_MSK(ch)		(GENMASK(3, 0) << (4 * ((ch) & 0x1)))
 38#define AD7606_RANGE_CH_MODE(ch, mode)	\
 39	((GENMASK(3, 0) & (mode)) << (4 * ((ch) & 0x1)))
 40#define AD7606_RANGE_CH_ADDR(ch)	(0x03 + ((ch) >> 1))
 41#define AD7606_OS_MODE			0x08
 42
 43#define AD7606_CALIB_GAIN(ch)		(0x09 + (ch))
 44#define AD7606_CALIB_GAIN_MASK		GENMASK(5, 0)
 45#define AD7606_CALIB_OFFSET(ch)		(0x11 + (ch))
 46#define AD7606_CALIB_PHASE(ch)		(0x19 + (ch))
 47
 48struct ad7606_state;
 49
 50typedef int (*ad7606_scale_setup_cb_t)(struct iio_dev *indio_dev,
 51				       struct iio_chan_spec *chan);
 52typedef int (*ad7606_sw_setup_cb_t)(struct iio_dev *indio_dev);
 53
 54/**
 55 * struct ad7606_chip_info - chip specific information
 56 * @max_samplerate:	maximum supported sample rate
 57 * @name:		device name
 58 * @bits:		data width in bits
 59 * @num_adc_channels:	the number of physical voltage inputs
 60 * @scale_setup_cb:	callback to setup the scales for each channel
 61 * @sw_setup_cb:	callback to setup the software mode if available.
 62 * @oversampling_avail:	pointer to the array which stores the available
 63 *			oversampling ratios.
 64 * @oversampling_num:	number of elements stored in oversampling_avail array
 65 * @os_req_reset:	some devices require a reset to update oversampling
 66 * @init_delay_ms:	required delay in milliseconds for initialization
 67 *			after a restart
 68 * @offload_storagebits: storage bits used by the offload hw implementation
 69 * @calib_gain_avail:   chip supports gain calibration
 70 * @calib_offset_avail: pointer to offset calibration range/limits array
 71 * @calib_phase_avail:  pointer to phase calibration range/limits array
 72 */
 73struct ad7606_chip_info {
 74	unsigned int			max_samplerate;
 75	const char			*name;
 76	unsigned int			bits;
 77	unsigned int			num_adc_channels;
 78	ad7606_scale_setup_cb_t		scale_setup_cb;
 79	ad7606_sw_setup_cb_t		sw_setup_cb;
 80	const unsigned int		*oversampling_avail;
 81	unsigned int			oversampling_num;
 82	bool				os_req_reset;
 83	unsigned long			init_delay_ms;
 84	u8				offload_storagebits;
 85	bool				calib_gain_avail;
 86	const int			*calib_offset_avail;
 87	const int			(*calib_phase_avail)[2];
 88};
 89
 90/**
 91 * struct ad7606_chan_info - channel configuration
 92 * @scale_avail:	pointer to the array which stores the available scales
 93 * @num_scales:		number of elements stored in the scale_avail array
 94 * @range:		voltage range selection, selects which scale to apply
 95 * @reg_offset:		offset for the register value, to be applied when
 96 *			writing the value of 'range' to the register value
 97 * @r_gain:		gain resistor value in ohms, to be set to match the
 98 *                      external r_filter value
 99 */
100struct ad7606_chan_info {
101#define AD760X_MAX_SCALES		16
102	const unsigned int		(*scale_avail)[2];
103	unsigned int			num_scales;
104	unsigned int			range;
105	unsigned int			reg_offset;
106	unsigned int			r_gain;
107};
108
109/**
110 * struct ad7606_state - driver instance specific data
111 * @dev:		pointer to kernel device
112 * @chip_info:		entry in the table of chips that describes this device
113 * @bops:		bus operations (SPI or parallel)
114 * @chan_info:		scale configuration for channels
115 * @oversampling:	oversampling selection
116 * @cnvst_pwm:		pointer to the PWM device connected to the cnvst pin
117 * @base_address:	address from where to read data in parallel operation
118 * @sw_mode_en:		software mode enabled
119 * @oversampling_avail:	pointer to the array which stores the available
120 *			oversampling ratios.
121 * @num_os_ratios:	number of elements stored in oversampling_avail array
122 * @back:		pointer to the iio_backend structure, if used
123 * @write_scale:	pointer to the function which writes the scale
124 * @write_os:		pointer to the function which writes the os
125 * @lock:		protect sensor state from concurrent accesses to GPIOs
126 * @gpio_convst:	GPIO descriptor for conversion start signal (CONVST)
127 * @gpio_reset:		GPIO descriptor for device hard-reset
128 * @gpio_range:		GPIO descriptor for range selection
129 * @gpio_standby:	GPIO descriptor for stand-by signal (STBY),
130 *			controls power-down mode of device
131 * @gpio_frstdata:	GPIO descriptor for reading from device when data
132 *			is being read on the first channel
133 * @gpio_os:		GPIO descriptors to control oversampling on the device
134 * @trig:		The IIO trigger associated with the device.
135 * @completion:		completion to indicate end of conversion
136 * @data:		buffer for reading data from the device
137 * @offload_en:		SPI offload enabled
138 * @bus_data:		bus-specific variables
139 * @d16:		be16 buffer for reading data from the device
140 */
141struct ad7606_state {
142	struct device			*dev;
143	const struct ad7606_chip_info	*chip_info;
144	const struct ad7606_bus_ops	*bops;
145	struct ad7606_chan_info		chan_info[AD760X_MAX_CHANNELS];
146	unsigned int			oversampling;
147	struct pwm_device		*cnvst_pwm;
148	void __iomem			*base_address;
149	bool				sw_mode_en;
150	const unsigned int		*oversampling_avail;
151	unsigned int			num_os_ratios;
152	struct iio_backend		*back;
153	int (*write_scale)(struct iio_dev *indio_dev, int ch, int val);
154	int (*write_os)(struct iio_dev *indio_dev, int val);
155
156	struct mutex			lock; /* protect sensor state */
157	struct gpio_desc		*gpio_convst;
158	struct gpio_desc		*gpio_reset;
159	struct gpio_desc		*gpio_range;
160	struct gpio_desc		*gpio_standby;
161	struct gpio_desc		*gpio_frstdata;
162	struct gpio_descs		*gpio_os;
163	struct iio_trigger		*trig;
164	struct completion		completion;
165
166	bool				offload_en;
167	void				*bus_data;
168
169	/*
170	 * DMA (thus cache coherency maintenance) may require the
171	 * transfer buffers to live in their own cache lines.
172	 * 16 * 16-bit samples for AD7616
173	 * 8 * 32-bit samples for AD7616C-18 (and similar)
174	 */
175	struct {
176		union {
177			u16 buf16[16];
178			u32 buf32[8];
179		};
180		aligned_s64 timestamp;
181	} data __aligned(IIO_DMA_MINALIGN);
182	__be16				d16[2];
183};
184
185/**
186 * struct ad7606_bus_ops - driver bus operations
187 * @iio_backend_config:	function pointer for configuring the iio_backend for
188 *			the compatibles that use it
189 * @read_block:		function pointer for reading blocks of data
190 * @sw_mode_config:	pointer to a function which configured the device
191 *			for software mode
192 * @offload_config:     function pointer for configuring offload support,
193 *			where any
194 * @reg_read:		function pointer for reading spi register
195 * @reg_write:		function pointer for writing spi register
196 * @update_scan_mode:	function pointer for handling the calls to iio_info's
197 *			update_scan mode when enabling/disabling channels.
198 * @rd_wr_cmd:		pointer to the function which calculates the spi address
199 */
200struct ad7606_bus_ops {
201	/* more methods added in future? */
202	int (*iio_backend_config)(struct device *dev, struct iio_dev *indio_dev);
203	int (*offload_config)(struct device *dev, struct iio_dev *indio_dev);
204	int (*read_block)(struct device *dev, int num, void *data);
205	int (*sw_mode_config)(struct iio_dev *indio_dev);
206	int (*reg_read)(struct ad7606_state *st, unsigned int addr);
207	int (*reg_write)(struct ad7606_state *st,
208				unsigned int addr,
209				unsigned int val);
210	int (*update_scan_mode)(struct iio_dev *indio_dev, const unsigned long *scan_mask);
211	u16 (*rd_wr_cmd)(int addr, char is_write_op);
212};
213
214/**
215 * struct ad7606_bus_info - aggregate ad7606_chip_info and ad7606_bus_ops
216 * @chip_info:		entry in the table of chips that describes this device
217 * @bops:		bus operations (SPI or parallel)
218 */
219struct ad7606_bus_info {
220	const struct ad7606_chip_info	*chip_info;
221	const struct ad7606_bus_ops	*bops;
222};
223
224int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
225		 const struct ad7606_chip_info *info,
226		 const struct ad7606_bus_ops *bops);
227
228int ad7606_reset(struct ad7606_state *st);
229int ad7606_pwm_set_swing(struct ad7606_state *st);
230int ad7606_pwm_set_low(struct ad7606_state *st);
231
232extern const struct ad7606_chip_info ad7605_4_info;
233extern const struct ad7606_chip_info ad7606_8_info;
234extern const struct ad7606_chip_info ad7606_6_info;
235extern const struct ad7606_chip_info ad7606_4_info;
236extern const struct ad7606_chip_info ad7606b_info;
237extern const struct ad7606_chip_info ad7606c_16_info;
238extern const struct ad7606_chip_info ad7606c_18_info;
239extern const struct ad7606_chip_info ad7607_info;
240extern const struct ad7606_chip_info ad7608_info;
241extern const struct ad7606_chip_info ad7609_info;
242extern const struct ad7606_chip_info ad7616_info;
243
244#ifdef CONFIG_PM_SLEEP
245extern const struct dev_pm_ops ad7606_pm_ops;
246#define AD7606_PM_OPS (&ad7606_pm_ops)
247#else
248#define AD7606_PM_OPS NULL
249#endif
250
251#endif /* IIO_ADC_AD7606_H_ */