ab8500-gpadc.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Copyright (C) ST-Ericsson SA 2010
   4 *
   5 * Author: Arun R Murthy <arun.murthy@stericsson.com>
   6 * Author: Daniel Willerud <daniel.willerud@stericsson.com>
   7 * Author: Johan Palsson <johan.palsson@stericsson.com>
   8 * Author: M'boumba Cedric Madianga
   9 * Author: Linus Walleij <linus.walleij@linaro.org>
  10 *
  11 * AB8500 General Purpose ADC driver. The AB8500 uses reference voltages:
  12 * VinVADC, and VADC relative to GND to do its job. It monitors main and backup
  13 * battery voltages, AC (mains) voltage, USB cable voltage, as well as voltages
  14 * representing the temperature of the chip die and battery, accessory
  15 * detection by resistance measurements using relative voltages and GSM burst
  16 * information.
  17 *
  18 * Some of the voltages are measured on external pins on the IC, such as
  19 * battery temperature or "ADC aux" 1 and 2. Other voltages are internal rails
  20 * from other parts of the ASIC such as main charger voltage, main and battery
  21 * backup voltage or USB VBUS voltage. For this reason drivers for other
  22 * parts of the system are required to obtain handles to the ADC to do work
  23 * for them and the IIO driver provides arbitration among these consumers.
  24 */
  25#include <linux/init.h>
  26#include <linux/bits.h>
  27#include <linux/iio/iio.h>
  28#include <linux/iio/sysfs.h>
  29#include <linux/device.h>
  30#include <linux/interrupt.h>
  31#include <linux/spinlock.h>
  32#include <linux/delay.h>
  33#include <linux/pm_runtime.h>
  34#include <linux/platform_device.h>
  35#include <linux/completion.h>
  36#include <linux/regulator/consumer.h>
  37#include <linux/random.h>
  38#include <linux/err.h>
  39#include <linux/slab.h>
  40#include <linux/mfd/abx500.h>
  41#include <linux/mfd/abx500/ab8500.h>
  42
  43/* GPADC register offsets and bit definitions */
  44
  45#define AB8500_GPADC_CTRL1_REG		0x00
  46/* GPADC control register 1 bits */
  47#define AB8500_GPADC_CTRL1_DISABLE		0x00
  48#define AB8500_GPADC_CTRL1_ENABLE		BIT(0)
  49#define AB8500_GPADC_CTRL1_TRIG_ENA		BIT(1)
  50#define AB8500_GPADC_CTRL1_START_SW_CONV	BIT(2)
  51#define AB8500_GPADC_CTRL1_BTEMP_PULL_UP	BIT(3)
  52/* 0 = use rising edge, 1 = use falling edge */
  53#define AB8500_GPADC_CTRL1_TRIG_EDGE		BIT(4)
  54/* 0 = use VTVOUT, 1 = use VRTC as pull-up supply for battery temp NTC */
  55#define AB8500_GPADC_CTRL1_PUPSUPSEL		BIT(5)
  56#define AB8500_GPADC_CTRL1_BUF_ENA		BIT(6)
  57#define AB8500_GPADC_CTRL1_ICHAR_ENA		BIT(7)
  58
  59#define AB8500_GPADC_CTRL2_REG		0x01
  60#define AB8500_GPADC_CTRL3_REG		0x02
  61/*
  62 * GPADC control register 2 and 3 bits
  63 * the bit layout is the same for SW and HW conversion set-up
  64 */
  65#define AB8500_GPADC_CTRL2_AVG_1		0x00
  66#define AB8500_GPADC_CTRL2_AVG_4		BIT(5)
  67#define AB8500_GPADC_CTRL2_AVG_8		BIT(6)
  68#define AB8500_GPADC_CTRL2_AVG_16		(BIT(5) | BIT(6))
  69
  70enum ab8500_gpadc_channel {
  71	AB8500_GPADC_CHAN_UNUSED = 0x00,
  72	AB8500_GPADC_CHAN_BAT_CTRL = 0x01,
  73	AB8500_GPADC_CHAN_BAT_TEMP = 0x02,
  74	/* This is not used on AB8505 */
  75	AB8500_GPADC_CHAN_MAIN_CHARGER = 0x03,
  76	AB8500_GPADC_CHAN_ACC_DET_1 = 0x04,
  77	AB8500_GPADC_CHAN_ACC_DET_2 = 0x05,
  78	AB8500_GPADC_CHAN_ADC_AUX_1 = 0x06,
  79	AB8500_GPADC_CHAN_ADC_AUX_2 = 0x07,
  80	AB8500_GPADC_CHAN_VBAT_A = 0x08,
  81	AB8500_GPADC_CHAN_VBUS = 0x09,
  82	AB8500_GPADC_CHAN_MAIN_CHARGER_CURRENT = 0x0a,
  83	AB8500_GPADC_CHAN_USB_CHARGER_CURRENT = 0x0b,
  84	AB8500_GPADC_CHAN_BACKUP_BAT = 0x0c,
  85	/* Only on AB8505 */
  86	AB8505_GPADC_CHAN_DIE_TEMP = 0x0d,
  87	AB8500_GPADC_CHAN_ID = 0x0e,
  88	AB8500_GPADC_CHAN_INTERNAL_TEST_1 = 0x0f,
  89	AB8500_GPADC_CHAN_INTERNAL_TEST_2 = 0x10,
  90	AB8500_GPADC_CHAN_INTERNAL_TEST_3 = 0x11,
  91	/* FIXME: Applicable to all ASIC variants? */
  92	AB8500_GPADC_CHAN_XTAL_TEMP = 0x12,
  93	AB8500_GPADC_CHAN_VBAT_TRUE_MEAS = 0x13,
  94	/* FIXME: Doesn't seem to work with pure AB8500 */
  95	AB8500_GPADC_CHAN_BAT_CTRL_AND_IBAT = 0x1c,
  96	AB8500_GPADC_CHAN_VBAT_MEAS_AND_IBAT = 0x1d,
  97	AB8500_GPADC_CHAN_VBAT_TRUE_MEAS_AND_IBAT = 0x1e,
  98	AB8500_GPADC_CHAN_BAT_TEMP_AND_IBAT = 0x1f,
  99	/*
 100	 * Virtual channel used only for ibat conversion to ampere.
 101	 * Battery current conversion (ibat) cannot be requested as a
 102	 * single conversion but it is always requested in combination
 103	 * with other input requests.
 104	 */
 105	AB8500_GPADC_CHAN_IBAT_VIRTUAL = 0xFF,
 106};
 107
 108#define AB8500_GPADC_AUTO_TIMER_REG	0x03
 109
 110#define AB8500_GPADC_STAT_REG		0x04
 111#define AB8500_GPADC_STAT_BUSY		BIT(0)
 112
 113#define AB8500_GPADC_MANDATAL_REG	0x05
 114#define AB8500_GPADC_MANDATAH_REG	0x06
 115#define AB8500_GPADC_AUTODATAL_REG	0x07
 116#define AB8500_GPADC_AUTODATAH_REG	0x08
 117#define AB8500_GPADC_MUX_CTRL_REG	0x09
 118#define AB8540_GPADC_MANDATA2L_REG	0x09
 119#define AB8540_GPADC_MANDATA2H_REG	0x0A
 120#define AB8540_GPADC_APEAAX_REG		0x10
 121#define AB8540_GPADC_APEAAT_REG		0x11
 122#define AB8540_GPADC_APEAAM_REG		0x12
 123#define AB8540_GPADC_APEAAH_REG		0x13
 124#define AB8540_GPADC_APEAAL_REG		0x14
 125
 126/*
 127 * OTP register offsets
 128 * Bank : 0x15
 129 */
 130#define AB8500_GPADC_CAL_1	0x0F
 131#define AB8500_GPADC_CAL_2	0x10
 132#define AB8500_GPADC_CAL_3	0x11
 133#define AB8500_GPADC_CAL_4	0x12
 134#define AB8500_GPADC_CAL_5	0x13
 135#define AB8500_GPADC_CAL_6	0x14
 136#define AB8500_GPADC_CAL_7	0x15
 137/* New calibration for 8540 */
 138#define AB8540_GPADC_OTP4_REG_7	0x38
 139#define AB8540_GPADC_OTP4_REG_6	0x39
 140#define AB8540_GPADC_OTP4_REG_5	0x3A
 141
 142#define AB8540_GPADC_DIS_ZERO	0x00
 143#define AB8540_GPADC_EN_VBIAS_XTAL_TEMP	0x02
 144
 145/* GPADC constants from AB8500 spec, UM0836 */
 146#define AB8500_ADC_RESOLUTION		1024
 147#define AB8500_ADC_CH_BTEMP_MIN		0
 148#define AB8500_ADC_CH_BTEMP_MAX		1350
 149#define AB8500_ADC_CH_DIETEMP_MIN	0
 150#define AB8500_ADC_CH_DIETEMP_MAX	1350
 151#define AB8500_ADC_CH_CHG_V_MIN		0
 152#define AB8500_ADC_CH_CHG_V_MAX		20030
 153#define AB8500_ADC_CH_ACCDET2_MIN	0
 154#define AB8500_ADC_CH_ACCDET2_MAX	2500
 155#define AB8500_ADC_CH_VBAT_MIN		2300
 156#define AB8500_ADC_CH_VBAT_MAX		4800
 157#define AB8500_ADC_CH_CHG_I_MIN		0
 158#define AB8500_ADC_CH_CHG_I_MAX		1500
 159#define AB8500_ADC_CH_BKBAT_MIN		0
 160#define AB8500_ADC_CH_BKBAT_MAX		3200
 161
 162/* GPADC constants from AB8540 spec */
 163#define AB8500_ADC_CH_IBAT_MIN		(-6000) /* mA range measured by ADC for ibat */
 164#define AB8500_ADC_CH_IBAT_MAX		6000
 165#define AB8500_ADC_CH_IBAT_MIN_V	(-60)	/* mV range measured by ADC for ibat */
 166#define AB8500_ADC_CH_IBAT_MAX_V	60
 167#define AB8500_GPADC_IBAT_VDROP_L	(-56)  /* mV */
 168#define AB8500_GPADC_IBAT_VDROP_H	56
 169
 170/* This is used to not lose precision when dividing to get gain and offset */
 171#define AB8500_GPADC_CALIB_SCALE	1000
 172/*
 173 * Number of bits shift used to not lose precision
 174 * when dividing to get ibat gain.
 175 */
 176#define AB8500_GPADC_CALIB_SHIFT_IBAT	20
 177
 178/* Time in ms before disabling regulator */
 179#define AB8500_GPADC_AUTOSUSPEND_DELAY	1
 180
 181#define AB8500_GPADC_CONVERSION_TIME	500 /* ms */
 182
 183enum ab8500_cal_channels {
 184	AB8500_CAL_VMAIN = 0,
 185	AB8500_CAL_BTEMP,
 186	AB8500_CAL_VBAT,
 187	AB8500_CAL_IBAT,
 188	AB8500_CAL_NR,
 189};
 190
 191/**
 192 * struct ab8500_adc_cal_data - Table for storing gain and offset for the
 193 * calibrated ADC channels
 194 * @gain: Gain of the ADC channel
 195 * @offset: Offset of the ADC channel
 196 * @otp_calib_hi: Calibration from OTP
 197 * @otp_calib_lo: Calibration from OTP
 198 */
 199struct ab8500_adc_cal_data {
 200	s64 gain;
 201	s64 offset;
 202	u16 otp_calib_hi;
 203	u16 otp_calib_lo;
 204};
 205
 206/**
 207 * struct ab8500_gpadc_chan_info - per-channel GPADC info
 208 * @name: name of the channel
 209 * @id: the internal AB8500 ID number for the channel
 210 * @hardware_control: indicate that we want to use hardware ADC control
 211 * on this channel, the default is software ADC control. Hardware control
 212 * is normally only used to test the battery voltage during GSM bursts
 213 * and needs a hardware trigger on the GPADCTrig pin of the ASIC.
 214 * @falling_edge: indicate that we want to trigger on falling edge
 215 * rather than rising edge, rising edge is the default
 216 * @avg_sample: how many samples to average: must be 1, 4, 8 or 16.
 217 * @trig_timer: how long to wait for the trigger, in 32kHz periods:
 218 * 0 .. 255 periods
 219 */
 220struct ab8500_gpadc_chan_info {
 221	const char *name;
 222	u8 id;
 223	bool hardware_control;
 224	bool falling_edge;
 225	u8 avg_sample;
 226	u8 trig_timer;
 227};
 228
 229/**
 230 * struct ab8500_gpadc - AB8500 GPADC device information
 231 * @dev: pointer to the containing device
 232 * @ab8500: pointer to the parent AB8500 device
 233 * @chans: internal per-channel information container
 234 * @nchans: number of channels
 235 * @complete: pointer to the completion that indicates
 236 * the completion of an gpadc conversion cycle
 237 * @vddadc: pointer to the regulator supplying VDDADC
 238 * @irq_sw: interrupt number that is used by gpadc for software ADC conversion
 239 * @irq_hw: interrupt number that is used by gpadc for hardware ADC conversion
 240 * @cal_data: array of ADC calibration data structs
 241 */
 242struct ab8500_gpadc {
 243	struct device *dev;
 244	struct ab8500 *ab8500;
 245	struct ab8500_gpadc_chan_info *chans;
 246	unsigned int nchans;
 247	struct completion complete;
 248	struct regulator *vddadc;
 249	int irq_sw;
 250	int irq_hw;
 251	struct ab8500_adc_cal_data cal_data[AB8500_CAL_NR];
 252};
 253
 254static struct ab8500_gpadc_chan_info *
 255ab8500_gpadc_get_channel(struct ab8500_gpadc *gpadc, u8 chan)
 256{
 257	struct ab8500_gpadc_chan_info *ch;
 258	int i;
 259
 260	for (i = 0; i < gpadc->nchans; i++) {
 261		ch = &gpadc->chans[i];
 262		if (ch->id == chan)
 263			break;
 264	}
 265	if (i == gpadc->nchans)
 266		return NULL;
 267
 268	return ch;
 269}
 270
 271/**
 272 * ab8500_gpadc_ad_to_voltage() - Convert a raw ADC value to a voltage
 273 * @gpadc: GPADC instance
 274 * @ch: the sampled channel this raw value is coming from
 275 * @ad_value: the raw value
 276 */
 277static int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc,
 278				      enum ab8500_gpadc_channel ch,
 279				      int ad_value)
 280{
 281	int res;
 282
 283	switch (ch) {
 284	case AB8500_GPADC_CHAN_MAIN_CHARGER:
 285		/* No calibration data available: just interpolate */
 286		if (!gpadc->cal_data[AB8500_CAL_VMAIN].gain) {
 287			res = AB8500_ADC_CH_CHG_V_MIN + (AB8500_ADC_CH_CHG_V_MAX -
 288				AB8500_ADC_CH_CHG_V_MIN) * ad_value /
 289				AB8500_ADC_RESOLUTION;
 290			break;
 291		}
 292		/* Here we can use calibration */
 293		res = (int) (ad_value * gpadc->cal_data[AB8500_CAL_VMAIN].gain +
 294			gpadc->cal_data[AB8500_CAL_VMAIN].offset) / AB8500_GPADC_CALIB_SCALE;
 295		break;
 296
 297	case AB8500_GPADC_CHAN_BAT_CTRL:
 298	case AB8500_GPADC_CHAN_BAT_TEMP:
 299	case AB8500_GPADC_CHAN_ACC_DET_1:
 300	case AB8500_GPADC_CHAN_ADC_AUX_1:
 301	case AB8500_GPADC_CHAN_ADC_AUX_2:
 302	case AB8500_GPADC_CHAN_XTAL_TEMP:
 303		/* No calibration data available: just interpolate */
 304		if (!gpadc->cal_data[AB8500_CAL_BTEMP].gain) {
 305			res = AB8500_ADC_CH_BTEMP_MIN + (AB8500_ADC_CH_BTEMP_MAX -
 306				AB8500_ADC_CH_BTEMP_MIN) * ad_value /
 307				AB8500_ADC_RESOLUTION;
 308			break;
 309		}
 310		/* Here we can use calibration */
 311		res = (int) (ad_value * gpadc->cal_data[AB8500_CAL_BTEMP].gain +
 312			gpadc->cal_data[AB8500_CAL_BTEMP].offset) / AB8500_GPADC_CALIB_SCALE;
 313		break;
 314
 315	case AB8500_GPADC_CHAN_VBAT_A:
 316	case AB8500_GPADC_CHAN_VBAT_TRUE_MEAS:
 317		/* No calibration data available: just interpolate */
 318		if (!gpadc->cal_data[AB8500_CAL_VBAT].gain) {
 319			res = AB8500_ADC_CH_VBAT_MIN + (AB8500_ADC_CH_VBAT_MAX -
 320				AB8500_ADC_CH_VBAT_MIN) * ad_value /
 321				AB8500_ADC_RESOLUTION;
 322			break;
 323		}
 324		/* Here we can use calibration */
 325		res = (int) (ad_value * gpadc->cal_data[AB8500_CAL_VBAT].gain +
 326			gpadc->cal_data[AB8500_CAL_VBAT].offset) / AB8500_GPADC_CALIB_SCALE;
 327		break;
 328
 329	case AB8505_GPADC_CHAN_DIE_TEMP:
 330		res = AB8500_ADC_CH_DIETEMP_MIN +
 331			(AB8500_ADC_CH_DIETEMP_MAX - AB8500_ADC_CH_DIETEMP_MIN) * ad_value /
 332			AB8500_ADC_RESOLUTION;
 333		break;
 334
 335	case AB8500_GPADC_CHAN_ACC_DET_2:
 336		res = AB8500_ADC_CH_ACCDET2_MIN +
 337			(AB8500_ADC_CH_ACCDET2_MAX - AB8500_ADC_CH_ACCDET2_MIN) * ad_value /
 338			AB8500_ADC_RESOLUTION;
 339		break;
 340
 341	case AB8500_GPADC_CHAN_VBUS:
 342		res = AB8500_ADC_CH_CHG_V_MIN +
 343			(AB8500_ADC_CH_CHG_V_MAX - AB8500_ADC_CH_CHG_V_MIN) * ad_value /
 344			AB8500_ADC_RESOLUTION;
 345		break;
 346
 347	case AB8500_GPADC_CHAN_MAIN_CHARGER_CURRENT:
 348	case AB8500_GPADC_CHAN_USB_CHARGER_CURRENT:
 349		res = AB8500_ADC_CH_CHG_I_MIN +
 350			(AB8500_ADC_CH_CHG_I_MAX - AB8500_ADC_CH_CHG_I_MIN) * ad_value /
 351			AB8500_ADC_RESOLUTION;
 352		break;
 353
 354	case AB8500_GPADC_CHAN_BACKUP_BAT:
 355		res = AB8500_ADC_CH_BKBAT_MIN +
 356			(AB8500_ADC_CH_BKBAT_MAX - AB8500_ADC_CH_BKBAT_MIN) * ad_value /
 357			AB8500_ADC_RESOLUTION;
 358		break;
 359
 360	case AB8500_GPADC_CHAN_IBAT_VIRTUAL:
 361		/* No calibration data available: just interpolate */
 362		if (!gpadc->cal_data[AB8500_CAL_IBAT].gain) {
 363			res = AB8500_ADC_CH_IBAT_MIN + (AB8500_ADC_CH_IBAT_MAX -
 364				AB8500_ADC_CH_IBAT_MIN) * ad_value /
 365				AB8500_ADC_RESOLUTION;
 366			break;
 367		}
 368		/* Here we can use calibration */
 369		res = (int) (ad_value * gpadc->cal_data[AB8500_CAL_IBAT].gain +
 370				gpadc->cal_data[AB8500_CAL_IBAT].offset)
 371				>> AB8500_GPADC_CALIB_SHIFT_IBAT;
 372		break;
 373
 374	default:
 375		dev_err(gpadc->dev,
 376			"unknown channel ID: %d, not possible to convert\n",
 377			ch);
 378		res = -EINVAL;
 379		break;
 380
 381	}
 382
 383	return res;
 384}
 385
 386static int ab8500_gpadc_read(struct ab8500_gpadc *gpadc,
 387			     const struct ab8500_gpadc_chan_info *ch,
 388			     int *ibat)
 389{
 390	int ret;
 391	int looplimit = 0;
 392	unsigned long completion_timeout;
 393	u8 val;
 394	u8 low_data, high_data, low_data2, high_data2;
 395	u8 ctrl1;
 396	u8 ctrl23;
 397	unsigned int delay_min = 0;
 398	unsigned int delay_max = 0;
 399	u8 data_low_addr, data_high_addr;
 400
 401	if (!gpadc)
 402		return -ENODEV;
 403
 404	/* check if conversion is supported */
 405	if ((gpadc->irq_sw <= 0) && !ch->hardware_control)
 406		return -ENOTSUPP;
 407	if ((gpadc->irq_hw <= 0) && ch->hardware_control)
 408		return -ENOTSUPP;
 409
 410	/* Enable vddadc by grabbing PM runtime */
 411	pm_runtime_get_sync(gpadc->dev);
 412
 413	/* Check if ADC is not busy, lock and proceed */
 414	do {
 415		ret = abx500_get_register_interruptible(gpadc->dev,
 416			AB8500_GPADC, AB8500_GPADC_STAT_REG, &val);
 417		if (ret < 0)
 418			goto out;
 419		if (!(val & AB8500_GPADC_STAT_BUSY))
 420			break;
 421		msleep(20);
 422	} while (++looplimit < 10);
 423	if (looplimit >= 10 && (val & AB8500_GPADC_STAT_BUSY)) {
 424		dev_err(gpadc->dev, "gpadc_conversion: GPADC busy");
 425		ret = -EINVAL;
 426		goto out;
 427	}
 428
 429	/* Enable GPADC */
 430	ctrl1 = AB8500_GPADC_CTRL1_ENABLE;
 431
 432	/* Select the channel source and set average samples */
 433	switch (ch->avg_sample) {
 434	case 1:
 435		ctrl23 = ch->id | AB8500_GPADC_CTRL2_AVG_1;
 436		break;
 437	case 4:
 438		ctrl23 = ch->id | AB8500_GPADC_CTRL2_AVG_4;
 439		break;
 440	case 8:
 441		ctrl23 = ch->id | AB8500_GPADC_CTRL2_AVG_8;
 442		break;
 443	default:
 444		ctrl23 = ch->id | AB8500_GPADC_CTRL2_AVG_16;
 445		break;
 446	}
 447
 448	if (ch->hardware_control) {
 449		ret = abx500_set_register_interruptible(gpadc->dev,
 450				AB8500_GPADC, AB8500_GPADC_CTRL3_REG, ctrl23);
 451		ctrl1 |= AB8500_GPADC_CTRL1_TRIG_ENA;
 452		if (ch->falling_edge)
 453			ctrl1 |= AB8500_GPADC_CTRL1_TRIG_EDGE;
 454	} else {
 455		ret = abx500_set_register_interruptible(gpadc->dev,
 456				AB8500_GPADC, AB8500_GPADC_CTRL2_REG, ctrl23);
 457	}
 458	if (ret < 0) {
 459		dev_err(gpadc->dev,
 460			"gpadc_conversion: set avg samples failed\n");
 461		goto out;
 462	}
 463
 464	/*
 465	 * Enable ADC, buffering, select rising edge and enable ADC path
 466	 * charging current sense if it needed, ABB 3.0 needs some special
 467	 * treatment too.
 468	 */
 469	switch (ch->id) {
 470	case AB8500_GPADC_CHAN_MAIN_CHARGER_CURRENT:
 471	case AB8500_GPADC_CHAN_USB_CHARGER_CURRENT:
 472		ctrl1 |= AB8500_GPADC_CTRL1_BUF_ENA |
 473			AB8500_GPADC_CTRL1_ICHAR_ENA;
 474		break;
 475	case AB8500_GPADC_CHAN_BAT_TEMP:
 476		if (!is_ab8500_2p0_or_earlier(gpadc->ab8500)) {
 477			ctrl1 |= AB8500_GPADC_CTRL1_BUF_ENA |
 478				AB8500_GPADC_CTRL1_BTEMP_PULL_UP;
 479			/*
 480			 * Delay might be needed for ABB8500 cut 3.0, if not,
 481			 * remove when hardware will be available
 482			 */
 483			delay_min = 1000; /* Delay in micro seconds */
 484			delay_max = 10000; /* large range optimises sleepmode */
 485			break;
 486		}
 487		fallthrough;
 488	default:
 489		ctrl1 |= AB8500_GPADC_CTRL1_BUF_ENA;
 490		break;
 491	}
 492
 493	/* Write configuration to control register 1 */
 494	ret = abx500_set_register_interruptible(gpadc->dev,
 495		AB8500_GPADC, AB8500_GPADC_CTRL1_REG, ctrl1);
 496	if (ret < 0) {
 497		dev_err(gpadc->dev,
 498			"gpadc_conversion: set Control register failed\n");
 499		goto out;
 500	}
 501
 502	if (delay_min != 0)
 503		usleep_range(delay_min, delay_max);
 504
 505	if (ch->hardware_control) {
 506		/* Set trigger delay timer */
 507		ret = abx500_set_register_interruptible(gpadc->dev,
 508			AB8500_GPADC, AB8500_GPADC_AUTO_TIMER_REG,
 509			ch->trig_timer);
 510		if (ret < 0) {
 511			dev_err(gpadc->dev,
 512				"gpadc_conversion: trig timer failed\n");
 513			goto out;
 514		}
 515		completion_timeout = 2 * HZ;
 516		data_low_addr = AB8500_GPADC_AUTODATAL_REG;
 517		data_high_addr = AB8500_GPADC_AUTODATAH_REG;
 518	} else {
 519		/* Start SW conversion */
 520		ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
 521			AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
 522			AB8500_GPADC_CTRL1_START_SW_CONV,
 523			AB8500_GPADC_CTRL1_START_SW_CONV);
 524		if (ret < 0) {
 525			dev_err(gpadc->dev,
 526				"gpadc_conversion: start s/w conv failed\n");
 527			goto out;
 528		}
 529		completion_timeout = msecs_to_jiffies(AB8500_GPADC_CONVERSION_TIME);
 530		data_low_addr = AB8500_GPADC_MANDATAL_REG;
 531		data_high_addr = AB8500_GPADC_MANDATAH_REG;
 532	}
 533
 534	/* Wait for completion of conversion */
 535	if (!wait_for_completion_timeout(&gpadc->complete,
 536			completion_timeout)) {
 537		dev_err(gpadc->dev,
 538			"timeout didn't receive GPADC conv interrupt\n");
 539		ret = -EINVAL;
 540		goto out;
 541	}
 542
 543	/* Read the converted RAW data */
 544	ret = abx500_get_register_interruptible(gpadc->dev,
 545			AB8500_GPADC, data_low_addr, &low_data);
 546	if (ret < 0) {
 547		dev_err(gpadc->dev,
 548			"gpadc_conversion: read low data failed\n");
 549		goto out;
 550	}
 551
 552	ret = abx500_get_register_interruptible(gpadc->dev,
 553		AB8500_GPADC, data_high_addr, &high_data);
 554	if (ret < 0) {
 555		dev_err(gpadc->dev,
 556			"gpadc_conversion: read high data failed\n");
 557		goto out;
 558	}
 559
 560	/* Check if double conversion is required */
 561	if ((ch->id == AB8500_GPADC_CHAN_BAT_CTRL_AND_IBAT) ||
 562	    (ch->id == AB8500_GPADC_CHAN_VBAT_MEAS_AND_IBAT) ||
 563	    (ch->id == AB8500_GPADC_CHAN_VBAT_TRUE_MEAS_AND_IBAT) ||
 564	    (ch->id == AB8500_GPADC_CHAN_BAT_TEMP_AND_IBAT)) {
 565
 566		if (ch->hardware_control) {
 567			/* not supported */
 568			ret = -ENOTSUPP;
 569			dev_err(gpadc->dev,
 570				"gpadc_conversion: only SW double conversion supported\n");
 571			goto out;
 572		} else {
 573			/* Read the converted RAW data 2 */
 574			ret = abx500_get_register_interruptible(gpadc->dev,
 575				AB8500_GPADC, AB8540_GPADC_MANDATA2L_REG,
 576				&low_data2);
 577			if (ret < 0) {
 578				dev_err(gpadc->dev,
 579					"gpadc_conversion: read sw low data 2 failed\n");
 580				goto out;
 581			}
 582
 583			ret = abx500_get_register_interruptible(gpadc->dev,
 584				AB8500_GPADC, AB8540_GPADC_MANDATA2H_REG,
 585				&high_data2);
 586			if (ret < 0) {
 587				dev_err(gpadc->dev,
 588					"gpadc_conversion: read sw high data 2 failed\n");
 589				goto out;
 590			}
 591			if (ibat != NULL) {
 592				*ibat = (high_data2 << 8) | low_data2;
 593			} else {
 594				dev_warn(gpadc->dev,
 595					"gpadc_conversion: ibat not stored\n");
 596			}
 597
 598		}
 599	}
 600
 601	/* Disable GPADC */
 602	ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
 603		AB8500_GPADC_CTRL1_REG, AB8500_GPADC_CTRL1_DISABLE);
 604	if (ret < 0) {
 605		dev_err(gpadc->dev, "gpadc_conversion: disable gpadc failed\n");
 606		goto out;
 607	}
 608
 609	/* This eventually drops the regulator */
 610	pm_runtime_put_autosuspend(gpadc->dev);
 611
 612	return (high_data << 8) | low_data;
 613
 614out:
 615	/*
 616	 * It has shown to be needed to turn off the GPADC if an error occurs,
 617	 * otherwise we might have problem when waiting for the busy bit in the
 618	 * GPADC status register to go low. In V1.1 there wait_for_completion
 619	 * seems to timeout when waiting for an interrupt.. Not seen in V2.0
 620	 */
 621	(void) abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
 622		AB8500_GPADC_CTRL1_REG, AB8500_GPADC_CTRL1_DISABLE);
 623	pm_runtime_put(gpadc->dev);
 624	dev_err(gpadc->dev,
 625		"gpadc_conversion: Failed to AD convert channel %d\n", ch->id);
 626
 627	return ret;
 628}
 629
 630/**
 631 * ab8500_bm_gpadcconvend_handler() - isr for gpadc conversion completion
 632 * @irq: irq number
 633 * @data: pointer to the data passed during request irq
 634 *
 635 * This is a interrupt service routine for gpadc conversion completion.
 636 * Notifies the gpadc completion is completed and the converted raw value
 637 * can be read from the registers.
 638 * Returns IRQ status(IRQ_HANDLED)
 639 */
 640static irqreturn_t ab8500_bm_gpadcconvend_handler(int irq, void *data)
 641{
 642	struct ab8500_gpadc *gpadc = data;
 643
 644	complete(&gpadc->complete);
 645
 646	return IRQ_HANDLED;
 647}
 648
 649static int otp_cal_regs[] = {
 650	AB8500_GPADC_CAL_1,
 651	AB8500_GPADC_CAL_2,
 652	AB8500_GPADC_CAL_3,
 653	AB8500_GPADC_CAL_4,
 654	AB8500_GPADC_CAL_5,
 655	AB8500_GPADC_CAL_6,
 656	AB8500_GPADC_CAL_7,
 657};
 658
 659static int otp4_cal_regs[] = {
 660	AB8540_GPADC_OTP4_REG_7,
 661	AB8540_GPADC_OTP4_REG_6,
 662	AB8540_GPADC_OTP4_REG_5,
 663};
 664
 665static void ab8500_gpadc_read_calibration_data(struct ab8500_gpadc *gpadc)
 666{
 667	int i;
 668	int ret[ARRAY_SIZE(otp_cal_regs)];
 669	u8 gpadc_cal[ARRAY_SIZE(otp_cal_regs)];
 670	int ret_otp4[ARRAY_SIZE(otp4_cal_regs)];
 671	u8 gpadc_otp4[ARRAY_SIZE(otp4_cal_regs)];
 672	int vmain_high, vmain_low;
 673	int btemp_high, btemp_low;
 674	int vbat_high, vbat_low;
 675	int ibat_high, ibat_low;
 676	s64 V_gain, V_offset, V2A_gain, V2A_offset;
 677
 678	/* First we read all OTP registers and store the error code */
 679	for (i = 0; i < ARRAY_SIZE(otp_cal_regs); i++) {
 680		ret[i] = abx500_get_register_interruptible(gpadc->dev,
 681			AB8500_OTP_EMUL, otp_cal_regs[i],  &gpadc_cal[i]);
 682		if (ret[i] < 0) {
 683			/* Continue anyway: maybe the other registers are OK */
 684			dev_err(gpadc->dev, "%s: read otp reg 0x%02x failed\n",
 685				__func__, otp_cal_regs[i]);
 686		} else {
 687			/* Put this in the entropy pool as device-unique */
 688			add_device_randomness(&ret[i], sizeof(ret[i]));
 689		}
 690	}
 691
 692	/*
 693	 * The ADC calibration data is stored in OTP registers.
 694	 * The layout of the calibration data is outlined below and a more
 695	 * detailed description can be found in UM0836
 696	 *
 697	 * vm_h/l = vmain_high/low
 698	 * bt_h/l = btemp_high/low
 699	 * vb_h/l = vbat_high/low
 700	 *
 701	 * Data bits 8500/9540:
 702	 * | 7	   | 6	   | 5	   | 4	   | 3	   | 2	   | 1	   | 0
 703	 * |.......|.......|.......|.......|.......|.......|.......|.......
 704	 * |						   | vm_h9 | vm_h8
 705	 * |.......|.......|.......|.......|.......|.......|.......|.......
 706	 * |		   | vm_h7 | vm_h6 | vm_h5 | vm_h4 | vm_h3 | vm_h2
 707	 * |.......|.......|.......|.......|.......|.......|.......|.......
 708	 * | vm_h1 | vm_h0 | vm_l4 | vm_l3 | vm_l2 | vm_l1 | vm_l0 | bt_h9
 709	 * |.......|.......|.......|.......|.......|.......|.......|.......
 710	 * | bt_h8 | bt_h7 | bt_h6 | bt_h5 | bt_h4 | bt_h3 | bt_h2 | bt_h1
 711	 * |.......|.......|.......|.......|.......|.......|.......|.......
 712	 * | bt_h0 | bt_l4 | bt_l3 | bt_l2 | bt_l1 | bt_l0 | vb_h9 | vb_h8
 713	 * |.......|.......|.......|.......|.......|.......|.......|.......
 714	 * | vb_h7 | vb_h6 | vb_h5 | vb_h4 | vb_h3 | vb_h2 | vb_h1 | vb_h0
 715	 * |.......|.......|.......|.......|.......|.......|.......|.......
 716	 * | vb_l5 | vb_l4 | vb_l3 | vb_l2 | vb_l1 | vb_l0 |
 717	 * |.......|.......|.......|.......|.......|.......|.......|.......
 718	 *
 719	 * Data bits 8540:
 720	 * OTP2
 721	 * | 7	   | 6	   | 5	   | 4	   | 3	   | 2	   | 1	   | 0
 722	 * |.......|.......|.......|.......|.......|.......|.......|.......
 723	 * |
 724	 * |.......|.......|.......|.......|.......|.......|.......|.......
 725	 * | vm_h9 | vm_h8 | vm_h7 | vm_h6 | vm_h5 | vm_h4 | vm_h3 | vm_h2
 726	 * |.......|.......|.......|.......|.......|.......|.......|.......
 727	 * | vm_h1 | vm_h0 | vm_l4 | vm_l3 | vm_l2 | vm_l1 | vm_l0 | bt_h9
 728	 * |.......|.......|.......|.......|.......|.......|.......|.......
 729	 * | bt_h8 | bt_h7 | bt_h6 | bt_h5 | bt_h4 | bt_h3 | bt_h2 | bt_h1
 730	 * |.......|.......|.......|.......|.......|.......|.......|.......
 731	 * | bt_h0 | bt_l4 | bt_l3 | bt_l2 | bt_l1 | bt_l0 | vb_h9 | vb_h8
 732	 * |.......|.......|.......|.......|.......|.......|.......|.......
 733	 * | vb_h7 | vb_h6 | vb_h5 | vb_h4 | vb_h3 | vb_h2 | vb_h1 | vb_h0
 734	 * |.......|.......|.......|.......|.......|.......|.......|.......
 735	 * | vb_l5 | vb_l4 | vb_l3 | vb_l2 | vb_l1 | vb_l0 |
 736	 * |.......|.......|.......|.......|.......|.......|.......|.......
 737	 *
 738	 * Data bits 8540:
 739	 * OTP4
 740	 * | 7	   | 6	   | 5	   | 4	   | 3	   | 2	   | 1	   | 0
 741	 * |.......|.......|.......|.......|.......|.......|.......|.......
 742	 * |					   | ib_h9 | ib_h8 | ib_h7
 743	 * |.......|.......|.......|.......|.......|.......|.......|.......
 744	 * | ib_h6 | ib_h5 | ib_h4 | ib_h3 | ib_h2 | ib_h1 | ib_h0 | ib_l5
 745	 * |.......|.......|.......|.......|.......|.......|.......|.......
 746	 * | ib_l4 | ib_l3 | ib_l2 | ib_l1 | ib_l0 |
 747	 *
 748	 *
 749	 * Ideal output ADC codes corresponding to injected input voltages
 750	 * during manufacturing is:
 751	 *
 752	 * vmain_high: Vin = 19500mV / ADC ideal code = 997
 753	 * vmain_low:  Vin = 315mV   / ADC ideal code = 16
 754	 * btemp_high: Vin = 1300mV  / ADC ideal code = 985
 755	 * btemp_low:  Vin = 21mV    / ADC ideal code = 16
 756	 * vbat_high:  Vin = 4700mV  / ADC ideal code = 982
 757	 * vbat_low:   Vin = 2380mV  / ADC ideal code = 33
 758	 */
 759
 760	if (is_ab8540(gpadc->ab8500)) {
 761		/* Calculate gain and offset for VMAIN if all reads succeeded*/
 762		if (!(ret[1] < 0 || ret[2] < 0)) {
 763			vmain_high = (((gpadc_cal[1] & 0xFF) << 2) |
 764				((gpadc_cal[2] & 0xC0) >> 6));
 765			vmain_low = ((gpadc_cal[2] & 0x3E) >> 1);
 766
 767			gpadc->cal_data[AB8500_CAL_VMAIN].otp_calib_hi =
 768				(u16)vmain_high;
 769			gpadc->cal_data[AB8500_CAL_VMAIN].otp_calib_lo =
 770				(u16)vmain_low;
 771
 772			gpadc->cal_data[AB8500_CAL_VMAIN].gain = AB8500_GPADC_CALIB_SCALE *
 773				(19500 - 315) / (vmain_high - vmain_low);
 774			gpadc->cal_data[AB8500_CAL_VMAIN].offset = AB8500_GPADC_CALIB_SCALE *
 775				19500 - (AB8500_GPADC_CALIB_SCALE * (19500 - 315) /
 776				(vmain_high - vmain_low)) * vmain_high;
 777		} else {
 778			gpadc->cal_data[AB8500_CAL_VMAIN].gain = 0;
 779		}
 780
 781		/* Read IBAT calibration Data */
 782		for (i = 0; i < ARRAY_SIZE(otp4_cal_regs); i++) {
 783			ret_otp4[i] = abx500_get_register_interruptible(
 784					gpadc->dev, AB8500_OTP_EMUL,
 785					otp4_cal_regs[i],  &gpadc_otp4[i]);
 786			if (ret_otp4[i] < 0)
 787				dev_err(gpadc->dev,
 788					"%s: read otp4 reg 0x%02x failed\n",
 789					__func__, otp4_cal_regs[i]);
 790		}
 791
 792		/* Calculate gain and offset for IBAT if all reads succeeded */
 793		if (!(ret_otp4[0] < 0 || ret_otp4[1] < 0 || ret_otp4[2] < 0)) {
 794			ibat_high = (((gpadc_otp4[0] & 0x07) << 7) |
 795				((gpadc_otp4[1] & 0xFE) >> 1));
 796			ibat_low = (((gpadc_otp4[1] & 0x01) << 5) |
 797				((gpadc_otp4[2] & 0xF8) >> 3));
 798
 799			gpadc->cal_data[AB8500_CAL_IBAT].otp_calib_hi =
 800				(u16)ibat_high;
 801			gpadc->cal_data[AB8500_CAL_IBAT].otp_calib_lo =
 802				(u16)ibat_low;
 803
 804			V_gain = ((AB8500_GPADC_IBAT_VDROP_H - AB8500_GPADC_IBAT_VDROP_L)
 805				<< AB8500_GPADC_CALIB_SHIFT_IBAT) / (ibat_high - ibat_low);
 806
 807			V_offset = (AB8500_GPADC_IBAT_VDROP_H << AB8500_GPADC_CALIB_SHIFT_IBAT) -
 808				(((AB8500_GPADC_IBAT_VDROP_H - AB8500_GPADC_IBAT_VDROP_L) <<
 809				AB8500_GPADC_CALIB_SHIFT_IBAT) / (ibat_high - ibat_low))
 810				* ibat_high;
 811			/*
 812			 * Result obtained is in mV (at a scale factor),
 813			 * we need to calculate gain and offset to get mA
 814			 */
 815			V2A_gain = (AB8500_ADC_CH_IBAT_MAX - AB8500_ADC_CH_IBAT_MIN)/
 816				(AB8500_ADC_CH_IBAT_MAX_V - AB8500_ADC_CH_IBAT_MIN_V);
 817			V2A_offset = ((AB8500_ADC_CH_IBAT_MAX_V * AB8500_ADC_CH_IBAT_MIN -
 818				AB8500_ADC_CH_IBAT_MAX * AB8500_ADC_CH_IBAT_MIN_V)
 819				<< AB8500_GPADC_CALIB_SHIFT_IBAT)
 820				/ (AB8500_ADC_CH_IBAT_MAX_V - AB8500_ADC_CH_IBAT_MIN_V);
 821
 822			gpadc->cal_data[AB8500_CAL_IBAT].gain =
 823				V_gain * V2A_gain;
 824			gpadc->cal_data[AB8500_CAL_IBAT].offset =
 825				V_offset * V2A_gain + V2A_offset;
 826		} else {
 827			gpadc->cal_data[AB8500_CAL_IBAT].gain = 0;
 828		}
 829	} else {
 830		/* Calculate gain and offset for VMAIN if all reads succeeded */
 831		if (!(ret[0] < 0 || ret[1] < 0 || ret[2] < 0)) {
 832			vmain_high = (((gpadc_cal[0] & 0x03) << 8) |
 833				((gpadc_cal[1] & 0x3F) << 2) |
 834				((gpadc_cal[2] & 0xC0) >> 6));
 835			vmain_low = ((gpadc_cal[2] & 0x3E) >> 1);
 836
 837			gpadc->cal_data[AB8500_CAL_VMAIN].otp_calib_hi =
 838				(u16)vmain_high;
 839			gpadc->cal_data[AB8500_CAL_VMAIN].otp_calib_lo =
 840				(u16)vmain_low;
 841
 842			gpadc->cal_data[AB8500_CAL_VMAIN].gain = AB8500_GPADC_CALIB_SCALE *
 843				(19500 - 315) / (vmain_high - vmain_low);
 844
 845			gpadc->cal_data[AB8500_CAL_VMAIN].offset = AB8500_GPADC_CALIB_SCALE *
 846				19500 - (AB8500_GPADC_CALIB_SCALE * (19500 - 315) /
 847				(vmain_high - vmain_low)) * vmain_high;
 848		} else {
 849			gpadc->cal_data[AB8500_CAL_VMAIN].gain = 0;
 850		}
 851	}
 852
 853	/* Calculate gain and offset for BTEMP if all reads succeeded */
 854	if (!(ret[2] < 0 || ret[3] < 0 || ret[4] < 0)) {
 855		btemp_high = (((gpadc_cal[2] & 0x01) << 9) |
 856			(gpadc_cal[3] << 1) | ((gpadc_cal[4] & 0x80) >> 7));
 857		btemp_low = ((gpadc_cal[4] & 0x7C) >> 2);
 858
 859		gpadc->cal_data[AB8500_CAL_BTEMP].otp_calib_hi = (u16)btemp_high;
 860		gpadc->cal_data[AB8500_CAL_BTEMP].otp_calib_lo = (u16)btemp_low;
 861
 862		gpadc->cal_data[AB8500_CAL_BTEMP].gain =
 863			AB8500_GPADC_CALIB_SCALE * (1300 - 21) / (btemp_high - btemp_low);
 864		gpadc->cal_data[AB8500_CAL_BTEMP].offset = AB8500_GPADC_CALIB_SCALE * 1300 -
 865			(AB8500_GPADC_CALIB_SCALE * (1300 - 21) / (btemp_high - btemp_low))
 866			* btemp_high;
 867	} else {
 868		gpadc->cal_data[AB8500_CAL_BTEMP].gain = 0;
 869	}
 870
 871	/* Calculate gain and offset for VBAT if all reads succeeded */
 872	if (!(ret[4] < 0 || ret[5] < 0 || ret[6] < 0)) {
 873		vbat_high = (((gpadc_cal[4] & 0x03) << 8) | gpadc_cal[5]);
 874		vbat_low = ((gpadc_cal[6] & 0xFC) >> 2);
 875
 876		gpadc->cal_data[AB8500_CAL_VBAT].otp_calib_hi = (u16)vbat_high;
 877		gpadc->cal_data[AB8500_CAL_VBAT].otp_calib_lo = (u16)vbat_low;
 878
 879		gpadc->cal_data[AB8500_CAL_VBAT].gain = AB8500_GPADC_CALIB_SCALE *
 880			(4700 - 2380) /	(vbat_high - vbat_low);
 881		gpadc->cal_data[AB8500_CAL_VBAT].offset = AB8500_GPADC_CALIB_SCALE * 4700 -
 882			(AB8500_GPADC_CALIB_SCALE * (4700 - 2380) /
 883			(vbat_high - vbat_low)) * vbat_high;
 884	} else {
 885		gpadc->cal_data[AB8500_CAL_VBAT].gain = 0;
 886	}
 887}
 888
 889static int ab8500_gpadc_read_raw(struct iio_dev *indio_dev,
 890				 struct iio_chan_spec const *chan,
 891				 int *val, int *val2, long mask)
 892{
 893	struct ab8500_gpadc *gpadc = iio_priv(indio_dev);
 894	const struct ab8500_gpadc_chan_info *ch;
 895	int raw_val;
 896	int processed;
 897
 898	ch = ab8500_gpadc_get_channel(gpadc, chan->address);
 899	if (!ch) {
 900		dev_err(gpadc->dev, "no such channel %lu\n",
 901			chan->address);
 902		return -EINVAL;
 903	}
 904
 905	raw_val = ab8500_gpadc_read(gpadc, ch, NULL);
 906	if (raw_val < 0)
 907		return raw_val;
 908
 909	if (mask == IIO_CHAN_INFO_RAW) {
 910		*val = raw_val;
 911		return IIO_VAL_INT;
 912	}
 913
 914	if (mask == IIO_CHAN_INFO_PROCESSED) {
 915		processed = ab8500_gpadc_ad_to_voltage(gpadc, ch->id, raw_val);
 916		if (processed < 0)
 917			return processed;
 918
 919		/* Return millivolt or milliamps or millicentigrades */
 920		*val = processed;
 921		return IIO_VAL_INT;
 922	}
 923
 924	return -EINVAL;
 925}
 926
 927static int ab8500_gpadc_fwnode_xlate(struct iio_dev *indio_dev,
 928				     const struct fwnode_reference_args *iiospec)
 929{
 930	int i;
 931
 932	for (i = 0; i < indio_dev->num_channels; i++)
 933		if (indio_dev->channels[i].channel == iiospec->args[0])
 934			return i;
 935
 936	return -EINVAL;
 937}
 938
 939static const struct iio_info ab8500_gpadc_info = {
 940	.fwnode_xlate = ab8500_gpadc_fwnode_xlate,
 941	.read_raw = ab8500_gpadc_read_raw,
 942};
 943
 944static int ab8500_gpadc_runtime_suspend(struct device *dev)
 945{
 946	struct iio_dev *indio_dev = dev_get_drvdata(dev);
 947	struct ab8500_gpadc *gpadc = iio_priv(indio_dev);
 948
 949	regulator_disable(gpadc->vddadc);
 950
 951	return 0;
 952}
 953
 954static int ab8500_gpadc_runtime_resume(struct device *dev)
 955{
 956	struct iio_dev *indio_dev = dev_get_drvdata(dev);
 957	struct ab8500_gpadc *gpadc = iio_priv(indio_dev);
 958	int ret;
 959
 960	ret = regulator_enable(gpadc->vddadc);
 961	if (ret)
 962		dev_err(dev, "Failed to enable vddadc: %d\n", ret);
 963
 964	return ret;
 965}
 966
 967/**
 968 * ab8500_gpadc_parse_channel() - process devicetree channel configuration
 969 * @dev: pointer to containing device
 970 * @fwnode: fw node for the channel to configure
 971 * @ch: channel info to fill in
 972 * @iio_chan: IIO channel specification to fill in
 973 *
 974 * The devicetree will set up the channel for use with the specific device,
 975 * and define usage for things like AUX GPADC inputs more precisely.
 976 */
 977static int ab8500_gpadc_parse_channel(struct device *dev,
 978				      struct fwnode_handle *fwnode,
 979				      struct ab8500_gpadc_chan_info *ch,
 980				      struct iio_chan_spec *iio_chan)
 981{
 982	const char *name = fwnode_get_name(fwnode);
 983	u32 chan;
 984	int ret;
 985
 986	ret = fwnode_property_read_u32(fwnode, "reg", &chan);
 987	if (ret) {
 988		dev_err(dev, "invalid channel number %s\n", name);
 989		return ret;
 990	}
 991	if (chan > AB8500_GPADC_CHAN_BAT_TEMP_AND_IBAT) {
 992		dev_err(dev, "%s channel number out of range %d\n", name, chan);
 993		return -EINVAL;
 994	}
 995
 996	iio_chan->channel = chan;
 997	iio_chan->datasheet_name = name;
 998	iio_chan->indexed = 1;
 999	iio_chan->address = chan;
1000	iio_chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
1001		BIT(IIO_CHAN_INFO_PROCESSED);
1002	/* Most are voltages (also temperatures), some are currents */
1003	if ((chan == AB8500_GPADC_CHAN_MAIN_CHARGER_CURRENT) ||
1004	    (chan == AB8500_GPADC_CHAN_USB_CHARGER_CURRENT))
1005		iio_chan->type = IIO_CURRENT;
1006	else
1007		iio_chan->type = IIO_VOLTAGE;
1008
1009	ch->id = chan;
1010
1011	/* Sensible defaults */
1012	ch->avg_sample = 16;
1013	ch->hardware_control = false;
1014	ch->falling_edge = false;
1015	ch->trig_timer = 0;
1016
1017	return 0;
1018}
1019
1020/**
1021 * ab8500_gpadc_parse_channels() - Parse the GPADC channels from DT
1022 * @gpadc: the GPADC to configure the channels for
1023 * @chans_parsed: the IIO channels we parsed
1024 * @nchans_parsed: the number of IIO channels we parsed
1025 */
1026static int ab8500_gpadc_parse_channels(struct ab8500_gpadc *gpadc,
1027				       struct iio_chan_spec **chans_parsed,
1028				       unsigned int *nchans_parsed)
1029{
1030	struct ab8500_gpadc_chan_info *ch;
1031	struct iio_chan_spec *iio_chans;
1032	unsigned int nchans;
1033	int i;
1034
1035	nchans = device_get_child_node_count(gpadc->dev);
1036	if (!nchans) {
1037		dev_err(gpadc->dev, "no channel children\n");
1038		return -ENODEV;
1039	}
1040	dev_info(gpadc->dev, "found %d ADC channels\n", nchans);
1041
1042	iio_chans = devm_kcalloc(gpadc->dev, nchans,
1043				 sizeof(*iio_chans), GFP_KERNEL);
1044	if (!iio_chans)
1045		return -ENOMEM;
1046
1047	gpadc->chans = devm_kcalloc(gpadc->dev, nchans,
1048				    sizeof(*gpadc->chans), GFP_KERNEL);
1049	if (!gpadc->chans)
1050		return -ENOMEM;
1051
1052	i = 0;
1053	device_for_each_child_node_scoped(gpadc->dev, child) {
1054		struct iio_chan_spec *iio_chan;
1055		int ret;
1056
1057		ch = &gpadc->chans[i];
1058		iio_chan = &iio_chans[i];
1059
1060		ret = ab8500_gpadc_parse_channel(gpadc->dev, child, ch,
1061						 iio_chan);
1062		if (ret) {
1063			return ret;
1064		}
1065		i++;
1066	}
1067	gpadc->nchans = nchans;
1068	*chans_parsed = iio_chans;
1069	*nchans_parsed = nchans;
1070
1071	return 0;
1072}
1073
1074static int ab8500_gpadc_probe(struct platform_device *pdev)
1075{
1076	struct ab8500_gpadc *gpadc;
1077	struct iio_dev *indio_dev;
1078	struct device *dev = &pdev->dev;
1079	struct iio_chan_spec *iio_chans;
1080	unsigned int n_iio_chans;
1081	int ret;
1082
1083	indio_dev = devm_iio_device_alloc(dev, sizeof(*gpadc));
1084	if (!indio_dev)
1085		return -ENOMEM;
1086
1087	platform_set_drvdata(pdev, indio_dev);
1088	gpadc = iio_priv(indio_dev);
1089
1090	gpadc->dev = dev;
1091	gpadc->ab8500 = dev_get_drvdata(dev->parent);
1092
1093	ret = ab8500_gpadc_parse_channels(gpadc, &iio_chans, &n_iio_chans);
1094	if (ret)
1095		return ret;
1096
1097	gpadc->irq_sw = platform_get_irq_byname(pdev, "SW_CONV_END");
1098	if (gpadc->irq_sw < 0)
1099		return gpadc->irq_sw;
1100
1101	if (is_ab8500(gpadc->ab8500)) {
1102		gpadc->irq_hw = platform_get_irq_byname(pdev, "HW_CONV_END");
1103		if (gpadc->irq_hw < 0)
1104			return gpadc->irq_hw;
1105	} else {
1106		gpadc->irq_hw = 0;
1107	}
1108
1109	/* Initialize completion used to notify completion of conversion */
1110	init_completion(&gpadc->complete);
1111
1112	/* Request interrupts */
1113	ret = devm_request_threaded_irq(dev, gpadc->irq_sw, NULL,
1114		ab8500_bm_gpadcconvend_handler,	IRQF_NO_SUSPEND | IRQF_ONESHOT,
1115		"ab8500-gpadc-sw", gpadc);
1116	if (ret < 0) {
1117		dev_err(dev,
1118			"failed to request sw conversion irq %d\n",
1119			gpadc->irq_sw);
1120		return ret;
1121	}
1122
1123	if (gpadc->irq_hw) {
1124		ret = devm_request_threaded_irq(dev, gpadc->irq_hw, NULL,
1125			ab8500_bm_gpadcconvend_handler,	IRQF_NO_SUSPEND | IRQF_ONESHOT,
1126			"ab8500-gpadc-hw", gpadc);
1127		if (ret < 0) {
1128			dev_err(dev,
1129				"Failed to request hw conversion irq: %d\n",
1130				gpadc->irq_hw);
1131			return ret;
1132		}
1133	}
1134
1135	/* The VTVout LDO used to power the AB8500 GPADC */
1136	gpadc->vddadc = devm_regulator_get(dev, "vddadc");
1137	if (IS_ERR(gpadc->vddadc))
1138		return dev_err_probe(dev, PTR_ERR(gpadc->vddadc),
1139				     "failed to get vddadc\n");
1140
1141	ret = regulator_enable(gpadc->vddadc);
1142	if (ret) {
1143		dev_err(dev, "failed to enable vddadc: %d\n", ret);
1144		return ret;
1145	}
1146
1147	/* Enable runtime PM */
1148	pm_runtime_get_noresume(dev);
1149	pm_runtime_set_active(dev);
1150	pm_runtime_enable(dev);
1151	pm_runtime_set_autosuspend_delay(dev, AB8500_GPADC_AUTOSUSPEND_DELAY);
1152	pm_runtime_use_autosuspend(dev);
1153
1154	ab8500_gpadc_read_calibration_data(gpadc);
1155
1156	pm_runtime_put(dev);
1157
1158	indio_dev->name = "ab8500-gpadc";
1159	indio_dev->modes = INDIO_DIRECT_MODE;
1160	indio_dev->info = &ab8500_gpadc_info;
1161	indio_dev->channels = iio_chans;
1162	indio_dev->num_channels = n_iio_chans;
1163
1164	ret = devm_iio_device_register(dev, indio_dev);
1165	if (ret)
1166		goto out_dis_pm;
1167
1168	return 0;
1169
1170out_dis_pm:
1171	pm_runtime_get_sync(dev);
1172	pm_runtime_put_noidle(dev);
1173	pm_runtime_disable(dev);
1174	regulator_disable(gpadc->vddadc);
1175
1176	return ret;
1177}
1178
1179static void ab8500_gpadc_remove(struct platform_device *pdev)
1180{
1181	struct iio_dev *indio_dev = platform_get_drvdata(pdev);
1182	struct ab8500_gpadc *gpadc = iio_priv(indio_dev);
1183
1184	pm_runtime_get_sync(gpadc->dev);
1185	pm_runtime_put_noidle(gpadc->dev);
1186	pm_runtime_disable(gpadc->dev);
1187	regulator_disable(gpadc->vddadc);
1188}
1189
1190static DEFINE_RUNTIME_DEV_PM_OPS(ab8500_gpadc_pm_ops,
1191				 ab8500_gpadc_runtime_suspend,
1192				 ab8500_gpadc_runtime_resume, NULL);
1193
1194static struct platform_driver ab8500_gpadc_driver = {
1195	.probe = ab8500_gpadc_probe,
1196	.remove = ab8500_gpadc_remove,
1197	.driver = {
1198		.name = "ab8500-gpadc",
1199		.pm = pm_ptr(&ab8500_gpadc_pm_ops),
1200	},
1201};
1202builtin_platform_driver(ab8500_gpadc_driver);