kxcjk-1013.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * KXCJK-1013 3-axis accelerometer driver
   4 * Copyright (c) 2014, Intel Corporation.
   5 */
   6
   7#include <linux/i2c.h>
   8#include <linux/interrupt.h>
   9#include <linux/delay.h>
  10#include <linux/bitops.h>
  11#include <linux/mod_devicetable.h>
  12#include <linux/module.h>
  13#include <linux/slab.h>
  14#include <linux/string.h>
  15#include <linux/types.h>
  16#include <linux/acpi.h>
  17#include <linux/pm.h>
  18#include <linux/pm_runtime.h>
  19#include <linux/regulator/consumer.h>
  20#include <linux/iio/iio.h>
  21#include <linux/iio/sysfs.h>
  22#include <linux/iio/buffer.h>
  23#include <linux/iio/trigger.h>
  24#include <linux/iio/events.h>
  25#include <linux/iio/trigger_consumer.h>
  26#include <linux/iio/triggered_buffer.h>
  27#include <linux/iio/accel/kxcjk_1013.h>
  28
  29#define KXTF9_REG_HP_XOUT_L		0x00
  30#define KXTF9_REG_HP_XOUT_H		0x01
  31#define KXTF9_REG_HP_YOUT_L		0x02
  32#define KXTF9_REG_HP_YOUT_H		0x03
  33#define KXTF9_REG_HP_ZOUT_L		0x04
  34#define KXTF9_REG_HP_ZOUT_H		0x05
  35
  36#define KXCJK1013_REG_XOUT_L		0x06
  37/*
  38 * From low byte X axis register, all the other addresses of Y and Z can be
  39 * obtained by just applying axis offset. The following axis defines are just
  40 * provide clarity, but not used.
  41 */
  42#define KXCJK1013_REG_XOUT_H		0x07
  43#define KXCJK1013_REG_YOUT_L		0x08
  44#define KXCJK1013_REG_YOUT_H		0x09
  45#define KXCJK1013_REG_ZOUT_L		0x0A
  46#define KXCJK1013_REG_ZOUT_H		0x0B
  47
  48#define KXCJK1013_REG_DCST_RESP		0x0C
  49#define KXCJK1013_REG_WHO_AM_I		0x0F
  50#define KXTF9_REG_TILT_POS_CUR		0x10
  51#define KXTF9_REG_TILT_POS_PREV		0x11
  52#define KXTF9_REG_INT_SRC1		0x15
  53#define KXTF9_REG_INT_SRC2		0x16
  54#define KXCJK1013_REG_INT_SRC1		0x16
  55#define KXCJK1013_REG_INT_SRC2		0x17
  56#define KXCJK1013_REG_STATUS_REG	0x18
  57#define KXCJK1013_REG_INT_REL		0x1A
  58#define KXCJK1013_REG_CTRL1		0x1B
  59#define KXTF9_REG_CTRL2			0x1C
  60#define KXTF9_REG_CTRL3			0x1D
  61#define KXCJK1013_REG_CTRL2		0x1D
  62#define KXCJK1013_REG_INT_CTRL1		0x1E
  63#define KXCJK1013_REG_INT_CTRL2		0x1F
  64#define KXTF9_REG_INT_CTRL3		0x20
  65#define KXCJK1013_REG_DATA_CTRL		0x21
  66#define KXTF9_REG_TILT_TIMER		0x28
  67#define KXCJK1013_REG_WAKE_TIMER	0x29
  68#define KXTF9_REG_TDT_TIMER		0x2B
  69#define KXTF9_REG_TDT_THRESH_H		0x2C
  70#define KXTF9_REG_TDT_THRESH_L		0x2D
  71#define KXTF9_REG_TDT_TAP_TIMER		0x2E
  72#define KXTF9_REG_TDT_TOTAL_TIMER	0x2F
  73#define KXTF9_REG_TDT_LATENCY_TIMER	0x30
  74#define KXTF9_REG_TDT_WINDOW_TIMER	0x31
  75#define KXCJK1013_REG_SELF_TEST		0x3A
  76#define KXTF9_REG_WAKE_THRESH		0x5A
  77#define KXTF9_REG_TILT_ANGLE		0x5C
  78#define KXTF9_REG_HYST_SET		0x5F
  79#define KXCJK1013_REG_WAKE_THRES	0x6A
  80
  81/* Everything up to 0x11 is equal to KXCJK1013/KXTF9 above */
  82#define KX023_REG_INS1			0x12
  83#define KX023_REG_INS2			0x13
  84#define KX023_REG_INS3			0x14
  85#define KX023_REG_STAT			0x15
  86#define KX023_REG_INT_REL		0x17
  87#define KX023_REG_CNTL1			0x18
  88#define KX023_REG_CNTL2			0x19
  89#define KX023_REG_CNTL3			0x1A
  90#define KX023_REG_ODCNTL		0x1B
  91#define KX023_REG_INC1			0x1C
  92#define KX023_REG_INC2			0x1D
  93#define KX023_REG_INC3			0x1E
  94#define KX023_REG_INC4			0x1F
  95#define KX023_REG_INC5			0x20
  96#define KX023_REG_INC6			0x21
  97#define KX023_REG_TILT_TIMER		0x22
  98#define KX023_REG_WUFC			0x23
  99#define KX023_REG_TDTRC			0x24
 100#define KX023_REG_TDTC			0x25
 101#define KX023_REG_TTH			0x26
 102#define KX023_REG_TTL			0x27
 103#define KX023_REG_FTD			0x28
 104#define KX023_REG_STD			0x29
 105#define KX023_REG_TLT			0x2A
 106#define KX023_REG_TWS			0x2B
 107#define KX023_REG_ATH			0x30
 108#define KX023_REG_TILT_ANGLE_LL		0x32
 109#define KX023_REG_TILT_ANGLE_HL		0x33
 110#define KX023_REG_HYST_SET		0x34
 111#define KX023_REG_LP_CNTL		0x35
 112#define KX023_REG_BUF_CNTL1		0x3A
 113#define KX023_REG_BUF_CNTL2		0x3B
 114#define KX023_REG_BUF_STATUS_1		0x3C
 115#define KX023_REG_BUF_STATUS_2		0x3D
 116#define KX023_REG_BUF_CLEAR		0x3E
 117#define KX023_REG_BUF_READ		0x3F
 118#define KX023_REG_SELF_TEST		0x60
 119
 120#define KXCJK1013_REG_CTRL1_BIT_PC1	BIT(7)
 121#define KXCJK1013_REG_CTRL1_BIT_RES	BIT(6)
 122#define KXCJK1013_REG_CTRL1_BIT_DRDY	BIT(5)
 123#define KXCJK1013_REG_CTRL1_BIT_GSEL1	BIT(4)
 124#define KXCJK1013_REG_CTRL1_BIT_GSEL0	BIT(3)
 125#define KXCJK1013_REG_CTRL1_BIT_WUFE	BIT(1)
 126
 127#define KXCJK1013_REG_INT_CTRL1_BIT_IEU	BIT(2)	/* KXTF9 */
 128#define KXCJK1013_REG_INT_CTRL1_BIT_IEL	BIT(3)
 129#define KXCJK1013_REG_INT_CTRL1_BIT_IEA	BIT(4)
 130#define KXCJK1013_REG_INT_CTRL1_BIT_IEN	BIT(5)
 131
 132#define KXTF9_REG_TILT_BIT_LEFT_EDGE	BIT(5)
 133#define KXTF9_REG_TILT_BIT_RIGHT_EDGE	BIT(4)
 134#define KXTF9_REG_TILT_BIT_LOWER_EDGE	BIT(3)
 135#define KXTF9_REG_TILT_BIT_UPPER_EDGE	BIT(2)
 136#define KXTF9_REG_TILT_BIT_FACE_DOWN	BIT(1)
 137#define KXTF9_REG_TILT_BIT_FACE_UP	BIT(0)
 138
 139#define KXCJK1013_DATA_MASK_12_BIT	0x0FFF
 140#define KXCJK1013_MAX_STARTUP_TIME_US	100000
 141
 142#define KXCJK1013_SLEEP_DELAY_MS	2000
 143
 144#define KXCJK1013_REG_INT_SRC1_BIT_TPS	BIT(0)	/* KXTF9 */
 145#define KXCJK1013_REG_INT_SRC1_BIT_WUFS	BIT(1)
 146#define KXCJK1013_REG_INT_SRC1_MASK_TDTS	(BIT(2) | BIT(3))	/* KXTF9 */
 147#define KXCJK1013_REG_INT_SRC1_TAP_NONE		0
 148#define KXCJK1013_REG_INT_SRC1_TAP_SINGLE		BIT(2)
 149#define KXCJK1013_REG_INT_SRC1_TAP_DOUBLE		BIT(3)
 150#define KXCJK1013_REG_INT_SRC1_BIT_DRDY	BIT(4)
 151
 152/* KXCJK: INT_SOURCE2: motion detect, KXTF9: INT_SRC_REG1: tap detect */
 153#define KXCJK1013_REG_INT_SRC2_BIT_ZP	BIT(0)
 154#define KXCJK1013_REG_INT_SRC2_BIT_ZN	BIT(1)
 155#define KXCJK1013_REG_INT_SRC2_BIT_YP	BIT(2)
 156#define KXCJK1013_REG_INT_SRC2_BIT_YN	BIT(3)
 157#define KXCJK1013_REG_INT_SRC2_BIT_XP	BIT(4)
 158#define KXCJK1013_REG_INT_SRC2_BIT_XN	BIT(5)
 159
 160/* KX023 interrupt routing to INT1. INT2 can be configured with INC6 */
 161#define KX023_REG_INC4_BFI1		BIT(6)
 162#define KX023_REG_INC4_WMI1		BIT(5)
 163#define KX023_REG_INC4_DRDY1		BIT(4)
 164#define KX023_REG_INC4_TDTI1		BIT(2)
 165#define KX023_REG_INC4_WUFI1		BIT(1)
 166#define KX023_REG_INC4_TPI1		BIT(0)
 167
 168#define KXCJK1013_DEFAULT_WAKE_THRES	1
 169
 170/* Refer to section 4 of the specification */
 171struct kx_odr_start_up_time {
 172	int odr_bits;
 173	int usec;
 174};
 175
 176/* KXCJK-1013 */
 177static const struct kx_odr_start_up_time kxcjk1013_odr_start_up_times[] = {
 178	{ 0x08, 100000 },
 179	{ 0x09, 100000 },
 180	{ 0x0A, 100000 },
 181	{ 0x0B, 100000 },
 182	{ 0x00, 80000 },
 183	{ 0x01, 41000 },
 184	{ 0x02, 21000 },
 185	{ 0x03, 11000 },
 186	{ 0x04, 6400 },
 187	{ 0x05, 3900 },
 188	{ 0x06, 2700 },
 189	{ 0x07, 2100 },
 190	{ }
 191};
 192
 193/* KXCTJ2-1009 */
 194static const struct kx_odr_start_up_time kxtj21009_odr_start_up_times[] = {
 195	{ 0x08, 1240000 },
 196	{ 0x09, 621000 },
 197	{ 0x0A, 309000 },
 198	{ 0x0B, 151000 },
 199	{ 0x00, 80000 },
 200	{ 0x01, 41000 },
 201	{ 0x02, 21000 },
 202	{ 0x03, 11000 },
 203	{ 0x04, 6000 },
 204	{ 0x05, 4000 },
 205	{ 0x06, 3000 },
 206	{ 0x07, 2000 },
 207	{ }
 208};
 209
 210/* KXTF9 */
 211static const struct kx_odr_start_up_time kxtf9_odr_start_up_times[] = {
 212	{ 0x01, 81000 },
 213	{ 0x02, 41000 },
 214	{ 0x03, 21000 },
 215	{ 0x04, 11000 },
 216	{ 0x05, 5100 },
 217	{ 0x06, 2700 },
 218	{ }
 219};
 220
 221/* KX023-1025 */
 222static const struct kx_odr_start_up_time kx0231025_odr_start_up_times[] = {
 223	/* First 4 are not in datasheet, taken from KXCTJ2-1009 */
 224	{ 0x08, 1240000 },
 225	{ 0x09, 621000 },
 226	{ 0x0A, 309000 },
 227	{ 0x0B, 151000 },
 228	{ 0x00, 81000 },
 229	{ 0x01, 40000 },
 230	{ 0x02, 22000 },
 231	{ 0x03, 12000 },
 232	{ 0x04, 7000 },
 233	{ 0x05, 4400 },
 234	{ 0x06, 3000 },
 235	{ 0x07, 3000 },
 236	{ }
 237};
 238
 239enum kx_acpi_type {
 240	ACPI_GENERIC,
 241	ACPI_SMO8500,
 242	ACPI_KIOX010A,
 243};
 244
 245struct kx_chipset_regs {
 246	u8 int_src1;
 247	u8 int_src2;
 248	u8 int_rel;
 249	u8 ctrl1;
 250	u8 wuf_ctrl;
 251	u8 int_ctrl1;
 252	u8 data_ctrl;
 253	u8 wake_timer;
 254	u8 wake_thres;
 255};
 256
 257static const struct kx_chipset_regs kxcjk1013_regs = {
 258	.int_src1	= KXCJK1013_REG_INT_SRC1,
 259	.int_src2	= KXCJK1013_REG_INT_SRC2,
 260	.int_rel	= KXCJK1013_REG_INT_REL,
 261	.ctrl1		= KXCJK1013_REG_CTRL1,
 262	.wuf_ctrl	= KXCJK1013_REG_CTRL2,
 263	.int_ctrl1	= KXCJK1013_REG_INT_CTRL1,
 264	.data_ctrl	= KXCJK1013_REG_DATA_CTRL,
 265	.wake_timer	= KXCJK1013_REG_WAKE_TIMER,
 266	.wake_thres	= KXCJK1013_REG_WAKE_THRES,
 267};
 268
 269static const struct kx_chipset_regs kxtf9_regs = {
 270	/* .int_src1 was moved to INT_SRC2 on KXTF9 */
 271	.int_src1	= KXTF9_REG_INT_SRC2,
 272	/* .int_src2 is not available */
 273	.int_rel	= KXCJK1013_REG_INT_REL,
 274	.ctrl1		= KXCJK1013_REG_CTRL1,
 275	.wuf_ctrl	= KXTF9_REG_CTRL3,
 276	.int_ctrl1	= KXCJK1013_REG_INT_CTRL1,
 277	.data_ctrl	= KXCJK1013_REG_DATA_CTRL,
 278	.wake_timer	= KXCJK1013_REG_WAKE_TIMER,
 279	.wake_thres	= KXTF9_REG_WAKE_THRESH,
 280};
 281
 282/* The registers have totally different names but the bits are compatible */
 283static const struct kx_chipset_regs kx0231025_regs = {
 284	.int_src1	= KX023_REG_INS2,
 285	.int_src2	= KX023_REG_INS3,
 286	.int_rel	= KX023_REG_INT_REL,
 287	.ctrl1		= KX023_REG_CNTL1,
 288	.wuf_ctrl	= KX023_REG_CNTL3,
 289	.int_ctrl1	= KX023_REG_INC1,
 290	.data_ctrl	= KX023_REG_ODCNTL,
 291	.wake_timer	= KX023_REG_WUFC,
 292	.wake_thres	= KX023_REG_ATH,
 293};
 294
 295struct kx_chipset_info {
 296	const struct kx_chipset_regs *regs;
 297	const struct kx_odr_start_up_time *times;
 298	enum kx_acpi_type acpi_type;
 299};
 300
 301static const struct kx_chipset_info kxcjk1013_info = {
 302	.regs = &kxcjk1013_regs,
 303	.times = pm_ptr(kxcjk1013_odr_start_up_times),
 304};
 305
 306static const struct kx_chipset_info kxcj91008_info = {
 307	.regs = &kxcjk1013_regs,
 308	.times = pm_ptr(kxcjk1013_odr_start_up_times),
 309};
 310
 311static const struct kx_chipset_info kxcj91008_kiox010a_info = {
 312	.regs = &kxcjk1013_regs,
 313	.times = pm_ptr(kxcjk1013_odr_start_up_times),
 314	.acpi_type = ACPI_KIOX010A,
 315};
 316
 317static const struct kx_chipset_info kxcj91008_kiox020a_info = {
 318	.regs = &kxcjk1013_regs,
 319	.times = pm_ptr(kxcjk1013_odr_start_up_times),
 320	.acpi_type = ACPI_GENERIC,
 321};
 322
 323static const struct kx_chipset_info kxcj91008_smo8500_info = {
 324	.regs = &kxcjk1013_regs,
 325	.times = pm_ptr(kxcjk1013_odr_start_up_times),
 326	.acpi_type = ACPI_SMO8500,
 327};
 328
 329static const struct kx_chipset_info kxtj21009_info = {
 330	.regs = &kxcjk1013_regs,
 331	.times = pm_ptr(kxtj21009_odr_start_up_times),
 332};
 333
 334static const struct kx_chipset_info kxtf9_info = {
 335	.regs = &kxtf9_regs,
 336	.times = pm_ptr(kxtf9_odr_start_up_times),
 337};
 338
 339static const struct kx_chipset_info kx0231025_info = {
 340	.regs = &kx0231025_regs,
 341	.times = pm_ptr(kx0231025_odr_start_up_times),
 342};
 343
 344enum kxcjk1013_axis {
 345	AXIS_X,
 346	AXIS_Y,
 347	AXIS_Z,
 348	AXIS_MAX
 349};
 350
 351struct kxcjk1013_data {
 352	struct i2c_client *client;
 353	struct iio_trigger *dready_trig;
 354	struct iio_trigger *motion_trig;
 355	struct iio_mount_matrix orientation;
 356	struct mutex mutex;
 357	/* Ensure timestamp naturally aligned */
 358	struct {
 359		s16 chans[AXIS_MAX];
 360		aligned_s64 timestamp;
 361	} scan;
 362	u8 odr_bits;
 363	u8 range;
 364	int wake_thres;
 365	int wake_dur;
 366	bool active_high_intr;
 367	bool dready_trigger_on;
 368	int ev_enable_state;
 369	bool motion_trigger_on;
 370	int64_t timestamp;
 371	const struct kx_chipset_info *info;
 372};
 373
 374enum kxcjk1013_mode {
 375	STANDBY,
 376	OPERATION,
 377};
 378
 379enum kxcjk1013_range {
 380	KXCJK1013_RANGE_2G,
 381	KXCJK1013_RANGE_4G,
 382	KXCJK1013_RANGE_8G,
 383};
 384
 385struct kx_odr_map {
 386	int val;
 387	int val2;
 388	int odr_bits;
 389	int wuf_bits;
 390};
 391
 392static const struct kx_odr_map samp_freq_table[] = {
 393	{ 0, 781000, 0x08, 0x00 },
 394	{ 1, 563000, 0x09, 0x01 },
 395	{ 3, 125000, 0x0A, 0x02 },
 396	{ 6, 250000, 0x0B, 0x03 },
 397	{ 12, 500000, 0x00, 0x04 },
 398	{ 25, 0, 0x01, 0x05 },
 399	{ 50, 0, 0x02, 0x06 },
 400	{ 100, 0, 0x03, 0x06 },
 401	{ 200, 0, 0x04, 0x06 },
 402	{ 400, 0, 0x05, 0x06 },
 403	{ 800, 0, 0x06, 0x06 },
 404	{ 1600, 0, 0x07, 0x06 },
 405};
 406
 407static const char *const kxcjk1013_samp_freq_avail =
 408	"0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600";
 409
 410static const struct kx_odr_map kxtf9_samp_freq_table[] = {
 411	{ 25, 0, 0x01, 0x00 },
 412	{ 50, 0, 0x02, 0x01 },
 413	{ 100, 0, 0x03, 0x01 },
 414	{ 200, 0, 0x04, 0x01 },
 415	{ 400, 0, 0x05, 0x01 },
 416	{ 800, 0, 0x06, 0x01 },
 417};
 418
 419static const char *const kxtf9_samp_freq_avail =
 420	"25 50 100 200 400 800";
 421
 422static const struct {
 423	u16 scale;
 424	u8 gsel_0;
 425	u8 gsel_1;
 426} KXCJK1013_scale_table[] = { {9582, 0, 0},
 427			      {19163, 1, 0},
 428			      {38326, 0, 1} };
 429
 430#ifdef CONFIG_ACPI
 431enum kiox010a_fn_index {
 432	KIOX010A_SET_LAPTOP_MODE = 1,
 433	KIOX010A_SET_TABLET_MODE = 2,
 434};
 435
 436static int kiox010a_dsm(struct device *dev, int fn_index)
 437{
 438	acpi_handle handle = ACPI_HANDLE(dev);
 439	guid_t kiox010a_dsm_guid;
 440	union acpi_object *obj;
 441
 442	if (!handle)
 443		return -ENODEV;
 444
 445	guid_parse("1f339696-d475-4e26-8cad-2e9f8e6d7a91", &kiox010a_dsm_guid);
 446
 447	obj = acpi_evaluate_dsm(handle, &kiox010a_dsm_guid, 1, fn_index, NULL);
 448	if (!obj)
 449		return -EIO;
 450
 451	ACPI_FREE(obj);
 452	return 0;
 453}
 454
 455#endif
 456
 457static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
 458			      enum kxcjk1013_mode mode)
 459{
 460	const struct kx_chipset_regs *regs = data->info->regs;
 461	int ret;
 462
 463	ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1);
 464	if (ret < 0) {
 465		dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
 466		return ret;
 467	}
 468
 469	if (mode == STANDBY)
 470		ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1;
 471	else
 472		ret |= KXCJK1013_REG_CTRL1_BIT_PC1;
 473
 474	ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret);
 475	if (ret < 0) {
 476		dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
 477		return ret;
 478	}
 479
 480	return 0;
 481}
 482
 483static int kxcjk1013_get_mode(struct kxcjk1013_data *data,
 484			      enum kxcjk1013_mode *mode)
 485{
 486	const struct kx_chipset_regs *regs = data->info->regs;
 487	int ret;
 488
 489	ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1);
 490	if (ret < 0) {
 491		dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
 492		return ret;
 493	}
 494
 495	if (ret & KXCJK1013_REG_CTRL1_BIT_PC1)
 496		*mode = OPERATION;
 497	else
 498		*mode = STANDBY;
 499
 500	return 0;
 501}
 502
 503static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index)
 504{
 505	const struct kx_chipset_regs *regs = data->info->regs;
 506	int ret;
 507
 508	ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1);
 509	if (ret < 0) {
 510		dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
 511		return ret;
 512	}
 513
 514	ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 |
 515		 KXCJK1013_REG_CTRL1_BIT_GSEL1);
 516	ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3);
 517	ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4);
 518
 519	ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret);
 520	if (ret < 0) {
 521		dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
 522		return ret;
 523	}
 524
 525	data->range = range_index;
 526
 527	return 0;
 528}
 529
 530static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
 531{
 532	const struct kx_chipset_regs *regs = data->info->regs;
 533	int ret;
 534
 535#ifdef CONFIG_ACPI
 536	if (data->info->acpi_type == ACPI_KIOX010A) {
 537		/* Make sure the kbd and touchpad on 2-in-1s using 2 KXCJ91008-s work */
 538		kiox010a_dsm(&data->client->dev, KIOX010A_SET_LAPTOP_MODE);
 539	}
 540#endif
 541
 542	ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I);
 543	if (ret < 0) {
 544		dev_err(&data->client->dev, "Error reading who_am_i\n");
 545		return ret;
 546	}
 547
 548	dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret);
 549
 550	ret = kxcjk1013_set_mode(data, STANDBY);
 551	if (ret < 0)
 552		return ret;
 553
 554	ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1);
 555	if (ret < 0) {
 556		dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
 557		return ret;
 558	}
 559
 560	/* Set 12 bit mode */
 561	ret |= KXCJK1013_REG_CTRL1_BIT_RES;
 562
 563	ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret);
 564	if (ret < 0) {
 565		dev_err(&data->client->dev, "Error reading reg_ctrl\n");
 566		return ret;
 567	}
 568
 569	/* Setting range to 4G */
 570	ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G);
 571	if (ret < 0)
 572		return ret;
 573
 574	ret = i2c_smbus_read_byte_data(data->client, regs->data_ctrl);
 575	if (ret < 0) {
 576		dev_err(&data->client->dev, "Error reading reg_data_ctrl\n");
 577		return ret;
 578	}
 579
 580	data->odr_bits = ret;
 581
 582	/* Set up INT polarity */
 583	ret = i2c_smbus_read_byte_data(data->client, regs->int_ctrl1);
 584	if (ret < 0) {
 585		dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
 586		return ret;
 587	}
 588
 589	if (data->active_high_intr)
 590		ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEA;
 591	else
 592		ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEA;
 593
 594	ret = i2c_smbus_write_byte_data(data->client, regs->int_ctrl1, ret);
 595	if (ret < 0) {
 596		dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
 597		return ret;
 598	}
 599
 600	/* On KX023, route all used interrupts to INT1 for now */
 601	if (data->info == &kx0231025_info && data->client->irq > 0) {
 602		ret = i2c_smbus_write_byte_data(data->client, KX023_REG_INC4,
 603						KX023_REG_INC4_DRDY1 |
 604						KX023_REG_INC4_WUFI1);
 605		if (ret < 0) {
 606			dev_err(&data->client->dev, "Error writing reg_inc4\n");
 607			return ret;
 608		}
 609	}
 610
 611	ret = kxcjk1013_set_mode(data, OPERATION);
 612	if (ret < 0)
 613		return ret;
 614
 615	data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES;
 616
 617	return 0;
 618}
 619
 620static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data)
 621{
 622	const struct kx_odr_start_up_time *times;
 623
 624	for (times = data->info->times; times->usec; times++) {
 625		if (times->odr_bits == data->odr_bits)
 626			return times->usec;
 627	}
 628
 629	return KXCJK1013_MAX_STARTUP_TIME_US;
 630}
 631
 632static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on)
 633{
 634#ifdef CONFIG_PM
 635	int ret;
 636
 637	if (on)
 638		ret = pm_runtime_resume_and_get(&data->client->dev);
 639	else
 640		ret = pm_runtime_put_autosuspend(&data->client->dev);
 641	if (ret < 0) {
 642		dev_err(&data->client->dev,
 643			"Failed: %s for %d\n", __func__, on);
 644		return ret;
 645	}
 646#endif
 647
 648	return 0;
 649}
 650
 651static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data)
 652{
 653	const struct kx_chipset_regs *regs = data->info->regs;
 654	int ret;
 655
 656	ret = i2c_smbus_write_byte_data(data->client, regs->wake_timer, data->wake_dur);
 657	if (ret < 0) {
 658		dev_err(&data->client->dev,
 659			"Error writing reg_wake_timer\n");
 660		return ret;
 661	}
 662
 663	ret = i2c_smbus_write_byte_data(data->client, regs->wake_thres, data->wake_thres);
 664	if (ret < 0) {
 665		dev_err(&data->client->dev, "Error writing reg_wake_thres\n");
 666		return ret;
 667	}
 668
 669	return 0;
 670}
 671
 672static int kxcjk1013_setup_interrupt(struct kxcjk1013_data *data,
 673						bool status, bool is_new_data)
 674{
 675	const struct kx_chipset_regs *regs = data->info->regs;
 676	int ret;
 677	enum kxcjk1013_mode store_mode;
 678
 679	ret = kxcjk1013_get_mode(data, &store_mode);
 680	if (ret < 0)
 681		return ret;
 682
 683	/* This is requirement by spec to change state to STANDBY */
 684	ret = kxcjk1013_set_mode(data, STANDBY);
 685	if (ret < 0)
 686		return ret;
 687
 688	if (is_new_data == true) {
 689		ret = kxcjk1013_chip_update_thresholds(data);
 690		if (ret < 0)
 691			return ret;
 692	}
 693
 694	ret = i2c_smbus_read_byte_data(data->client, regs->int_ctrl1);
 695	if (ret < 0) {
 696		dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
 697		return ret;
 698	}
 699
 700	if (status)
 701		ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN;
 702	else
 703		ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN;
 704
 705	ret = i2c_smbus_write_byte_data(data->client, regs->int_ctrl1, ret);
 706	if (ret < 0) {
 707		dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
 708		return ret;
 709	}
 710
 711	ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1);
 712	if (ret < 0) {
 713		dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
 714		return ret;
 715	}
 716
 717	if (is_new_data) {
 718		if (status)
 719			ret |= KXCJK1013_REG_CTRL1_BIT_DRDY;
 720		else
 721			ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY;
 722	} else {
 723		if (status)
 724			ret |= KXCJK1013_REG_CTRL1_BIT_WUFE;
 725		else
 726			ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE;
 727	}
 728
 729	ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret);
 730	if (ret < 0) {
 731		dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
 732		return ret;
 733	}
 734
 735	if (store_mode == OPERATION) {
 736		ret = kxcjk1013_set_mode(data, OPERATION);
 737		if (ret < 0)
 738			return ret;
 739	}
 740
 741	return 0;
 742}
 743
 744static const struct kx_odr_map *kxcjk1013_find_odr_value(
 745	const struct kx_odr_map *map, size_t map_size, int val, int val2)
 746{
 747	int i;
 748
 749	for (i = 0; i < map_size; ++i) {
 750		if (map[i].val == val && map[i].val2 == val2)
 751			return &map[i];
 752	}
 753
 754	return ERR_PTR(-EINVAL);
 755}
 756
 757static int kxcjk1013_convert_odr_value(const struct kx_odr_map *map,
 758				       size_t map_size, int odr_bits,
 759				       int *val, int *val2)
 760{
 761	int i;
 762
 763	for (i = 0; i < map_size; ++i) {
 764		if (map[i].odr_bits == odr_bits) {
 765			*val = map[i].val;
 766			*val2 = map[i].val2;
 767			return IIO_VAL_INT_PLUS_MICRO;
 768		}
 769	}
 770
 771	return -EINVAL;
 772}
 773
 774static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2)
 775{
 776	const struct kx_chipset_regs *regs = data->info->regs;
 777	int ret;
 778	enum kxcjk1013_mode store_mode;
 779	const struct kx_odr_map *odr_setting;
 780
 781	ret = kxcjk1013_get_mode(data, &store_mode);
 782	if (ret < 0)
 783		return ret;
 784
 785	if (data->info == &kxtf9_info)
 786		odr_setting = kxcjk1013_find_odr_value(kxtf9_samp_freq_table,
 787						       ARRAY_SIZE(kxtf9_samp_freq_table),
 788						       val, val2);
 789	else
 790		odr_setting = kxcjk1013_find_odr_value(samp_freq_table,
 791						       ARRAY_SIZE(samp_freq_table),
 792						       val, val2);
 793
 794	if (IS_ERR(odr_setting))
 795		return PTR_ERR(odr_setting);
 796
 797	/* To change ODR, the chip must be set to STANDBY as per spec */
 798	ret = kxcjk1013_set_mode(data, STANDBY);
 799	if (ret < 0)
 800		return ret;
 801
 802	ret = i2c_smbus_write_byte_data(data->client, regs->data_ctrl,
 803					odr_setting->odr_bits);
 804	if (ret < 0) {
 805		dev_err(&data->client->dev, "Error writing data_ctrl\n");
 806		return ret;
 807	}
 808
 809	data->odr_bits = odr_setting->odr_bits;
 810
 811	ret = i2c_smbus_write_byte_data(data->client, regs->wuf_ctrl,
 812					odr_setting->wuf_bits);
 813	if (ret < 0) {
 814		dev_err(&data->client->dev, "Error writing reg_ctrl2\n");
 815		return ret;
 816	}
 817
 818	if (store_mode == OPERATION) {
 819		ret = kxcjk1013_set_mode(data, OPERATION);
 820		if (ret < 0)
 821			return ret;
 822	}
 823
 824	return 0;
 825}
 826
 827static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2)
 828{
 829	if (data->info == &kxtf9_info)
 830		return kxcjk1013_convert_odr_value(kxtf9_samp_freq_table,
 831						   ARRAY_SIZE(kxtf9_samp_freq_table),
 832						   data->odr_bits, val, val2);
 833	else
 834		return kxcjk1013_convert_odr_value(samp_freq_table,
 835						   ARRAY_SIZE(samp_freq_table),
 836						   data->odr_bits, val, val2);
 837}
 838
 839static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis)
 840{
 841	u8 reg = KXCJK1013_REG_XOUT_L + axis * 2;
 842	int ret;
 843
 844	ret = i2c_smbus_read_word_data(data->client, reg);
 845	if (ret < 0) {
 846		dev_err(&data->client->dev,
 847			"failed to read accel_%c registers\n", 'x' + axis);
 848		return ret;
 849	}
 850
 851	return ret;
 852}
 853
 854static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val)
 855{
 856	int ret, i;
 857	enum kxcjk1013_mode store_mode;
 858
 859	for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) {
 860		if (KXCJK1013_scale_table[i].scale == val) {
 861			ret = kxcjk1013_get_mode(data, &store_mode);
 862			if (ret < 0)
 863				return ret;
 864
 865			ret = kxcjk1013_set_mode(data, STANDBY);
 866			if (ret < 0)
 867				return ret;
 868
 869			ret = kxcjk1013_set_range(data, i);
 870			if (ret < 0)
 871				return ret;
 872
 873			if (store_mode == OPERATION) {
 874				ret = kxcjk1013_set_mode(data, OPERATION);
 875				if (ret)
 876					return ret;
 877			}
 878
 879			return 0;
 880		}
 881	}
 882
 883	return -EINVAL;
 884}
 885
 886static int kxcjk1013_read_raw(struct iio_dev *indio_dev,
 887			      struct iio_chan_spec const *chan, int *val,
 888			      int *val2, long mask)
 889{
 890	struct kxcjk1013_data *data = iio_priv(indio_dev);
 891	int ret;
 892
 893	switch (mask) {
 894	case IIO_CHAN_INFO_RAW:
 895		mutex_lock(&data->mutex);
 896		if (iio_buffer_enabled(indio_dev))
 897			ret = -EBUSY;
 898		else {
 899			ret = kxcjk1013_set_power_state(data, true);
 900			if (ret < 0) {
 901				mutex_unlock(&data->mutex);
 902				return ret;
 903			}
 904			ret = kxcjk1013_get_acc_reg(data, chan->scan_index);
 905			if (ret < 0) {
 906				kxcjk1013_set_power_state(data, false);
 907				mutex_unlock(&data->mutex);
 908				return ret;
 909			}
 910			*val = sign_extend32(ret >> chan->scan_type.shift,
 911					     chan->scan_type.realbits - 1);
 912			ret = kxcjk1013_set_power_state(data, false);
 913		}
 914		mutex_unlock(&data->mutex);
 915
 916		if (ret < 0)
 917			return ret;
 918
 919		return IIO_VAL_INT;
 920
 921	case IIO_CHAN_INFO_SCALE:
 922		*val = 0;
 923		*val2 = KXCJK1013_scale_table[data->range].scale;
 924		return IIO_VAL_INT_PLUS_MICRO;
 925
 926	case IIO_CHAN_INFO_SAMP_FREQ:
 927		mutex_lock(&data->mutex);
 928		ret = kxcjk1013_get_odr(data, val, val2);
 929		mutex_unlock(&data->mutex);
 930		return ret;
 931
 932	default:
 933		return -EINVAL;
 934	}
 935}
 936
 937static int kxcjk1013_write_raw(struct iio_dev *indio_dev,
 938			       struct iio_chan_spec const *chan, int val,
 939			       int val2, long mask)
 940{
 941	struct kxcjk1013_data *data = iio_priv(indio_dev);
 942	int ret;
 943
 944	switch (mask) {
 945	case IIO_CHAN_INFO_SAMP_FREQ:
 946		mutex_lock(&data->mutex);
 947		ret = kxcjk1013_set_odr(data, val, val2);
 948		mutex_unlock(&data->mutex);
 949		break;
 950	case IIO_CHAN_INFO_SCALE:
 951		if (val)
 952			return -EINVAL;
 953
 954		mutex_lock(&data->mutex);
 955		ret = kxcjk1013_set_scale(data, val2);
 956		mutex_unlock(&data->mutex);
 957		break;
 958	default:
 959		ret = -EINVAL;
 960	}
 961
 962	return ret;
 963}
 964
 965static int kxcjk1013_read_event(struct iio_dev *indio_dev,
 966				   const struct iio_chan_spec *chan,
 967				   enum iio_event_type type,
 968				   enum iio_event_direction dir,
 969				   enum iio_event_info info,
 970				   int *val, int *val2)
 971{
 972	struct kxcjk1013_data *data = iio_priv(indio_dev);
 973
 974	*val2 = 0;
 975	switch (info) {
 976	case IIO_EV_INFO_VALUE:
 977		*val = data->wake_thres;
 978		break;
 979	case IIO_EV_INFO_PERIOD:
 980		*val = data->wake_dur;
 981		break;
 982	default:
 983		return -EINVAL;
 984	}
 985
 986	return IIO_VAL_INT;
 987}
 988
 989static int kxcjk1013_write_event(struct iio_dev *indio_dev,
 990				    const struct iio_chan_spec *chan,
 991				    enum iio_event_type type,
 992				    enum iio_event_direction dir,
 993				    enum iio_event_info info,
 994				    int val, int val2)
 995{
 996	struct kxcjk1013_data *data = iio_priv(indio_dev);
 997
 998	if (data->ev_enable_state)
 999		return -EBUSY;
1000
1001	switch (info) {
1002	case IIO_EV_INFO_VALUE:
1003		data->wake_thres = val;
1004		break;
1005	case IIO_EV_INFO_PERIOD:
1006		data->wake_dur = val;
1007		break;
1008	default:
1009		return -EINVAL;
1010	}
1011
1012	return 0;
1013}
1014
1015static int kxcjk1013_read_event_config(struct iio_dev *indio_dev,
1016					  const struct iio_chan_spec *chan,
1017					  enum iio_event_type type,
1018					  enum iio_event_direction dir)
1019{
1020	struct kxcjk1013_data *data = iio_priv(indio_dev);
1021
1022	return data->ev_enable_state;
1023}
1024
1025static int kxcjk1013_write_event_config(struct iio_dev *indio_dev,
1026					   const struct iio_chan_spec *chan,
1027					   enum iio_event_type type,
1028					   enum iio_event_direction dir,
1029					   bool state)
1030{
1031	struct kxcjk1013_data *data = iio_priv(indio_dev);
1032	int ret;
1033
1034	if (state && data->ev_enable_state)
1035		return 0;
1036
1037	mutex_lock(&data->mutex);
1038
1039	if (!state && data->motion_trigger_on) {
1040		data->ev_enable_state = 0;
1041		mutex_unlock(&data->mutex);
1042		return 0;
1043	}
1044
1045	/*
1046	 * We will expect the enable and disable to do operation in
1047	 * reverse order. This will happen here anyway as our
1048	 * resume operation uses sync mode runtime pm calls, the
1049	 * suspend operation will be delayed by autosuspend delay
1050	 * So the disable operation will still happen in reverse of
1051	 * enable operation. When runtime pm is disabled the mode
1052	 * is always on so sequence doesn't matter
1053	 */
1054	ret = kxcjk1013_set_power_state(data, state);
1055	if (ret < 0) {
1056		mutex_unlock(&data->mutex);
1057		return ret;
1058	}
1059
1060	ret =  kxcjk1013_setup_interrupt(data, state, false);
1061	if (ret < 0) {
1062		kxcjk1013_set_power_state(data, false);
1063		data->ev_enable_state = 0;
1064		mutex_unlock(&data->mutex);
1065		return ret;
1066	}
1067
1068	data->ev_enable_state = state;
1069	mutex_unlock(&data->mutex);
1070
1071	return 0;
1072}
1073
1074static int kxcjk1013_buffer_preenable(struct iio_dev *indio_dev)
1075{
1076	struct kxcjk1013_data *data = iio_priv(indio_dev);
1077
1078	return kxcjk1013_set_power_state(data, true);
1079}
1080
1081static int kxcjk1013_buffer_postdisable(struct iio_dev *indio_dev)
1082{
1083	struct kxcjk1013_data *data = iio_priv(indio_dev);
1084
1085	return kxcjk1013_set_power_state(data, false);
1086}
1087
1088static ssize_t kxcjk1013_get_samp_freq_avail(struct device *dev,
1089					     struct device_attribute *attr,
1090					     char *buf)
1091{
1092	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
1093	struct kxcjk1013_data *data = iio_priv(indio_dev);
1094	const char *str;
1095
1096	if (data->info == &kxtf9_info)
1097		str = kxtf9_samp_freq_avail;
1098	else
1099		str = kxcjk1013_samp_freq_avail;
1100
1101	return sprintf(buf, "%s\n", str);
1102}
1103
1104static IIO_DEVICE_ATTR(in_accel_sampling_frequency_available, S_IRUGO,
1105		       kxcjk1013_get_samp_freq_avail, NULL, 0);
1106
1107static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326");
1108
1109static struct attribute *kxcjk1013_attributes[] = {
1110	&iio_dev_attr_in_accel_sampling_frequency_available.dev_attr.attr,
1111	&iio_const_attr_in_accel_scale_available.dev_attr.attr,
1112	NULL,
1113};
1114
1115static const struct attribute_group kxcjk1013_attrs_group = {
1116	.attrs = kxcjk1013_attributes,
1117};
1118
1119static const struct iio_event_spec kxcjk1013_event = {
1120		.type = IIO_EV_TYPE_THRESH,
1121		.dir = IIO_EV_DIR_EITHER,
1122		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
1123				 BIT(IIO_EV_INFO_ENABLE) |
1124				 BIT(IIO_EV_INFO_PERIOD)
1125};
1126
1127static const struct iio_mount_matrix *
1128kxcjk1013_get_mount_matrix(const struct iio_dev *indio_dev,
1129			   const struct iio_chan_spec *chan)
1130{
1131	struct kxcjk1013_data *data = iio_priv(indio_dev);
1132
1133	return &data->orientation;
1134}
1135
1136static const struct iio_chan_spec_ext_info kxcjk1013_ext_info[] = {
1137	IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, kxcjk1013_get_mount_matrix),
1138	{ }
1139};
1140
1141#define KXCJK1013_CHANNEL(_axis) {					\
1142	.type = IIO_ACCEL,						\
1143	.modified = 1,							\
1144	.channel2 = IIO_MOD_##_axis,					\
1145	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),			\
1146	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |		\
1147				BIT(IIO_CHAN_INFO_SAMP_FREQ),		\
1148	.scan_index = AXIS_##_axis,					\
1149	.scan_type = {							\
1150		.sign = 's',						\
1151		.realbits = 12,						\
1152		.storagebits = 16,					\
1153		.shift = 4,						\
1154		.endianness = IIO_LE,					\
1155	},								\
1156	.event_spec = &kxcjk1013_event,				\
1157	.ext_info = kxcjk1013_ext_info,					\
1158	.num_event_specs = 1						\
1159}
1160
1161static const struct iio_chan_spec kxcjk1013_channels[] = {
1162	KXCJK1013_CHANNEL(X),
1163	KXCJK1013_CHANNEL(Y),
1164	KXCJK1013_CHANNEL(Z),
1165	IIO_CHAN_SOFT_TIMESTAMP(3),
1166};
1167
1168static const struct iio_buffer_setup_ops kxcjk1013_buffer_setup_ops = {
1169	.preenable		= kxcjk1013_buffer_preenable,
1170	.postdisable		= kxcjk1013_buffer_postdisable,
1171};
1172
1173static const struct iio_info kxcjk1013_iio_info = {
1174	.attrs			= &kxcjk1013_attrs_group,
1175	.read_raw		= kxcjk1013_read_raw,
1176	.write_raw		= kxcjk1013_write_raw,
1177	.read_event_value	= kxcjk1013_read_event,
1178	.write_event_value	= kxcjk1013_write_event,
1179	.write_event_config	= kxcjk1013_write_event_config,
1180	.read_event_config	= kxcjk1013_read_event_config,
1181};
1182
1183static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0};
1184
1185static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p)
1186{
1187	struct iio_poll_func *pf = p;
1188	struct iio_dev *indio_dev = pf->indio_dev;
1189	struct kxcjk1013_data *data = iio_priv(indio_dev);
1190	int ret;
1191
1192	mutex_lock(&data->mutex);
1193	ret = i2c_smbus_read_i2c_block_data_or_emulated(data->client,
1194							KXCJK1013_REG_XOUT_L,
1195							AXIS_MAX * 2,
1196							(u8 *)data->scan.chans);
1197	mutex_unlock(&data->mutex);
1198	if (ret < 0)
1199		goto err;
1200
1201	iio_push_to_buffers_with_ts(indio_dev, &data->scan, sizeof(data->scan),
1202				    data->timestamp);
1203err:
1204	iio_trigger_notify_done(indio_dev->trig);
1205
1206	return IRQ_HANDLED;
1207}
1208
1209static void kxcjk1013_trig_reen(struct iio_trigger *trig)
1210{
1211	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1212	struct kxcjk1013_data *data = iio_priv(indio_dev);
1213	const struct kx_chipset_regs *regs = data->info->regs;
1214	int ret;
1215
1216	ret = i2c_smbus_read_byte_data(data->client, regs->int_rel);
1217	if (ret < 0)
1218		dev_err(&data->client->dev, "Error reading reg_int_rel\n");
1219}
1220
1221static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig,
1222						bool state)
1223{
1224	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1225	struct kxcjk1013_data *data = iio_priv(indio_dev);
1226	int ret;
1227
1228	mutex_lock(&data->mutex);
1229
1230	if (!state && data->ev_enable_state && data->motion_trigger_on) {
1231		data->motion_trigger_on = false;
1232		mutex_unlock(&data->mutex);
1233		return 0;
1234	}
1235
1236	ret = kxcjk1013_set_power_state(data, state);
1237	if (ret < 0) {
1238		mutex_unlock(&data->mutex);
1239		return ret;
1240	}
1241	ret = kxcjk1013_setup_interrupt(data, state, data->motion_trig != trig);
1242	if (ret < 0) {
1243		kxcjk1013_set_power_state(data, false);
1244		mutex_unlock(&data->mutex);
1245		return ret;
1246	}
1247	if (data->motion_trig == trig)
1248		data->motion_trigger_on = state;
1249	else
1250		data->dready_trigger_on = state;
1251
1252	mutex_unlock(&data->mutex);
1253
1254	return 0;
1255}
1256
1257static const struct iio_trigger_ops kxcjk1013_trigger_ops = {
1258	.set_trigger_state = kxcjk1013_data_rdy_trigger_set_state,
1259	.reenable = kxcjk1013_trig_reen,
1260};
1261
1262static void kxcjk1013_report_motion_event(struct iio_dev *indio_dev)
1263{
1264	struct kxcjk1013_data *data = iio_priv(indio_dev);
1265	const struct kx_chipset_regs *regs = data->info->regs;
1266
1267	int ret = i2c_smbus_read_byte_data(data->client, regs->int_src2);
1268	if (ret < 0) {
1269		dev_err(&data->client->dev, "Error reading reg_int_src2\n");
1270		return;
1271	}
1272
1273	if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN)
1274		iio_push_event(indio_dev,
1275			       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1276						  0,
1277						  IIO_MOD_X,
1278						  IIO_EV_TYPE_THRESH,
1279						  IIO_EV_DIR_FALLING),
1280			       data->timestamp);
1281
1282	if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP)
1283		iio_push_event(indio_dev,
1284			       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1285						  0,
1286						  IIO_MOD_X,
1287						  IIO_EV_TYPE_THRESH,
1288						  IIO_EV_DIR_RISING),
1289			       data->timestamp);
1290
1291	if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN)
1292		iio_push_event(indio_dev,
1293			       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1294						  0,
1295						  IIO_MOD_Y,
1296						  IIO_EV_TYPE_THRESH,
1297						  IIO_EV_DIR_FALLING),
1298			       data->timestamp);
1299
1300	if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP)
1301		iio_push_event(indio_dev,
1302			       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1303						  0,
1304						  IIO_MOD_Y,
1305						  IIO_EV_TYPE_THRESH,
1306						  IIO_EV_DIR_RISING),
1307			       data->timestamp);
1308
1309	if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN)
1310		iio_push_event(indio_dev,
1311			       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1312						  0,
1313						  IIO_MOD_Z,
1314						  IIO_EV_TYPE_THRESH,
1315						  IIO_EV_DIR_FALLING),
1316			       data->timestamp);
1317
1318	if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP)
1319		iio_push_event(indio_dev,
1320			       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1321						  0,
1322						  IIO_MOD_Z,
1323						  IIO_EV_TYPE_THRESH,
1324						  IIO_EV_DIR_RISING),
1325			       data->timestamp);
1326}
1327
1328static irqreturn_t kxcjk1013_event_handler(int irq, void *private)
1329{
1330	struct iio_dev *indio_dev = private;
1331	struct kxcjk1013_data *data = iio_priv(indio_dev);
1332	const struct kx_chipset_regs *regs = data->info->regs;
1333	int ret;
1334
1335	ret = i2c_smbus_read_byte_data(data->client, regs->int_src1);
1336	if (ret < 0) {
1337		dev_err(&data->client->dev, "Error reading reg_int_src1\n");
1338		goto ack_intr;
1339	}
1340
1341	if (ret & KXCJK1013_REG_INT_SRC1_BIT_WUFS) {
1342		if (data->info == &kxtf9_info)
1343			iio_push_event(indio_dev,
1344				       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1345				       0,
1346				       IIO_MOD_X_AND_Y_AND_Z,
1347				       IIO_EV_TYPE_THRESH,
1348				       IIO_EV_DIR_RISING),
1349				       data->timestamp);
1350		else
1351			kxcjk1013_report_motion_event(indio_dev);
1352	}
1353
1354ack_intr:
1355	if (data->dready_trigger_on)
1356		return IRQ_HANDLED;
1357
1358	ret = i2c_smbus_read_byte_data(data->client, regs->int_rel);
1359	if (ret < 0)
1360		dev_err(&data->client->dev, "Error reading reg_int_rel\n");
1361
1362	return IRQ_HANDLED;
1363}
1364
1365static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private)
1366{
1367	struct iio_dev *indio_dev = private;
1368	struct kxcjk1013_data *data = iio_priv(indio_dev);
1369
1370	data->timestamp = iio_get_time_ns(indio_dev);
1371
1372	if (data->dready_trigger_on)
1373		iio_trigger_poll(data->dready_trig);
1374	else if (data->motion_trigger_on)
1375		iio_trigger_poll(data->motion_trig);
1376
1377	if (data->ev_enable_state)
1378		return IRQ_WAKE_THREAD;
1379	else
1380		return IRQ_HANDLED;
1381}
1382
1383static int kxcjk1013_probe(struct i2c_client *client)
1384{
1385	const struct i2c_device_id *id = i2c_client_get_device_id(client);
1386	static const char * const regulator_names[] = { "vdd", "vddio" };
1387	struct kxcjk1013_data *data;
1388	struct iio_dev *indio_dev;
1389	struct kxcjk_1013_platform_data *pdata;
1390	const void *ddata = NULL;
1391	const char *name;
1392	int ret;
1393
1394	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1395	if (!indio_dev)
1396		return -ENOMEM;
1397
1398	data = iio_priv(indio_dev);
1399	i2c_set_clientdata(client, indio_dev);
1400	data->client = client;
1401
1402	pdata = dev_get_platdata(&client->dev);
1403	if (pdata) {
1404		data->active_high_intr = pdata->active_high_intr;
1405		data->orientation = pdata->orientation;
1406	} else {
1407		data->active_high_intr = true; /* default polarity */
1408
1409		if (!iio_read_acpi_mount_matrix(&client->dev, &data->orientation, "ROTM")) {
1410			ret = iio_read_mount_matrix(&client->dev, &data->orientation);
1411			if (ret)
1412				return ret;
1413		}
1414
1415	}
1416
1417	ret = devm_regulator_bulk_get_enable(&client->dev,
1418					     ARRAY_SIZE(regulator_names),
1419					     regulator_names);
1420	if (ret)
1421		return dev_err_probe(&client->dev, ret, "Failed to get regulators\n");
1422
1423	/*
1424	 * A typical delay of 10ms is required for powering up
1425	 * according to the data sheets of supported chips.
1426	 * Hence double that to play safe.
1427	 */
1428	msleep(20);
1429
1430	if (id) {
1431		name = id->name;
1432		data->info = (const struct kx_chipset_info *)(id->driver_data);
1433	} else {
1434		name = iio_get_acpi_device_name_and_data(&client->dev, &ddata);
1435		data->info = ddata;
1436		if (data->info == &kxcj91008_kiox010a_info)
1437			indio_dev->label = "accel-display";
1438		else if (data->info == &kxcj91008_kiox020a_info)
1439			indio_dev->label = "accel-base";
1440	}
1441	if (!name)
1442		return -ENODEV;
1443
1444	ret = kxcjk1013_chip_init(data);
1445	if (ret < 0)
1446		return ret;
1447
1448	mutex_init(&data->mutex);
1449
1450	indio_dev->channels = kxcjk1013_channels;
1451	indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels);
1452	indio_dev->available_scan_masks = kxcjk1013_scan_masks;
1453	indio_dev->name = name;
1454	indio_dev->modes = INDIO_DIRECT_MODE;
1455	indio_dev->info = &kxcjk1013_iio_info;
1456
1457	if (client->irq > 0 && data->info->acpi_type != ACPI_SMO8500) {
1458		ret = devm_request_threaded_irq(&client->dev, client->irq,
1459						kxcjk1013_data_rdy_trig_poll,
1460						kxcjk1013_event_handler,
1461						IRQF_TRIGGER_RISING,
1462						"kxcjk1013_event",
1463						indio_dev);
1464		if (ret)
1465			goto err_poweroff;
1466
1467		data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1468							   "%s-dev%d",
1469							   indio_dev->name,
1470							   iio_device_id(indio_dev));
1471		if (!data->dready_trig) {
1472			ret = -ENOMEM;
1473			goto err_poweroff;
1474		}
1475
1476		data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1477							  "%s-any-motion-dev%d",
1478							  indio_dev->name,
1479							  iio_device_id(indio_dev));
1480		if (!data->motion_trig) {
1481			ret = -ENOMEM;
1482			goto err_poweroff;
1483		}
1484
1485		data->dready_trig->ops = &kxcjk1013_trigger_ops;
1486		iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1487		ret = iio_trigger_register(data->dready_trig);
1488		if (ret)
1489			goto err_poweroff;
1490
1491		indio_dev->trig = iio_trigger_get(data->dready_trig);
1492
1493		data->motion_trig->ops = &kxcjk1013_trigger_ops;
1494		iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1495		ret = iio_trigger_register(data->motion_trig);
1496		if (ret) {
1497			data->motion_trig = NULL;
1498			goto err_trigger_unregister;
1499		}
1500	}
1501
1502	ret = iio_triggered_buffer_setup(indio_dev,
1503					 &iio_pollfunc_store_time,
1504					 kxcjk1013_trigger_handler,
1505					 &kxcjk1013_buffer_setup_ops);
1506	if (ret < 0) {
1507		dev_err(&client->dev, "iio triggered buffer setup failed\n");
1508		goto err_trigger_unregister;
1509	}
1510
1511	ret = pm_runtime_set_active(&client->dev);
1512	if (ret)
1513		goto err_buffer_cleanup;
1514
1515	pm_runtime_enable(&client->dev);
1516	pm_runtime_set_autosuspend_delay(&client->dev,
1517					 KXCJK1013_SLEEP_DELAY_MS);
1518	pm_runtime_use_autosuspend(&client->dev);
1519
1520	ret = iio_device_register(indio_dev);
1521	if (ret < 0) {
1522		dev_err(&client->dev, "unable to register iio device\n");
1523		goto err_pm_cleanup;
1524	}
1525
1526	return 0;
1527
1528err_pm_cleanup:
1529	pm_runtime_dont_use_autosuspend(&client->dev);
1530	pm_runtime_disable(&client->dev);
1531err_buffer_cleanup:
1532	iio_triggered_buffer_cleanup(indio_dev);
1533err_trigger_unregister:
1534	if (data->dready_trig)
1535		iio_trigger_unregister(data->dready_trig);
1536	if (data->motion_trig)
1537		iio_trigger_unregister(data->motion_trig);
1538err_poweroff:
1539	kxcjk1013_set_mode(data, STANDBY);
1540
1541	return ret;
1542}
1543
1544static void kxcjk1013_remove(struct i2c_client *client)
1545{
1546	struct iio_dev *indio_dev = i2c_get_clientdata(client);
1547	struct kxcjk1013_data *data = iio_priv(indio_dev);
1548
1549	iio_device_unregister(indio_dev);
1550
1551	pm_runtime_disable(&client->dev);
1552	pm_runtime_set_suspended(&client->dev);
1553
1554	iio_triggered_buffer_cleanup(indio_dev);
1555	if (data->dready_trig) {
1556		iio_trigger_unregister(data->dready_trig);
1557		iio_trigger_unregister(data->motion_trig);
1558	}
1559
1560	mutex_lock(&data->mutex);
1561	kxcjk1013_set_mode(data, STANDBY);
1562	mutex_unlock(&data->mutex);
1563}
1564
1565static int kxcjk1013_suspend(struct device *dev)
1566{
1567	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1568	struct kxcjk1013_data *data = iio_priv(indio_dev);
1569	int ret;
1570
1571	mutex_lock(&data->mutex);
1572	ret = kxcjk1013_set_mode(data, STANDBY);
1573	mutex_unlock(&data->mutex);
1574
1575	return ret;
1576}
1577
1578static int kxcjk1013_resume(struct device *dev)
1579{
1580	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1581	struct kxcjk1013_data *data = iio_priv(indio_dev);
1582	int ret = 0;
1583
1584	mutex_lock(&data->mutex);
1585	ret = kxcjk1013_set_mode(data, OPERATION);
1586	if (ret == 0)
1587		ret = kxcjk1013_set_range(data, data->range);
1588	mutex_unlock(&data->mutex);
1589
1590	return ret;
1591}
1592
1593static int kxcjk1013_runtime_suspend(struct device *dev)
1594{
1595	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1596	struct kxcjk1013_data *data = iio_priv(indio_dev);
1597	int ret;
1598
1599	ret = kxcjk1013_set_mode(data, STANDBY);
1600	if (ret < 0) {
1601		dev_err(&data->client->dev, "powering off device failed\n");
1602		return -EAGAIN;
1603	}
1604	return 0;
1605}
1606
1607static int kxcjk1013_runtime_resume(struct device *dev)
1608{
1609	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1610	struct kxcjk1013_data *data = iio_priv(indio_dev);
1611	int ret;
1612	int sleep_val;
1613
1614	ret = kxcjk1013_set_mode(data, OPERATION);
1615	if (ret < 0)
1616		return ret;
1617
1618	sleep_val = kxcjk1013_get_startup_times(data);
1619	if (sleep_val < 20000)
1620		usleep_range(sleep_val, 20000);
1621	else
1622		msleep_interruptible(sleep_val/1000);
1623
1624	return 0;
1625}
1626
1627static const struct dev_pm_ops kxcjk1013_pm_ops = {
1628	SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume)
1629	RUNTIME_PM_OPS(kxcjk1013_runtime_suspend, kxcjk1013_runtime_resume, NULL)
1630};
1631
1632static const struct i2c_device_id kxcjk1013_id[] = {
1633	{ "kxcjk1013",  (kernel_ulong_t)&kxcjk1013_info },
1634	{ "kxcj91008",  (kernel_ulong_t)&kxcj91008_info },
1635	{ "kxtj21009",  (kernel_ulong_t)&kxtj21009_info },
1636	{ "kxtf9", (kernel_ulong_t)&kxtf9_info },
1637	{ "kx023-1025", (kernel_ulong_t)&kx0231025_info },
1638	{ }
1639};
1640MODULE_DEVICE_TABLE(i2c, kxcjk1013_id);
1641
1642static const struct of_device_id kxcjk1013_of_match[] = {
1643	{ .compatible = "kionix,kxcjk1013", &kxcjk1013_info },
1644	{ .compatible = "kionix,kxcj91008", &kxcj91008_info },
1645	{ .compatible = "kionix,kxtj21009", &kxtj21009_info },
1646	{ .compatible = "kionix,kxtf9", &kxtf9_info },
1647	{ .compatible = "kionix,kx023-1025", &kx0231025_info },
1648	{ }
1649};
1650MODULE_DEVICE_TABLE(of, kxcjk1013_of_match);
1651
1652static const struct acpi_device_id kx_acpi_match[] = {
1653	{ "KIOX0008", (kernel_ulong_t)&kxcj91008_info },
1654	{ "KIOX0009", (kernel_ulong_t)&kxtj21009_info },
1655	{ "KIOX000A", (kernel_ulong_t)&kxcj91008_info },
1656	/* KXCJ91008 in the display of a yoga 2-in-1 */
1657	{ "KIOX010A", (kernel_ulong_t)&kxcj91008_kiox010a_info },
1658	/* KXCJ91008 in the base of a yoga 2-in-1 */
1659	{ "KIOX020A", (kernel_ulong_t)&kxcj91008_kiox020a_info },
1660	{ "KXCJ1008", (kernel_ulong_t)&kxcj91008_info },
1661	{ "KXCJ1013", (kernel_ulong_t)&kxcjk1013_info },
1662	{ "KXCJ9000", (kernel_ulong_t)&kxcj91008_info },
1663	{ "KXJ2109",  (kernel_ulong_t)&kxtj21009_info },
1664	{ "KXTJ1009", (kernel_ulong_t)&kxtj21009_info },
1665	{ "SMO8500",  (kernel_ulong_t)&kxcj91008_smo8500_info },
1666	{ }
1667};
1668MODULE_DEVICE_TABLE(acpi, kx_acpi_match);
1669
1670static struct i2c_driver kxcjk1013_driver = {
1671	.driver = {
1672		.name	= "kxcjk1013",
1673		.acpi_match_table = kx_acpi_match,
1674		.of_match_table = kxcjk1013_of_match,
1675		.pm	= pm_ptr(&kxcjk1013_pm_ops),
1676	},
1677	.probe		= kxcjk1013_probe,
1678	.remove		= kxcjk1013_remove,
1679	.id_table	= kxcjk1013_id,
1680};
1681module_i2c_driver(kxcjk1013_driver);
1682
1683MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1684MODULE_LICENSE("GPL v2");
1685MODULE_DESCRIPTION("KXCJK1013 accelerometer driver");