bma220_core.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * BMA220 Digital triaxial acceleration sensor driver
  4 *
  5 * Copyright (c) 2016,2020 Intel Corporation.
  6 * Copyright (c) 2025 Petre Rodan  <petre.rodan@subdimension.ro>
  7 */
  8
  9#include <linux/bits.h>
 10#include <linux/bitfield.h>
 11#include <linux/cleanup.h>
 12#include <linux/device.h>
 13#include <linux/errno.h>
 14#include <linux/mod_devicetable.h>
 15#include <linux/module.h>
 16#include <linux/mutex.h>
 17#include <linux/pm.h>
 18#include <linux/regmap.h>
 19#include <linux/regulator/consumer.h>
 20#include <linux/types.h>
 21
 22#include <linux/iio/buffer.h>
 23#include <linux/iio/iio.h>
 24#include <linux/iio/sysfs.h>
 25#include <linux/iio/trigger.h>
 26#include <linux/iio/trigger_consumer.h>
 27#include <linux/iio/triggered_buffer.h>
 28
 29#include "bma220.h"
 30
 31#define BMA220_REG_ID				0x00
 32#define BMA220_REG_REVISION_ID			0x01
 33#define BMA220_REG_ACCEL_X			0x02
 34#define BMA220_REG_ACCEL_Y			0x03
 35#define BMA220_REG_ACCEL_Z			0x04
 36#define BMA220_REG_CONF0			0x05
 37#define BMA220_HIGH_DUR_MSK			GENMASK(5, 0)
 38#define BMA220_HIGH_HY_MSK			GENMASK(7, 6)
 39#define BMA220_REG_CONF1			0x06
 40#define BMA220_HIGH_TH_MSK			GENMASK(3, 0)
 41#define BMA220_LOW_TH_MSK			GENMASK(7, 4)
 42#define BMA220_REG_CONF2			0x07
 43#define BMA220_LOW_DUR_MSK			GENMASK(5, 0)
 44#define BMA220_LOW_HY_MSK			GENMASK(7, 6)
 45#define BMA220_REG_CONF3			0x08
 46#define BMA220_TT_DUR_MSK			GENMASK(2, 0)
 47#define BMA220_TT_TH_MSK			GENMASK(6, 3)
 48#define BMA220_REG_CONF4			0x09
 49#define BMA220_SLOPE_DUR_MSK			GENMASK(1, 0)
 50#define BMA220_SLOPE_TH_MSK			GENMASK(5, 2)
 51#define BMA220_REG_CONF5			0x0a
 52#define BMA220_TIP_EN_MSK			BIT(4)
 53#define BMA220_REG_IF0				0x0b
 54#define BMA220_REG_IF1				0x0c
 55#define BMA220_IF_SLOPE				BIT(0)
 56#define BMA220_IF_DRDY				BIT(1)
 57#define BMA220_IF_HIGH				BIT(2)
 58#define BMA220_IF_LOW				BIT(3)
 59#define BMA220_IF_TT				BIT(4)
 60#define BMA220_REG_IE0				0x0d
 61#define BMA220_INT_EN_TAP_Z_MSK			BIT(0)
 62#define BMA220_INT_EN_TAP_Y_MSK			BIT(1)
 63#define BMA220_INT_EN_TAP_X_MSK			BIT(2)
 64#define BMA220_INT_EN_SLOPE_Z_MSK		BIT(3)
 65#define BMA220_INT_EN_SLOPE_Y_MSK		BIT(4)
 66#define BMA220_INT_EN_SLOPE_X_MSK		BIT(5)
 67#define BMA220_INT_EN_DRDY_MSK			BIT(7)
 68#define BMA220_REG_IE1				0x0e
 69#define BMA220_INT_EN_HIGH_Z_MSK		BIT(0)
 70#define BMA220_INT_EN_HIGH_Y_MSK		BIT(1)
 71#define BMA220_INT_EN_HIGH_X_MSK		BIT(2)
 72#define BMA220_INT_EN_LOW_MSK			BIT(3)
 73#define BMA220_INT_LATCH_MSK			GENMASK(6, 4)
 74#define BMA220_INT_RST_MSK			BIT(7)
 75#define BMA220_REG_IE2				0x0f
 76#define BMA220_REG_FILTER			0x10
 77#define BMA220_FILTER_MASK			GENMASK(3, 0)
 78#define BMA220_REG_RANGE			0x11
 79#define BMA220_RANGE_MASK			GENMASK(1, 0)
 80#define BMA220_REG_SUSPEND			0x18
 81#define BMA220_REG_SOFTRESET			0x19
 82
 83#define BMA220_CHIP_ID				0xDD
 84#define BMA220_SUSPEND_SLEEP			0xFF
 85#define BMA220_SUSPEND_WAKE			0x00
 86#define BMA220_RESET_MODE			0xFF
 87#define BMA220_NONRESET_MODE			0x00
 88
 89#define BMA220_DEVICE_NAME			"bma220"
 90
 91#define BMA220_COF_1000Hz			0x0
 92#define BMA220_COF_500Hz			0x1
 93#define BMA220_COF_250Hz			0x2
 94#define BMA220_COF_125Hz			0x3
 95#define BMA220_COF_64Hz				0x4
 96#define BMA220_COF_32Hz				0x5
 97
 98#define BMA220_ACCEL_CHANNEL(index, reg, axis) {			\
 99	.type = IIO_ACCEL,						\
100	.address = reg,							\
101	.modified = 1,							\
102	.channel2 = IIO_MOD_##axis,					\
103	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),			\
104	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |		\
105	    BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),		\
106	.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) |\
107	    BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),		\
108	.scan_index = index,						\
109	.scan_type = {							\
110		.sign = 's',						\
111		.realbits = 6,						\
112		.storagebits = 8,					\
113		.shift = 2,						\
114		.endianness = IIO_CPU,					\
115	},								\
116}
117
118enum bma220_axis {
119	AXIS_X,
120	AXIS_Y,
121	AXIS_Z,
122};
123
124static const int bma220_scale_table[][2] = {
125	{ 0, 623000 }, { 1, 248000 }, { 2, 491000 }, { 4, 983000 },
126};
127
128struct bma220_data {
129	struct regmap *regmap;
130	struct mutex lock;
131	u8 lpf_3dB_freq_idx;
132	u8 range_idx;
133	struct iio_trigger *trig;
134	struct {
135		s8 chans[3];
136		/* Ensure timestamp is naturally aligned. */
137		aligned_s64 timestamp;
138	} scan __aligned(IIO_DMA_MINALIGN);
139};
140
141static const struct iio_chan_spec bma220_channels[] = {
142	BMA220_ACCEL_CHANNEL(0, BMA220_REG_ACCEL_X, X),
143	BMA220_ACCEL_CHANNEL(1, BMA220_REG_ACCEL_Y, Y),
144	BMA220_ACCEL_CHANNEL(2, BMA220_REG_ACCEL_Z, Z),
145	IIO_CHAN_SOFT_TIMESTAMP(3),
146};
147
148/* Available cut-off frequencies of the low pass filter in Hz. */
149static const int bma220_lpf_3dB_freq_Hz_table[] = {
150	[BMA220_COF_1000Hz] = 1000,
151	[BMA220_COF_500Hz] = 500,
152	[BMA220_COF_250Hz] = 250,
153	[BMA220_COF_125Hz] = 125,
154	[BMA220_COF_64Hz] = 64,
155	[BMA220_COF_32Hz] = 32,
156};
157
158static const unsigned long bma220_accel_scan_masks[] = {
159	BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
160	0
161};
162
163static bool bma220_is_writable_reg(struct device *dev, unsigned int reg)
164{
165	switch (reg) {
166	case BMA220_REG_CONF0:
167	case BMA220_REG_CONF1:
168	case BMA220_REG_CONF2:
169	case BMA220_REG_CONF3:
170	case BMA220_REG_CONF4:
171	case BMA220_REG_CONF5:
172	case BMA220_REG_IE0:
173	case BMA220_REG_IE1:
174	case BMA220_REG_IE2:
175	case BMA220_REG_FILTER:
176	case BMA220_REG_RANGE:
177	case BMA220_REG_WDT:
178		return true;
179	default:
180		return false;
181	}
182}
183
184const struct regmap_config bma220_spi_regmap_config = {
185	.reg_bits = 8,
186	.val_bits = 8,
187	.read_flag_mask = BIT(7),
188	.max_register = BMA220_REG_SOFTRESET,
189	.cache_type = REGCACHE_NONE,
190	.writeable_reg = bma220_is_writable_reg,
191};
192EXPORT_SYMBOL_NS_GPL(bma220_spi_regmap_config, "IIO_BOSCH_BMA220");
193
194/*
195 * Based on the datasheet the memory map differs between the SPI and the I2C
196 * implementations. I2C register addresses are simply shifted to the left
197 * by 1 bit yet the register size remains unchanged.
198 * This driver employs the SPI memory map to correlate register names to
199 * addresses regardless of the bus type.
200 */
201
202const struct regmap_config bma220_i2c_regmap_config = {
203	.reg_bits = 8,
204	.val_bits = 8,
205	.reg_shift = -1,
206	.max_register = BMA220_REG_SOFTRESET,
207	.cache_type = REGCACHE_NONE,
208	.writeable_reg = bma220_is_writable_reg,
209};
210EXPORT_SYMBOL_NS_GPL(bma220_i2c_regmap_config, "IIO_BOSCH_BMA220");
211
212static int bma220_data_rdy_trigger_set_state(struct iio_trigger *trig,
213					     bool state)
214{
215	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
216	struct bma220_data *data = iio_priv(indio_dev);
217
218	return regmap_update_bits(data->regmap, BMA220_REG_IE0,
219				  BMA220_INT_EN_DRDY_MSK,
220				  FIELD_PREP(BMA220_INT_EN_DRDY_MSK, state));
221}
222
223static const struct iio_trigger_ops bma220_trigger_ops = {
224	.set_trigger_state = &bma220_data_rdy_trigger_set_state,
225	.validate_device = &iio_trigger_validate_own_device,
226};
227
228static irqreturn_t bma220_trigger_handler(int irq, void *p)
229{
230	int ret;
231	struct iio_poll_func *pf = p;
232	struct iio_dev *indio_dev = pf->indio_dev;
233	struct bma220_data *data = iio_priv(indio_dev);
234
235	ret = regmap_bulk_read(data->regmap, BMA220_REG_ACCEL_X,
236			       &data->scan.chans,
237			       sizeof(data->scan.chans));
238	if (ret < 0)
239		return IRQ_NONE;
240
241	iio_push_to_buffers_with_ts(indio_dev, &data->scan, sizeof(data->scan),
242				    iio_get_time_ns(indio_dev));
243	iio_trigger_notify_done(indio_dev->trig);
244
245	return IRQ_HANDLED;
246}
247
248static int bma220_read_raw(struct iio_dev *indio_dev,
249			   struct iio_chan_spec const *chan,
250			   int *val, int *val2, long mask)
251{
252	int ret;
253	u8 index;
254	unsigned int reg;
255	struct bma220_data *data = iio_priv(indio_dev);
256
257	guard(mutex)(&data->lock);
258
259	switch (mask) {
260	case IIO_CHAN_INFO_RAW:
261		ret = regmap_read(data->regmap, chan->address, &reg);
262		if (ret < 0)
263			return -EINVAL;
264		*val = sign_extend32(reg >> chan->scan_type.shift,
265				     chan->scan_type.realbits - 1);
266		return IIO_VAL_INT;
267	case IIO_CHAN_INFO_SCALE:
268		index = data->range_idx;
269		*val = bma220_scale_table[index][0];
270		*val2 = bma220_scale_table[index][1];
271		return IIO_VAL_INT_PLUS_MICRO;
272	case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
273		index = data->lpf_3dB_freq_idx;
274		*val = bma220_lpf_3dB_freq_Hz_table[index];
275		return IIO_VAL_INT;
276	}
277
278	return -EINVAL;
279}
280
281static int bma220_find_match_2dt(const int (*tbl)[2], const int n,
282				 const int val, const int val2)
283{
284	int i;
285
286	for (i = 0; i < n; i++) {
287		if (tbl[i][0] == val && tbl[i][1] == val2)
288			return i;
289	}
290
291	return -EINVAL;
292}
293
294static int bma220_find_match(const int *arr, const int n, const int val)
295{
296	int i;
297
298	for (i = 0; i < n; i++) {
299		if (arr[i] == val)
300			return i;
301	}
302
303	return -EINVAL;
304}
305
306static int bma220_write_raw(struct iio_dev *indio_dev,
307			    struct iio_chan_spec const *chan,
308			    int val, int val2, long mask)
309{
310	int ret;
311	int index = -1;
312	struct bma220_data *data = iio_priv(indio_dev);
313
314	guard(mutex)(&data->lock);
315
316	switch (mask) {
317	case IIO_CHAN_INFO_SCALE:
318		index = bma220_find_match_2dt(bma220_scale_table,
319					      ARRAY_SIZE(bma220_scale_table),
320					      val, val2);
321		if (index < 0)
322			return -EINVAL;
323
324		ret = regmap_update_bits(data->regmap, BMA220_REG_RANGE,
325					 BMA220_RANGE_MASK,
326					 FIELD_PREP(BMA220_RANGE_MASK, index));
327		if (ret < 0)
328			return ret;
329		data->range_idx = index;
330
331		return 0;
332	case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
333		index = bma220_find_match(bma220_lpf_3dB_freq_Hz_table,
334					  ARRAY_SIZE(bma220_lpf_3dB_freq_Hz_table),
335					  val);
336		if (index < 0)
337			return -EINVAL;
338
339		ret = regmap_update_bits(data->regmap, BMA220_REG_FILTER,
340					 BMA220_FILTER_MASK,
341					 FIELD_PREP(BMA220_FILTER_MASK, index));
342		if (ret < 0)
343			return ret;
344		data->lpf_3dB_freq_idx = index;
345
346		return 0;
347	}
348
349	return -EINVAL;
350}
351
352static int bma220_read_avail(struct iio_dev *indio_dev,
353			     struct iio_chan_spec const *chan,
354			     const int **vals, int *type, int *length,
355			     long mask)
356{
357	switch (mask) {
358	case IIO_CHAN_INFO_SCALE:
359		*vals = (int *)bma220_scale_table;
360		*type = IIO_VAL_INT_PLUS_MICRO;
361		*length = ARRAY_SIZE(bma220_scale_table) * 2;
362		return IIO_AVAIL_LIST;
363	case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
364		*vals = (const int *)bma220_lpf_3dB_freq_Hz_table;
365		*type = IIO_VAL_INT;
366		*length = ARRAY_SIZE(bma220_lpf_3dB_freq_Hz_table);
367		return IIO_AVAIL_LIST;
368	default:
369		return -EINVAL;
370	}
371}
372
373static int bma220_reg_access(struct iio_dev *indio_dev, unsigned int reg,
374			     unsigned int writeval, unsigned int *readval)
375{
376	struct bma220_data *data = iio_priv(indio_dev);
377
378	if (readval)
379		return regmap_read(data->regmap, reg, readval);
380	return regmap_write(data->regmap, reg, writeval);
381}
382
383static const struct iio_info bma220_info = {
384	.read_raw		= bma220_read_raw,
385	.write_raw		= bma220_write_raw,
386	.read_avail		= bma220_read_avail,
387	.debugfs_reg_access	= &bma220_reg_access,
388};
389
390static int bma220_reset(struct bma220_data *data, bool up)
391{
392	int ret;
393	unsigned int i, val;
394
395	/*
396	 * The chip can be reset by a simple register read.
397	 * We need up to 2 register reads of the softreset register
398	 * to make sure that the device is in the desired state.
399	 */
400	for (i = 0; i < 2; i++) {
401		ret = regmap_read(data->regmap, BMA220_REG_SOFTRESET, &val);
402		if (ret < 0)
403			return ret;
404
405		if (up && val == BMA220_RESET_MODE)
406			return 0;
407
408		if (!up && val == BMA220_NONRESET_MODE)
409			return 0;
410	}
411
412	return -EBUSY;
413}
414
415static int bma220_power(struct bma220_data *data, bool up)
416{
417	int ret;
418	unsigned int i, val;
419
420	/*
421	 * The chip can be suspended/woken up by a simple register read.
422	 * So, we need up to 2 register reads of the suspend register
423	 * to make sure that the device is in the desired state.
424	 */
425	for (i = 0; i < 2; i++) {
426		ret = regmap_read(data->regmap, BMA220_REG_SUSPEND, &val);
427		if (ret < 0)
428			return ret;
429
430		if (up && val == BMA220_SUSPEND_SLEEP)
431			return 0;
432
433		if (!up && val == BMA220_SUSPEND_WAKE)
434			return 0;
435	}
436
437	return -EBUSY;
438}
439
440static int bma220_init(struct device *dev, struct bma220_data *data)
441{
442	int ret;
443	unsigned int val;
444	static const char * const regulator_names[] = { "vddd", "vddio", "vdda" };
445
446	ret = devm_regulator_bulk_get_enable(dev,
447					     ARRAY_SIZE(regulator_names),
448					     regulator_names);
449	if (ret)
450		return dev_err_probe(dev, ret, "Failed to get regulators\n");
451
452	ret = regmap_read(data->regmap, BMA220_REG_ID, &val);
453	if (ret)
454		return dev_err_probe(dev, ret,
455				     "Failed to read chip id register\n");
456
457	if (val != BMA220_CHIP_ID)
458		dev_info(dev, "Unknown chip found: 0x%02x\n", val);
459
460	ret = bma220_power(data, true);
461	if (ret)
462		return dev_err_probe(dev, ret, "Failed to power-on chip\n");
463
464	ret = bma220_reset(data, true);
465	if (ret)
466		return dev_err_probe(dev, ret, "Failed to soft reset chip\n");
467
468	return 0;
469}
470
471static void bma220_deinit(void *data_ptr)
472{
473	struct bma220_data *data = data_ptr;
474	int ret;
475	struct device *dev = regmap_get_device(data->regmap);
476
477	ret = bma220_power(data, false);
478	if (ret)
479		dev_warn(dev,
480			 "Failed to put device into suspend mode (%pe)\n",
481			 ERR_PTR(ret));
482}
483
484static irqreturn_t bma220_irq_handler(int irq, void *private)
485{
486	struct iio_dev *indio_dev = private;
487	struct bma220_data *data = iio_priv(indio_dev);
488	int ret;
489	unsigned int bma220_reg_if1;
490
491	ret = regmap_read(data->regmap, BMA220_REG_IF1, &bma220_reg_if1);
492	if (ret)
493		return IRQ_NONE;
494
495	if (FIELD_GET(BMA220_IF_DRDY, bma220_reg_if1))
496		iio_trigger_poll_nested(data->trig);
497
498	return IRQ_HANDLED;
499}
500
501int bma220_common_probe(struct device *dev, struct regmap *regmap, int irq)
502{
503	int ret;
504	struct iio_dev *indio_dev;
505	struct bma220_data *data;
506
507	indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
508	if (!indio_dev)
509		return -ENOMEM;
510
511	data = iio_priv(indio_dev);
512	data->regmap = regmap;
513
514	ret = bma220_init(dev, data);
515	if (ret)
516		return ret;
517
518	ret = devm_mutex_init(dev, &data->lock);
519	if (ret)
520		return ret;
521
522	indio_dev->info = &bma220_info;
523	indio_dev->name = BMA220_DEVICE_NAME;
524	indio_dev->modes = INDIO_DIRECT_MODE;
525	indio_dev->channels = bma220_channels;
526	indio_dev->num_channels = ARRAY_SIZE(bma220_channels);
527	indio_dev->available_scan_masks = bma220_accel_scan_masks;
528
529	if (irq > 0) {
530		data->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
531						    indio_dev->name,
532						    iio_device_id(indio_dev));
533		if (!data->trig)
534			return -ENOMEM;
535
536		data->trig->ops = &bma220_trigger_ops;
537		iio_trigger_set_drvdata(data->trig, indio_dev);
538
539		ret = devm_iio_trigger_register(dev, data->trig);
540		if (ret)
541			return dev_err_probe(dev, ret,
542					     "iio trigger register fail\n");
543		indio_dev->trig = iio_trigger_get(data->trig);
544		ret = devm_request_threaded_irq(dev, irq, NULL,
545						&bma220_irq_handler, IRQF_ONESHOT,
546						indio_dev->name, indio_dev);
547		if (ret)
548			return dev_err_probe(dev, ret,
549					     "request irq %d failed\n", irq);
550	}
551
552	ret = devm_add_action_or_reset(dev, bma220_deinit, data);
553	if (ret)
554		return ret;
555
556	ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
557					      bma220_trigger_handler, NULL);
558	if (ret < 0)
559		dev_err_probe(dev, ret, "iio triggered buffer setup failed\n");
560
561	return devm_iio_device_register(dev, indio_dev);
562}
563EXPORT_SYMBOL_NS_GPL(bma220_common_probe, "IIO_BOSCH_BMA220");
564
565static int bma220_suspend(struct device *dev)
566{
567	struct iio_dev *indio_dev = dev_get_drvdata(dev);
568	struct bma220_data *data = iio_priv(indio_dev);
569
570	return bma220_power(data, false);
571}
572
573static int bma220_resume(struct device *dev)
574{
575	struct iio_dev *indio_dev = dev_get_drvdata(dev);
576	struct bma220_data *data = iio_priv(indio_dev);
577
578	return bma220_power(data, true);
579}
580EXPORT_NS_SIMPLE_DEV_PM_OPS(bma220_pm_ops, bma220_suspend, bma220_resume,
581			    IIO_BOSCH_BMA220);
582
583MODULE_AUTHOR("Tiberiu Breana <tiberiu.a.breana@intel.com>");
584MODULE_DESCRIPTION("BMA220 acceleration sensor driver");
585MODULE_LICENSE("GPL");