adxl345_core.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * ADXL345 3-Axis Digital Accelerometer IIO core driver
   4 *
   5 * Copyright (c) 2017 Eva Rachel Retuya <eraretuya@gmail.com>
   6 *
   7 * Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ADXL345.pdf
   8 */
   9
  10#include <linux/bitfield.h>
  11#include <linux/bitops.h>
  12#include <linux/interrupt.h>
  13#include <linux/module.h>
  14#include <linux/property.h>
  15#include <linux/regmap.h>
  16#include <linux/units.h>
  17
  18#include <linux/iio/iio.h>
  19#include <linux/iio/sysfs.h>
  20#include <linux/iio/buffer.h>
  21#include <linux/iio/events.h>
  22#include <linux/iio/kfifo_buf.h>
  23
  24#include "adxl345.h"
  25
  26#define ADXL345_FIFO_BYPASS	0
  27#define ADXL345_FIFO_FIFO	1
  28#define ADXL345_FIFO_STREAM	2
  29
  30#define ADXL345_DIRS 3
  31
  32#define ADXL345_INT_NONE		0xff
  33#define ADXL345_INT1			0
  34#define ADXL345_INT2			1
  35
  36#define ADXL345_REG_TAP_AXIS_MSK	GENMASK(2, 0)
  37#define ADXL345_REG_TAP_SUPPRESS_MSK	BIT(3)
  38#define ADXL345_REG_TAP_SUPPRESS	BIT(3)
  39#define ADXL345_POWER_CTL_INACT_MSK	(ADXL345_POWER_CTL_AUTO_SLEEP | ADXL345_POWER_CTL_LINK)
  40
  41#define ADXL345_TAP_Z_EN		BIT(0)
  42#define ADXL345_TAP_Y_EN		BIT(1)
  43#define ADXL345_TAP_X_EN		BIT(2)
  44#define ADXL345_REG_TAP_SUPPRESS	BIT(3)
  45
  46#define ADXL345_INACT_Z_EN		BIT(0)
  47#define ADXL345_INACT_Y_EN		BIT(1)
  48#define ADXL345_INACT_X_EN		BIT(2)
  49#define ADXL345_REG_INACT_ACDC		BIT(3)
  50#define ADXL345_ACT_INACT_NO_AXIS_EN	0x00
  51#define ADXL345_INACT_XYZ_EN		(ADXL345_INACT_Z_EN | ADXL345_INACT_Y_EN | ADXL345_INACT_X_EN)
  52
  53#define ADXL345_ACT_Z_EN		BIT(4)
  54#define ADXL345_ACT_Y_EN		BIT(5)
  55#define ADXL345_ACT_X_EN		BIT(6)
  56#define ADXL345_REG_ACT_ACDC		BIT(7)
  57#define ADXL345_ACT_XYZ_EN		(ADXL345_ACT_Z_EN | ADXL345_ACT_Y_EN | ADXL345_ACT_X_EN)
  58
  59#define ADXL345_COUPLING_DC		0
  60#define ADXL345_COUPLING_AC		1
  61#define ADXL345_REG_NO_ACDC		0x00
  62
  63/* single/double tap */
  64enum adxl345_tap_type {
  65	ADXL345_SINGLE_TAP,
  66	ADXL345_DOUBLE_TAP,
  67};
  68
  69static const unsigned int adxl345_tap_int_reg[] = {
  70	[ADXL345_SINGLE_TAP] = ADXL345_INT_SINGLE_TAP,
  71	[ADXL345_DOUBLE_TAP] = ADXL345_INT_DOUBLE_TAP,
  72};
  73
  74enum adxl345_tap_time_type {
  75	ADXL345_TAP_TIME_LATENT,
  76	ADXL345_TAP_TIME_WINDOW,
  77	ADXL345_TAP_TIME_DUR,
  78};
  79
  80static const unsigned int adxl345_tap_time_reg[] = {
  81	[ADXL345_TAP_TIME_LATENT] = ADXL345_REG_LATENT,
  82	[ADXL345_TAP_TIME_WINDOW] = ADXL345_REG_WINDOW,
  83	[ADXL345_TAP_TIME_DUR] = ADXL345_REG_DUR,
  84};
  85
  86/* activity/inactivity */
  87enum adxl345_activity_type {
  88	ADXL345_ACTIVITY,
  89	ADXL345_INACTIVITY,
  90	ADXL345_ACTIVITY_AC,
  91	ADXL345_INACTIVITY_AC,
  92	ADXL345_INACTIVITY_FF,
  93};
  94
  95static const unsigned int adxl345_act_int_reg[] = {
  96	[ADXL345_ACTIVITY] = ADXL345_INT_ACTIVITY,
  97	[ADXL345_INACTIVITY] = ADXL345_INT_INACTIVITY,
  98	[ADXL345_ACTIVITY_AC] = ADXL345_INT_ACTIVITY,
  99	[ADXL345_INACTIVITY_AC] = ADXL345_INT_INACTIVITY,
 100	[ADXL345_INACTIVITY_FF] = ADXL345_INT_FREE_FALL,
 101};
 102
 103static const unsigned int adxl345_act_thresh_reg[] = {
 104	[ADXL345_ACTIVITY] = ADXL345_REG_THRESH_ACT,
 105	[ADXL345_INACTIVITY] = ADXL345_REG_THRESH_INACT,
 106	[ADXL345_ACTIVITY_AC] = ADXL345_REG_THRESH_ACT,
 107	[ADXL345_INACTIVITY_AC] = ADXL345_REG_THRESH_INACT,
 108	[ADXL345_INACTIVITY_FF] = ADXL345_REG_THRESH_FF,
 109};
 110
 111static const unsigned int adxl345_act_acdc_msk[] = {
 112	[ADXL345_ACTIVITY] = ADXL345_REG_ACT_ACDC,
 113	[ADXL345_INACTIVITY] = ADXL345_REG_INACT_ACDC,
 114	[ADXL345_ACTIVITY_AC] = ADXL345_REG_ACT_ACDC,
 115	[ADXL345_INACTIVITY_AC] = ADXL345_REG_INACT_ACDC,
 116	[ADXL345_INACTIVITY_FF] = ADXL345_REG_NO_ACDC,
 117};
 118
 119enum adxl345_odr {
 120	ADXL345_ODR_0P10HZ = 0,
 121	ADXL345_ODR_0P20HZ,
 122	ADXL345_ODR_0P39HZ,
 123	ADXL345_ODR_0P78HZ,
 124	ADXL345_ODR_1P56HZ,
 125	ADXL345_ODR_3P13HZ,
 126	ADXL345_ODR_6P25HZ,
 127	ADXL345_ODR_12P50HZ,
 128	ADXL345_ODR_25HZ,
 129	ADXL345_ODR_50HZ,
 130	ADXL345_ODR_100HZ,
 131	ADXL345_ODR_200HZ,
 132	ADXL345_ODR_400HZ,
 133	ADXL345_ODR_800HZ,
 134	ADXL345_ODR_1600HZ,
 135	ADXL345_ODR_3200HZ,
 136};
 137
 138enum adxl345_range {
 139	ADXL345_2G_RANGE = 0,
 140	ADXL345_4G_RANGE,
 141	ADXL345_8G_RANGE,
 142	ADXL345_16G_RANGE,
 143};
 144
 145/* Certain features recommend 12.5 Hz - 400 Hz ODR */
 146static const int adxl345_odr_tbl[][2] = {
 147	[ADXL345_ODR_0P10HZ]	= {    0,  97000 },
 148	[ADXL345_ODR_0P20HZ]	= {    0, 195000 },
 149	[ADXL345_ODR_0P39HZ]	= {    0, 390000 },
 150	[ADXL345_ODR_0P78HZ]	= {    0, 781000 },
 151	[ADXL345_ODR_1P56HZ]	= {    1, 562000 },
 152	[ADXL345_ODR_3P13HZ]	= {    3, 125000 },
 153	[ADXL345_ODR_6P25HZ]	= {    6, 250000 },
 154	[ADXL345_ODR_12P50HZ]	= {   12, 500000 },
 155	[ADXL345_ODR_25HZ]	= {   25, 0 },
 156	[ADXL345_ODR_50HZ]	= {   50, 0 },
 157	[ADXL345_ODR_100HZ]	= {  100, 0 },
 158	[ADXL345_ODR_200HZ]	= {  200, 0 },
 159	[ADXL345_ODR_400HZ]	= {  400, 0 },
 160	[ADXL345_ODR_800HZ]	= {  800, 0 },
 161	[ADXL345_ODR_1600HZ]	= { 1600, 0 },
 162	[ADXL345_ODR_3200HZ]	= { 3200, 0 },
 163};
 164
 165/*
 166 * Full resolution frequency table:
 167 * (g * 2 * 9.80665) / (2^(resolution) - 1)
 168 *
 169 * resolution := 13 (full)
 170 * g := 2|4|8|16
 171 *
 172 *  2g at 13bit: 0.004789
 173 *  4g at 13bit: 0.009578
 174 *  8g at 13bit: 0.019156
 175 * 16g at 16bit: 0.038312
 176 */
 177static const int adxl345_fullres_range_tbl[][2] = {
 178	[ADXL345_2G_RANGE]  = { 0, 4789 },
 179	[ADXL345_4G_RANGE]  = { 0, 9578 },
 180	[ADXL345_8G_RANGE]  = { 0, 19156 },
 181	[ADXL345_16G_RANGE] = { 0, 38312 },
 182};
 183
 184/* scaling */
 185static const int adxl345_range_factor_tbl[] = {
 186	[ADXL345_2G_RANGE]  = 1,
 187	[ADXL345_4G_RANGE]  = 2,
 188	[ADXL345_8G_RANGE]  = 4,
 189	[ADXL345_16G_RANGE] = 8,
 190};
 191
 192struct adxl345_state {
 193	const struct adxl345_chip_info *info;
 194	struct regmap *regmap;
 195	bool fifo_delay; /* delay: delay is needed for SPI */
 196	u8 watermark;
 197	u8 fifo_mode;
 198
 199	u8 inact_threshold;
 200	u32 inact_time_ms;
 201
 202	u32 tap_duration_us;
 203	u32 tap_latent_us;
 204	u32 tap_window_us;
 205
 206	__le16 fifo_buf[ADXL345_DIRS * ADXL345_FIFO_SIZE + 1] __aligned(IIO_DMA_MINALIGN);
 207};
 208
 209static const struct iio_event_spec adxl345_events[] = {
 210	{
 211		/* activity */
 212		.type = IIO_EV_TYPE_MAG,
 213		.dir = IIO_EV_DIR_RISING,
 214		.mask_shared_by_type =
 215			BIT(IIO_EV_INFO_ENABLE) |
 216			BIT(IIO_EV_INFO_VALUE),
 217	},
 218	{
 219		/* activity, ac bit set */
 220		.type = IIO_EV_TYPE_MAG_ADAPTIVE,
 221		.dir = IIO_EV_DIR_RISING,
 222		.mask_shared_by_type =
 223			BIT(IIO_EV_INFO_ENABLE) |
 224			BIT(IIO_EV_INFO_VALUE),
 225	},
 226	{
 227		/* single tap */
 228		.type = IIO_EV_TYPE_GESTURE,
 229		.dir = IIO_EV_DIR_SINGLETAP,
 230		.mask_separate = BIT(IIO_EV_INFO_ENABLE),
 231		.mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
 232			BIT(IIO_EV_INFO_TIMEOUT),
 233	},
 234	{
 235		/* double tap */
 236		.type = IIO_EV_TYPE_GESTURE,
 237		.dir = IIO_EV_DIR_DOUBLETAP,
 238		.mask_shared_by_type = BIT(IIO_EV_INFO_ENABLE) |
 239			BIT(IIO_EV_INFO_RESET_TIMEOUT) |
 240			BIT(IIO_EV_INFO_TAP2_MIN_DELAY),
 241	},
 242};
 243
 244#define ADXL345_CHANNEL(index, reg, axis) {					\
 245	.type = IIO_ACCEL,						\
 246	.modified = 1,							\
 247	.channel2 = IIO_MOD_##axis,					\
 248	.address = (reg),						\
 249	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |			\
 250		BIT(IIO_CHAN_INFO_CALIBBIAS),				\
 251	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |		\
 252		BIT(IIO_CHAN_INFO_SAMP_FREQ),				\
 253	.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) | \
 254		BIT(IIO_CHAN_INFO_SAMP_FREQ),		\
 255	.scan_index = (index),				\
 256	.scan_type = {					\
 257		.sign = 's',				\
 258		.realbits = 13,				\
 259		.storagebits = 16,			\
 260		.endianness = IIO_LE,			\
 261	},						\
 262	.event_spec = adxl345_events,			\
 263	.num_event_specs = ARRAY_SIZE(adxl345_events),	\
 264}
 265
 266enum adxl345_chans {
 267	chan_x, chan_y, chan_z,
 268};
 269
 270static const struct iio_event_spec adxl345_fake_chan_events[] = {
 271	{
 272		/* inactivity */
 273		.type = IIO_EV_TYPE_MAG,
 274		.dir = IIO_EV_DIR_FALLING,
 275		.mask_separate = BIT(IIO_EV_INFO_ENABLE),
 276		.mask_shared_by_type =
 277			BIT(IIO_EV_INFO_VALUE) |
 278			BIT(IIO_EV_INFO_PERIOD),
 279	},
 280	{
 281		/* inactivity, AC bit set */
 282		.type = IIO_EV_TYPE_MAG_ADAPTIVE,
 283		.dir = IIO_EV_DIR_FALLING,
 284		.mask_separate = BIT(IIO_EV_INFO_ENABLE),
 285		.mask_shared_by_type =
 286			BIT(IIO_EV_INFO_VALUE) |
 287			BIT(IIO_EV_INFO_PERIOD),
 288	},
 289};
 290
 291static const struct iio_chan_spec adxl345_channels[] = {
 292	ADXL345_CHANNEL(0, chan_x, X),
 293	ADXL345_CHANNEL(1, chan_y, Y),
 294	ADXL345_CHANNEL(2, chan_z, Z),
 295	{
 296		.type = IIO_ACCEL,
 297		.modified = 1,
 298		.channel2 = IIO_MOD_X_AND_Y_AND_Z,
 299		.scan_index = -1, /* Fake channel */
 300		.event_spec = adxl345_fake_chan_events,
 301		.num_event_specs = ARRAY_SIZE(adxl345_fake_chan_events),
 302	},
 303};
 304
 305static const unsigned long adxl345_scan_masks[] = {
 306	BIT(chan_x) | BIT(chan_y) | BIT(chan_z),
 307	0
 308};
 309
 310bool adxl345_is_volatile_reg(struct device *dev, unsigned int reg)
 311{
 312	switch (reg) {
 313	case ADXL345_REG_DATA_AXIS(0):
 314	case ADXL345_REG_DATA_AXIS(1):
 315	case ADXL345_REG_DATA_AXIS(2):
 316	case ADXL345_REG_DATA_AXIS(3):
 317	case ADXL345_REG_DATA_AXIS(4):
 318	case ADXL345_REG_DATA_AXIS(5):
 319	case ADXL345_REG_ACT_TAP_STATUS:
 320	case ADXL345_REG_FIFO_STATUS:
 321	case ADXL345_REG_INT_SOURCE:
 322		return true;
 323	default:
 324		return false;
 325	}
 326}
 327EXPORT_SYMBOL_NS_GPL(adxl345_is_volatile_reg, "IIO_ADXL345");
 328
 329/**
 330 * adxl345_set_measure_en() - Enable and disable measuring.
 331 *
 332 * @st: The device data.
 333 * @en: Enable measurements, else standby mode.
 334 *
 335 * For lowest power operation, standby mode can be used. In standby mode,
 336 * current consumption is supposed to be reduced to 0.1uA (typical). In this
 337 * mode no measurements are made. Placing the device into standby mode
 338 * preserves the contents of FIFO.
 339 *
 340 * Return: Returns 0 if successful, or a negative error value.
 341 */
 342static int adxl345_set_measure_en(struct adxl345_state *st, bool en)
 343{
 344	return regmap_assign_bits(st->regmap, ADXL345_REG_POWER_CTL,
 345				  ADXL345_POWER_CTL_MEASURE, en);
 346}
 347
 348/* activity / inactivity */
 349
 350static int adxl345_set_inact_threshold(struct adxl345_state *st,
 351				       unsigned int threshold)
 352{
 353	int ret;
 354
 355	st->inact_threshold = min(U8_MAX, threshold);
 356
 357	ret = regmap_write(st->regmap,
 358			   adxl345_act_thresh_reg[ADXL345_INACTIVITY],
 359			   st->inact_threshold);
 360	if (ret)
 361		return ret;
 362
 363	return regmap_write(st->regmap,
 364			    adxl345_act_thresh_reg[ADXL345_INACTIVITY_FF],
 365			    st->inact_threshold);
 366}
 367
 368static int adxl345_set_default_time(struct adxl345_state *st)
 369{
 370	int max_boundary = U8_MAX;
 371	int min_boundary = 10;
 372	enum adxl345_odr odr;
 373	unsigned int regval;
 374	unsigned int val;
 375	int ret;
 376
 377	/* Generated inactivity time based on ODR */
 378	ret = regmap_read(st->regmap, ADXL345_REG_BW_RATE, &regval);
 379	if (ret)
 380		return ret;
 381
 382	odr = FIELD_GET(ADXL345_BW_RATE_MSK, regval);
 383	val = clamp(max_boundary - adxl345_odr_tbl[odr][0],
 384		    min_boundary, max_boundary);
 385	st->inact_time_ms = MILLI * val;
 386
 387	/* Inactivity time in s */
 388	return regmap_write(st->regmap, ADXL345_REG_TIME_INACT, val);
 389}
 390
 391static int adxl345_set_inactivity_time(struct adxl345_state *st, u32 val_int)
 392{
 393	st->inact_time_ms = MILLI * val_int;
 394
 395	return regmap_write(st->regmap, ADXL345_REG_TIME_INACT, val_int);
 396}
 397
 398static int adxl345_set_freefall_time(struct adxl345_state *st, u32 val_fract)
 399{
 400	/*
 401	 * Datasheet max. value is 255 * 5000 us = 1.275000 seconds.
 402	 *
 403	 * Recommended values between 100ms and 350ms (0x14 to 0x46)
 404	 */
 405	st->inact_time_ms = DIV_ROUND_UP(val_fract, MILLI);
 406
 407	return regmap_write(st->regmap, ADXL345_REG_TIME_FF,
 408			    DIV_ROUND_CLOSEST(val_fract, 5));
 409}
 410
 411/**
 412 * adxl345_set_inact_time - Configure inactivity time explicitly or by ODR.
 413 * @st: The sensor state instance.
 414 * @val_int: The inactivity time, integer part.
 415 * @val_fract: The inactivity time, fractional part when val_int is 0.
 416 *
 417 * Inactivity time can be configured between 1 and 255 seconds. If a user sets
 418 * val_s to 0, a default inactivity time is calculated automatically (since 0 is
 419 * also invalid and undefined by the sensor).
 420 *
 421 * In such cases, power consumption should be considered: the inactivity period
 422 * should be shorter at higher sampling frequencies and longer at lower ones.
 423 * Specifically, for frequencies above 255 Hz, the default is set to 10 seconds;
 424 * for frequencies below 10 Hz, it defaults to 255 seconds.
 425 *
 426 * The calculation method subtracts the integer part of the configured sample
 427 * frequency from 255 to estimate the inactivity time in seconds. Sub-Hertz
 428 * values are ignored in this approximation. Since the recommended output data
 429 * rates (ODRs) for features like activity/inactivity detection, sleep modes,
 430 * and free fall range between 12.5 Hz and 400 Hz, frequencies outside this
 431 * range will either use the defined boundary defaults or require explicit
 432 * configuration via val_s.
 433 *
 434 * Return: 0 or error value.
 435 */
 436static int adxl345_set_inact_time(struct adxl345_state *st, u32 val_int,
 437				  u32 val_fract)
 438{
 439	if (val_int > 0) {
 440		/* Time >= 1s, inactivity */
 441		return adxl345_set_inactivity_time(st, val_int);
 442	} else if (val_int == 0) {
 443		if (val_fract > 0) {
 444			/* Time < 1s, free-fall */
 445			return adxl345_set_freefall_time(st, val_fract);
 446		} else if (val_fract == 0) {
 447			/* Time == 0.0s */
 448			return adxl345_set_default_time(st);
 449		}
 450	}
 451
 452	/* Do not support negative or wrong input. */
 453	return -EINVAL;
 454}
 455
 456/**
 457 * adxl345_is_act_inact_ac() - Verify if AC or DC coupling is currently enabled.
 458 *
 459 * @st: The device data.
 460 * @type: The activity or inactivity type.
 461 *
 462 * Given a type of activity / inactivity combined with either AC coupling set or
 463 * default to DC, this function verifies if the combination is currently
 464 * configured, hence enabled or not.
 465 *
 466 * Return: true if configured coupling matches the provided type, else a negative
 467 *         error value.
 468 */
 469static int adxl345_is_act_inact_ac(struct adxl345_state *st,
 470				   enum adxl345_activity_type type)
 471{
 472	unsigned int regval;
 473	bool coupling;
 474	int ret;
 475
 476	if (type == ADXL345_INACTIVITY_FF)
 477		return true;
 478
 479	ret = regmap_read(st->regmap, ADXL345_REG_ACT_INACT_CTRL, &regval);
 480	if (ret)
 481		return ret;
 482
 483	coupling = adxl345_act_acdc_msk[type] & regval;
 484
 485	switch (type) {
 486	case ADXL345_ACTIVITY:
 487	case ADXL345_INACTIVITY:
 488		return coupling == ADXL345_COUPLING_DC;
 489	case ADXL345_ACTIVITY_AC:
 490	case ADXL345_INACTIVITY_AC:
 491		return coupling == ADXL345_COUPLING_AC;
 492	default:
 493		return -EINVAL;
 494	}
 495}
 496
 497/**
 498 * adxl345_set_act_inact_ac() - Configure AC coupling or DC coupling.
 499 *
 500 * @st: The device data.
 501 * @type: Provide a type of activity or inactivity.
 502 * @cmd_en: enable or disable AC coupling.
 503 *
 504 * Enables AC coupling or DC coupling depending on the provided type argument.
 505 * Note: Activity and inactivity can be either AC coupled or DC coupled not
 506 * both at the same time.
 507 *
 508 * Return: 0 if successful, else error value.
 509 */
 510static int adxl345_set_act_inact_ac(struct adxl345_state *st,
 511				    enum adxl345_activity_type type,
 512				    bool cmd_en)
 513{
 514	unsigned int act_inact_ac;
 515
 516	if (type == ADXL345_ACTIVITY_AC || type == ADXL345_INACTIVITY_AC)
 517		act_inact_ac = ADXL345_COUPLING_AC && cmd_en;
 518	else
 519		act_inact_ac = ADXL345_COUPLING_DC && cmd_en;
 520
 521	/*
 522	 * A setting of false selects dc-coupled operation, and a setting of
 523	 * true enables ac-coupled operation. In dc-coupled operation, the
 524	 * current acceleration magnitude is compared directly with
 525	 * ADXL345_REG_THRESH_ACT and ADXL345_REG_THRESH_INACT to determine
 526	 * whether activity or inactivity is detected.
 527	 *
 528	 * In ac-coupled operation for activity detection, the acceleration
 529	 * value at the start of activity detection is taken as a reference
 530	 * value. New samples of acceleration are then compared to this
 531	 * reference value, and if the magnitude of the difference exceeds the
 532	 * ADXL345_REG_THRESH_ACT value, the device triggers an activity
 533	 * interrupt.
 534	 *
 535	 * Similarly, in ac-coupled operation for inactivity detection, a
 536	 * reference value is used for comparison and is updated whenever the
 537	 * device exceeds the inactivity threshold. After the reference value
 538	 * is selected, the device compares the magnitude of the difference
 539	 * between the reference value and the current acceleration with
 540	 * ADXL345_REG_THRESH_INACT. If the difference is less than the value in
 541	 * ADXL345_REG_THRESH_INACT for the time in ADXL345_REG_TIME_INACT, the
 542	 * device is considered inactive and the inactivity interrupt is
 543	 * triggered. [quoted from p. 24, ADXL345 datasheet Rev. G]
 544	 *
 545	 * In a conclusion, the first acceleration snapshot sample which hit the
 546	 * threshold in a particular direction is always taken as acceleration
 547	 * reference value to that direction. Since for the hardware activity
 548	 * and inactivity depend on the x/y/z axis, so do ac and dc coupling.
 549	 * Note, this sw driver always enables or disables all three x/y/z axis
 550	 * for detection via act_axis_ctrl and inact_axis_ctrl, respectively.
 551	 * Where in dc-coupling samples are compared against the thresholds, in
 552	 * ac-coupling measurement difference to the first acceleration
 553	 * reference value are compared against the threshold. So, ac-coupling
 554	 * allows for a bit more dynamic compensation depending on the initial
 555	 * sample.
 556	 */
 557	return regmap_assign_bits(st->regmap, ADXL345_REG_ACT_INACT_CTRL,
 558				  adxl345_act_acdc_msk[type], act_inact_ac);
 559}
 560
 561static int adxl345_is_act_inact_en(struct adxl345_state *st,
 562				   enum adxl345_activity_type type)
 563{
 564	unsigned int axis_ctrl;
 565	unsigned int regval;
 566	bool int_en, en;
 567	int ret;
 568
 569	ret = regmap_read(st->regmap, ADXL345_REG_ACT_INACT_CTRL, &axis_ctrl);
 570	if (ret)
 571		return ret;
 572
 573	/* Check if axis for activity are enabled */
 574	switch (type) {
 575	case ADXL345_ACTIVITY:
 576	case ADXL345_ACTIVITY_AC:
 577		en = FIELD_GET(ADXL345_ACT_XYZ_EN, axis_ctrl);
 578		if (!en)
 579			return false;
 580		break;
 581	case ADXL345_INACTIVITY:
 582	case ADXL345_INACTIVITY_AC:
 583		en = FIELD_GET(ADXL345_INACT_XYZ_EN, axis_ctrl);
 584		if (!en)
 585			return false;
 586		break;
 587	case ADXL345_INACTIVITY_FF:
 588		en = true;
 589		break;
 590	default:
 591		return -EINVAL;
 592	}
 593
 594	/* Check if specific interrupt is enabled */
 595	ret = regmap_read(st->regmap, ADXL345_REG_INT_ENABLE, &regval);
 596	if (ret)
 597		return ret;
 598
 599	int_en = adxl345_act_int_reg[type] & regval;
 600	if (!int_en)
 601		return false;
 602
 603	/* Check if configured coupling matches provided type */
 604	return adxl345_is_act_inact_ac(st, type);
 605}
 606
 607static int adxl345_set_act_inact_linkbit(struct adxl345_state *st,
 608					 enum adxl345_activity_type type,
 609					 bool en)
 610{
 611	int act_ac_en, inact_ac_en;
 612	int act_en, inact_en;
 613
 614	act_en = adxl345_is_act_inact_en(st, ADXL345_ACTIVITY);
 615	if (act_en < 0)
 616		return act_en;
 617
 618	act_ac_en = adxl345_is_act_inact_en(st, ADXL345_ACTIVITY_AC);
 619	if (act_ac_en < 0)
 620		return act_ac_en;
 621
 622	if (type == ADXL345_INACTIVITY_FF) {
 623		inact_en = false;
 624	} else {
 625		inact_en = adxl345_is_act_inact_en(st, ADXL345_INACTIVITY);
 626		if (inact_en < 0)
 627			return inact_en;
 628
 629		inact_ac_en = adxl345_is_act_inact_en(st, ADXL345_INACTIVITY_AC);
 630		if (inact_ac_en < 0)
 631			return inact_ac_en;
 632
 633		inact_en = inact_en || inact_ac_en;
 634	}
 635
 636	act_en = act_en || act_ac_en;
 637
 638	return regmap_assign_bits(st->regmap, ADXL345_REG_POWER_CTL,
 639				  ADXL345_POWER_CTL_INACT_MSK,
 640				  en && act_en && inact_en);
 641}
 642
 643static int adxl345_set_act_inact_en(struct adxl345_state *st,
 644				    enum adxl345_activity_type type,
 645				    bool cmd_en)
 646{
 647	unsigned int axis_ctrl;
 648	unsigned int threshold;
 649	unsigned int period;
 650	int ret;
 651
 652	if (cmd_en) {
 653		/* When turning on, check if threshold is valid */
 654		if (type == ADXL345_ACTIVITY || type == ADXL345_ACTIVITY_AC) {
 655			ret = regmap_read(st->regmap,
 656					  adxl345_act_thresh_reg[type],
 657					  &threshold);
 658			if (ret)
 659				return ret;
 660		} else {
 661			threshold = st->inact_threshold;
 662		}
 663
 664		if (!threshold) /* Just ignore the command if threshold is 0 */
 665			return 0;
 666
 667		/* When turning on inactivity, check if inact time is valid */
 668		if (type == ADXL345_INACTIVITY || type == ADXL345_INACTIVITY_AC) {
 669			ret = regmap_read(st->regmap,
 670					  ADXL345_REG_TIME_INACT,
 671					  &period);
 672			if (ret)
 673				return ret;
 674
 675			if (!period)
 676				return 0;
 677		}
 678	} else {
 679		/*
 680		 * When turning off an activity, ensure that the correct
 681		 * coupling event is specified. This step helps prevent misuse -
 682		 * for example, if an AC-coupled activity is active and the
 683		 * current call attempts to turn off a DC-coupled activity, this
 684		 * inconsistency should be detected here.
 685		 */
 686		if (adxl345_is_act_inact_ac(st, type) <= 0)
 687			return 0;
 688	}
 689
 690	/* Start modifying configuration registers */
 691	ret = adxl345_set_measure_en(st, false);
 692	if (ret)
 693		return ret;
 694
 695	/* Enable axis according to the command */
 696	switch (type) {
 697	case ADXL345_ACTIVITY:
 698	case ADXL345_ACTIVITY_AC:
 699		axis_ctrl = ADXL345_ACT_XYZ_EN;
 700		break;
 701	case ADXL345_INACTIVITY:
 702	case ADXL345_INACTIVITY_AC:
 703		axis_ctrl = ADXL345_INACT_XYZ_EN;
 704		break;
 705	case ADXL345_INACTIVITY_FF:
 706		axis_ctrl = ADXL345_ACT_INACT_NO_AXIS_EN;
 707		break;
 708	default:
 709		return -EINVAL;
 710	}
 711
 712	ret = regmap_assign_bits(st->regmap, ADXL345_REG_ACT_INACT_CTRL,
 713				 axis_ctrl, cmd_en);
 714	if (ret)
 715		return ret;
 716
 717	/* Update AC/DC-coupling according to the command */
 718	ret = adxl345_set_act_inact_ac(st, type, cmd_en);
 719	if (ret)
 720		return ret;
 721
 722	/* Enable the interrupt line, according to the command */
 723	ret = regmap_assign_bits(st->regmap, ADXL345_REG_INT_ENABLE,
 724				 adxl345_act_int_reg[type], cmd_en);
 725	if (ret)
 726		return ret;
 727
 728	/* Set link-bit and auto-sleep only when ACT and INACT are enabled */
 729	ret = adxl345_set_act_inact_linkbit(st, type, cmd_en);
 730	if (ret)
 731		return ret;
 732
 733	return adxl345_set_measure_en(st, true);
 734}
 735
 736/* tap */
 737
 738static int _adxl345_set_tap_int(struct adxl345_state *st,
 739				enum adxl345_tap_type type, bool state)
 740{
 741	unsigned int int_map = 0x00;
 742	unsigned int tap_threshold;
 743	bool axis_valid;
 744	bool singletap_args_valid = false;
 745	bool doubletap_args_valid = false;
 746	bool en = false;
 747	u32 axis_ctrl;
 748	int ret;
 749
 750	ret = regmap_read(st->regmap, ADXL345_REG_TAP_AXIS, &axis_ctrl);
 751	if (ret)
 752		return ret;
 753
 754	axis_valid = FIELD_GET(ADXL345_REG_TAP_AXIS_MSK, axis_ctrl) > 0;
 755
 756	ret = regmap_read(st->regmap, ADXL345_REG_THRESH_TAP, &tap_threshold);
 757	if (ret)
 758		return ret;
 759
 760	/*
 761	 * Note: A value of 0 for threshold and/or dur may result in undesirable
 762	 *	 behavior if single tap/double tap interrupts are enabled.
 763	 */
 764	singletap_args_valid = tap_threshold > 0 && st->tap_duration_us > 0;
 765
 766	if (type == ADXL345_SINGLE_TAP) {
 767		en = axis_valid && singletap_args_valid;
 768	} else {
 769		/* doubletap: Window must be equal or greater than latent! */
 770		doubletap_args_valid = st->tap_latent_us > 0 &&
 771			st->tap_window_us > 0 &&
 772			st->tap_window_us >= st->tap_latent_us;
 773
 774		en = axis_valid && singletap_args_valid && doubletap_args_valid;
 775	}
 776
 777	if (state && en)
 778		int_map |= adxl345_tap_int_reg[type];
 779
 780	return regmap_update_bits(st->regmap, ADXL345_REG_INT_ENABLE,
 781				  adxl345_tap_int_reg[type], int_map);
 782}
 783
 784static int adxl345_is_tap_en(struct adxl345_state *st,
 785			     enum iio_modifier axis,
 786			     enum adxl345_tap_type type, bool *en)
 787{
 788	unsigned int regval;
 789	u32 axis_ctrl;
 790	int ret;
 791
 792	ret = regmap_read(st->regmap, ADXL345_REG_TAP_AXIS, &axis_ctrl);
 793	if (ret)
 794		return ret;
 795
 796	/* Verify if axis is enabled for the tap detection. */
 797	switch (axis) {
 798	case IIO_MOD_X:
 799		*en = FIELD_GET(ADXL345_TAP_X_EN, axis_ctrl);
 800		break;
 801	case IIO_MOD_Y:
 802		*en = FIELD_GET(ADXL345_TAP_Y_EN, axis_ctrl);
 803		break;
 804	case IIO_MOD_Z:
 805		*en = FIELD_GET(ADXL345_TAP_Z_EN, axis_ctrl);
 806		break;
 807	default:
 808		*en = false;
 809		return -EINVAL;
 810	}
 811
 812	if (*en) {
 813		/*
 814		 * If axis allow for tap detection, verify if the interrupt is
 815		 * enabled for tap detection.
 816		 */
 817		ret = regmap_read(st->regmap, ADXL345_REG_INT_ENABLE, &regval);
 818		if (ret)
 819			return ret;
 820
 821		*en = adxl345_tap_int_reg[type] & regval;
 822	}
 823
 824	return 0;
 825}
 826
 827static int adxl345_set_singletap_en(struct adxl345_state *st,
 828				    enum iio_modifier axis, bool en)
 829{
 830	int ret;
 831	u32 axis_ctrl;
 832
 833	switch (axis) {
 834	case IIO_MOD_X:
 835		axis_ctrl = ADXL345_TAP_X_EN;
 836		break;
 837	case IIO_MOD_Y:
 838		axis_ctrl = ADXL345_TAP_Y_EN;
 839		break;
 840	case IIO_MOD_Z:
 841		axis_ctrl = ADXL345_TAP_Z_EN;
 842		break;
 843	default:
 844		return -EINVAL;
 845	}
 846
 847	if (en)
 848		ret = regmap_set_bits(st->regmap, ADXL345_REG_TAP_AXIS,
 849				      axis_ctrl);
 850	else
 851		ret = regmap_clear_bits(st->regmap, ADXL345_REG_TAP_AXIS,
 852					axis_ctrl);
 853	if (ret)
 854		return ret;
 855
 856	return _adxl345_set_tap_int(st, ADXL345_SINGLE_TAP, en);
 857}
 858
 859static int adxl345_set_doubletap_en(struct adxl345_state *st, bool en)
 860{
 861	int ret;
 862
 863	/*
 864	 * Generally suppress detection of spikes during the latency period as
 865	 * double taps here, this is fully optional for double tap detection
 866	 */
 867	ret = regmap_assign_bits(st->regmap, ADXL345_REG_TAP_AXIS,
 868				 ADXL345_REG_TAP_SUPPRESS, en);
 869	if (ret)
 870		return ret;
 871
 872	return _adxl345_set_tap_int(st, ADXL345_DOUBLE_TAP, en);
 873}
 874
 875static int _adxl345_set_tap_time(struct adxl345_state *st,
 876				 enum adxl345_tap_time_type type, u32 val_us)
 877{
 878	unsigned int regval;
 879
 880	switch (type) {
 881	case ADXL345_TAP_TIME_WINDOW:
 882		st->tap_window_us = val_us;
 883		break;
 884	case ADXL345_TAP_TIME_LATENT:
 885		st->tap_latent_us = val_us;
 886		break;
 887	case ADXL345_TAP_TIME_DUR:
 888		st->tap_duration_us = val_us;
 889		break;
 890	}
 891
 892	/*
 893	 * The scale factor is 1250us / LSB for tap_window_us and tap_latent_us.
 894	 * For tap_duration_us the scale factor is 625us / LSB.
 895	 */
 896	if (type == ADXL345_TAP_TIME_DUR)
 897		regval = DIV_ROUND_CLOSEST(val_us, 625);
 898	else
 899		regval = DIV_ROUND_CLOSEST(val_us, 1250);
 900
 901	return regmap_write(st->regmap, adxl345_tap_time_reg[type], regval);
 902}
 903
 904static int adxl345_set_tap_duration(struct adxl345_state *st, u32 val_int,
 905				    u32 val_fract_us)
 906{
 907	/*
 908	 * Max value is 255 * 625 us = 0.159375 seconds
 909	 *
 910	 * Note: the scaling is similar to the scaling in the ADXL380
 911	 */
 912	if (val_int || val_fract_us > 159375)
 913		return -EINVAL;
 914
 915	return _adxl345_set_tap_time(st, ADXL345_TAP_TIME_DUR, val_fract_us);
 916}
 917
 918static int adxl345_set_tap_window(struct adxl345_state *st, u32 val_int,
 919				  u32 val_fract_us)
 920{
 921	/*
 922	 * Max value is 255 * 1250 us = 0.318750 seconds
 923	 *
 924	 * Note: the scaling is similar to the scaling in the ADXL380
 925	 */
 926	if (val_int || val_fract_us > 318750)
 927		return -EINVAL;
 928
 929	return _adxl345_set_tap_time(st, ADXL345_TAP_TIME_WINDOW, val_fract_us);
 930}
 931
 932static int adxl345_set_tap_latent(struct adxl345_state *st, u32 val_int,
 933				  u32 val_fract_us)
 934{
 935	/*
 936	 * Max value is 255 * 1250 us = 0.318750 seconds
 937	 *
 938	 * Note: the scaling is similar to the scaling in the ADXL380
 939	 */
 940	if (val_int || val_fract_us > 318750)
 941		return -EINVAL;
 942
 943	return _adxl345_set_tap_time(st, ADXL345_TAP_TIME_LATENT, val_fract_us);
 944}
 945
 946static int adxl345_find_odr(struct adxl345_state *st, int val,
 947			    int val2, enum adxl345_odr *odr)
 948{
 949	int i;
 950
 951	for (i = 0; i < ARRAY_SIZE(adxl345_odr_tbl); i++) {
 952		if (val == adxl345_odr_tbl[i][0] &&
 953		    val2 == adxl345_odr_tbl[i][1]) {
 954			*odr = i;
 955			return 0;
 956		}
 957	}
 958
 959	return -EINVAL;
 960}
 961
 962static int adxl345_set_odr(struct adxl345_state *st, enum adxl345_odr odr)
 963{
 964	int ret;
 965
 966	ret = regmap_update_bits(st->regmap, ADXL345_REG_BW_RATE,
 967				 ADXL345_BW_RATE_MSK,
 968				 FIELD_PREP(ADXL345_BW_RATE_MSK, odr));
 969	if (ret)
 970		return ret;
 971
 972	/* update inactivity time by ODR */
 973	return adxl345_set_inact_time(st, 0, 0);
 974}
 975
 976static int adxl345_find_range(struct adxl345_state *st, int val, int val2,
 977			      enum adxl345_range *range)
 978{
 979	int i;
 980
 981	for (i = 0; i < ARRAY_SIZE(adxl345_fullres_range_tbl); i++) {
 982		if (val == adxl345_fullres_range_tbl[i][0] &&
 983		    val2 == adxl345_fullres_range_tbl[i][1]) {
 984			*range = i;
 985			return 0;
 986		}
 987	}
 988
 989	return -EINVAL;
 990}
 991
 992static int adxl345_set_range(struct adxl345_state *st, enum adxl345_range range)
 993{
 994	unsigned int act_threshold, inact_threshold;
 995	unsigned int range_old;
 996	unsigned int regval;
 997	int ret;
 998
 999	ret = regmap_read(st->regmap, ADXL345_REG_DATA_FORMAT, &regval);
1000	if (ret)
1001		return ret;
1002	range_old = FIELD_GET(ADXL345_DATA_FORMAT_RANGE, regval);
1003
1004	ret = regmap_read(st->regmap,
1005			  adxl345_act_thresh_reg[ADXL345_ACTIVITY],
1006			  &act_threshold);
1007	if (ret)
1008		return ret;
1009
1010	ret = regmap_update_bits(st->regmap, ADXL345_REG_DATA_FORMAT,
1011				 ADXL345_DATA_FORMAT_RANGE,
1012				 FIELD_PREP(ADXL345_DATA_FORMAT_RANGE, range));
1013	if (ret)
1014		return ret;
1015
1016	act_threshold = act_threshold * adxl345_range_factor_tbl[range_old]
1017		/ adxl345_range_factor_tbl[range];
1018	act_threshold = min(U8_MAX, max(1, act_threshold));
1019
1020	inact_threshold = st->inact_threshold;
1021	inact_threshold = inact_threshold * adxl345_range_factor_tbl[range_old]
1022		/ adxl345_range_factor_tbl[range];
1023	inact_threshold = min(U8_MAX, max(1, inact_threshold));
1024
1025	ret = regmap_write(st->regmap, adxl345_act_thresh_reg[ADXL345_ACTIVITY],
1026			   act_threshold);
1027	if (ret)
1028		return ret;
1029
1030	return adxl345_set_inact_threshold(st, inact_threshold);
1031}
1032
1033static int adxl345_read_avail(struct iio_dev *indio_dev,
1034			      struct iio_chan_spec const *chan,
1035			      const int **vals, int *type,
1036			      int *length, long mask)
1037{
1038	switch (mask) {
1039	case IIO_CHAN_INFO_SCALE:
1040		*vals = (int *)adxl345_fullres_range_tbl;
1041		*type = IIO_VAL_INT_PLUS_MICRO;
1042		*length = ARRAY_SIZE(adxl345_fullres_range_tbl) * 2;
1043		return IIO_AVAIL_LIST;
1044	case IIO_CHAN_INFO_SAMP_FREQ:
1045		*vals = (int *)adxl345_odr_tbl;
1046		*type = IIO_VAL_INT_PLUS_MICRO;
1047		*length = ARRAY_SIZE(adxl345_odr_tbl) * 2;
1048		return IIO_AVAIL_LIST;
1049	}
1050
1051	return -EINVAL;
1052}
1053
1054static int adxl345_read_raw(struct iio_dev *indio_dev,
1055			    struct iio_chan_spec const *chan,
1056			    int *val, int *val2, long mask)
1057{
1058	struct adxl345_state *st = iio_priv(indio_dev);
1059	__le16 accel;
1060	unsigned int regval;
1061	enum adxl345_odr odr;
1062	enum adxl345_range range;
1063	int ret;
1064
1065	switch (mask) {
1066	case IIO_CHAN_INFO_RAW:
1067		/*
1068		 * Data is stored in adjacent registers:
1069		 * ADXL345_REG_DATA(X0/Y0/Z0) contain the least significant byte
1070		 * and ADXL345_REG_DATA(X0/Y0/Z0) + 1 the most significant byte
1071		 */
1072		ret = regmap_bulk_read(st->regmap,
1073				       ADXL345_REG_DATA_AXIS(chan->address),
1074				       &accel, sizeof(accel));
1075		if (ret)
1076			return ret;
1077
1078		*val = sign_extend32(le16_to_cpu(accel), 12);
1079		return IIO_VAL_INT;
1080	case IIO_CHAN_INFO_SCALE:
1081		ret = regmap_read(st->regmap, ADXL345_REG_DATA_FORMAT, &regval);
1082		if (ret)
1083			return ret;
1084		range = FIELD_GET(ADXL345_DATA_FORMAT_RANGE, regval);
1085		*val = adxl345_fullres_range_tbl[range][0];
1086		*val2 = adxl345_fullres_range_tbl[range][1];
1087		return IIO_VAL_INT_PLUS_MICRO;
1088	case IIO_CHAN_INFO_CALIBBIAS:
1089		ret = regmap_read(st->regmap,
1090				  ADXL345_REG_OFS_AXIS(chan->address), &regval);
1091		if (ret)
1092			return ret;
1093		/*
1094		 * 8-bit resolution at +/- 2g, that is 4x accel data scale
1095		 * factor
1096		 */
1097		*val = sign_extend32(regval, 7) * 4;
1098
1099		return IIO_VAL_INT;
1100	case IIO_CHAN_INFO_SAMP_FREQ:
1101		ret = regmap_read(st->regmap, ADXL345_REG_BW_RATE, &regval);
1102		if (ret)
1103			return ret;
1104		odr = FIELD_GET(ADXL345_BW_RATE_MSK, regval);
1105		*val = adxl345_odr_tbl[odr][0];
1106		*val2 = adxl345_odr_tbl[odr][1];
1107		return IIO_VAL_INT_PLUS_MICRO;
1108	}
1109
1110	return -EINVAL;
1111}
1112
1113static int adxl345_write_raw(struct iio_dev *indio_dev,
1114			     struct iio_chan_spec const *chan,
1115			     int val, int val2, long mask)
1116{
1117	struct adxl345_state *st = iio_priv(indio_dev);
1118	enum adxl345_range range;
1119	enum adxl345_odr odr;
1120	int ret;
1121
1122	ret = adxl345_set_measure_en(st, false);
1123	if (ret)
1124		return ret;
1125
1126	switch (mask) {
1127	case IIO_CHAN_INFO_CALIBBIAS:
1128		/*
1129		 * 8-bit resolution at +/- 2g, that is 4x accel data scale
1130		 * factor
1131		 */
1132		ret = regmap_write(st->regmap,
1133				   ADXL345_REG_OFS_AXIS(chan->address),
1134				   val / 4);
1135		if (ret)
1136			return ret;
1137		break;
1138	case IIO_CHAN_INFO_SAMP_FREQ:
1139		ret = adxl345_find_odr(st, val, val2, &odr);
1140		if (ret)
1141			return ret;
1142
1143		ret = adxl345_set_odr(st, odr);
1144		if (ret)
1145			return ret;
1146		break;
1147	case IIO_CHAN_INFO_SCALE:
1148		ret = adxl345_find_range(st, val, val2,	&range);
1149		if (ret)
1150			return ret;
1151
1152		ret = adxl345_set_range(st, range);
1153		if (ret)
1154			return ret;
1155		break;
1156	default:
1157		return -EINVAL;
1158	}
1159
1160	return adxl345_set_measure_en(st, true);
1161}
1162
1163static int adxl345_read_mag_config(struct adxl345_state *st,
1164				   enum iio_event_direction dir,
1165				   enum adxl345_activity_type type_act,
1166				   enum adxl345_activity_type type_inact)
1167{
1168	switch (dir) {
1169	case IIO_EV_DIR_RISING:
1170		return !!adxl345_is_act_inact_en(st, type_act);
1171	case IIO_EV_DIR_FALLING:
1172		return !!adxl345_is_act_inact_en(st, type_inact);
1173	default:
1174		return -EINVAL;
1175	}
1176}
1177
1178static int adxl345_write_mag_config(struct adxl345_state *st,
1179				    enum iio_event_direction dir,
1180				    enum adxl345_activity_type type_act,
1181				    enum adxl345_activity_type type_inact,
1182				    bool state)
1183{
1184	switch (dir) {
1185	case IIO_EV_DIR_RISING:
1186		return adxl345_set_act_inact_en(st, type_act, state);
1187	case IIO_EV_DIR_FALLING:
1188		return adxl345_set_act_inact_en(st, type_inact, state);
1189	default:
1190		return -EINVAL;
1191	}
1192}
1193
1194static int adxl345_read_event_config(struct iio_dev *indio_dev,
1195				     const struct iio_chan_spec *chan,
1196				     enum iio_event_type type,
1197				     enum iio_event_direction dir)
1198{
1199	struct adxl345_state *st = iio_priv(indio_dev);
1200	bool int_en;
1201	int ret;
1202
1203	switch (type) {
1204	case IIO_EV_TYPE_MAG:
1205		return adxl345_read_mag_config(st, dir,
1206					       ADXL345_ACTIVITY,
1207					       ADXL345_INACTIVITY);
1208	case IIO_EV_TYPE_MAG_ADAPTIVE:
1209		return adxl345_read_mag_config(st, dir,
1210					       ADXL345_ACTIVITY_AC,
1211					       ADXL345_INACTIVITY_AC);
1212	case IIO_EV_TYPE_GESTURE:
1213		switch (dir) {
1214		case IIO_EV_DIR_SINGLETAP:
1215			ret = adxl345_is_tap_en(st, chan->channel2,
1216						ADXL345_SINGLE_TAP, &int_en);
1217			if (ret)
1218				return ret;
1219			return int_en;
1220		case IIO_EV_DIR_DOUBLETAP:
1221			ret = adxl345_is_tap_en(st, chan->channel2,
1222						ADXL345_DOUBLE_TAP, &int_en);
1223			if (ret)
1224				return ret;
1225			return int_en;
1226		default:
1227			return -EINVAL;
1228		}
1229	default:
1230		return -EINVAL;
1231	}
1232}
1233
1234static int adxl345_write_event_config(struct iio_dev *indio_dev,
1235				      const struct iio_chan_spec *chan,
1236				      enum iio_event_type type,
1237				      enum iio_event_direction dir,
1238				      bool state)
1239{
1240	struct adxl345_state *st = iio_priv(indio_dev);
1241
1242	switch (type) {
1243	case IIO_EV_TYPE_MAG:
1244		return adxl345_write_mag_config(st, dir,
1245						ADXL345_ACTIVITY,
1246						ADXL345_INACTIVITY,
1247						state);
1248	case IIO_EV_TYPE_MAG_ADAPTIVE:
1249		return adxl345_write_mag_config(st, dir,
1250						ADXL345_ACTIVITY_AC,
1251						ADXL345_INACTIVITY_AC,
1252						state);
1253	case IIO_EV_TYPE_GESTURE:
1254		switch (dir) {
1255		case IIO_EV_DIR_SINGLETAP:
1256			return adxl345_set_singletap_en(st, chan->channel2, state);
1257		case IIO_EV_DIR_DOUBLETAP:
1258			return adxl345_set_doubletap_en(st, state);
1259		default:
1260			return -EINVAL;
1261		}
1262	default:
1263		return -EINVAL;
1264	}
1265}
1266
1267static int adxl345_read_mag_value(struct adxl345_state *st,
1268				  enum iio_event_direction dir,
1269				  enum iio_event_info info,
1270				  enum adxl345_activity_type type_act,
1271				  enum adxl345_activity_type type_inact,
1272				  int *val, int *val2)
1273{
1274	unsigned int threshold;
1275	int ret;
1276
1277	switch (info) {
1278	case IIO_EV_INFO_VALUE:
1279		switch (dir) {
1280		case IIO_EV_DIR_RISING:
1281			ret = regmap_read(st->regmap,
1282					  adxl345_act_thresh_reg[type_act],
1283					  &threshold);
1284			if (ret)
1285				return ret;
1286			*val = 62500 * threshold;
1287			*val2 = MICRO;
1288			return IIO_VAL_FRACTIONAL;
1289		case IIO_EV_DIR_FALLING:
1290			*val = 62500 * st->inact_threshold;
1291			*val2 = MICRO;
1292			return IIO_VAL_FRACTIONAL;
1293		default:
1294			return -EINVAL;
1295		}
1296	case IIO_EV_INFO_PERIOD:
1297		*val = st->inact_time_ms;
1298		*val2 = MILLI;
1299		return IIO_VAL_FRACTIONAL;
1300	default:
1301		return -EINVAL;
1302	}
1303}
1304
1305static int adxl345_write_mag_value(struct adxl345_state *st,
1306				   enum iio_event_direction dir,
1307				   enum iio_event_info info,
1308				   enum adxl345_activity_type type_act,
1309				   enum adxl345_activity_type type_inact,
1310				   int val, int val2)
1311{
1312	switch (info) {
1313	case IIO_EV_INFO_VALUE:
1314		/* Scaling factor 62.5mg/LSB, i.e. ~16g corresponds to 0xff */
1315		val = DIV_ROUND_CLOSEST(val * MICRO + val2, 62500);
1316		switch (dir) {
1317		case IIO_EV_DIR_RISING:
1318			return regmap_write(st->regmap,
1319					    adxl345_act_thresh_reg[type_act],
1320					    val);
1321		case IIO_EV_DIR_FALLING:
1322			return adxl345_set_inact_threshold(st, val);
1323		default:
1324			return -EINVAL;
1325		}
1326	case IIO_EV_INFO_PERIOD:
1327		return adxl345_set_inact_time(st, val, val2);
1328	default:
1329		return -EINVAL;
1330	}
1331}
1332
1333static int adxl345_read_event_value(struct iio_dev *indio_dev,
1334				    const struct iio_chan_spec *chan,
1335				    enum iio_event_type type,
1336				    enum iio_event_direction dir,
1337				    enum iio_event_info info,
1338				    int *val, int *val2)
1339{
1340	struct adxl345_state *st = iio_priv(indio_dev);
1341	unsigned int tap_threshold;
1342	int ret;
1343
1344	switch (type) {
1345	case IIO_EV_TYPE_MAG:
1346		return adxl345_read_mag_value(st, dir, info,
1347					      ADXL345_ACTIVITY,
1348					      ADXL345_INACTIVITY,
1349					      val, val2);
1350	case IIO_EV_TYPE_MAG_ADAPTIVE:
1351		return adxl345_read_mag_value(st, dir, info,
1352					      ADXL345_ACTIVITY_AC,
1353					      ADXL345_INACTIVITY_AC,
1354					      val, val2);
1355	case IIO_EV_TYPE_GESTURE:
1356		switch (info) {
1357		case IIO_EV_INFO_VALUE:
1358			/*
1359			 * The scale factor would be 62.5mg/LSB (i.e. 0xFF = 16g) but
1360			 * not applied here. In context of this general purpose sensor,
1361			 * what imports is rather signal intensity than the absolute
1362			 * measured g value.
1363			 */
1364			ret = regmap_read(st->regmap, ADXL345_REG_THRESH_TAP,
1365					  &tap_threshold);
1366			if (ret)
1367				return ret;
1368			*val = sign_extend32(tap_threshold, 7);
1369			return IIO_VAL_INT;
1370		case IIO_EV_INFO_TIMEOUT:
1371			*val = st->tap_duration_us;
1372			*val2 = MICRO;
1373			return IIO_VAL_FRACTIONAL;
1374		case IIO_EV_INFO_RESET_TIMEOUT:
1375			*val = st->tap_window_us;
1376			*val2 = MICRO;
1377			return IIO_VAL_FRACTIONAL;
1378		case IIO_EV_INFO_TAP2_MIN_DELAY:
1379			*val = st->tap_latent_us;
1380			*val2 = MICRO;
1381			return IIO_VAL_FRACTIONAL;
1382		default:
1383			return -EINVAL;
1384		}
1385	default:
1386		return -EINVAL;
1387	}
1388}
1389
1390static int adxl345_write_event_value(struct iio_dev *indio_dev,
1391				     const struct iio_chan_spec *chan,
1392				     enum iio_event_type type,
1393				     enum iio_event_direction dir,
1394				     enum iio_event_info info,
1395				     int val, int val2)
1396{
1397	struct adxl345_state *st = iio_priv(indio_dev);
1398	int ret;
1399
1400	ret = adxl345_set_measure_en(st, false);
1401	if (ret)
1402		return ret;
1403
1404	switch (type) {
1405	case IIO_EV_TYPE_MAG:
1406		ret = adxl345_write_mag_value(st, dir, info,
1407					      ADXL345_ACTIVITY,
1408					      ADXL345_INACTIVITY,
1409					      val, val2);
1410		if (ret)
1411			return ret;
1412		break;
1413	case IIO_EV_TYPE_MAG_ADAPTIVE:
1414		ret = adxl345_write_mag_value(st, dir, info,
1415					      ADXL345_ACTIVITY_AC,
1416					      ADXL345_INACTIVITY_AC,
1417					      val, val2);
1418		if (ret)
1419			return ret;
1420		break;
1421	case IIO_EV_TYPE_GESTURE:
1422		switch (info) {
1423		case IIO_EV_INFO_VALUE:
1424			ret = regmap_write(st->regmap, ADXL345_REG_THRESH_TAP,
1425					   min(val, 0xFF));
1426			if (ret)
1427				return ret;
1428			break;
1429		case IIO_EV_INFO_TIMEOUT:
1430			ret = adxl345_set_tap_duration(st, val, val2);
1431			if (ret)
1432				return ret;
1433			break;
1434		case IIO_EV_INFO_RESET_TIMEOUT:
1435			ret = adxl345_set_tap_window(st, val, val2);
1436			if (ret)
1437				return ret;
1438			break;
1439		case IIO_EV_INFO_TAP2_MIN_DELAY:
1440			ret = adxl345_set_tap_latent(st, val, val2);
1441			if (ret)
1442				return ret;
1443			break;
1444		default:
1445			return -EINVAL;
1446		}
1447		break;
1448	default:
1449		return -EINVAL;
1450	}
1451
1452	return adxl345_set_measure_en(st, true);
1453}
1454
1455static int adxl345_reg_access(struct iio_dev *indio_dev, unsigned int reg,
1456			      unsigned int writeval, unsigned int *readval)
1457{
1458	struct adxl345_state *st = iio_priv(indio_dev);
1459
1460	if (readval)
1461		return regmap_read(st->regmap, reg, readval);
1462	return regmap_write(st->regmap, reg, writeval);
1463}
1464
1465static int adxl345_set_watermark(struct iio_dev *indio_dev, unsigned int value)
1466{
1467	struct adxl345_state *st = iio_priv(indio_dev);
1468	const unsigned int fifo_mask = 0x1F, watermark_mask = 0x02;
1469	int ret;
1470
1471	value = min(value, ADXL345_FIFO_SIZE - 1);
1472
1473	ret = regmap_update_bits(st->regmap, ADXL345_REG_FIFO_CTL, fifo_mask, value);
1474	if (ret)
1475		return ret;
1476
1477	st->watermark = value;
1478	return regmap_update_bits(st->regmap, ADXL345_REG_INT_ENABLE,
1479				  watermark_mask, ADXL345_INT_WATERMARK);
1480}
1481
1482static int adxl345_write_raw_get_fmt(struct iio_dev *indio_dev,
1483				     struct iio_chan_spec const *chan,
1484				     long mask)
1485{
1486	switch (mask) {
1487	case IIO_CHAN_INFO_CALIBBIAS:
1488		return IIO_VAL_INT;
1489	case IIO_CHAN_INFO_SCALE:
1490		return IIO_VAL_INT_PLUS_MICRO;
1491	case IIO_CHAN_INFO_SAMP_FREQ:
1492		return IIO_VAL_INT_PLUS_MICRO;
1493	default:
1494		return -EINVAL;
1495	}
1496}
1497
1498static void adxl345_powerdown(void *ptr)
1499{
1500	struct adxl345_state *st = ptr;
1501
1502	adxl345_set_measure_en(st, false);
1503}
1504
1505static int adxl345_set_fifo(struct adxl345_state *st)
1506{
1507	unsigned int intio;
1508	int ret;
1509
1510	/* FIFO should only be configured while in standby mode */
1511	ret = adxl345_set_measure_en(st, false);
1512	if (ret)
1513		return ret;
1514
1515	ret = regmap_read(st->regmap, ADXL345_REG_INT_MAP, &intio);
1516	if (ret)
1517		return ret;
1518
1519	ret = regmap_write(st->regmap, ADXL345_REG_FIFO_CTL,
1520			   FIELD_PREP(ADXL345_FIFO_CTL_SAMPLES_MSK,
1521				      st->watermark) |
1522			   FIELD_PREP(ADXL345_FIFO_CTL_TRIGGER_MSK, intio) |
1523			   FIELD_PREP(ADXL345_FIFO_CTL_MODE_MSK,
1524				      st->fifo_mode));
1525	if (ret)
1526		return ret;
1527
1528	return adxl345_set_measure_en(st, true);
1529}
1530
1531/**
1532 * adxl345_get_samples() - Read number of FIFO entries.
1533 * @st: The initialized state instance of this driver.
1534 *
1535 * The sensor does not support treating any axis individually, or exclude them
1536 * from measuring.
1537 *
1538 * Return: negative error, or value.
1539 */
1540static int adxl345_get_samples(struct adxl345_state *st)
1541{
1542	unsigned int regval = 0;
1543	int ret;
1544
1545	ret = regmap_read(st->regmap, ADXL345_REG_FIFO_STATUS, &regval);
1546	if (ret)
1547		return ret;
1548
1549	return FIELD_GET(ADXL345_REG_FIFO_STATUS_MSK, regval);
1550}
1551
1552/**
1553 * adxl345_fifo_transfer() - Read samples number of elements.
1554 * @st: The instance of the state object of this sensor.
1555 * @samples: The number of lines in the FIFO referred to as fifo_entry.
1556 *
1557 * It is recommended that a multiple-byte read of all registers be performed to
1558 * prevent a change in data between reads of sequential registers. That is to
1559 * read out the data registers X0, X1, Y0, Y1, Z0, Z1, i.e. 6 bytes at once.
1560 *
1561 * Return: 0 or error value.
1562 */
1563static int adxl345_fifo_transfer(struct adxl345_state *st, int samples)
1564{
1565	int i, ret = 0;
1566
1567	for (i = 0; i < samples; i++) {
1568		ret = regmap_bulk_read(st->regmap, ADXL345_REG_XYZ_BASE,
1569				       st->fifo_buf + (i * ADXL345_DIRS),
1570				       sizeof(st->fifo_buf[0]) * ADXL345_DIRS);
1571		if (ret)
1572			return ret;
1573
1574		/*
1575		 * To ensure that the FIFO has completely popped, there must be at least 5
1576		 * us between the end of reading the data registers, signified by the
1577		 * transition to register 0x38 from 0x37 or the CS pin going high, and the
1578		 * start of new reads of the FIFO or reading the FIFO_STATUS register. For
1579		 * SPI operation at 1.5 MHz or lower, the register addressing portion of the
1580		 * transmission is sufficient delay to ensure the FIFO has completely
1581		 * popped. It is necessary for SPI operation greater than 1.5 MHz to
1582		 * de-assert the CS pin to ensure a total of 5 us, which is at most 3.4 us
1583		 * at 5 MHz operation.
1584		 */
1585		if (st->fifo_delay && samples > 1)
1586			udelay(3);
1587	}
1588	return ret;
1589}
1590
1591/**
1592 * adxl345_fifo_reset() - Empty the FIFO in error condition.
1593 * @st: The instance to the state object of the sensor.
1594 *
1595 * Read all elements of the FIFO. Reading the interrupt source register
1596 * resets the sensor.
1597 */
1598static void adxl345_fifo_reset(struct adxl345_state *st)
1599{
1600	int regval;
1601	int samples;
1602
1603	adxl345_set_measure_en(st, false);
1604
1605	samples = adxl345_get_samples(st);
1606	if (samples > 0)
1607		adxl345_fifo_transfer(st, samples);
1608
1609	regmap_read(st->regmap, ADXL345_REG_INT_SOURCE, &regval);
1610
1611	adxl345_set_measure_en(st, true);
1612}
1613
1614static int adxl345_buffer_postenable(struct iio_dev *indio_dev)
1615{
1616	struct adxl345_state *st = iio_priv(indio_dev);
1617
1618	st->fifo_mode = ADXL345_FIFO_STREAM;
1619	return adxl345_set_fifo(st);
1620}
1621
1622static int adxl345_buffer_predisable(struct iio_dev *indio_dev)
1623{
1624	struct adxl345_state *st = iio_priv(indio_dev);
1625	int ret;
1626
1627	st->fifo_mode = ADXL345_FIFO_BYPASS;
1628	ret = adxl345_set_fifo(st);
1629	if (ret)
1630		return ret;
1631
1632	return regmap_write(st->regmap, ADXL345_REG_INT_ENABLE, 0x00);
1633}
1634
1635static const struct iio_buffer_setup_ops adxl345_buffer_ops = {
1636	.postenable = adxl345_buffer_postenable,
1637	.predisable = adxl345_buffer_predisable,
1638};
1639
1640static int adxl345_fifo_push(struct iio_dev *indio_dev,
1641			     int samples)
1642{
1643	struct adxl345_state *st = iio_priv(indio_dev);
1644	int i, ret;
1645
1646	if (samples <= 0)
1647		return -EINVAL;
1648
1649	ret = adxl345_fifo_transfer(st, samples);
1650	if (ret)
1651		return ret;
1652
1653	for (i = 0; i < ADXL345_DIRS * samples; i += ADXL345_DIRS)
1654		iio_push_to_buffers(indio_dev, &st->fifo_buf[i]);
1655
1656	return 0;
1657}
1658
1659static int adxl345_push_event(struct iio_dev *indio_dev, int int_stat,
1660			      enum iio_modifier act_dir,
1661			      enum iio_modifier tap_dir)
1662{
1663	s64 ts = iio_get_time_ns(indio_dev);
1664	struct adxl345_state *st = iio_priv(indio_dev);
1665	unsigned int regval;
1666	int samples;
1667	int ret = -ENOENT;
1668
1669	if (FIELD_GET(ADXL345_INT_SINGLE_TAP, int_stat)) {
1670		ret = iio_push_event(indio_dev,
1671				     IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, tap_dir,
1672							IIO_EV_TYPE_GESTURE,
1673							IIO_EV_DIR_SINGLETAP),
1674				     ts);
1675		if (ret)
1676			return ret;
1677	}
1678
1679	if (FIELD_GET(ADXL345_INT_DOUBLE_TAP, int_stat)) {
1680		ret = iio_push_event(indio_dev,
1681				     IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, tap_dir,
1682							IIO_EV_TYPE_GESTURE,
1683							IIO_EV_DIR_DOUBLETAP),
1684				     ts);
1685		if (ret)
1686			return ret;
1687	}
1688
1689	if (FIELD_GET(ADXL345_INT_ACTIVITY, int_stat)) {
1690		ret = regmap_read(st->regmap, ADXL345_REG_ACT_INACT_CTRL, &regval);
1691		if (ret)
1692			return ret;
1693
1694		if (FIELD_GET(ADXL345_REG_ACT_ACDC, regval)) {
1695			/* AC coupled */
1696			ret = iio_push_event(indio_dev,
1697					     IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, act_dir,
1698								IIO_EV_TYPE_MAG_ADAPTIVE,
1699								IIO_EV_DIR_RISING),
1700					     ts);
1701
1702		} else {
1703			/* DC coupled, relying on THRESH */
1704			ret = iio_push_event(indio_dev,
1705					     IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, act_dir,
1706								IIO_EV_TYPE_MAG,
1707								IIO_EV_DIR_RISING),
1708					     ts);
1709		}
1710		if (ret)
1711			return ret;
1712	}
1713
1714	if (FIELD_GET(ADXL345_INT_INACTIVITY, int_stat)) {
1715		ret = regmap_read(st->regmap, ADXL345_REG_ACT_INACT_CTRL, &regval);
1716		if (ret)
1717			return ret;
1718
1719		if (FIELD_GET(ADXL345_REG_INACT_ACDC, regval)) {
1720			/* AC coupled */
1721			ret = iio_push_event(indio_dev,
1722					     IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
1723								IIO_MOD_X_AND_Y_AND_Z,
1724								IIO_EV_TYPE_MAG_ADAPTIVE,
1725								IIO_EV_DIR_FALLING),
1726					     ts);
1727		} else {
1728			/* DC coupled, relying on THRESH */
1729			ret = iio_push_event(indio_dev,
1730					     IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
1731								IIO_MOD_X_AND_Y_AND_Z,
1732								IIO_EV_TYPE_MAG,
1733								IIO_EV_DIR_FALLING),
1734					     ts);
1735		}
1736		if (ret)
1737			return ret;
1738	}
1739
1740	if (FIELD_GET(ADXL345_INT_FREE_FALL, int_stat)) {
1741		ret = iio_push_event(indio_dev,
1742				     IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
1743							IIO_MOD_X_AND_Y_AND_Z,
1744							IIO_EV_TYPE_MAG,
1745							IIO_EV_DIR_FALLING),
1746				     ts);
1747		if (ret)
1748			return ret;
1749	}
1750
1751	if (FIELD_GET(ADXL345_INT_WATERMARK, int_stat)) {
1752		samples = adxl345_get_samples(st);
1753		if (samples < 0)
1754			return -EINVAL;
1755
1756		if (adxl345_fifo_push(indio_dev, samples) < 0)
1757			return -EINVAL;
1758
1759		ret = 0;
1760	}
1761
1762	return ret;
1763}
1764
1765/**
1766 * adxl345_irq_handler() - Handle irqs of the ADXL345.
1767 * @irq: The irq being handled.
1768 * @p: The struct iio_device pointer for the device.
1769 *
1770 * Return: The interrupt was handled.
1771 */
1772static irqreturn_t adxl345_irq_handler(int irq, void *p)
1773{
1774	struct iio_dev *indio_dev = p;
1775	struct adxl345_state *st = iio_priv(indio_dev);
1776	unsigned int regval;
1777	enum iio_modifier tap_dir = IIO_NO_MOD;
1778	enum iio_modifier act_dir = IIO_NO_MOD;
1779	u32 axis_ctrl;
1780	int int_stat;
1781	int ret;
1782
1783	ret = regmap_read(st->regmap, ADXL345_REG_TAP_AXIS, &axis_ctrl);
1784	if (ret)
1785		return IRQ_NONE;
1786
1787	if (FIELD_GET(ADXL345_REG_TAP_AXIS_MSK, axis_ctrl) ||
1788	    FIELD_GET(ADXL345_ACT_XYZ_EN, axis_ctrl)) {
1789		ret = regmap_read(st->regmap, ADXL345_REG_ACT_TAP_STATUS, &regval);
1790		if (ret)
1791			return IRQ_NONE;
1792
1793		if (FIELD_GET(ADXL345_TAP_Z_EN, regval))
1794			tap_dir = IIO_MOD_Z;
1795		else if (FIELD_GET(ADXL345_TAP_Y_EN, regval))
1796			tap_dir = IIO_MOD_Y;
1797		else if (FIELD_GET(ADXL345_TAP_X_EN, regval))
1798			tap_dir = IIO_MOD_X;
1799
1800		if (FIELD_GET(ADXL345_ACT_Z_EN, regval))
1801			act_dir = IIO_MOD_Z;
1802		else if (FIELD_GET(ADXL345_ACT_Y_EN, regval))
1803			act_dir = IIO_MOD_Y;
1804		else if (FIELD_GET(ADXL345_ACT_X_EN, regval))
1805			act_dir = IIO_MOD_X;
1806	}
1807
1808	if (regmap_read(st->regmap, ADXL345_REG_INT_SOURCE, &int_stat))
1809		return IRQ_NONE;
1810
1811	if (adxl345_push_event(indio_dev, int_stat, act_dir, tap_dir))
1812		goto err;
1813
1814	if (FIELD_GET(ADXL345_INT_OVERRUN, int_stat))
1815		goto err;
1816
1817	return IRQ_HANDLED;
1818
1819err:
1820	adxl345_fifo_reset(st);
1821
1822	return IRQ_HANDLED;
1823}
1824
1825static const struct iio_info adxl345_info = {
1826	.read_raw	= adxl345_read_raw,
1827	.write_raw	= adxl345_write_raw,
1828	.read_avail	= adxl345_read_avail,
1829	.write_raw_get_fmt	= adxl345_write_raw_get_fmt,
1830	.read_event_config = adxl345_read_event_config,
1831	.write_event_config = adxl345_write_event_config,
1832	.read_event_value = adxl345_read_event_value,
1833	.write_event_value = adxl345_write_event_value,
1834	.debugfs_reg_access = &adxl345_reg_access,
1835	.hwfifo_set_watermark = adxl345_set_watermark,
1836};
1837
1838static int adxl345_get_int_line(struct device *dev, int *irq)
1839{
1840	*irq = fwnode_irq_get_byname(dev_fwnode(dev), "INT1");
1841	if (*irq > 0)
1842		return ADXL345_INT1;
1843
1844	*irq = fwnode_irq_get_byname(dev_fwnode(dev), "INT2");
1845	if (*irq > 0)
1846		return ADXL345_INT2;
1847
1848	return ADXL345_INT_NONE;
1849}
1850
1851/**
1852 * adxl345_core_probe() - Probe and setup for the accelerometer.
1853 * @dev:	Driver model representation of the device
1854 * @regmap:	Regmap instance for the device
1855 * @fifo_delay_default: Using FIFO with SPI needs delay
1856 * @setup:	Setup routine to be executed right before the standard device
1857 *		setup
1858 *
1859 * For SPI operation greater than 1.6 MHz, it is necessary to deassert the CS
1860 * pin to ensure a total delay of 5 us; otherwise, the delay is not sufficient.
1861 * The total delay necessary for 5 MHz operation is at most 3.4 us. This is not
1862 * a concern when using I2C mode because the communication rate is low enough
1863 * to ensure a sufficient delay between FIFO reads.
1864 * Ref: "Retrieving Data from FIFO", p. 21 of 36, Data Sheet ADXL345 Rev. G
1865 *
1866 * Return: 0 on success, negative errno on error
1867 */
1868int adxl345_core_probe(struct device *dev, struct regmap *regmap,
1869		       bool fifo_delay_default,
1870		       int (*setup)(struct device*, struct regmap*))
1871{
1872	struct adxl345_state *st;
1873	struct iio_dev *indio_dev;
1874	u32 regval;
1875	u8 intio = ADXL345_INT1;
1876	unsigned int data_format_mask = (ADXL345_DATA_FORMAT_RANGE |
1877					 ADXL345_DATA_FORMAT_JUSTIFY |
1878					 ADXL345_DATA_FORMAT_FULL_RES |
1879					 ADXL345_DATA_FORMAT_SELF_TEST);
1880	unsigned int tap_threshold;
1881	int irq;
1882	int ret;
1883
1884	indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
1885	if (!indio_dev)
1886		return -ENOMEM;
1887
1888	st = iio_priv(indio_dev);
1889	st->regmap = regmap;
1890	st->info = device_get_match_data(dev);
1891	if (!st->info)
1892		return -ENODEV;
1893	st->fifo_delay = fifo_delay_default;
1894
1895	/* Init with reasonable values */
1896	tap_threshold = 48;			/*   48 [0x30] -> ~3g     */
1897	st->tap_duration_us = 16;		/*   16 [0x10] -> .010    */
1898	st->tap_window_us = 64;			/*   64 [0x40] -> .080    */
1899	st->tap_latent_us = 16;			/*   16 [0x10] -> .020    */
1900
1901	indio_dev->name = st->info->name;
1902	indio_dev->info = &adxl345_info;
1903	indio_dev->modes = INDIO_DIRECT_MODE;
1904	indio_dev->channels = adxl345_channels;
1905	indio_dev->num_channels = ARRAY_SIZE(adxl345_channels);
1906	indio_dev->available_scan_masks = adxl345_scan_masks;
1907
1908	/*
1909	 * Using I2C at 100kHz would limit the maximum ODR to 200Hz, operation
1910	 * at an output rate above the recommended maximum may result in
1911	 * undesired behavior.
1912	 */
1913	ret = adxl345_set_odr(st, ADXL345_ODR_200HZ);
1914	if (ret)
1915		return ret;
1916
1917	ret = adxl345_set_range(st, ADXL345_16G_RANGE);
1918	if (ret)
1919		return ret;
1920
1921	/* Reset interrupts at start up */
1922	ret = regmap_write(st->regmap, ADXL345_REG_INT_ENABLE, 0x00);
1923	if (ret)
1924		return ret;
1925
1926	if (setup) {
1927		/* Perform optional initial bus specific configuration */
1928		ret = setup(dev, st->regmap);
1929		if (ret)
1930			return ret;
1931
1932		/* Enable full-resolution mode */
1933		ret = regmap_update_bits(st->regmap, ADXL345_REG_DATA_FORMAT,
1934					 data_format_mask,
1935					 ADXL345_DATA_FORMAT_FULL_RES);
1936		if (ret)
1937			return dev_err_probe(dev, ret,
1938					     "Failed to set data range\n");
1939
1940	} else {
1941		/* Enable full-resolution mode (init all data_format bits) */
1942		ret = regmap_write(st->regmap, ADXL345_REG_DATA_FORMAT,
1943				   ADXL345_DATA_FORMAT_FULL_RES);
1944		if (ret)
1945			return dev_err_probe(dev, ret,
1946					     "Failed to set data range\n");
1947	}
1948
1949	ret = regmap_read(st->regmap, ADXL345_REG_DEVID, &regval);
1950	if (ret)
1951		return dev_err_probe(dev, ret, "Error reading device ID\n");
1952
1953	if (regval != ADXL345_DEVID)
1954		return dev_err_probe(dev, -ENODEV, "Invalid device ID: %x, expected %x\n",
1955				     regval, ADXL345_DEVID);
1956
1957	/* Enable measurement mode */
1958	ret = adxl345_set_measure_en(st, true);
1959	if (ret)
1960		return dev_err_probe(dev, ret, "Failed to enable measurement mode\n");
1961
1962	ret = devm_add_action_or_reset(dev, adxl345_powerdown, st);
1963	if (ret)
1964		return ret;
1965
1966	intio = adxl345_get_int_line(dev, &irq);
1967	if (intio != ADXL345_INT_NONE) {
1968		/*
1969		 * In the INT map register, bits set to 0 route their
1970		 * corresponding interrupts to the INT1 pin, while bits set to 1
1971		 * route them to the INT2 pin. The intio should handle this
1972		 * mapping accordingly.
1973		 */
1974		ret = regmap_assign_bits(st->regmap, ADXL345_REG_INT_MAP,
1975					 U8_MAX, intio);
1976		if (ret)
1977			return ret;
1978
1979		/*
1980		 * Initialized with sensible default values to streamline
1981		 * sensor operation. These defaults are partly derived from
1982		 * the previous input driver for the ADXL345 and partly
1983		 * based on the recommendations provided in the datasheet.
1984		 */
1985		ret = regmap_write(st->regmap, ADXL345_REG_ACT_INACT_CTRL, 0);
1986		if (ret)
1987			return ret;
1988
1989		ret = regmap_write(st->regmap, ADXL345_REG_THRESH_ACT, 6);
1990		if (ret)
1991			return ret;
1992
1993		ret = adxl345_set_inact_threshold(st, 4);
1994		if (ret)
1995			return ret;
1996
1997		ret = regmap_write(st->regmap, ADXL345_REG_THRESH_TAP, tap_threshold);
1998		if (ret)
1999			return ret;
2000
2001		/* FIFO_STREAM mode is going to be activated later */
2002		ret = devm_iio_kfifo_buffer_setup(dev, indio_dev, &adxl345_buffer_ops);
2003		if (ret)
2004			return ret;
2005
2006		ret = devm_request_threaded_irq(dev, irq, NULL,
2007						&adxl345_irq_handler,
2008						IRQF_SHARED | IRQF_ONESHOT,
2009						indio_dev->name, indio_dev);
2010		if (ret)
2011			return ret;
2012	} else {
2013		ret = regmap_write(st->regmap, ADXL345_REG_FIFO_CTL,
2014				   FIELD_PREP(ADXL345_FIFO_CTL_MODE_MSK,
2015					      ADXL345_FIFO_BYPASS));
2016		if (ret)
2017			return ret;
2018	}
2019
2020	return devm_iio_device_register(dev, indio_dev);
2021}
2022EXPORT_SYMBOL_NS_GPL(adxl345_core_probe, "IIO_ADXL345");
2023
2024MODULE_AUTHOR("Eva Rachel Retuya <eraretuya@gmail.com>");
2025MODULE_DESCRIPTION("ADXL345 3-Axis Digital Accelerometer core driver");
2026MODULE_LICENSE("GPL v2");