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master.c
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linux-6.19.14/drivers/i3c/master.c
1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (C) 2018 Cadence Design Systems Inc. 4 * 5 * Author: Boris Brezillon <boris.brezillon@bootlin.com> 6 */ 7 8#include <linux/atomic.h> 9#include <linux/bug.h> 10#include <linux/device.h> 11#include <linux/dma-mapping.h> 12#include <linux/err.h> 13#include <linux/export.h> 14#include <linux/kernel.h> 15#include <linux/list.h> 16#include <linux/of.h> 17#include <linux/pm_runtime.h> 18#include <linux/slab.h> 19#include <linux/spinlock.h> 20#include <linux/workqueue.h> 21 22#include "internals.h" 23 24static DEFINE_IDR(i3c_bus_idr); 25static DEFINE_MUTEX(i3c_core_lock); 26static int __i3c_first_dynamic_bus_num; 27static BLOCKING_NOTIFIER_HEAD(i3c_bus_notifier); 28 29/** 30 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation 31 * @bus: I3C bus to take the lock on 32 * 33 * This function takes the bus lock so that no other operations can occur on 34 * the bus. This is needed for all kind of bus maintenance operation, like 35 * - enabling/disabling slave events 36 * - re-triggering DAA 37 * - changing the dynamic address of a device 38 * - relinquishing mastership 39 * - ... 40 * 41 * The reason for this kind of locking is that we don't want drivers and core 42 * logic to rely on I3C device information that could be changed behind their 43 * back. 44 */ 45static void i3c_bus_maintenance_lock(struct i3c_bus *bus) 46{ 47 down_write(&bus->lock); 48} 49 50/** 51 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance 52 * operation 53 * @bus: I3C bus to release the lock on 54 * 55 * Should be called when the bus maintenance operation is done. See 56 * i3c_bus_maintenance_lock() for more details on what these maintenance 57 * operations are. 58 */ 59static void i3c_bus_maintenance_unlock(struct i3c_bus *bus) 60{ 61 up_write(&bus->lock); 62} 63 64/** 65 * i3c_bus_normaluse_lock - Lock the bus for a normal operation 66 * @bus: I3C bus to take the lock on 67 * 68 * This function takes the bus lock for any operation that is not a maintenance 69 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of 70 * maintenance operations). Basically all communications with I3C devices are 71 * normal operations (HDR, SDR transfers or CCC commands that do not change bus 72 * state or I3C dynamic address). 73 * 74 * Note that this lock is not guaranteeing serialization of normal operations. 75 * In other words, transfer requests passed to the I3C master can be submitted 76 * in parallel and I3C master drivers have to use their own locking to make 77 * sure two different communications are not inter-mixed, or access to the 78 * output/input queue is not done while the engine is busy. 79 */ 80void i3c_bus_normaluse_lock(struct i3c_bus *bus) 81{ 82 down_read(&bus->lock); 83} 84 85/** 86 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation 87 * @bus: I3C bus to release the lock on 88 * 89 * Should be called when a normal operation is done. See 90 * i3c_bus_normaluse_lock() for more details on what these normal operations 91 * are. 92 */ 93void i3c_bus_normaluse_unlock(struct i3c_bus *bus) 94{ 95 up_read(&bus->lock); 96} 97 98static struct i3c_master_controller * 99i3c_bus_to_i3c_master(struct i3c_bus *i3cbus) 100{ 101 return container_of(i3cbus, struct i3c_master_controller, bus); 102} 103 104static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev) 105{ 106 return container_of(dev, struct i3c_master_controller, dev); 107} 108 109static const struct device_type i3c_device_type; 110 111static struct i3c_bus *dev_to_i3cbus(struct device *dev) 112{ 113 struct i3c_master_controller *master; 114 115 if (dev->type == &i3c_device_type) 116 return dev_to_i3cdev(dev)->bus; 117 118 master = dev_to_i3cmaster(dev); 119 120 return &master->bus; 121} 122 123static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev) 124{ 125 struct i3c_master_controller *master; 126 127 if (dev->type == &i3c_device_type) 128 return dev_to_i3cdev(dev)->desc; 129 130 master = dev_to_i3cmaster(dev); 131 132 return master->this; 133} 134 135static ssize_t bcr_show(struct device *dev, 136 struct device_attribute *da, 137 char *buf) 138{ 139 struct i3c_bus *bus = dev_to_i3cbus(dev); 140 struct i3c_dev_desc *desc; 141 ssize_t ret; 142 143 i3c_bus_normaluse_lock(bus); 144 desc = dev_to_i3cdesc(dev); 145 ret = sprintf(buf, "0x%02x\n", desc->info.bcr); 146 i3c_bus_normaluse_unlock(bus); 147 148 return ret; 149} 150static DEVICE_ATTR_RO(bcr); 151 152static ssize_t dcr_show(struct device *dev, 153 struct device_attribute *da, 154 char *buf) 155{ 156 struct i3c_bus *bus = dev_to_i3cbus(dev); 157 struct i3c_dev_desc *desc; 158 ssize_t ret; 159 160 i3c_bus_normaluse_lock(bus); 161 desc = dev_to_i3cdesc(dev); 162 ret = sprintf(buf, "0x%02x\n", desc->info.dcr); 163 i3c_bus_normaluse_unlock(bus); 164 165 return ret; 166} 167static DEVICE_ATTR_RO(dcr); 168 169static ssize_t pid_show(struct device *dev, 170 struct device_attribute *da, 171 char *buf) 172{ 173 struct i3c_bus *bus = dev_to_i3cbus(dev); 174 struct i3c_dev_desc *desc; 175 ssize_t ret; 176 177 i3c_bus_normaluse_lock(bus); 178 desc = dev_to_i3cdesc(dev); 179 ret = sprintf(buf, "%llx\n", desc->info.pid); 180 i3c_bus_normaluse_unlock(bus); 181 182 return ret; 183} 184static DEVICE_ATTR_RO(pid); 185 186static ssize_t dynamic_address_show(struct device *dev, 187 struct device_attribute *da, 188 char *buf) 189{ 190 struct i3c_bus *bus = dev_to_i3cbus(dev); 191 struct i3c_dev_desc *desc; 192 ssize_t ret; 193 194 i3c_bus_normaluse_lock(bus); 195 desc = dev_to_i3cdesc(dev); 196 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr); 197 i3c_bus_normaluse_unlock(bus); 198 199 return ret; 200} 201static DEVICE_ATTR_RO(dynamic_address); 202 203static const char * const hdrcap_strings[] = { 204 "hdr-ddr", "hdr-tsp", "hdr-tsl", 205}; 206 207static ssize_t hdrcap_show(struct device *dev, 208 struct device_attribute *da, 209 char *buf) 210{ 211 struct i3c_bus *bus = dev_to_i3cbus(dev); 212 struct i3c_dev_desc *desc; 213 ssize_t offset = 0, ret; 214 unsigned long caps; 215 int mode; 216 217 i3c_bus_normaluse_lock(bus); 218 desc = dev_to_i3cdesc(dev); 219 caps = desc->info.hdr_cap; 220 for_each_set_bit(mode, &caps, 8) { 221 if (mode >= ARRAY_SIZE(hdrcap_strings)) 222 break; 223 224 if (!hdrcap_strings[mode]) 225 continue; 226 227 ret = sprintf(buf + offset, offset ? " %s" : "%s", 228 hdrcap_strings[mode]); 229 if (ret < 0) 230 goto out; 231 232 offset += ret; 233 } 234 235 ret = sprintf(buf + offset, "\n"); 236 if (ret < 0) 237 goto out; 238 239 ret = offset + ret; 240 241out: 242 i3c_bus_normaluse_unlock(bus); 243 244 return ret; 245} 246static DEVICE_ATTR_RO(hdrcap); 247 248static ssize_t modalias_show(struct device *dev, 249 struct device_attribute *da, char *buf) 250{ 251 struct i3c_device *i3c = dev_to_i3cdev(dev); 252 struct i3c_device_info devinfo; 253 u16 manuf, part, ext; 254 255 i3c_device_get_info(i3c, &devinfo); 256 manuf = I3C_PID_MANUF_ID(devinfo.pid); 257 part = I3C_PID_PART_ID(devinfo.pid); 258 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 259 260 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 261 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr, 262 manuf); 263 264 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 265 devinfo.dcr, manuf, part, ext); 266} 267static DEVICE_ATTR_RO(modalias); 268 269static struct attribute *i3c_device_attrs[] = { 270 &dev_attr_bcr.attr, 271 &dev_attr_dcr.attr, 272 &dev_attr_pid.attr, 273 &dev_attr_dynamic_address.attr, 274 &dev_attr_hdrcap.attr, 275 &dev_attr_modalias.attr, 276 NULL, 277}; 278ATTRIBUTE_GROUPS(i3c_device); 279 280static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env) 281{ 282 const struct i3c_device *i3cdev = dev_to_i3cdev(dev); 283 struct i3c_device_info devinfo; 284 u16 manuf, part, ext; 285 286 if (i3cdev->desc) 287 devinfo = i3cdev->desc->info; 288 manuf = I3C_PID_MANUF_ID(devinfo.pid); 289 part = I3C_PID_PART_ID(devinfo.pid); 290 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 291 292 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 293 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X", 294 devinfo.dcr, manuf); 295 296 return add_uevent_var(env, 297 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 298 devinfo.dcr, manuf, part, ext); 299} 300 301static const struct device_type i3c_device_type = { 302 .groups = i3c_device_groups, 303 .uevent = i3c_device_uevent, 304}; 305 306static int i3c_device_match(struct device *dev, const struct device_driver *drv) 307{ 308 struct i3c_device *i3cdev; 309 const struct i3c_driver *i3cdrv; 310 311 if (dev->type != &i3c_device_type) 312 return 0; 313 314 i3cdev = dev_to_i3cdev(dev); 315 i3cdrv = drv_to_i3cdrv(drv); 316 if (i3c_device_match_id(i3cdev, i3cdrv->id_table)) 317 return 1; 318 319 return 0; 320} 321 322static int i3c_device_probe(struct device *dev) 323{ 324 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 325 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 326 327 return driver->probe(i3cdev); 328} 329 330static void i3c_device_remove(struct device *dev) 331{ 332 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 333 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 334 335 if (driver->remove) 336 driver->remove(i3cdev); 337} 338 339const struct bus_type i3c_bus_type = { 340 .name = "i3c", 341 .match = i3c_device_match, 342 .probe = i3c_device_probe, 343 .remove = i3c_device_remove, 344}; 345EXPORT_SYMBOL_GPL(i3c_bus_type); 346 347static enum i3c_addr_slot_status 348i3c_bus_get_addr_slot_status_mask(struct i3c_bus *bus, u16 addr, u32 mask) 349{ 350 unsigned long status; 351 int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS; 352 353 if (addr > I2C_MAX_ADDR) 354 return I3C_ADDR_SLOT_RSVD; 355 356 status = bus->addrslots[bitpos / BITS_PER_LONG]; 357 status >>= bitpos % BITS_PER_LONG; 358 359 return status & mask; 360} 361 362static enum i3c_addr_slot_status 363i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr) 364{ 365 return i3c_bus_get_addr_slot_status_mask(bus, addr, I3C_ADDR_SLOT_STATUS_MASK); 366} 367 368static void i3c_bus_set_addr_slot_status_mask(struct i3c_bus *bus, u16 addr, 369 enum i3c_addr_slot_status status, u32 mask) 370{ 371 int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS; 372 unsigned long *ptr; 373 374 if (addr > I2C_MAX_ADDR) 375 return; 376 377 ptr = bus->addrslots + (bitpos / BITS_PER_LONG); 378 *ptr &= ~((unsigned long)mask << (bitpos % BITS_PER_LONG)); 379 *ptr |= ((unsigned long)status & mask) << (bitpos % BITS_PER_LONG); 380} 381 382static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr, 383 enum i3c_addr_slot_status status) 384{ 385 i3c_bus_set_addr_slot_status_mask(bus, addr, status, I3C_ADDR_SLOT_STATUS_MASK); 386} 387 388static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr) 389{ 390 enum i3c_addr_slot_status status; 391 392 status = i3c_bus_get_addr_slot_status(bus, addr); 393 394 return status == I3C_ADDR_SLOT_FREE; 395} 396 397/* 398 * ┌────┬─────────────┬───┬─────────┬───┐ 399 * │S/Sr│ 7'h7E RnW=0 │ACK│ ENTDAA │ T ├────┐ 400 * └────┴─────────────┴───┴─────────┴───┘ │ 401 * ┌─────────────────────────────────────────┘ 402 * │ ┌──┬─────────────┬───┬─────────────────┬────────────────┬───┬─────────┐ 403 * └─►│Sr│7'h7E RnW=1 │ACK│48bit UID BCR DCR│Assign 7bit Addr│PAR│ ACK/NACK│ 404 * └──┴─────────────┴───┴─────────────────┴────────────────┴───┴─────────┘ 405 * Some master controllers (such as HCI) need to prepare the entire above transaction before 406 * sending it out to the I3C bus. This means that a 7-bit dynamic address needs to be allocated 407 * before knowing the target device's UID information. 408 * 409 * However, some I3C targets may request specific addresses (called as "init_dyn_addr"), which is 410 * typically specified by the DT-'s assigned-address property. Lower addresses having higher IBI 411 * priority. If it is available, i3c_bus_get_free_addr() preferably return a free address that is 412 * not in the list of desired addresses (called as "init_dyn_addr"). This allows the device with 413 * the "init_dyn_addr" to switch to its "init_dyn_addr" when it hot-joins the I3C bus. Otherwise, 414 * if the "init_dyn_addr" is already in use by another I3C device, the target device will not be 415 * able to switch to its desired address. 416 * 417 * If the previous step fails, fallback returning one of the remaining unassigned address, 418 * regardless of its state in the desired list. 419 */ 420static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr) 421{ 422 enum i3c_addr_slot_status status; 423 u8 addr; 424 425 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) { 426 status = i3c_bus_get_addr_slot_status_mask(bus, addr, 427 I3C_ADDR_SLOT_EXT_STATUS_MASK); 428 if (status == I3C_ADDR_SLOT_FREE) 429 return addr; 430 } 431 432 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) { 433 status = i3c_bus_get_addr_slot_status_mask(bus, addr, 434 I3C_ADDR_SLOT_STATUS_MASK); 435 if (status == I3C_ADDR_SLOT_FREE) 436 return addr; 437 } 438 439 return -ENOMEM; 440} 441 442static void i3c_bus_init_addrslots(struct i3c_bus *bus) 443{ 444 int i; 445 446 /* Addresses 0 to 7 are reserved. */ 447 for (i = 0; i < 8; i++) 448 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD); 449 450 /* 451 * Reserve broadcast address and all addresses that might collide 452 * with the broadcast address when facing a single bit error. 453 */ 454 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR, 455 I3C_ADDR_SLOT_RSVD); 456 for (i = 0; i < 7; i++) 457 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i), 458 I3C_ADDR_SLOT_RSVD); 459} 460 461static void i3c_bus_cleanup(struct i3c_bus *i3cbus) 462{ 463 mutex_lock(&i3c_core_lock); 464 idr_remove(&i3c_bus_idr, i3cbus->id); 465 mutex_unlock(&i3c_core_lock); 466} 467 468static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np) 469{ 470 int ret, start, end, id = -1; 471 472 init_rwsem(&i3cbus->lock); 473 INIT_LIST_HEAD(&i3cbus->devs.i2c); 474 INIT_LIST_HEAD(&i3cbus->devs.i3c); 475 i3c_bus_init_addrslots(i3cbus); 476 i3cbus->mode = I3C_BUS_MODE_PURE; 477 478 if (np) 479 id = of_alias_get_id(np, "i3c"); 480 481 mutex_lock(&i3c_core_lock); 482 if (id >= 0) { 483 start = id; 484 end = start + 1; 485 } else { 486 start = __i3c_first_dynamic_bus_num; 487 end = 0; 488 } 489 490 ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL); 491 mutex_unlock(&i3c_core_lock); 492 493 if (ret < 0) 494 return ret; 495 496 i3cbus->id = ret; 497 498 return 0; 499} 500 501void i3c_for_each_bus_locked(int (*fn)(struct i3c_bus *bus, void *data), 502 void *data) 503{ 504 struct i3c_bus *bus; 505 int id; 506 507 mutex_lock(&i3c_core_lock); 508 idr_for_each_entry(&i3c_bus_idr, bus, id) 509 fn(bus, data); 510 mutex_unlock(&i3c_core_lock); 511} 512EXPORT_SYMBOL_GPL(i3c_for_each_bus_locked); 513 514int i3c_register_notifier(struct notifier_block *nb) 515{ 516 return blocking_notifier_chain_register(&i3c_bus_notifier, nb); 517} 518EXPORT_SYMBOL_GPL(i3c_register_notifier); 519 520int i3c_unregister_notifier(struct notifier_block *nb) 521{ 522 return blocking_notifier_chain_unregister(&i3c_bus_notifier, nb); 523} 524EXPORT_SYMBOL_GPL(i3c_unregister_notifier); 525 526static void i3c_bus_notify(struct i3c_bus *bus, unsigned int action) 527{ 528 blocking_notifier_call_chain(&i3c_bus_notifier, action, bus); 529} 530 531static const char * const i3c_bus_mode_strings[] = { 532 [I3C_BUS_MODE_PURE] = "pure", 533 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast", 534 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited", 535 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow", 536}; 537 538static ssize_t mode_show(struct device *dev, 539 struct device_attribute *da, 540 char *buf) 541{ 542 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 543 ssize_t ret; 544 545 i3c_bus_normaluse_lock(i3cbus); 546 if (i3cbus->mode < 0 || 547 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) || 548 !i3c_bus_mode_strings[i3cbus->mode]) 549 ret = sprintf(buf, "unknown\n"); 550 else 551 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]); 552 i3c_bus_normaluse_unlock(i3cbus); 553 554 return ret; 555} 556static DEVICE_ATTR_RO(mode); 557 558static ssize_t current_master_show(struct device *dev, 559 struct device_attribute *da, 560 char *buf) 561{ 562 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 563 ssize_t ret; 564 565 i3c_bus_normaluse_lock(i3cbus); 566 ret = sprintf(buf, "%d-%llx\n", i3cbus->id, 567 i3cbus->cur_master->info.pid); 568 i3c_bus_normaluse_unlock(i3cbus); 569 570 return ret; 571} 572static DEVICE_ATTR_RO(current_master); 573 574static ssize_t i3c_scl_frequency_show(struct device *dev, 575 struct device_attribute *da, 576 char *buf) 577{ 578 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 579 ssize_t ret; 580 581 i3c_bus_normaluse_lock(i3cbus); 582 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c); 583 i3c_bus_normaluse_unlock(i3cbus); 584 585 return ret; 586} 587static DEVICE_ATTR_RO(i3c_scl_frequency); 588 589static ssize_t i2c_scl_frequency_show(struct device *dev, 590 struct device_attribute *da, 591 char *buf) 592{ 593 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 594 ssize_t ret; 595 596 i3c_bus_normaluse_lock(i3cbus); 597 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c); 598 i3c_bus_normaluse_unlock(i3cbus); 599 600 return ret; 601} 602static DEVICE_ATTR_RO(i2c_scl_frequency); 603 604static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable) 605{ 606 int ret; 607 608 if (!master || !master->ops) 609 return -EINVAL; 610 611 if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin) 612 return -EINVAL; 613 614 i3c_bus_normaluse_lock(&master->bus); 615 616 if (enable) 617 ret = master->ops->enable_hotjoin(master); 618 else 619 ret = master->ops->disable_hotjoin(master); 620 621 if (!ret) 622 master->hotjoin = enable; 623 624 i3c_bus_normaluse_unlock(&master->bus); 625 626 return ret; 627} 628 629static ssize_t hotjoin_store(struct device *dev, struct device_attribute *attr, 630 const char *buf, size_t count) 631{ 632 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 633 int ret; 634 bool res; 635 636 if (!i3cbus->cur_master) 637 return -EINVAL; 638 639 if (kstrtobool(buf, &res)) 640 return -EINVAL; 641 642 ret = i3c_set_hotjoin(i3cbus->cur_master->common.master, res); 643 if (ret) 644 return ret; 645 646 return count; 647} 648 649/* 650 * i3c_master_enable_hotjoin - Enable hotjoin 651 * @master: I3C master object 652 * 653 * Return: a 0 in case of success, an negative error code otherwise. 654 */ 655int i3c_master_enable_hotjoin(struct i3c_master_controller *master) 656{ 657 return i3c_set_hotjoin(master, true); 658} 659EXPORT_SYMBOL_GPL(i3c_master_enable_hotjoin); 660 661/* 662 * i3c_master_disable_hotjoin - Disable hotjoin 663 * @master: I3C master object 664 * 665 * Return: a 0 in case of success, an negative error code otherwise. 666 */ 667int i3c_master_disable_hotjoin(struct i3c_master_controller *master) 668{ 669 return i3c_set_hotjoin(master, false); 670} 671EXPORT_SYMBOL_GPL(i3c_master_disable_hotjoin); 672 673static ssize_t hotjoin_show(struct device *dev, struct device_attribute *da, char *buf) 674{ 675 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 676 ssize_t ret; 677 678 i3c_bus_normaluse_lock(i3cbus); 679 ret = sysfs_emit(buf, "%d\n", i3cbus->cur_master->common.master->hotjoin); 680 i3c_bus_normaluse_unlock(i3cbus); 681 682 return ret; 683} 684 685static DEVICE_ATTR_RW(hotjoin); 686 687static struct attribute *i3c_masterdev_attrs[] = { 688 &dev_attr_mode.attr, 689 &dev_attr_current_master.attr, 690 &dev_attr_i3c_scl_frequency.attr, 691 &dev_attr_i2c_scl_frequency.attr, 692 &dev_attr_bcr.attr, 693 &dev_attr_dcr.attr, 694 &dev_attr_pid.attr, 695 &dev_attr_dynamic_address.attr, 696 &dev_attr_hdrcap.attr, 697 &dev_attr_hotjoin.attr, 698 NULL, 699}; 700ATTRIBUTE_GROUPS(i3c_masterdev); 701 702static void i3c_masterdev_release(struct device *dev) 703{ 704 struct i3c_master_controller *master = dev_to_i3cmaster(dev); 705 struct i3c_bus *bus = dev_to_i3cbus(dev); 706 707 if (master->wq) 708 destroy_workqueue(master->wq); 709 710 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c)); 711 i3c_bus_cleanup(bus); 712 713 of_node_put(dev->of_node); 714} 715 716static const struct device_type i3c_masterdev_type = { 717 .groups = i3c_masterdev_groups, 718}; 719 720static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode, 721 unsigned long max_i2c_scl_rate) 722{ 723 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus); 724 725 i3cbus->mode = mode; 726 727 switch (i3cbus->mode) { 728 case I3C_BUS_MODE_PURE: 729 if (!i3cbus->scl_rate.i3c) 730 i3cbus->scl_rate.i3c = I3C_BUS_I3C_SCL_TYP_RATE; 731 break; 732 case I3C_BUS_MODE_MIXED_FAST: 733 case I3C_BUS_MODE_MIXED_LIMITED: 734 if (!i3cbus->scl_rate.i3c) 735 i3cbus->scl_rate.i3c = I3C_BUS_I3C_SCL_TYP_RATE; 736 if (!i3cbus->scl_rate.i2c) 737 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 738 break; 739 case I3C_BUS_MODE_MIXED_SLOW: 740 if (!i3cbus->scl_rate.i2c) 741 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 742 if (!i3cbus->scl_rate.i3c || 743 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c) 744 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c; 745 break; 746 default: 747 return -EINVAL; 748 } 749 750 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n", 751 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c); 752 753 /* 754 * I3C/I2C frequency may have been overridden, check that user-provided 755 * values are not exceeding max possible frequency. 756 */ 757 if (i3cbus->scl_rate.i3c > I3C_BUS_I3C_SCL_MAX_RATE || 758 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_MAX_RATE) 759 return -EINVAL; 760 761 return 0; 762} 763 764static struct i3c_master_controller * 765i2c_adapter_to_i3c_master(struct i2c_adapter *adap) 766{ 767 return container_of(adap, struct i3c_master_controller, i2c); 768} 769 770static struct i2c_adapter * 771i3c_master_to_i2c_adapter(struct i3c_master_controller *master) 772{ 773 return &master->i2c; 774} 775 776static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev) 777{ 778 kfree(dev); 779} 780 781static struct i2c_dev_desc * 782i3c_master_alloc_i2c_dev(struct i3c_master_controller *master, 783 u16 addr, u8 lvr) 784{ 785 struct i2c_dev_desc *dev; 786 787 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 788 if (!dev) 789 return ERR_PTR(-ENOMEM); 790 791 dev->common.master = master; 792 dev->addr = addr; 793 dev->lvr = lvr; 794 795 return dev; 796} 797 798static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr, 799 u16 payloadlen) 800{ 801 dest->addr = addr; 802 dest->payload.len = payloadlen; 803 if (payloadlen) 804 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL); 805 else 806 dest->payload.data = NULL; 807 808 return dest->payload.data; 809} 810 811static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest) 812{ 813 kfree(dest->payload.data); 814} 815 816static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id, 817 struct i3c_ccc_cmd_dest *dests, 818 unsigned int ndests) 819{ 820 cmd->rnw = rnw ? 1 : 0; 821 cmd->id = id; 822 cmd->dests = dests; 823 cmd->ndests = ndests; 824 cmd->err = I3C_ERROR_UNKNOWN; 825} 826 827static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master, 828 struct i3c_ccc_cmd *cmd) 829{ 830 int ret; 831 832 if (!cmd || !master) 833 return -EINVAL; 834 835 if (WARN_ON(master->init_done && 836 !rwsem_is_locked(&master->bus.lock))) 837 return -EINVAL; 838 839 if (!master->ops->send_ccc_cmd) 840 return -EOPNOTSUPP; 841 842 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests)) 843 return -EINVAL; 844 845 if (master->ops->supports_ccc_cmd && 846 !master->ops->supports_ccc_cmd(master, cmd)) 847 return -EOPNOTSUPP; 848 849 ret = master->ops->send_ccc_cmd(master, cmd); 850 if (ret) { 851 if (cmd->err != I3C_ERROR_UNKNOWN) 852 return cmd->err; 853 854 return ret; 855 } 856 857 return 0; 858} 859 860static struct i2c_dev_desc * 861i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master, 862 u16 addr) 863{ 864 struct i2c_dev_desc *dev; 865 866 i3c_bus_for_each_i2cdev(&master->bus, dev) { 867 if (dev->addr == addr) 868 return dev; 869 } 870 871 return NULL; 872} 873 874/** 875 * i3c_master_get_free_addr() - get a free address on the bus 876 * @master: I3C master object 877 * @start_addr: where to start searching 878 * 879 * This function must be called with the bus lock held in write mode. 880 * 881 * Return: the first free address starting at @start_addr (included) or -ENOMEM 882 * if there's no more address available. 883 */ 884int i3c_master_get_free_addr(struct i3c_master_controller *master, 885 u8 start_addr) 886{ 887 return i3c_bus_get_free_addr(&master->bus, start_addr); 888} 889EXPORT_SYMBOL_GPL(i3c_master_get_free_addr); 890 891static void i3c_device_release(struct device *dev) 892{ 893 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 894 895 WARN_ON(i3cdev->desc); 896 897 of_node_put(i3cdev->dev.of_node); 898 kfree(i3cdev); 899} 900 901static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev) 902{ 903 kfree(dev); 904} 905 906static struct i3c_dev_desc * 907i3c_master_alloc_i3c_dev(struct i3c_master_controller *master, 908 const struct i3c_device_info *info) 909{ 910 struct i3c_dev_desc *dev; 911 912 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 913 if (!dev) 914 return ERR_PTR(-ENOMEM); 915 916 dev->common.master = master; 917 dev->info = *info; 918 mutex_init(&dev->ibi_lock); 919 920 return dev; 921} 922 923static int i3c_master_rstdaa_locked(struct i3c_master_controller *master, 924 u8 addr) 925{ 926 enum i3c_addr_slot_status addrstat; 927 struct i3c_ccc_cmd_dest dest; 928 struct i3c_ccc_cmd cmd; 929 int ret; 930 931 if (!master) 932 return -EINVAL; 933 934 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr); 935 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV) 936 return -EINVAL; 937 938 i3c_ccc_cmd_dest_init(&dest, addr, 0); 939 i3c_ccc_cmd_init(&cmd, false, 940 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR), 941 &dest, 1); 942 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 943 i3c_ccc_cmd_dest_cleanup(&dest); 944 945 return ret; 946} 947 948/** 949 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment) 950 * procedure 951 * @master: master used to send frames on the bus 952 * 953 * Send a ENTDAA CCC command to start a DAA procedure. 954 * 955 * Note that this function only sends the ENTDAA CCC command, all the logic 956 * behind dynamic address assignment has to be handled in the I3C master 957 * driver. 958 * 959 * This function must be called with the bus lock held in write mode. 960 * 961 * Return: 0 in case of success, a positive I3C error code if the error is 962 * one of the official Mx error codes, and a negative error code otherwise. 963 */ 964int i3c_master_entdaa_locked(struct i3c_master_controller *master) 965{ 966 struct i3c_ccc_cmd_dest dest; 967 struct i3c_ccc_cmd cmd; 968 int ret; 969 970 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0); 971 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1); 972 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 973 i3c_ccc_cmd_dest_cleanup(&dest); 974 975 return ret; 976} 977EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked); 978 979static int i3c_master_enec_disec_locked(struct i3c_master_controller *master, 980 u8 addr, bool enable, u8 evts) 981{ 982 struct i3c_ccc_events *events; 983 struct i3c_ccc_cmd_dest dest; 984 struct i3c_ccc_cmd cmd; 985 int ret; 986 987 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events)); 988 if (!events) 989 return -ENOMEM; 990 991 events->events = evts; 992 i3c_ccc_cmd_init(&cmd, false, 993 enable ? 994 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) : 995 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR), 996 &dest, 1); 997 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 998 i3c_ccc_cmd_dest_cleanup(&dest); 999 1000 return ret; 1001} 1002 1003/** 1004 * i3c_master_disec_locked() - send a DISEC CCC command 1005 * @master: master used to send frames on the bus 1006 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 1007 * @evts: events to disable 1008 * 1009 * Send a DISEC CCC command to disable some or all events coming from a 1010 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 1011 * 1012 * This function must be called with the bus lock held in write mode. 1013 * 1014 * Return: 0 in case of success, a positive I3C error code if the error is 1015 * one of the official Mx error codes, and a negative error code otherwise. 1016 */ 1017int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr, 1018 u8 evts) 1019{ 1020 return i3c_master_enec_disec_locked(master, addr, false, evts); 1021} 1022EXPORT_SYMBOL_GPL(i3c_master_disec_locked); 1023 1024/** 1025 * i3c_master_enec_locked() - send an ENEC CCC command 1026 * @master: master used to send frames on the bus 1027 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 1028 * @evts: events to disable 1029 * 1030 * Sends an ENEC CCC command to enable some or all events coming from a 1031 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 1032 * 1033 * This function must be called with the bus lock held in write mode. 1034 * 1035 * Return: 0 in case of success, a positive I3C error code if the error is 1036 * one of the official Mx error codes, and a negative error code otherwise. 1037 */ 1038int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr, 1039 u8 evts) 1040{ 1041 return i3c_master_enec_disec_locked(master, addr, true, evts); 1042} 1043EXPORT_SYMBOL_GPL(i3c_master_enec_locked); 1044 1045/** 1046 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command 1047 * @master: master used to send frames on the bus 1048 * 1049 * Send a DEFSLVS CCC command containing all the devices known to the @master. 1050 * This is useful when you have secondary masters on the bus to propagate 1051 * device information. 1052 * 1053 * This should be called after all I3C devices have been discovered (in other 1054 * words, after the DAA procedure has finished) and instantiated in 1055 * &i3c_master_controller_ops->bus_init(). 1056 * It should also be called if a master ACKed an Hot-Join request and assigned 1057 * a dynamic address to the device joining the bus. 1058 * 1059 * This function must be called with the bus lock held in write mode. 1060 * 1061 * Return: 0 in case of success, a positive I3C error code if the error is 1062 * one of the official Mx error codes, and a negative error code otherwise. 1063 */ 1064int i3c_master_defslvs_locked(struct i3c_master_controller *master) 1065{ 1066 struct i3c_ccc_defslvs *defslvs; 1067 struct i3c_ccc_dev_desc *desc; 1068 struct i3c_ccc_cmd_dest dest; 1069 struct i3c_dev_desc *i3cdev; 1070 struct i2c_dev_desc *i2cdev; 1071 struct i3c_ccc_cmd cmd; 1072 struct i3c_bus *bus; 1073 bool send = false; 1074 int ndevs = 0, ret; 1075 1076 if (!master) 1077 return -EINVAL; 1078 1079 bus = i3c_master_get_bus(master); 1080 i3c_bus_for_each_i3cdev(bus, i3cdev) { 1081 ndevs++; 1082 1083 if (i3cdev == master->this) 1084 continue; 1085 1086 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) == 1087 I3C_BCR_I3C_MASTER) 1088 send = true; 1089 } 1090 1091 /* No other master on the bus, skip DEFSLVS. */ 1092 if (!send) 1093 return 0; 1094 1095 i3c_bus_for_each_i2cdev(bus, i2cdev) 1096 ndevs++; 1097 1098 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 1099 struct_size(defslvs, slaves, 1100 ndevs - 1)); 1101 if (!defslvs) 1102 return -ENOMEM; 1103 1104 defslvs->count = ndevs; 1105 defslvs->master.bcr = master->this->info.bcr; 1106 defslvs->master.dcr = master->this->info.dcr; 1107 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1; 1108 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1; 1109 1110 desc = defslvs->slaves; 1111 i3c_bus_for_each_i2cdev(bus, i2cdev) { 1112 desc->lvr = i2cdev->lvr; 1113 desc->static_addr = i2cdev->addr << 1; 1114 desc++; 1115 } 1116 1117 i3c_bus_for_each_i3cdev(bus, i3cdev) { 1118 /* Skip the I3C dev representing this master. */ 1119 if (i3cdev == master->this) 1120 continue; 1121 1122 desc->bcr = i3cdev->info.bcr; 1123 desc->dcr = i3cdev->info.dcr; 1124 desc->dyn_addr = i3cdev->info.dyn_addr << 1; 1125 desc->static_addr = i3cdev->info.static_addr << 1; 1126 desc++; 1127 } 1128 1129 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1); 1130 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1131 i3c_ccc_cmd_dest_cleanup(&dest); 1132 1133 return ret; 1134} 1135EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked); 1136 1137static int i3c_master_setda_locked(struct i3c_master_controller *master, 1138 u8 oldaddr, u8 newaddr, bool setdasa) 1139{ 1140 struct i3c_ccc_cmd_dest dest; 1141 struct i3c_ccc_setda *setda; 1142 struct i3c_ccc_cmd cmd; 1143 int ret; 1144 1145 if (!oldaddr || !newaddr) 1146 return -EINVAL; 1147 1148 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda)); 1149 if (!setda) 1150 return -ENOMEM; 1151 1152 setda->addr = newaddr << 1; 1153 i3c_ccc_cmd_init(&cmd, false, 1154 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA, 1155 &dest, 1); 1156 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1157 i3c_ccc_cmd_dest_cleanup(&dest); 1158 1159 return ret; 1160} 1161 1162static int i3c_master_setdasa_locked(struct i3c_master_controller *master, 1163 u8 static_addr, u8 dyn_addr) 1164{ 1165 return i3c_master_setda_locked(master, static_addr, dyn_addr, true); 1166} 1167 1168static int i3c_master_setnewda_locked(struct i3c_master_controller *master, 1169 u8 oldaddr, u8 newaddr) 1170{ 1171 return i3c_master_setda_locked(master, oldaddr, newaddr, false); 1172} 1173 1174static int i3c_master_getmrl_locked(struct i3c_master_controller *master, 1175 struct i3c_device_info *info) 1176{ 1177 struct i3c_ccc_cmd_dest dest; 1178 struct i3c_ccc_mrl *mrl; 1179 struct i3c_ccc_cmd cmd; 1180 int ret; 1181 1182 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl)); 1183 if (!mrl) 1184 return -ENOMEM; 1185 1186 /* 1187 * When the device does not have IBI payload GETMRL only returns 2 1188 * bytes of data. 1189 */ 1190 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD)) 1191 dest.payload.len -= 1; 1192 1193 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1); 1194 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1195 if (ret) 1196 goto out; 1197 1198 switch (dest.payload.len) { 1199 case 3: 1200 info->max_ibi_len = mrl->ibi_len; 1201 fallthrough; 1202 case 2: 1203 info->max_read_len = be16_to_cpu(mrl->read_len); 1204 break; 1205 default: 1206 ret = -EIO; 1207 goto out; 1208 } 1209 1210out: 1211 i3c_ccc_cmd_dest_cleanup(&dest); 1212 1213 return ret; 1214} 1215 1216static int i3c_master_getmwl_locked(struct i3c_master_controller *master, 1217 struct i3c_device_info *info) 1218{ 1219 struct i3c_ccc_cmd_dest dest; 1220 struct i3c_ccc_mwl *mwl; 1221 struct i3c_ccc_cmd cmd; 1222 int ret; 1223 1224 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl)); 1225 if (!mwl) 1226 return -ENOMEM; 1227 1228 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1); 1229 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1230 if (ret) 1231 goto out; 1232 1233 if (dest.payload.len != sizeof(*mwl)) { 1234 ret = -EIO; 1235 goto out; 1236 } 1237 1238 info->max_write_len = be16_to_cpu(mwl->len); 1239 1240out: 1241 i3c_ccc_cmd_dest_cleanup(&dest); 1242 1243 return ret; 1244} 1245 1246static int i3c_master_getmxds_locked(struct i3c_master_controller *master, 1247 struct i3c_device_info *info) 1248{ 1249 struct i3c_ccc_getmxds *getmaxds; 1250 struct i3c_ccc_cmd_dest dest; 1251 struct i3c_ccc_cmd cmd; 1252 int ret; 1253 1254 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1255 sizeof(*getmaxds)); 1256 if (!getmaxds) 1257 return -ENOMEM; 1258 1259 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1); 1260 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1261 if (ret) { 1262 /* 1263 * Retry when the device does not support max read turnaround 1264 * while expecting shorter length from this CCC command. 1265 */ 1266 dest.payload.len -= 3; 1267 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1268 if (ret) 1269 goto out; 1270 } 1271 1272 if (dest.payload.len != 2 && dest.payload.len != 5) { 1273 ret = -EIO; 1274 goto out; 1275 } 1276 1277 info->max_read_ds = getmaxds->maxrd; 1278 info->max_write_ds = getmaxds->maxwr; 1279 if (dest.payload.len == 5) 1280 info->max_read_turnaround = getmaxds->maxrdturn[0] | 1281 ((u32)getmaxds->maxrdturn[1] << 8) | 1282 ((u32)getmaxds->maxrdturn[2] << 16); 1283 1284out: 1285 i3c_ccc_cmd_dest_cleanup(&dest); 1286 1287 return ret; 1288} 1289 1290static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master, 1291 struct i3c_device_info *info) 1292{ 1293 struct i3c_ccc_gethdrcap *gethdrcap; 1294 struct i3c_ccc_cmd_dest dest; 1295 struct i3c_ccc_cmd cmd; 1296 int ret; 1297 1298 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1299 sizeof(*gethdrcap)); 1300 if (!gethdrcap) 1301 return -ENOMEM; 1302 1303 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1); 1304 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1305 if (ret) 1306 goto out; 1307 1308 if (dest.payload.len != 1) { 1309 ret = -EIO; 1310 goto out; 1311 } 1312 1313 info->hdr_cap = gethdrcap->modes; 1314 1315out: 1316 i3c_ccc_cmd_dest_cleanup(&dest); 1317 1318 return ret; 1319} 1320 1321static int i3c_master_getpid_locked(struct i3c_master_controller *master, 1322 struct i3c_device_info *info) 1323{ 1324 struct i3c_ccc_getpid *getpid; 1325 struct i3c_ccc_cmd_dest dest; 1326 struct i3c_ccc_cmd cmd; 1327 int ret, i; 1328 1329 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid)); 1330 if (!getpid) 1331 return -ENOMEM; 1332 1333 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1); 1334 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1335 if (ret) 1336 goto out; 1337 1338 info->pid = 0; 1339 for (i = 0; i < sizeof(getpid->pid); i++) { 1340 int sft = (sizeof(getpid->pid) - i - 1) * 8; 1341 1342 info->pid |= (u64)getpid->pid[i] << sft; 1343 } 1344 1345out: 1346 i3c_ccc_cmd_dest_cleanup(&dest); 1347 1348 return ret; 1349} 1350 1351static int i3c_master_getbcr_locked(struct i3c_master_controller *master, 1352 struct i3c_device_info *info) 1353{ 1354 struct i3c_ccc_getbcr *getbcr; 1355 struct i3c_ccc_cmd_dest dest; 1356 struct i3c_ccc_cmd cmd; 1357 int ret; 1358 1359 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr)); 1360 if (!getbcr) 1361 return -ENOMEM; 1362 1363 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1); 1364 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1365 if (ret) 1366 goto out; 1367 1368 info->bcr = getbcr->bcr; 1369 1370out: 1371 i3c_ccc_cmd_dest_cleanup(&dest); 1372 1373 return ret; 1374} 1375 1376static int i3c_master_getdcr_locked(struct i3c_master_controller *master, 1377 struct i3c_device_info *info) 1378{ 1379 struct i3c_ccc_getdcr *getdcr; 1380 struct i3c_ccc_cmd_dest dest; 1381 struct i3c_ccc_cmd cmd; 1382 int ret; 1383 1384 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr)); 1385 if (!getdcr) 1386 return -ENOMEM; 1387 1388 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1); 1389 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1390 if (ret) 1391 goto out; 1392 1393 info->dcr = getdcr->dcr; 1394 1395out: 1396 i3c_ccc_cmd_dest_cleanup(&dest); 1397 1398 return ret; 1399} 1400 1401static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev) 1402{ 1403 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1404 enum i3c_addr_slot_status slot_status; 1405 int ret; 1406 1407 if (!dev->info.dyn_addr) 1408 return -EINVAL; 1409 1410 slot_status = i3c_bus_get_addr_slot_status(&master->bus, 1411 dev->info.dyn_addr); 1412 if (slot_status == I3C_ADDR_SLOT_RSVD || 1413 slot_status == I3C_ADDR_SLOT_I2C_DEV) 1414 return -EINVAL; 1415 1416 ret = i3c_master_getpid_locked(master, &dev->info); 1417 if (ret) 1418 return ret; 1419 1420 ret = i3c_master_getbcr_locked(master, &dev->info); 1421 if (ret) 1422 return ret; 1423 1424 ret = i3c_master_getdcr_locked(master, &dev->info); 1425 if (ret) 1426 return ret; 1427 1428 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) { 1429 ret = i3c_master_getmxds_locked(master, &dev->info); 1430 if (ret) 1431 return ret; 1432 } 1433 1434 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD) 1435 dev->info.max_ibi_len = 1; 1436 1437 i3c_master_getmrl_locked(master, &dev->info); 1438 i3c_master_getmwl_locked(master, &dev->info); 1439 1440 if (dev->info.bcr & I3C_BCR_HDR_CAP) { 1441 ret = i3c_master_gethdrcap_locked(master, &dev->info); 1442 if (ret && ret != -EOPNOTSUPP) 1443 return ret; 1444 } 1445 1446 return 0; 1447} 1448 1449static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev) 1450{ 1451 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1452 1453 if (dev->info.static_addr) 1454 i3c_bus_set_addr_slot_status(&master->bus, 1455 dev->info.static_addr, 1456 I3C_ADDR_SLOT_FREE); 1457 1458 if (dev->info.dyn_addr) 1459 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1460 I3C_ADDR_SLOT_FREE); 1461 1462 if (dev->boardinfo && dev->boardinfo->init_dyn_addr) 1463 i3c_bus_set_addr_slot_status(&master->bus, dev->boardinfo->init_dyn_addr, 1464 I3C_ADDR_SLOT_FREE); 1465} 1466 1467static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev) 1468{ 1469 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1470 enum i3c_addr_slot_status status; 1471 1472 if (!dev->info.static_addr && !dev->info.dyn_addr) 1473 return 0; 1474 1475 if (dev->info.static_addr) { 1476 status = i3c_bus_get_addr_slot_status(&master->bus, 1477 dev->info.static_addr); 1478 /* Since static address and assigned dynamic address can be 1479 * equal, allow this case to pass. 1480 */ 1481 if (status != I3C_ADDR_SLOT_FREE && 1482 dev->info.static_addr != dev->boardinfo->init_dyn_addr) 1483 return -EBUSY; 1484 1485 i3c_bus_set_addr_slot_status(&master->bus, 1486 dev->info.static_addr, 1487 I3C_ADDR_SLOT_I3C_DEV); 1488 } 1489 1490 /* 1491 * ->init_dyn_addr should have been reserved before that, so, if we're 1492 * trying to apply a pre-reserved dynamic address, we should not try 1493 * to reserve the address slot a second time. 1494 */ 1495 if (dev->info.dyn_addr && 1496 (!dev->boardinfo || 1497 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) { 1498 status = i3c_bus_get_addr_slot_status(&master->bus, 1499 dev->info.dyn_addr); 1500 if (status != I3C_ADDR_SLOT_FREE) 1501 goto err_release_static_addr; 1502 1503 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1504 I3C_ADDR_SLOT_I3C_DEV); 1505 } 1506 1507 return 0; 1508 1509err_release_static_addr: 1510 if (dev->info.static_addr) 1511 i3c_bus_set_addr_slot_status(&master->bus, 1512 dev->info.static_addr, 1513 I3C_ADDR_SLOT_FREE); 1514 1515 return -EBUSY; 1516} 1517 1518static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master, 1519 struct i3c_dev_desc *dev) 1520{ 1521 int ret; 1522 1523 /* 1524 * We don't attach devices to the controller until they are 1525 * addressable on the bus. 1526 */ 1527 if (!dev->info.static_addr && !dev->info.dyn_addr) 1528 return 0; 1529 1530 ret = i3c_master_get_i3c_addrs(dev); 1531 if (ret) 1532 return ret; 1533 1534 /* Do not attach the master device itself. */ 1535 if (master->this != dev && master->ops->attach_i3c_dev) { 1536 ret = master->ops->attach_i3c_dev(dev); 1537 if (ret) { 1538 i3c_master_put_i3c_addrs(dev); 1539 return ret; 1540 } 1541 } 1542 1543 list_add_tail(&dev->common.node, &master->bus.devs.i3c); 1544 1545 return 0; 1546} 1547 1548static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev, 1549 u8 old_dyn_addr) 1550{ 1551 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1552 int ret; 1553 1554 if (dev->info.dyn_addr != old_dyn_addr) { 1555 i3c_bus_set_addr_slot_status(&master->bus, 1556 dev->info.dyn_addr, 1557 I3C_ADDR_SLOT_I3C_DEV); 1558 if (old_dyn_addr) 1559 i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr, 1560 I3C_ADDR_SLOT_FREE); 1561 } 1562 1563 if (master->ops->reattach_i3c_dev) { 1564 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr); 1565 if (ret) { 1566 i3c_master_put_i3c_addrs(dev); 1567 return ret; 1568 } 1569 } 1570 1571 return 0; 1572} 1573 1574static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev) 1575{ 1576 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1577 1578 /* Do not detach the master device itself. */ 1579 if (master->this != dev && master->ops->detach_i3c_dev) 1580 master->ops->detach_i3c_dev(dev); 1581 1582 i3c_master_put_i3c_addrs(dev); 1583 list_del(&dev->common.node); 1584} 1585 1586static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master, 1587 struct i2c_dev_desc *dev) 1588{ 1589 int ret; 1590 1591 if (master->ops->attach_i2c_dev) { 1592 ret = master->ops->attach_i2c_dev(dev); 1593 if (ret) 1594 return ret; 1595 } 1596 1597 list_add_tail(&dev->common.node, &master->bus.devs.i2c); 1598 1599 return 0; 1600} 1601 1602static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev) 1603{ 1604 struct i3c_master_controller *master = i2c_dev_get_master(dev); 1605 1606 list_del(&dev->common.node); 1607 1608 if (master->ops->detach_i2c_dev) 1609 master->ops->detach_i2c_dev(dev); 1610} 1611 1612static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master, 1613 struct i3c_dev_boardinfo *boardinfo) 1614{ 1615 struct i3c_device_info info = { 1616 .static_addr = boardinfo->static_addr, 1617 .pid = boardinfo->pid, 1618 }; 1619 struct i3c_dev_desc *i3cdev; 1620 int ret; 1621 1622 i3cdev = i3c_master_alloc_i3c_dev(master, &info); 1623 if (IS_ERR(i3cdev)) 1624 return -ENOMEM; 1625 1626 i3cdev->boardinfo = boardinfo; 1627 1628 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1629 if (ret) 1630 goto err_free_dev; 1631 1632 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr, 1633 i3cdev->boardinfo->init_dyn_addr); 1634 if (ret) 1635 goto err_detach_dev; 1636 1637 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr; 1638 ret = i3c_master_reattach_i3c_dev(i3cdev, 0); 1639 if (ret) 1640 goto err_rstdaa; 1641 1642 ret = i3c_master_retrieve_dev_info(i3cdev); 1643 if (ret) 1644 goto err_rstdaa; 1645 1646 return 0; 1647 1648err_rstdaa: 1649 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr); 1650err_detach_dev: 1651 i3c_master_detach_i3c_dev(i3cdev); 1652err_free_dev: 1653 i3c_master_free_i3c_dev(i3cdev); 1654 1655 return ret; 1656} 1657 1658static void 1659i3c_master_register_new_i3c_devs(struct i3c_master_controller *master) 1660{ 1661 struct i3c_dev_desc *desc; 1662 int ret; 1663 1664 if (!master->init_done) 1665 return; 1666 1667 i3c_bus_for_each_i3cdev(&master->bus, desc) { 1668 if (desc->dev || !desc->info.dyn_addr || desc == master->this) 1669 continue; 1670 1671 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL); 1672 if (!desc->dev) 1673 continue; 1674 1675 desc->dev->bus = &master->bus; 1676 desc->dev->desc = desc; 1677 desc->dev->dev.parent = &master->dev; 1678 desc->dev->dev.type = &i3c_device_type; 1679 desc->dev->dev.bus = &i3c_bus_type; 1680 desc->dev->dev.release = i3c_device_release; 1681 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id, 1682 desc->info.pid); 1683 1684 if (desc->boardinfo) 1685 desc->dev->dev.of_node = desc->boardinfo->of_node; 1686 1687 ret = device_register(&desc->dev->dev); 1688 if (ret) { 1689 dev_err(&master->dev, 1690 "Failed to add I3C device (err = %d)\n", ret); 1691 put_device(&desc->dev->dev); 1692 } 1693 } 1694} 1695 1696/** 1697 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment) 1698 * @master: master doing the DAA 1699 * 1700 * This function is instantiating an I3C device object and adding it to the 1701 * I3C device list. All device information are automatically retrieved using 1702 * standard CCC commands. 1703 * 1704 * The I3C device object is returned in case the master wants to attach 1705 * private data to it using i3c_dev_set_master_data(). 1706 * 1707 * This function must be called with the bus lock held in write mode. 1708 * 1709 * Return: a 0 in case of success, an negative error code otherwise. 1710 */ 1711int i3c_master_do_daa(struct i3c_master_controller *master) 1712{ 1713 int ret; 1714 1715 i3c_bus_maintenance_lock(&master->bus); 1716 ret = master->ops->do_daa(master); 1717 i3c_bus_maintenance_unlock(&master->bus); 1718 1719 if (ret) 1720 return ret; 1721 1722 i3c_bus_normaluse_lock(&master->bus); 1723 i3c_master_register_new_i3c_devs(master); 1724 i3c_bus_normaluse_unlock(&master->bus); 1725 1726 return 0; 1727} 1728EXPORT_SYMBOL_GPL(i3c_master_do_daa); 1729 1730/** 1731 * i3c_master_dma_map_single() - Map buffer for single DMA transfer 1732 * @dev: device object of a device doing DMA 1733 * @buf: destination/source buffer for DMA 1734 * @len: length of transfer 1735 * @force_bounce: true, force to use a bounce buffer, 1736 * false, function will auto check is a bounce buffer required 1737 * @dir: DMA direction 1738 * 1739 * Map buffer for a DMA transfer and allocate a bounce buffer if required. 1740 * 1741 * Return: I3C DMA transfer descriptor or NULL in case of error. 1742 */ 1743struct i3c_dma *i3c_master_dma_map_single(struct device *dev, void *buf, 1744 size_t len, bool force_bounce, enum dma_data_direction dir) 1745{ 1746 void *bounce __free(kfree) = NULL; 1747 void *dma_buf = buf; 1748 1749 struct i3c_dma *dma_xfer __free(kfree) = kzalloc(sizeof(*dma_xfer), GFP_KERNEL); 1750 if (!dma_xfer) 1751 return NULL; 1752 1753 dma_xfer->dev = dev; 1754 dma_xfer->buf = buf; 1755 dma_xfer->dir = dir; 1756 dma_xfer->len = len; 1757 dma_xfer->map_len = len; 1758 1759 if (is_vmalloc_addr(buf)) 1760 force_bounce = true; 1761 1762 if (force_bounce) { 1763 dma_xfer->map_len = ALIGN(len, cache_line_size()); 1764 if (dir == DMA_FROM_DEVICE) 1765 bounce = kzalloc(dma_xfer->map_len, GFP_KERNEL); 1766 else 1767 bounce = kmemdup(buf, dma_xfer->map_len, GFP_KERNEL); 1768 if (!bounce) 1769 return NULL; 1770 dma_buf = bounce; 1771 } 1772 1773 dma_xfer->addr = dma_map_single(dev, dma_buf, dma_xfer->map_len, dir); 1774 if (dma_mapping_error(dev, dma_xfer->addr)) 1775 return NULL; 1776 1777 dma_xfer->bounce_buf = no_free_ptr(bounce); 1778 return no_free_ptr(dma_xfer); 1779} 1780EXPORT_SYMBOL_GPL(i3c_master_dma_map_single); 1781 1782/** 1783 * i3c_master_dma_unmap_single() - Unmap buffer after DMA 1784 * @dma_xfer: DMA transfer and mapping descriptor 1785 * 1786 * Unmap buffer and cleanup DMA transfer descriptor. 1787 */ 1788void i3c_master_dma_unmap_single(struct i3c_dma *dma_xfer) 1789{ 1790 dma_unmap_single(dma_xfer->dev, dma_xfer->addr, 1791 dma_xfer->map_len, dma_xfer->dir); 1792 if (dma_xfer->bounce_buf) { 1793 if (dma_xfer->dir == DMA_FROM_DEVICE) 1794 memcpy(dma_xfer->buf, dma_xfer->bounce_buf, 1795 dma_xfer->len); 1796 kfree(dma_xfer->bounce_buf); 1797 } 1798 kfree(dma_xfer); 1799} 1800EXPORT_SYMBOL_GPL(i3c_master_dma_unmap_single); 1801 1802/** 1803 * i3c_master_set_info() - set master device information 1804 * @master: master used to send frames on the bus 1805 * @info: I3C device information 1806 * 1807 * Set master device info. This should be called from 1808 * &i3c_master_controller_ops->bus_init(). 1809 * 1810 * Not all &i3c_device_info fields are meaningful for a master device. 1811 * Here is a list of fields that should be properly filled: 1812 * 1813 * - &i3c_device_info->dyn_addr 1814 * - &i3c_device_info->bcr 1815 * - &i3c_device_info->dcr 1816 * - &i3c_device_info->pid 1817 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in 1818 * &i3c_device_info->bcr 1819 * 1820 * This function must be called with the bus lock held in maintenance mode. 1821 * 1822 * Return: 0 if @info contains valid information (not every piece of 1823 * information can be checked, but we can at least make sure @info->dyn_addr 1824 * and @info->bcr are correct), -EINVAL otherwise. 1825 */ 1826int i3c_master_set_info(struct i3c_master_controller *master, 1827 const struct i3c_device_info *info) 1828{ 1829 struct i3c_dev_desc *i3cdev; 1830 int ret; 1831 1832 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr)) 1833 return -EINVAL; 1834 1835 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER && 1836 master->secondary) 1837 return -EINVAL; 1838 1839 if (master->this) 1840 return -EINVAL; 1841 1842 i3cdev = i3c_master_alloc_i3c_dev(master, info); 1843 if (IS_ERR(i3cdev)) 1844 return PTR_ERR(i3cdev); 1845 1846 master->this = i3cdev; 1847 master->bus.cur_master = master->this; 1848 1849 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1850 if (ret) 1851 goto err_free_dev; 1852 1853 return 0; 1854 1855err_free_dev: 1856 i3c_master_free_i3c_dev(i3cdev); 1857 1858 return ret; 1859} 1860EXPORT_SYMBOL_GPL(i3c_master_set_info); 1861 1862static void i3c_master_detach_free_devs(struct i3c_master_controller *master) 1863{ 1864 struct i3c_dev_desc *i3cdev, *i3ctmp; 1865 struct i2c_dev_desc *i2cdev, *i2ctmp; 1866 1867 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c, 1868 common.node) { 1869 i3c_master_detach_i3c_dev(i3cdev); 1870 1871 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr) 1872 i3c_bus_set_addr_slot_status(&master->bus, 1873 i3cdev->boardinfo->init_dyn_addr, 1874 I3C_ADDR_SLOT_FREE); 1875 1876 i3c_master_free_i3c_dev(i3cdev); 1877 } 1878 1879 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c, 1880 common.node) { 1881 i3c_master_detach_i2c_dev(i2cdev); 1882 i3c_bus_set_addr_slot_status(&master->bus, 1883 i2cdev->addr, 1884 I3C_ADDR_SLOT_FREE); 1885 i3c_master_free_i2c_dev(i2cdev); 1886 } 1887} 1888 1889/** 1890 * i3c_master_bus_init() - initialize an I3C bus 1891 * @master: main master initializing the bus 1892 * 1893 * This function is following all initialisation steps described in the I3C 1894 * specification: 1895 * 1896 * 1. Attach I2C devs to the master so that the master can fill its internal 1897 * device table appropriately 1898 * 1899 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize 1900 * the master controller. That's usually where the bus mode is selected 1901 * (pure bus or mixed fast/slow bus) 1902 * 1903 * 3. Instruct all devices on the bus to drop their dynamic address. This is 1904 * particularly important when the bus was previously configured by someone 1905 * else (for example the bootloader) 1906 * 1907 * 4. Disable all slave events. 1908 * 1909 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices 1910 * also have static_addr, try to pre-assign dynamic addresses requested by 1911 * the FW with SETDASA and attach corresponding statically defined I3C 1912 * devices to the master. 1913 * 1914 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all 1915 * remaining I3C devices 1916 * 1917 * Once this is done, all I3C and I2C devices should be usable. 1918 * 1919 * Return: a 0 in case of success, an negative error code otherwise. 1920 */ 1921static int i3c_master_bus_init(struct i3c_master_controller *master) 1922{ 1923 enum i3c_addr_slot_status status; 1924 struct i2c_dev_boardinfo *i2cboardinfo; 1925 struct i3c_dev_boardinfo *i3cboardinfo; 1926 struct i2c_dev_desc *i2cdev; 1927 int ret; 1928 1929 /* 1930 * First attach all devices with static definitions provided by the 1931 * FW. 1932 */ 1933 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { 1934 status = i3c_bus_get_addr_slot_status(&master->bus, 1935 i2cboardinfo->base.addr); 1936 if (status != I3C_ADDR_SLOT_FREE) { 1937 ret = -EBUSY; 1938 goto err_detach_devs; 1939 } 1940 1941 i3c_bus_set_addr_slot_status(&master->bus, 1942 i2cboardinfo->base.addr, 1943 I3C_ADDR_SLOT_I2C_DEV); 1944 1945 i2cdev = i3c_master_alloc_i2c_dev(master, 1946 i2cboardinfo->base.addr, 1947 i2cboardinfo->lvr); 1948 if (IS_ERR(i2cdev)) { 1949 ret = PTR_ERR(i2cdev); 1950 goto err_detach_devs; 1951 } 1952 1953 ret = i3c_master_attach_i2c_dev(master, i2cdev); 1954 if (ret) { 1955 i3c_master_free_i2c_dev(i2cdev); 1956 goto err_detach_devs; 1957 } 1958 } 1959 1960 /* 1961 * Now execute the controller specific ->bus_init() routine, which 1962 * might configure its internal logic to match the bus limitations. 1963 */ 1964 ret = master->ops->bus_init(master); 1965 if (ret) 1966 goto err_detach_devs; 1967 1968 /* 1969 * The master device should have been instantiated in ->bus_init(), 1970 * complain if this was not the case. 1971 */ 1972 if (!master->this) { 1973 dev_err(&master->dev, 1974 "master_set_info() was not called in ->bus_init()\n"); 1975 ret = -EINVAL; 1976 goto err_bus_cleanup; 1977 } 1978 1979 if (master->ops->set_speed) { 1980 ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_SLOW_SPEED); 1981 if (ret) 1982 goto err_bus_cleanup; 1983 } 1984 1985 /* 1986 * Reset all dynamic address that may have been assigned before 1987 * (assigned by the bootloader for example). 1988 */ 1989 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1990 if (ret && ret != I3C_ERROR_M2) 1991 goto err_bus_cleanup; 1992 1993 if (master->ops->set_speed) { 1994 ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_NORMAL_SPEED); 1995 if (ret) 1996 goto err_bus_cleanup; 1997 } 1998 1999 /* Disable all slave events before starting DAA. */ 2000 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR, 2001 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR | 2002 I3C_CCC_EVENT_HJ); 2003 if (ret && ret != I3C_ERROR_M2) 2004 goto err_bus_cleanup; 2005 2006 /* 2007 * Reserve init_dyn_addr first, and then try to pre-assign dynamic 2008 * address and retrieve device information if needed. 2009 * In case pre-assign dynamic address fails, setting dynamic address to 2010 * the requested init_dyn_addr is retried after DAA is done in 2011 * i3c_master_add_i3c_dev_locked(). 2012 */ 2013 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 2014 2015 /* 2016 * We don't reserve a dynamic address for devices that 2017 * don't explicitly request one. 2018 */ 2019 if (!i3cboardinfo->init_dyn_addr) 2020 continue; 2021 2022 ret = i3c_bus_get_addr_slot_status(&master->bus, 2023 i3cboardinfo->init_dyn_addr); 2024 if (ret != I3C_ADDR_SLOT_FREE) { 2025 ret = -EBUSY; 2026 goto err_rstdaa; 2027 } 2028 2029 /* Do not mark as occupied until real device exist in bus */ 2030 i3c_bus_set_addr_slot_status_mask(&master->bus, 2031 i3cboardinfo->init_dyn_addr, 2032 I3C_ADDR_SLOT_EXT_DESIRED, 2033 I3C_ADDR_SLOT_EXT_STATUS_MASK); 2034 2035 /* 2036 * Only try to create/attach devices that have a static 2037 * address. Other devices will be created/attached when 2038 * DAA happens, and the requested dynamic address will 2039 * be set using SETNEWDA once those devices become 2040 * addressable. 2041 */ 2042 2043 if (i3cboardinfo->static_addr) 2044 i3c_master_early_i3c_dev_add(master, i3cboardinfo); 2045 } 2046 2047 ret = i3c_master_do_daa(master); 2048 if (ret) 2049 goto err_rstdaa; 2050 2051 return 0; 2052 2053err_rstdaa: 2054 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 2055 2056err_bus_cleanup: 2057 if (master->ops->bus_cleanup) 2058 master->ops->bus_cleanup(master); 2059 2060err_detach_devs: 2061 i3c_master_detach_free_devs(master); 2062 2063 return ret; 2064} 2065 2066static void i3c_master_bus_cleanup(struct i3c_master_controller *master) 2067{ 2068 if (master->ops->bus_cleanup) 2069 master->ops->bus_cleanup(master); 2070 2071 i3c_master_detach_free_devs(master); 2072} 2073 2074static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev) 2075{ 2076 struct i3c_master_controller *master = i3cdev->common.master; 2077 struct i3c_dev_boardinfo *i3cboardinfo; 2078 2079 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 2080 if (i3cdev->info.pid != i3cboardinfo->pid) 2081 continue; 2082 2083 i3cdev->boardinfo = i3cboardinfo; 2084 i3cdev->info.static_addr = i3cboardinfo->static_addr; 2085 return; 2086 } 2087} 2088 2089static struct i3c_dev_desc * 2090i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev) 2091{ 2092 struct i3c_master_controller *master = i3c_dev_get_master(refdev); 2093 struct i3c_dev_desc *i3cdev; 2094 2095 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 2096 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid) 2097 return i3cdev; 2098 } 2099 2100 return NULL; 2101} 2102 2103/** 2104 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus 2105 * @master: master used to send frames on the bus 2106 * @addr: I3C slave dynamic address assigned to the device 2107 * 2108 * This function is instantiating an I3C device object and adding it to the 2109 * I3C device list. All device information are automatically retrieved using 2110 * standard CCC commands. 2111 * 2112 * The I3C device object is returned in case the master wants to attach 2113 * private data to it using i3c_dev_set_master_data(). 2114 * 2115 * This function must be called with the bus lock held in write mode. 2116 * 2117 * Return: a 0 in case of success, an negative error code otherwise. 2118 */ 2119int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, 2120 u8 addr) 2121{ 2122 struct i3c_device_info info = { .dyn_addr = addr }; 2123 struct i3c_dev_desc *newdev, *olddev; 2124 u8 old_dyn_addr = addr, expected_dyn_addr; 2125 struct i3c_ibi_setup ibireq = { }; 2126 bool enable_ibi = false; 2127 int ret; 2128 2129 if (!master) 2130 return -EINVAL; 2131 2132 newdev = i3c_master_alloc_i3c_dev(master, &info); 2133 if (IS_ERR(newdev)) 2134 return PTR_ERR(newdev); 2135 2136 ret = i3c_master_attach_i3c_dev(master, newdev); 2137 if (ret) 2138 goto err_free_dev; 2139 2140 ret = i3c_master_retrieve_dev_info(newdev); 2141 if (ret) 2142 goto err_detach_dev; 2143 2144 i3c_master_attach_boardinfo(newdev); 2145 2146 olddev = i3c_master_search_i3c_dev_duplicate(newdev); 2147 if (olddev) { 2148 newdev->dev = olddev->dev; 2149 if (newdev->dev) 2150 newdev->dev->desc = newdev; 2151 2152 /* 2153 * We need to restore the IBI state too, so let's save the 2154 * IBI information and try to restore them after olddev has 2155 * been detached+released and its IBI has been stopped and 2156 * the associated resources have been freed. 2157 */ 2158 mutex_lock(&olddev->ibi_lock); 2159 if (olddev->ibi) { 2160 ibireq.handler = olddev->ibi->handler; 2161 ibireq.max_payload_len = olddev->ibi->max_payload_len; 2162 ibireq.num_slots = olddev->ibi->num_slots; 2163 2164 if (olddev->ibi->enabled) 2165 enable_ibi = true; 2166 /* 2167 * The olddev should not receive any commands on the 2168 * i3c bus as it does not exist and has been assigned 2169 * a new address. This will result in NACK or timeout. 2170 * So, update the olddev->ibi->enabled flag to false 2171 * to avoid DISEC with OldAddr. 2172 */ 2173 olddev->ibi->enabled = false; 2174 i3c_dev_free_ibi_locked(olddev); 2175 } 2176 mutex_unlock(&olddev->ibi_lock); 2177 2178 old_dyn_addr = olddev->info.dyn_addr; 2179 2180 i3c_master_detach_i3c_dev(olddev); 2181 i3c_master_free_i3c_dev(olddev); 2182 } 2183 2184 /* 2185 * Depending on our previous state, the expected dynamic address might 2186 * differ: 2187 * - if the device already had a dynamic address assigned, let's try to 2188 * re-apply this one 2189 * - if the device did not have a dynamic address and the firmware 2190 * requested a specific address, pick this one 2191 * - in any other case, keep the address automatically assigned by the 2192 * master 2193 */ 2194 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr) 2195 expected_dyn_addr = old_dyn_addr; 2196 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr) 2197 expected_dyn_addr = newdev->boardinfo->init_dyn_addr; 2198 else 2199 expected_dyn_addr = newdev->info.dyn_addr; 2200 2201 if (newdev->info.dyn_addr != expected_dyn_addr && 2202 i3c_bus_get_addr_slot_status(&master->bus, expected_dyn_addr) == I3C_ADDR_SLOT_FREE) { 2203 /* 2204 * Try to apply the expected dynamic address. If it fails, keep 2205 * the address assigned by the master. 2206 */ 2207 ret = i3c_master_setnewda_locked(master, 2208 newdev->info.dyn_addr, 2209 expected_dyn_addr); 2210 if (!ret) { 2211 old_dyn_addr = newdev->info.dyn_addr; 2212 newdev->info.dyn_addr = expected_dyn_addr; 2213 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr); 2214 } else { 2215 dev_err(&master->dev, 2216 "Failed to assign reserved/old address to device %d%llx", 2217 master->bus.id, newdev->info.pid); 2218 } 2219 } 2220 2221 /* 2222 * Now is time to try to restore the IBI setup. If we're lucky, 2223 * everything works as before, otherwise, all we can do is complain. 2224 * FIXME: maybe we should add callback to inform the driver that it 2225 * should request the IBI again instead of trying to hide that from 2226 * him. 2227 */ 2228 if (ibireq.handler) { 2229 mutex_lock(&newdev->ibi_lock); 2230 ret = i3c_dev_request_ibi_locked(newdev, &ibireq); 2231 if (ret) { 2232 dev_err(&master->dev, 2233 "Failed to request IBI on device %d-%llx", 2234 master->bus.id, newdev->info.pid); 2235 } else if (enable_ibi) { 2236 ret = i3c_dev_enable_ibi_locked(newdev); 2237 if (ret) 2238 dev_err(&master->dev, 2239 "Failed to re-enable IBI on device %d-%llx", 2240 master->bus.id, newdev->info.pid); 2241 } 2242 mutex_unlock(&newdev->ibi_lock); 2243 } 2244 2245 return 0; 2246 2247err_detach_dev: 2248 if (newdev->dev && newdev->dev->desc) 2249 newdev->dev->desc = NULL; 2250 2251 i3c_master_detach_i3c_dev(newdev); 2252 2253err_free_dev: 2254 i3c_master_free_i3c_dev(newdev); 2255 2256 return ret; 2257} 2258EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked); 2259 2260#define OF_I3C_REG1_IS_I2C_DEV BIT(31) 2261 2262static int 2263of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master, 2264 struct device_node *node, u32 *reg) 2265{ 2266 struct i2c_dev_boardinfo *boardinfo; 2267 struct device *dev = &master->dev; 2268 int ret; 2269 2270 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2271 if (!boardinfo) 2272 return -ENOMEM; 2273 2274 ret = of_i2c_get_board_info(dev, node, &boardinfo->base); 2275 if (ret) 2276 return ret; 2277 2278 /* 2279 * The I3C Specification does not clearly say I2C devices with 10-bit 2280 * address are supported. These devices can't be passed properly through 2281 * DEFSLVS command. 2282 */ 2283 if (boardinfo->base.flags & I2C_CLIENT_TEN) { 2284 dev_err(dev, "I2C device with 10 bit address not supported."); 2285 return -EOPNOTSUPP; 2286 } 2287 2288 /* LVR is encoded in reg[2]. */ 2289 boardinfo->lvr = reg[2]; 2290 2291 list_add_tail(&boardinfo->node, &master->boardinfo.i2c); 2292 of_node_get(node); 2293 2294 return 0; 2295} 2296 2297static int 2298of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master, 2299 struct device_node *node, u32 *reg) 2300{ 2301 struct i3c_dev_boardinfo *boardinfo; 2302 struct device *dev = &master->dev; 2303 enum i3c_addr_slot_status addrstatus; 2304 u32 init_dyn_addr = 0; 2305 2306 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2307 if (!boardinfo) 2308 return -ENOMEM; 2309 2310 if (reg[0]) { 2311 if (reg[0] > I3C_MAX_ADDR) 2312 return -EINVAL; 2313 2314 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2315 reg[0]); 2316 if (addrstatus != I3C_ADDR_SLOT_FREE) 2317 return -EINVAL; 2318 } 2319 2320 boardinfo->static_addr = reg[0]; 2321 2322 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) { 2323 if (init_dyn_addr > I3C_MAX_ADDR) 2324 return -EINVAL; 2325 2326 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2327 init_dyn_addr); 2328 if (addrstatus != I3C_ADDR_SLOT_FREE) 2329 return -EINVAL; 2330 } 2331 2332 boardinfo->pid = ((u64)reg[1] << 32) | reg[2]; 2333 2334 if ((boardinfo->pid & GENMASK_ULL(63, 48)) || 2335 I3C_PID_RND_LOWER_32BITS(boardinfo->pid)) 2336 return -EINVAL; 2337 2338 boardinfo->init_dyn_addr = init_dyn_addr; 2339 boardinfo->of_node = of_node_get(node); 2340 list_add_tail(&boardinfo->node, &master->boardinfo.i3c); 2341 2342 return 0; 2343} 2344 2345static int of_i3c_master_add_dev(struct i3c_master_controller *master, 2346 struct device_node *node) 2347{ 2348 u32 reg[3]; 2349 int ret; 2350 2351 if (!master) 2352 return -EINVAL; 2353 2354 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg)); 2355 if (ret) 2356 return ret; 2357 2358 /* 2359 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're 2360 * dealing with an I2C device. 2361 */ 2362 if (!reg[1]) 2363 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg); 2364 else 2365 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg); 2366 2367 return ret; 2368} 2369 2370static int of_populate_i3c_bus(struct i3c_master_controller *master) 2371{ 2372 struct device *dev = &master->dev; 2373 struct device_node *i3cbus_np = dev->of_node; 2374 struct device_node *node; 2375 int ret; 2376 u32 val; 2377 2378 if (!i3cbus_np) 2379 return 0; 2380 2381 for_each_available_child_of_node(i3cbus_np, node) { 2382 ret = of_i3c_master_add_dev(master, node); 2383 if (ret) { 2384 of_node_put(node); 2385 return ret; 2386 } 2387 } 2388 2389 /* 2390 * The user might want to limit I2C and I3C speed in case some devices 2391 * on the bus are not supporting typical rates, or if the bus topology 2392 * prevents it from using max possible rate. 2393 */ 2394 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val)) 2395 master->bus.scl_rate.i2c = val; 2396 2397 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val)) 2398 master->bus.scl_rate.i3c = val; 2399 2400 return 0; 2401} 2402 2403static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap, 2404 struct i2c_msg *xfers, int nxfers) 2405{ 2406 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2407 struct i2c_dev_desc *dev; 2408 int i, ret; 2409 u16 addr; 2410 2411 if (!xfers || !master || nxfers <= 0) 2412 return -EINVAL; 2413 2414 if (!master->ops->i2c_xfers) 2415 return -EOPNOTSUPP; 2416 2417 /* Doing transfers to different devices is not supported. */ 2418 addr = xfers[0].addr; 2419 for (i = 1; i < nxfers; i++) { 2420 if (addr != xfers[i].addr) 2421 return -EOPNOTSUPP; 2422 } 2423 2424 i3c_bus_normaluse_lock(&master->bus); 2425 dev = i3c_master_find_i2c_dev_by_addr(master, addr); 2426 if (!dev) 2427 ret = -ENOENT; 2428 else 2429 ret = master->ops->i2c_xfers(dev, xfers, nxfers); 2430 i3c_bus_normaluse_unlock(&master->bus); 2431 2432 return ret ? ret : nxfers; 2433} 2434 2435static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter) 2436{ 2437 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C; 2438} 2439 2440static u8 i3c_master_i2c_get_lvr(struct i2c_client *client) 2441{ 2442 /* Fall back to no spike filters and FM bus mode. */ 2443 u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE; 2444 u32 reg[3]; 2445 2446 if (!of_property_read_u32_array(client->dev.of_node, "reg", reg, ARRAY_SIZE(reg))) 2447 lvr = reg[2]; 2448 2449 return lvr; 2450} 2451 2452static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client) 2453{ 2454 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2455 enum i3c_addr_slot_status status; 2456 struct i2c_dev_desc *i2cdev; 2457 int ret; 2458 2459 /* Already added by board info? */ 2460 if (i3c_master_find_i2c_dev_by_addr(master, client->addr)) 2461 return 0; 2462 2463 status = i3c_bus_get_addr_slot_status(&master->bus, client->addr); 2464 if (status != I3C_ADDR_SLOT_FREE) 2465 return -EBUSY; 2466 2467 i3c_bus_set_addr_slot_status(&master->bus, client->addr, 2468 I3C_ADDR_SLOT_I2C_DEV); 2469 2470 i2cdev = i3c_master_alloc_i2c_dev(master, client->addr, 2471 i3c_master_i2c_get_lvr(client)); 2472 if (IS_ERR(i2cdev)) { 2473 ret = PTR_ERR(i2cdev); 2474 goto out_clear_status; 2475 } 2476 2477 ret = i3c_master_attach_i2c_dev(master, i2cdev); 2478 if (ret) 2479 goto out_free_dev; 2480 2481 return 0; 2482 2483out_free_dev: 2484 i3c_master_free_i2c_dev(i2cdev); 2485out_clear_status: 2486 i3c_bus_set_addr_slot_status(&master->bus, client->addr, 2487 I3C_ADDR_SLOT_FREE); 2488 2489 return ret; 2490} 2491 2492static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client) 2493{ 2494 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2495 struct i2c_dev_desc *dev; 2496 2497 dev = i3c_master_find_i2c_dev_by_addr(master, client->addr); 2498 if (!dev) 2499 return -ENODEV; 2500 2501 i3c_master_detach_i2c_dev(dev); 2502 i3c_bus_set_addr_slot_status(&master->bus, dev->addr, 2503 I3C_ADDR_SLOT_FREE); 2504 i3c_master_free_i2c_dev(dev); 2505 2506 return 0; 2507} 2508 2509static const struct i2c_algorithm i3c_master_i2c_algo = { 2510 .master_xfer = i3c_master_i2c_adapter_xfer, 2511 .functionality = i3c_master_i2c_funcs, 2512}; 2513 2514static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action, 2515 void *data) 2516{ 2517 struct i2c_adapter *adap; 2518 struct i2c_client *client; 2519 struct device *dev = data; 2520 struct i3c_master_controller *master; 2521 int ret; 2522 2523 if (dev->type != &i2c_client_type) 2524 return 0; 2525 2526 client = to_i2c_client(dev); 2527 adap = client->adapter; 2528 2529 if (adap->algo != &i3c_master_i2c_algo) 2530 return 0; 2531 2532 master = i2c_adapter_to_i3c_master(adap); 2533 2534 i3c_bus_maintenance_lock(&master->bus); 2535 switch (action) { 2536 case BUS_NOTIFY_ADD_DEVICE: 2537 ret = i3c_master_i2c_attach(adap, client); 2538 break; 2539 case BUS_NOTIFY_DEL_DEVICE: 2540 ret = i3c_master_i2c_detach(adap, client); 2541 break; 2542 default: 2543 ret = -EINVAL; 2544 } 2545 i3c_bus_maintenance_unlock(&master->bus); 2546 2547 return ret; 2548} 2549 2550static struct notifier_block i2cdev_notifier = { 2551 .notifier_call = i3c_i2c_notifier_call, 2552}; 2553 2554static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master) 2555{ 2556 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master); 2557 struct i2c_dev_desc *i2cdev; 2558 struct i2c_dev_boardinfo *i2cboardinfo; 2559 int ret, id; 2560 2561 adap->dev.parent = master->dev.parent; 2562 adap->owner = master->dev.parent->driver->owner; 2563 adap->algo = &i3c_master_i2c_algo; 2564 strscpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name)); 2565 adap->timeout = HZ; 2566 adap->retries = 3; 2567 2568 id = of_alias_get_id(master->dev.of_node, "i2c"); 2569 if (id >= 0) { 2570 adap->nr = id; 2571 ret = i2c_add_numbered_adapter(adap); 2572 } else { 2573 ret = i2c_add_adapter(adap); 2574 } 2575 if (ret) 2576 return ret; 2577 2578 /* 2579 * We silently ignore failures here. The bus should keep working 2580 * correctly even if one or more i2c devices are not registered. 2581 */ 2582 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { 2583 i2cdev = i3c_master_find_i2c_dev_by_addr(master, 2584 i2cboardinfo->base.addr); 2585 if (WARN_ON(!i2cdev)) 2586 continue; 2587 i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base); 2588 } 2589 2590 return 0; 2591} 2592 2593static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master) 2594{ 2595 struct i2c_dev_desc *i2cdev; 2596 2597 i2c_del_adapter(&master->i2c); 2598 2599 i3c_bus_for_each_i2cdev(&master->bus, i2cdev) 2600 i2cdev->dev = NULL; 2601} 2602 2603static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master) 2604{ 2605 struct i3c_dev_desc *i3cdev; 2606 2607 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 2608 if (!i3cdev->dev) 2609 continue; 2610 2611 i3cdev->dev->desc = NULL; 2612 if (device_is_registered(&i3cdev->dev->dev)) 2613 device_unregister(&i3cdev->dev->dev); 2614 else 2615 put_device(&i3cdev->dev->dev); 2616 i3cdev->dev = NULL; 2617 } 2618} 2619 2620/** 2621 * i3c_master_queue_ibi() - Queue an IBI 2622 * @dev: the device this IBI is coming from 2623 * @slot: the IBI slot used to store the payload 2624 * 2625 * Queue an IBI to the controller workqueue. The IBI handler attached to 2626 * the dev will be called from a workqueue context. 2627 */ 2628void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot) 2629{ 2630 if (!dev->ibi || !slot) 2631 return; 2632 2633 atomic_inc(&dev->ibi->pending_ibis); 2634 queue_work(dev->ibi->wq, &slot->work); 2635} 2636EXPORT_SYMBOL_GPL(i3c_master_queue_ibi); 2637 2638static void i3c_master_handle_ibi(struct work_struct *work) 2639{ 2640 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot, 2641 work); 2642 struct i3c_dev_desc *dev = slot->dev; 2643 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2644 struct i3c_ibi_payload payload; 2645 2646 payload.data = slot->data; 2647 payload.len = slot->len; 2648 2649 if (dev->dev) 2650 dev->ibi->handler(dev->dev, &payload); 2651 2652 master->ops->recycle_ibi_slot(dev, slot); 2653 if (atomic_dec_and_test(&dev->ibi->pending_ibis)) 2654 complete(&dev->ibi->all_ibis_handled); 2655} 2656 2657static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev, 2658 struct i3c_ibi_slot *slot) 2659{ 2660 slot->dev = dev; 2661 INIT_WORK(&slot->work, i3c_master_handle_ibi); 2662} 2663 2664struct i3c_generic_ibi_slot { 2665 struct list_head node; 2666 struct i3c_ibi_slot base; 2667}; 2668 2669struct i3c_generic_ibi_pool { 2670 spinlock_t lock; 2671 unsigned int num_slots; 2672 struct i3c_generic_ibi_slot *slots; 2673 void *payload_buf; 2674 struct list_head free_slots; 2675 struct list_head pending; 2676}; 2677 2678/** 2679 * i3c_generic_ibi_free_pool() - Free a generic IBI pool 2680 * @pool: the IBI pool to free 2681 * 2682 * Free all IBI slots allated by a generic IBI pool. 2683 */ 2684void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool) 2685{ 2686 struct i3c_generic_ibi_slot *slot; 2687 unsigned int nslots = 0; 2688 2689 while (!list_empty(&pool->free_slots)) { 2690 slot = list_first_entry(&pool->free_slots, 2691 struct i3c_generic_ibi_slot, node); 2692 list_del(&slot->node); 2693 nslots++; 2694 } 2695 2696 /* 2697 * If the number of freed slots is not equal to the number of allocated 2698 * slots we have a leak somewhere. 2699 */ 2700 WARN_ON(nslots != pool->num_slots); 2701 2702 kfree(pool->payload_buf); 2703 kfree(pool->slots); 2704 kfree(pool); 2705} 2706EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool); 2707 2708/** 2709 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool 2710 * @dev: the device this pool will be used for 2711 * @req: IBI setup request describing what the device driver expects 2712 * 2713 * Create a generic IBI pool based on the information provided in @req. 2714 * 2715 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise. 2716 */ 2717struct i3c_generic_ibi_pool * 2718i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev, 2719 const struct i3c_ibi_setup *req) 2720{ 2721 struct i3c_generic_ibi_pool *pool; 2722 struct i3c_generic_ibi_slot *slot; 2723 unsigned int i; 2724 int ret; 2725 2726 pool = kzalloc(sizeof(*pool), GFP_KERNEL); 2727 if (!pool) 2728 return ERR_PTR(-ENOMEM); 2729 2730 spin_lock_init(&pool->lock); 2731 INIT_LIST_HEAD(&pool->free_slots); 2732 INIT_LIST_HEAD(&pool->pending); 2733 2734 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL); 2735 if (!pool->slots) { 2736 ret = -ENOMEM; 2737 goto err_free_pool; 2738 } 2739 2740 if (req->max_payload_len) { 2741 pool->payload_buf = kcalloc(req->num_slots, 2742 req->max_payload_len, GFP_KERNEL); 2743 if (!pool->payload_buf) { 2744 ret = -ENOMEM; 2745 goto err_free_pool; 2746 } 2747 } 2748 2749 for (i = 0; i < req->num_slots; i++) { 2750 slot = &pool->slots[i]; 2751 i3c_master_init_ibi_slot(dev, &slot->base); 2752 2753 if (req->max_payload_len) 2754 slot->base.data = pool->payload_buf + 2755 (i * req->max_payload_len); 2756 2757 list_add_tail(&slot->node, &pool->free_slots); 2758 pool->num_slots++; 2759 } 2760 2761 return pool; 2762 2763err_free_pool: 2764 i3c_generic_ibi_free_pool(pool); 2765 return ERR_PTR(ret); 2766} 2767EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool); 2768 2769/** 2770 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool 2771 * @pool: the pool to query an IBI slot on 2772 * 2773 * Search for a free slot in a generic IBI pool. 2774 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot() 2775 * when it's no longer needed. 2776 * 2777 * Return: a pointer to a free slot, or NULL if there's no free slot available. 2778 */ 2779struct i3c_ibi_slot * 2780i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool) 2781{ 2782 struct i3c_generic_ibi_slot *slot; 2783 unsigned long flags; 2784 2785 spin_lock_irqsave(&pool->lock, flags); 2786 slot = list_first_entry_or_null(&pool->free_slots, 2787 struct i3c_generic_ibi_slot, node); 2788 if (slot) 2789 list_del(&slot->node); 2790 spin_unlock_irqrestore(&pool->lock, flags); 2791 2792 return slot ? &slot->base : NULL; 2793} 2794EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot); 2795 2796/** 2797 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool 2798 * @pool: the pool to return the IBI slot to 2799 * @s: IBI slot to recycle 2800 * 2801 * Add an IBI slot back to its generic IBI pool. Should be called from the 2802 * master driver struct_master_controller_ops->recycle_ibi() method. 2803 */ 2804void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool, 2805 struct i3c_ibi_slot *s) 2806{ 2807 struct i3c_generic_ibi_slot *slot; 2808 unsigned long flags; 2809 2810 if (!s) 2811 return; 2812 2813 slot = container_of(s, struct i3c_generic_ibi_slot, base); 2814 spin_lock_irqsave(&pool->lock, flags); 2815 list_add_tail(&slot->node, &pool->free_slots); 2816 spin_unlock_irqrestore(&pool->lock, flags); 2817} 2818EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot); 2819 2820static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops) 2821{ 2822 if (!ops || !ops->bus_init || !ops->i3c_xfers || 2823 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers) 2824 return -EINVAL; 2825 2826 if (ops->request_ibi && 2827 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi || 2828 !ops->recycle_ibi_slot)) 2829 return -EINVAL; 2830 2831 return 0; 2832} 2833 2834/** 2835 * i3c_master_register() - register an I3C master 2836 * @master: master used to send frames on the bus 2837 * @parent: the parent device (the one that provides this I3C master 2838 * controller) 2839 * @ops: the master controller operations 2840 * @secondary: true if you are registering a secondary master. Will return 2841 * -EOPNOTSUPP if set to true since secondary masters are not yet 2842 * supported 2843 * 2844 * This function takes care of everything for you: 2845 * 2846 * - creates and initializes the I3C bus 2847 * - populates the bus with static I2C devs if @parent->of_node is not 2848 * NULL 2849 * - registers all I3C devices added by the controller during bus 2850 * initialization 2851 * - registers the I2C adapter and all I2C devices 2852 * 2853 * Return: 0 in case of success, a negative error code otherwise. 2854 */ 2855int i3c_master_register(struct i3c_master_controller *master, 2856 struct device *parent, 2857 const struct i3c_master_controller_ops *ops, 2858 bool secondary) 2859{ 2860 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_MAX_RATE; 2861 struct i3c_bus *i3cbus = i3c_master_get_bus(master); 2862 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE; 2863 struct i2c_dev_boardinfo *i2cbi; 2864 int ret; 2865 2866 /* We do not support secondary masters yet. */ 2867 if (secondary) 2868 return -EOPNOTSUPP; 2869 2870 ret = i3c_master_check_ops(ops); 2871 if (ret) 2872 return ret; 2873 2874 master->dev.parent = parent; 2875 master->dev.of_node = of_node_get(parent->of_node); 2876 master->dev.bus = &i3c_bus_type; 2877 master->dev.type = &i3c_masterdev_type; 2878 master->dev.release = i3c_masterdev_release; 2879 master->ops = ops; 2880 master->secondary = secondary; 2881 INIT_LIST_HEAD(&master->boardinfo.i2c); 2882 INIT_LIST_HEAD(&master->boardinfo.i3c); 2883 2884 device_initialize(&master->dev); 2885 2886 master->dev.dma_mask = parent->dma_mask; 2887 master->dev.coherent_dma_mask = parent->coherent_dma_mask; 2888 master->dev.dma_parms = parent->dma_parms; 2889 2890 ret = i3c_bus_init(i3cbus, master->dev.of_node); 2891 if (ret) 2892 goto err_put_dev; 2893 2894 dev_set_name(&master->dev, "i3c-%d", i3cbus->id); 2895 2896 ret = of_populate_i3c_bus(master); 2897 if (ret) 2898 goto err_put_dev; 2899 2900 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) { 2901 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) { 2902 case I3C_LVR_I2C_INDEX(0): 2903 if (mode < I3C_BUS_MODE_MIXED_FAST) 2904 mode = I3C_BUS_MODE_MIXED_FAST; 2905 break; 2906 case I3C_LVR_I2C_INDEX(1): 2907 if (mode < I3C_BUS_MODE_MIXED_LIMITED) 2908 mode = I3C_BUS_MODE_MIXED_LIMITED; 2909 break; 2910 case I3C_LVR_I2C_INDEX(2): 2911 if (mode < I3C_BUS_MODE_MIXED_SLOW) 2912 mode = I3C_BUS_MODE_MIXED_SLOW; 2913 break; 2914 default: 2915 ret = -EINVAL; 2916 goto err_put_dev; 2917 } 2918 2919 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE) 2920 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_MAX_RATE; 2921 } 2922 2923 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate); 2924 if (ret) 2925 goto err_put_dev; 2926 2927 master->wq = alloc_workqueue("%s", WQ_PERCPU, 0, dev_name(parent)); 2928 if (!master->wq) { 2929 ret = -ENOMEM; 2930 goto err_put_dev; 2931 } 2932 2933 ret = i3c_master_bus_init(master); 2934 if (ret) 2935 goto err_put_dev; 2936 2937 ret = device_add(&master->dev); 2938 if (ret) 2939 goto err_cleanup_bus; 2940 2941 /* 2942 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed 2943 * through the I2C subsystem. 2944 */ 2945 ret = i3c_master_i2c_adapter_init(master); 2946 if (ret) 2947 goto err_del_dev; 2948 2949 i3c_bus_notify(i3cbus, I3C_NOTIFY_BUS_ADD); 2950 2951 pm_runtime_no_callbacks(&master->dev); 2952 pm_suspend_ignore_children(&master->dev, true); 2953 pm_runtime_enable(&master->dev); 2954 2955 /* 2956 * We're done initializing the bus and the controller, we can now 2957 * register I3C devices discovered during the initial DAA. 2958 */ 2959 master->init_done = true; 2960 i3c_bus_normaluse_lock(&master->bus); 2961 i3c_master_register_new_i3c_devs(master); 2962 i3c_bus_normaluse_unlock(&master->bus); 2963 2964 return 0; 2965 2966err_del_dev: 2967 device_del(&master->dev); 2968 2969err_cleanup_bus: 2970 i3c_master_bus_cleanup(master); 2971 2972err_put_dev: 2973 put_device(&master->dev); 2974 2975 return ret; 2976} 2977EXPORT_SYMBOL_GPL(i3c_master_register); 2978 2979/** 2980 * i3c_master_unregister() - unregister an I3C master 2981 * @master: master used to send frames on the bus 2982 * 2983 * Basically undo everything done in i3c_master_register(). 2984 */ 2985void i3c_master_unregister(struct i3c_master_controller *master) 2986{ 2987 i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE); 2988 2989 i3c_master_i2c_adapter_cleanup(master); 2990 i3c_master_unregister_i3c_devs(master); 2991 i3c_master_bus_cleanup(master); 2992 pm_runtime_disable(&master->dev); 2993 device_unregister(&master->dev); 2994} 2995EXPORT_SYMBOL_GPL(i3c_master_unregister); 2996 2997int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev) 2998{ 2999 struct i3c_master_controller *master; 3000 3001 if (!dev) 3002 return -ENOENT; 3003 3004 master = i3c_dev_get_master(dev); 3005 if (!master) 3006 return -EINVAL; 3007 3008 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr || 3009 !dev->boardinfo->static_addr) 3010 return -EINVAL; 3011 3012 return i3c_master_setdasa_locked(master, dev->info.static_addr, 3013 dev->boardinfo->init_dyn_addr); 3014} 3015 3016int i3c_dev_do_xfers_locked(struct i3c_dev_desc *dev, struct i3c_xfer *xfers, 3017 int nxfers, enum i3c_xfer_mode mode) 3018{ 3019 struct i3c_master_controller *master; 3020 3021 if (!dev) 3022 return -ENOENT; 3023 3024 master = i3c_dev_get_master(dev); 3025 if (!master || !xfers) 3026 return -EINVAL; 3027 3028 if (mode != I3C_SDR && !(master->this->info.hdr_cap & BIT(mode))) 3029 return -EOPNOTSUPP; 3030 3031 return master->ops->i3c_xfers(dev, xfers, nxfers, mode); 3032} 3033 3034int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev) 3035{ 3036 struct i3c_master_controller *master; 3037 int ret; 3038 3039 if (!dev->ibi) 3040 return -EINVAL; 3041 3042 master = i3c_dev_get_master(dev); 3043 ret = master->ops->disable_ibi(dev); 3044 if (ret) 3045 return ret; 3046 3047 reinit_completion(&dev->ibi->all_ibis_handled); 3048 if (atomic_read(&dev->ibi->pending_ibis)) 3049 wait_for_completion(&dev->ibi->all_ibis_handled); 3050 3051 dev->ibi->enabled = false; 3052 3053 return 0; 3054} 3055 3056int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev) 3057{ 3058 struct i3c_master_controller *master = i3c_dev_get_master(dev); 3059 int ret; 3060 3061 if (!dev->ibi) 3062 return -EINVAL; 3063 3064 ret = master->ops->enable_ibi(dev); 3065 if (!ret) 3066 dev->ibi->enabled = true; 3067 3068 return ret; 3069} 3070 3071int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev, 3072 const struct i3c_ibi_setup *req) 3073{ 3074 struct i3c_master_controller *master = i3c_dev_get_master(dev); 3075 struct i3c_device_ibi_info *ibi; 3076 int ret; 3077 3078 if (!master->ops->request_ibi) 3079 return -EOPNOTSUPP; 3080 3081 if (dev->ibi) 3082 return -EBUSY; 3083 3084 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL); 3085 if (!ibi) 3086 return -ENOMEM; 3087 3088 ibi->wq = alloc_ordered_workqueue(dev_name(i3cdev_to_dev(dev->dev)), WQ_MEM_RECLAIM); 3089 if (!ibi->wq) { 3090 kfree(ibi); 3091 return -ENOMEM; 3092 } 3093 3094 atomic_set(&ibi->pending_ibis, 0); 3095 init_completion(&ibi->all_ibis_handled); 3096 ibi->handler = req->handler; 3097 ibi->max_payload_len = req->max_payload_len; 3098 ibi->num_slots = req->num_slots; 3099 3100 dev->ibi = ibi; 3101 ret = master->ops->request_ibi(dev, req); 3102 if (ret) { 3103 kfree(ibi); 3104 dev->ibi = NULL; 3105 } 3106 3107 return ret; 3108} 3109 3110void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev) 3111{ 3112 struct i3c_master_controller *master = i3c_dev_get_master(dev); 3113 3114 if (!dev->ibi) 3115 return; 3116 3117 if (WARN_ON(dev->ibi->enabled)) 3118 WARN_ON(i3c_dev_disable_ibi_locked(dev)); 3119 3120 master->ops->free_ibi(dev); 3121 3122 if (dev->ibi->wq) { 3123 destroy_workqueue(dev->ibi->wq); 3124 dev->ibi->wq = NULL; 3125 } 3126 3127 kfree(dev->ibi); 3128 dev->ibi = NULL; 3129} 3130 3131static int __init i3c_init(void) 3132{ 3133 int res; 3134 3135 res = of_alias_get_highest_id("i3c"); 3136 if (res >= 0) { 3137 mutex_lock(&i3c_core_lock); 3138 __i3c_first_dynamic_bus_num = res + 1; 3139 mutex_unlock(&i3c_core_lock); 3140 } 3141 3142 res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier); 3143 if (res) 3144 return res; 3145 3146 res = bus_register(&i3c_bus_type); 3147 if (res) 3148 goto out_unreg_notifier; 3149 3150 return 0; 3151 3152out_unreg_notifier: 3153 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier); 3154 3155 return res; 3156} 3157subsys_initcall(i3c_init); 3158 3159static void __exit i3c_exit(void) 3160{ 3161 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier); 3162 idr_destroy(&i3c_bus_idr); 3163 bus_unregister(&i3c_bus_type); 3164} 3165module_exit(i3c_exit); 3166 3167MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>"); 3168MODULE_DESCRIPTION("I3C core"); 3169MODULE_LICENSE("GPL v2");
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