pt5161l.c

  1// SPDX-License-Identifier: GPL-2.0-or-later
  2
  3#include <linux/debugfs.h>
  4#include <linux/delay.h>
  5#include <linux/err.h>
  6#include <linux/i2c.h>
  7#include <linux/init.h>
  8#include <linux/hwmon.h>
  9#include <linux/module.h>
 10#include <linux/mutex.h>
 11
 12/* Aries current average temp ADC code CSR */
 13#define ARIES_CURRENT_AVG_TEMP_ADC_CSR	0x42c
 14
 15/* Device Load check register */
 16#define ARIES_CODE_LOAD_REG	0x605
 17/* Value indicating FW was loaded properly, [3:1] = 3'b111 */
 18#define ARIES_LOAD_CODE	0xe
 19
 20/* Main Micro Heartbeat register */
 21#define ARIES_MM_HEARTBEAT_ADDR	0x923
 22
 23/* Reg offset to specify Address for MM assisted accesses */
 24#define ARIES_MM_ASSIST_REG_ADDR_OFFSET	0xd99
 25/* Reg offset to specify Command for MM assisted accesses */
 26#define ARIES_MM_ASSIST_CMD_OFFSET	0xd9d
 27/* Reg offset to MM SPARE 0 used specify Address[7:0] */
 28#define ARIES_MM_ASSIST_SPARE_0_OFFSET	0xd9f
 29/* Reg offset to MM SPARE 3 used specify Data Byte 0 */
 30#define ARIES_MM_ASSIST_SPARE_3_OFFSET	0xda2
 31/* Wide register reads */
 32#define ARIES_MM_RD_WIDE_REG_2B	0x1d
 33#define ARIES_MM_RD_WIDE_REG_3B	0x1e
 34#define ARIES_MM_RD_WIDE_REG_4B	0x1f
 35#define ARIES_MM_RD_WIDE_REG_5B	0x20
 36
 37/* Time delay between checking MM status of EEPROM write (microseconds) */
 38#define ARIES_MM_STATUS_TIME	5000
 39
 40/* AL Main SRAM DMEM offset (A0) */
 41#define AL_MAIN_SRAM_DMEM_OFFSET	(64 * 1024)
 42/* SRAM read command */
 43#define AL_TG_RD_LOC_IND_SRAM	0x16
 44
 45/* Offset for main micro FW info */
 46#define ARIES_MAIN_MICRO_FW_INFO	(96 * 1024 - 128)
 47/* FW Info (Major) offset location in struct */
 48#define ARIES_MM_FW_VERSION_MAJOR	0
 49/* FW Info (Minor) offset location in struct */
 50#define ARIES_MM_FW_VERSION_MINOR	1
 51/* FW Info (Build no.) offset location in struct */
 52#define ARIES_MM_FW_VERSION_BUILD	2
 53
 54#define ARIES_TEMP_CAL_CODE_DEFAULT	84
 55
 56/* Struct defining FW version loaded on an Aries device */
 57struct pt5161l_fw_ver {
 58	u8 major;
 59	u8 minor;
 60	u16 build;
 61};
 62
 63/* Each client has this additional data */
 64struct pt5161l_data {
 65	struct i2c_client *client;
 66	struct pt5161l_fw_ver fw_ver;
 67	struct mutex lock; /* for atomic I2C transactions */
 68	bool init_done;
 69	bool code_load_okay; /* indicate if code load reg value is expected */
 70	bool mm_heartbeat_okay; /* indicate if Main Micro heartbeat is good */
 71	bool mm_wide_reg_access; /* MM assisted wide register access */
 72};
 73
 74/*
 75 * Write multiple data bytes to Aries over I2C
 76 */
 77static int pt5161l_write_block_data(struct pt5161l_data *data, u32 address,
 78				    u8 len, u8 *val)
 79{
 80	struct i2c_client *client = data->client;
 81	int ret;
 82	u8 remain_len = len;
 83	u8 xfer_len, curr_len;
 84	u8 buf[16];
 85	u8 cmd = 0x0F; /* [7]:pec_en, [4:2]:func, [1]:start, [0]:end */
 86	u8 config = 0x40; /* [6]:cfg_type, [4:1]:burst_len, [0]:address bit16 */
 87
 88	while (remain_len > 0) {
 89		if (remain_len > 4) {
 90			curr_len = 4;
 91			remain_len -= 4;
 92		} else {
 93			curr_len = remain_len;
 94			remain_len = 0;
 95		}
 96
 97		buf[0] = config | (curr_len - 1) << 1 | ((address >> 16) & 0x1);
 98		buf[1] = (address >> 8) & 0xff;
 99		buf[2] = address & 0xff;
100		memcpy(&buf[3], val, curr_len);
101
102		xfer_len = 3 + curr_len;
103		ret = i2c_smbus_write_block_data(client, cmd, xfer_len, buf);
104		if (ret)
105			return ret;
106
107		val += curr_len;
108		address += curr_len;
109	}
110
111	return 0;
112}
113
114/*
115 * Read multiple data bytes from Aries over I2C
116 */
117static int pt5161l_read_block_data(struct pt5161l_data *data, u32 address,
118				   u8 len, u8 *val)
119{
120	struct i2c_client *client = data->client;
121	int ret, tries;
122	u8 remain_len = len;
123	u8 curr_len;
124	u8 wbuf[16], rbuf[24];
125	u8 cmd = 0x08; /* [7]:pec_en, [4:2]:func, [1]:start, [0]:end */
126	u8 config = 0x00; /* [6]:cfg_type, [4:1]:burst_len, [0]:address bit16 */
127
128	while (remain_len > 0) {
129		if (remain_len > 16) {
130			curr_len = 16;
131			remain_len -= 16;
132		} else {
133			curr_len = remain_len;
134			remain_len = 0;
135		}
136
137		wbuf[0] = config | (curr_len - 1) << 1 |
138			  ((address >> 16) & 0x1);
139		wbuf[1] = (address >> 8) & 0xff;
140		wbuf[2] = address & 0xff;
141
142		for (tries = 0; tries < 3; tries++) {
143			ret = i2c_smbus_write_block_data(client, (cmd | 0x2), 3,
144							 wbuf);
145			if (ret)
146				return ret;
147
148			ret = i2c_smbus_read_block_data(client, (cmd | 0x1),
149							rbuf);
150			if (ret == curr_len)
151				break;
152		}
153		if (tries >= 3)
154			return ret;
155
156		memcpy(val, rbuf, curr_len);
157		val += curr_len;
158		address += curr_len;
159	}
160
161	return 0;
162}
163
164static int pt5161l_read_wide_reg(struct pt5161l_data *data, u32 address,
165				 u8 width, u8 *val)
166{
167	int ret, tries;
168	u8 buf[8];
169	u8 status;
170
171	/*
172	 * Safely access wide registers using mailbox method to prevent
173	 * risking conflict with Aries firmware; otherwise fallback to
174	 * legacy, less secure method.
175	 */
176	if (data->mm_wide_reg_access) {
177		buf[0] = address & 0xff;
178		buf[1] = (address >> 8) & 0xff;
179		buf[2] = (address >> 16) & 0x1;
180		ret = pt5161l_write_block_data(data,
181					       ARIES_MM_ASSIST_SPARE_0_OFFSET,
182					       3, buf);
183		if (ret)
184			return ret;
185
186		/* Set command based on width */
187		switch (width) {
188		case 2:
189			buf[0] = ARIES_MM_RD_WIDE_REG_2B;
190			break;
191		case 3:
192			buf[0] = ARIES_MM_RD_WIDE_REG_3B;
193			break;
194		case 4:
195			buf[0] = ARIES_MM_RD_WIDE_REG_4B;
196			break;
197		case 5:
198			buf[0] = ARIES_MM_RD_WIDE_REG_5B;
199			break;
200		default:
201			return -EINVAL;
202		}
203		ret = pt5161l_write_block_data(data, ARIES_MM_ASSIST_CMD_OFFSET,
204					       1, buf);
205		if (ret)
206			return ret;
207
208		status = 0xff;
209		for (tries = 0; tries < 100; tries++) {
210			ret = pt5161l_read_block_data(data,
211						      ARIES_MM_ASSIST_CMD_OFFSET,
212						      1, &status);
213			if (ret)
214				return ret;
215
216			if (status == 0)
217				break;
218
219			usleep_range(ARIES_MM_STATUS_TIME,
220				     ARIES_MM_STATUS_TIME + 1000);
221		}
222		if (status != 0)
223			return -ETIMEDOUT;
224
225		ret = pt5161l_read_block_data(data,
226					      ARIES_MM_ASSIST_SPARE_3_OFFSET,
227					      width, val);
228		if (ret)
229			return ret;
230	} else {
231		return pt5161l_read_block_data(data, address, width, val);
232	}
233
234	return 0;
235}
236
237/*
238 * Read multiple (up to eight) data bytes from micro SRAM over I2C
239 */
240static int
241pt5161l_read_block_data_main_micro_indirect(struct pt5161l_data *data,
242					    u32 address, u8 len, u8 *val)
243{
244	int ret, tries;
245	u8 buf[8];
246	u8 i, status;
247	u32 uind_offs = ARIES_MM_ASSIST_REG_ADDR_OFFSET;
248	u32 eeprom_base, eeprom_addr;
249
250	/* No multi-byte indirect support here. Hence read a byte at a time */
251	eeprom_base = address - AL_MAIN_SRAM_DMEM_OFFSET;
252	for (i = 0; i < len; i++) {
253		eeprom_addr = eeprom_base + i;
254		buf[0] = eeprom_addr & 0xff;
255		buf[1] = (eeprom_addr >> 8) & 0xff;
256		buf[2] = (eeprom_addr >> 16) & 0xff;
257		ret = pt5161l_write_block_data(data, uind_offs, 3, buf);
258		if (ret)
259			return ret;
260
261		buf[0] = AL_TG_RD_LOC_IND_SRAM;
262		ret = pt5161l_write_block_data(data, uind_offs + 4, 1, buf);
263		if (ret)
264			return ret;
265
266		status = 0xff;
267		for (tries = 0; tries < 255; tries++) {
268			ret = pt5161l_read_block_data(data, uind_offs + 4, 1,
269						      &status);
270			if (ret)
271				return ret;
272
273			if (status == 0)
274				break;
275		}
276		if (status != 0)
277			return -ETIMEDOUT;
278
279		ret = pt5161l_read_block_data(data, uind_offs + 3, 1, buf);
280		if (ret)
281			return ret;
282
283		val[i] = buf[0];
284	}
285
286	return 0;
287}
288
289/*
290 * Check firmware load status
291 */
292static int pt5161l_fw_load_check(struct pt5161l_data *data)
293{
294	int ret;
295	u8 buf[8];
296
297	ret = pt5161l_read_block_data(data, ARIES_CODE_LOAD_REG, 1, buf);
298	if (ret)
299		return ret;
300
301	if (buf[0] < ARIES_LOAD_CODE) {
302		dev_dbg(&data->client->dev,
303			"Code Load reg unexpected. Not all modules are loaded %x\n",
304			buf[0]);
305		data->code_load_okay = false;
306	} else {
307		data->code_load_okay = true;
308	}
309
310	return 0;
311}
312
313/*
314 * Check main micro heartbeat
315 */
316static int pt5161l_heartbeat_check(struct pt5161l_data *data)
317{
318	int ret, tries;
319	u8 buf[8];
320	u8 heartbeat;
321	bool hb_changed = false;
322
323	ret = pt5161l_read_block_data(data, ARIES_MM_HEARTBEAT_ADDR, 1, buf);
324	if (ret)
325		return ret;
326
327	heartbeat = buf[0];
328	for (tries = 0; tries < 100; tries++) {
329		ret = pt5161l_read_block_data(data, ARIES_MM_HEARTBEAT_ADDR, 1,
330					      buf);
331		if (ret)
332			return ret;
333
334		if (buf[0] != heartbeat) {
335			hb_changed = true;
336			break;
337		}
338	}
339	data->mm_heartbeat_okay = hb_changed;
340
341	return 0;
342}
343
344/*
345 * Check the status of firmware
346 */
347static int pt5161l_fwsts_check(struct pt5161l_data *data)
348{
349	int ret;
350	u8 buf[8];
351	u8 major = 0, minor = 0;
352	u16 build = 0;
353
354	ret = pt5161l_fw_load_check(data);
355	if (ret)
356		return ret;
357
358	ret = pt5161l_heartbeat_check(data);
359	if (ret)
360		return ret;
361
362	if (data->code_load_okay && data->mm_heartbeat_okay) {
363		ret = pt5161l_read_block_data_main_micro_indirect(data, ARIES_MAIN_MICRO_FW_INFO +
364								  ARIES_MM_FW_VERSION_MAJOR,
365								  1, &major);
366		if (ret)
367			return ret;
368
369		ret = pt5161l_read_block_data_main_micro_indirect(data, ARIES_MAIN_MICRO_FW_INFO +
370								  ARIES_MM_FW_VERSION_MINOR,
371								  1, &minor);
372		if (ret)
373			return ret;
374
375		ret = pt5161l_read_block_data_main_micro_indirect(data, ARIES_MAIN_MICRO_FW_INFO +
376								  ARIES_MM_FW_VERSION_BUILD,
377								  2, buf);
378		if (ret)
379			return ret;
380		build = buf[1] << 8 | buf[0];
381	}
382	data->fw_ver.major = major;
383	data->fw_ver.minor = minor;
384	data->fw_ver.build = build;
385
386	return 0;
387}
388
389static int pt5161l_fw_is_at_least(struct pt5161l_data *data, u8 major, u8 minor,
390				  u16 build)
391{
392	u32 ver = major << 24 | minor << 16 | build;
393	u32 curr_ver = data->fw_ver.major << 24 | data->fw_ver.minor << 16 |
394		       data->fw_ver.build;
395
396	if (curr_ver >= ver)
397		return true;
398
399	return false;
400}
401
402static int pt5161l_init_dev(struct pt5161l_data *data)
403{
404	int ret;
405
406	mutex_lock(&data->lock);
407	ret = pt5161l_fwsts_check(data);
408	mutex_unlock(&data->lock);
409	if (ret)
410		return ret;
411
412	/* Firmware 2.2.0 enables safe access to wide registers */
413	if (pt5161l_fw_is_at_least(data, 2, 2, 0))
414		data->mm_wide_reg_access = true;
415
416	data->init_done = true;
417
418	return 0;
419}
420
421static int pt5161l_read(struct device *dev, enum hwmon_sensor_types type,
422			u32 attr, int channel, long *val)
423{
424	struct pt5161l_data *data = dev_get_drvdata(dev);
425	int ret;
426	u8 buf[8];
427	u32 adc_code;
428
429	switch (attr) {
430	case hwmon_temp_input:
431		if (!data->init_done) {
432			ret = pt5161l_init_dev(data);
433			if (ret)
434				return ret;
435		}
436
437		mutex_lock(&data->lock);
438		ret = pt5161l_read_wide_reg(data,
439					    ARIES_CURRENT_AVG_TEMP_ADC_CSR, 4,
440					    buf);
441		mutex_unlock(&data->lock);
442		if (ret) {
443			dev_dbg(dev, "Read adc_code failed %d\n", ret);
444			return ret;
445		}
446
447		adc_code = buf[3] << 24 | buf[2] << 16 | buf[1] << 8 | buf[0];
448		if (adc_code == 0 || adc_code >= 0x3ff) {
449			dev_dbg(dev, "Invalid adc_code %x\n", adc_code);
450			return -EIO;
451		}
452
453		*val = 110000 +
454		       ((adc_code - (ARIES_TEMP_CAL_CODE_DEFAULT + 250)) *
455			-320);
456		break;
457	default:
458		return -EOPNOTSUPP;
459	}
460
461	return 0;
462}
463
464static umode_t pt5161l_is_visible(const void *data,
465				  enum hwmon_sensor_types type, u32 attr,
466				  int channel)
467{
468	switch (attr) {
469	case hwmon_temp_input:
470		return 0444;
471	default:
472		break;
473	}
474
475	return 0;
476}
477
478static const struct hwmon_channel_info *pt5161l_info[] = {
479	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
480	NULL
481};
482
483static const struct hwmon_ops pt5161l_hwmon_ops = {
484	.is_visible = pt5161l_is_visible,
485	.read = pt5161l_read,
486};
487
488static const struct hwmon_chip_info pt5161l_chip_info = {
489	.ops = &pt5161l_hwmon_ops,
490	.info = pt5161l_info,
491};
492
493static ssize_t pt5161l_debugfs_read_fw_ver(struct file *file, char __user *buf,
494					   size_t count, loff_t *ppos)
495{
496	struct pt5161l_data *data = file->private_data;
497	int ret;
498	char ver[32];
499
500	mutex_lock(&data->lock);
501	ret = pt5161l_fwsts_check(data);
502	mutex_unlock(&data->lock);
503	if (ret)
504		return ret;
505
506	ret = snprintf(ver, sizeof(ver), "%u.%u.%u\n", data->fw_ver.major,
507		       data->fw_ver.minor, data->fw_ver.build);
508
509	return simple_read_from_buffer(buf, count, ppos, ver, ret);
510}
511
512static const struct file_operations pt5161l_debugfs_ops_fw_ver = {
513	.read = pt5161l_debugfs_read_fw_ver,
514	.open = simple_open,
515};
516
517static ssize_t pt5161l_debugfs_read_fw_load_sts(struct file *file,
518						char __user *buf, size_t count,
519						loff_t *ppos)
520{
521	struct pt5161l_data *data = file->private_data;
522	int ret;
523	bool status = false;
524	char health[16];
525
526	mutex_lock(&data->lock);
527	ret = pt5161l_fw_load_check(data);
528	mutex_unlock(&data->lock);
529	if (ret == 0)
530		status = data->code_load_okay;
531
532	ret = snprintf(health, sizeof(health), "%s\n",
533		       status ? "normal" : "abnormal");
534
535	return simple_read_from_buffer(buf, count, ppos, health, ret);
536}
537
538static const struct file_operations pt5161l_debugfs_ops_fw_load_sts = {
539	.read = pt5161l_debugfs_read_fw_load_sts,
540	.open = simple_open,
541};
542
543static ssize_t pt5161l_debugfs_read_hb_sts(struct file *file, char __user *buf,
544					   size_t count, loff_t *ppos)
545{
546	struct pt5161l_data *data = file->private_data;
547	int ret;
548	bool status = false;
549	char health[16];
550
551	mutex_lock(&data->lock);
552	ret = pt5161l_heartbeat_check(data);
553	mutex_unlock(&data->lock);
554	if (ret == 0)
555		status = data->mm_heartbeat_okay;
556
557	ret = snprintf(health, sizeof(health), "%s\n",
558		       status ? "normal" : "abnormal");
559
560	return simple_read_from_buffer(buf, count, ppos, health, ret);
561}
562
563static const struct file_operations pt5161l_debugfs_ops_hb_sts = {
564	.read = pt5161l_debugfs_read_hb_sts,
565	.open = simple_open,
566};
567
568static void pt5161l_init_debugfs(struct i2c_client *client, struct pt5161l_data *data)
569{
570	debugfs_create_file("fw_ver", 0444, client->debugfs, data,
571			    &pt5161l_debugfs_ops_fw_ver);
572
573	debugfs_create_file("fw_load_status", 0444, client->debugfs, data,
574			    &pt5161l_debugfs_ops_fw_load_sts);
575
576	debugfs_create_file("heartbeat_status", 0444, client->debugfs, data,
577			    &pt5161l_debugfs_ops_hb_sts);
578}
579
580static int pt5161l_probe(struct i2c_client *client)
581{
582	struct device *dev = &client->dev;
583	struct device *hwmon_dev;
584	struct pt5161l_data *data;
585
586	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
587	if (!data)
588		return -ENOMEM;
589
590	data->client = client;
591	mutex_init(&data->lock);
592	pt5161l_init_dev(data);
593	dev_set_drvdata(dev, data);
594
595	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
596							 data,
597							 &pt5161l_chip_info,
598							 NULL);
599	if (IS_ERR(hwmon_dev))
600		return PTR_ERR(hwmon_dev);
601
602	pt5161l_init_debugfs(client, data);
603
604	return 0;
605}
606
607static const struct of_device_id __maybe_unused pt5161l_of_match[] = {
608	{ .compatible = "asteralabs,pt5161l" },
609	{},
610};
611MODULE_DEVICE_TABLE(of, pt5161l_of_match);
612
613static const struct acpi_device_id __maybe_unused pt5161l_acpi_match[] = {
614	{ "PT5161L", 0 },
615	{},
616};
617MODULE_DEVICE_TABLE(acpi, pt5161l_acpi_match);
618
619static const struct i2c_device_id pt5161l_id[] = {
620	{ "pt5161l" },
621	{}
622};
623MODULE_DEVICE_TABLE(i2c, pt5161l_id);
624
625static struct i2c_driver pt5161l_driver = {
626	.class = I2C_CLASS_HWMON,
627	.driver = {
628		.name = "pt5161l",
629		.of_match_table = of_match_ptr(pt5161l_of_match),
630		.acpi_match_table = ACPI_PTR(pt5161l_acpi_match),
631	},
632	.probe = pt5161l_probe,
633	.id_table = pt5161l_id,
634};
635module_i2c_driver(pt5161l_driver);
636
637MODULE_AUTHOR("Cosmo Chou <cosmo.chou@quantatw.com>");
638MODULE_DESCRIPTION("Hwmon driver for Astera Labs Aries PCIe retimer");
639MODULE_LICENSE("GPL");