lm95234.c

  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * Driver for Texas Instruments / National Semiconductor LM95234
  4 *
  5 * Copyright (c) 2013, 2014 Guenter Roeck <linux@roeck-us.net>
  6 *
  7 * Derived from lm95241.c
  8 * Copyright (C) 2008, 2010 Davide Rizzo <elpa.rizzo@gmail.com>
  9 */
 10
 11#include <linux/err.h>
 12#include <linux/hwmon.h>
 13#include <linux/i2c.h>
 14#include <linux/init.h>
 15#include <linux/module.h>
 16#include <linux/slab.h>
 17#include <linux/regmap.h>
 18#include <linux/util_macros.h>
 19
 20#define DRVNAME "lm95234"
 21
 22enum chips { lm95233, lm95234 };
 23
 24static const unsigned short normal_i2c[] = {
 25	0x18, 0x2a, 0x2b, 0x4d, 0x4e, I2C_CLIENT_END };
 26
 27/* LM95234 registers */
 28#define LM95234_REG_MAN_ID		0xFE
 29#define LM95234_REG_CHIP_ID		0xFF
 30#define LM95234_REG_STATUS		0x02
 31#define LM95234_REG_CONFIG		0x03
 32#define LM95234_REG_CONVRATE		0x04
 33#define LM95234_REG_ENABLE		0x05
 34#define LM95234_REG_FILTER		0x06
 35#define LM95234_REG_STS_FAULT		0x07
 36#define LM95234_REG_STS_TCRIT1		0x08
 37#define LM95234_REG_STS_TCRIT2		0x09
 38#define LM95234_REG_TEMPH(x)		((x) + 0x10)
 39#define LM95234_REG_TEMPL(x)		((x) + 0x20)
 40#define LM95234_REG_UTEMPH(x)		((x) + 0x19)	/* Remote only */
 41#define LM95234_REG_UTEMPL(x)		((x) + 0x29)
 42#define LM95234_REG_REM_MODEL		0x30
 43#define LM95234_REG_REM_MODEL_STS	0x38
 44#define LM95234_REG_OFFSET(x)		((x) + 0x31)	/* Remote only */
 45#define LM95234_REG_TCRIT1(x)		((x) + 0x40)
 46#define LM95234_REG_TCRIT2(x)		((x) + 0x49)	/* Remote channel 1,2 */
 47#define LM95234_REG_TCRIT_HYST		0x5a
 48
 49#define NATSEMI_MAN_ID			0x01
 50#define LM95233_CHIP_ID			0x89
 51#define LM95234_CHIP_ID			0x79
 52
 53/* Client data (each client gets its own) */
 54struct lm95234_data {
 55	struct regmap *regmap;
 56	enum chips type;
 57};
 58
 59static int lm95234_read_temp(struct regmap *regmap, int index, long *t)
 60{
 61	unsigned int regs[2];
 62	int temp = 0, ret;
 63	u8 regvals[2];
 64
 65	if (index) {
 66		regs[0] = LM95234_REG_UTEMPH(index - 1);
 67		regs[1] = LM95234_REG_UTEMPL(index - 1);
 68		ret = regmap_multi_reg_read(regmap, regs, regvals, 2);
 69		if (ret)
 70			return ret;
 71		temp = (regvals[0] << 8) | regvals[1];
 72	}
 73	/*
 74	 * Read signed temperature if unsigned temperature is 0,
 75	 * or if this is the local sensor.
 76	 */
 77	if (!temp) {
 78		regs[0] = LM95234_REG_TEMPH(index);
 79		regs[1] = LM95234_REG_TEMPL(index);
 80		ret = regmap_multi_reg_read(regmap, regs, regvals, 2);
 81		if (ret)
 82			return ret;
 83		temp = (regvals[0] << 8) | regvals[1];
 84		temp = sign_extend32(temp, 15);
 85	}
 86	*t = DIV_ROUND_CLOSEST(temp * 125, 32);
 87	return 0;
 88}
 89
 90static int lm95234_hyst_get(struct regmap *regmap, int reg, long *val)
 91{
 92	unsigned int regs[2] = {reg, LM95234_REG_TCRIT_HYST};
 93	u8 regvals[2];
 94	int ret;
 95
 96	ret = regmap_multi_reg_read(regmap, regs, regvals, 2);
 97	if (ret)
 98		return ret;
 99	*val = (regvals[0] - regvals[1]) * 1000;
100	return 0;
101}
102
103static ssize_t lm95234_hyst_set(struct lm95234_data *data, long val)
104{
105	u32 tcrit;
106	int ret;
107
108	ret = regmap_read(data->regmap, LM95234_REG_TCRIT1(0), &tcrit);
109	if (ret)
110		return ret;
111
112	val = DIV_ROUND_CLOSEST(clamp_val(val, -255000, 255000), 1000);
113	val = clamp_val((int)tcrit - val, 0, 31);
114
115	return regmap_write(data->regmap, LM95234_REG_TCRIT_HYST, val);
116}
117
118static int lm95234_crit_reg(int channel)
119{
120	if (channel == 1 || channel == 2)
121		return LM95234_REG_TCRIT2(channel - 1);
122	return LM95234_REG_TCRIT1(channel);
123}
124
125static int lm95234_temp_write(struct device *dev, u32 attr, int channel, long val)
126{
127	struct lm95234_data *data = dev_get_drvdata(dev);
128	struct regmap *regmap = data->regmap;
129
130	switch (attr) {
131	case hwmon_temp_enable:
132		if (val && val != 1)
133			return -EINVAL;
134		return regmap_update_bits(regmap, LM95234_REG_ENABLE,
135					  BIT(channel), val ? BIT(channel) : 0);
136	case hwmon_temp_type:
137		if (val != 1 && val != 2)
138			return -EINVAL;
139		return regmap_update_bits(regmap, LM95234_REG_REM_MODEL,
140					  BIT(channel),
141					  val == 1 ? BIT(channel) : 0);
142	case hwmon_temp_offset:
143		val = DIV_ROUND_CLOSEST(clamp_val(val, -64000, 63500), 500);
144		return regmap_write(regmap, LM95234_REG_OFFSET(channel - 1), val);
145	case hwmon_temp_max:
146		val = clamp_val(val, 0, channel == 1 ? 127000 : 255000);
147		val = DIV_ROUND_CLOSEST(val, 1000);
148		return regmap_write(regmap, lm95234_crit_reg(channel), val);
149	case hwmon_temp_max_hyst:
150		return lm95234_hyst_set(data, val);
151	case hwmon_temp_crit:
152		val = DIV_ROUND_CLOSEST(clamp_val(val, 0, 255000), 1000);
153		return regmap_write(regmap, LM95234_REG_TCRIT1(channel), val);
154	default:
155		return -EOPNOTSUPP;
156	}
157	return 0;
158}
159
160static int lm95234_alarm_reg(int channel)
161{
162	if (channel == 1 || channel == 2)
163		return LM95234_REG_STS_TCRIT2;
164	return LM95234_REG_STS_TCRIT1;
165}
166
167static int lm95234_temp_read(struct device *dev, u32 attr, int channel, long *val)
168{
169	struct lm95234_data *data = dev_get_drvdata(dev);
170	struct regmap *regmap = data->regmap;
171	u32 regval, mask;
172	int ret;
173
174	switch (attr) {
175	case hwmon_temp_enable:
176		ret = regmap_read(regmap, LM95234_REG_ENABLE, &regval);
177		if (ret)
178			return ret;
179		*val = !!(regval & BIT(channel));
180		break;
181	case hwmon_temp_input:
182		return lm95234_read_temp(regmap, channel, val);
183	case hwmon_temp_max_alarm:
184		ret =  regmap_read(regmap, lm95234_alarm_reg(channel), &regval);
185		if (ret)
186			return ret;
187		*val = !!(regval & BIT(channel));
188		break;
189	case hwmon_temp_crit_alarm:
190		ret =  regmap_read(regmap, LM95234_REG_STS_TCRIT1, &regval);
191		if (ret)
192			return ret;
193		*val = !!(regval & BIT(channel));
194		break;
195	case hwmon_temp_crit_hyst:
196		return lm95234_hyst_get(regmap, LM95234_REG_TCRIT1(channel), val);
197	case hwmon_temp_type:
198		ret = regmap_read(regmap, LM95234_REG_REM_MODEL, &regval);
199		if (ret)
200			return ret;
201		*val = (regval & BIT(channel)) ? 1 : 2;
202		break;
203	case hwmon_temp_offset:
204		ret = regmap_read(regmap, LM95234_REG_OFFSET(channel - 1), &regval);
205		if (ret)
206			return ret;
207		*val = sign_extend32(regval, 7) * 500;
208		break;
209	case hwmon_temp_fault:
210		ret = regmap_read(regmap, LM95234_REG_STS_FAULT, &regval);
211		if (ret)
212			return ret;
213		mask = (BIT(0) | BIT(1)) << ((channel - 1) << 1);
214		*val = !!(regval & mask);
215		break;
216	case hwmon_temp_max:
217		ret = regmap_read(regmap, lm95234_crit_reg(channel), &regval);
218		if (ret)
219			return ret;
220		*val = regval * 1000;
221		break;
222	case hwmon_temp_max_hyst:
223		return lm95234_hyst_get(regmap, lm95234_crit_reg(channel), val);
224	case hwmon_temp_crit:
225		ret = regmap_read(regmap, LM95234_REG_TCRIT1(channel), &regval);
226		if (ret)
227			return ret;
228		*val = regval * 1000;
229		break;
230	default:
231		return -EOPNOTSUPP;
232	}
233	return 0;
234}
235
236static u16 update_intervals[] = { 143, 364, 1000, 2500 };
237
238static int lm95234_chip_write(struct device *dev, u32 attr, long val)
239{
240	struct lm95234_data *data = dev_get_drvdata(dev);
241
242	switch (attr) {
243	case hwmon_chip_update_interval:
244		val = find_closest(val, update_intervals, ARRAY_SIZE(update_intervals));
245		return regmap_write(data->regmap, LM95234_REG_CONVRATE, val);
246	default:
247		return -EOPNOTSUPP;
248	}
249	return 0;
250}
251
252static int lm95234_chip_read(struct device *dev, u32 attr, long *val)
253{
254	struct lm95234_data *data = dev_get_drvdata(dev);
255	u32 convrate;
256	int ret;
257
258	switch (attr) {
259	case hwmon_chip_update_interval:
260		ret = regmap_read(data->regmap, LM95234_REG_CONVRATE, &convrate);
261		if (ret)
262			return ret;
263
264		*val = update_intervals[convrate & 0x03];
265		break;
266	default:
267		return -EOPNOTSUPP;
268	}
269	return 0;
270}
271
272static int lm95234_write(struct device *dev, enum hwmon_sensor_types type,
273			 u32 attr, int channel, long val)
274{
275	switch (type) {
276	case hwmon_chip:
277		return lm95234_chip_write(dev, attr, val);
278	case hwmon_temp:
279		return lm95234_temp_write(dev, attr, channel, val);
280	default:
281		return -EOPNOTSUPP;
282	}
283}
284
285static int lm95234_read(struct device *dev, enum hwmon_sensor_types type,
286			u32 attr, int channel, long *val)
287{
288	switch (type) {
289	case hwmon_chip:
290		return lm95234_chip_read(dev, attr, val);
291	case hwmon_temp:
292		return lm95234_temp_read(dev, attr, channel, val);
293	default:
294		return -EOPNOTSUPP;
295	}
296}
297
298static umode_t lm95234_is_visible(const void *_data, enum hwmon_sensor_types type,
299				  u32 attr, int channel)
300{
301	const struct lm95234_data *data = _data;
302
303	if (data->type == lm95233 && channel > 2)
304		return 0;
305
306	switch (type) {
307	case hwmon_chip:
308		switch (attr) {
309		case hwmon_chip_update_interval:
310			return 0644;
311		default:
312			break;
313		}
314		break;
315	case hwmon_temp:
316		switch (attr) {
317		case hwmon_temp_input:
318		case hwmon_temp_max_alarm:
319			return 0444;
320		case hwmon_temp_crit_alarm:
321		case hwmon_temp_crit_hyst:
322			return (channel && channel < 3) ? 0444 : 0;
323		case hwmon_temp_type:
324		case hwmon_temp_offset:
325			return channel ? 0644 : 0;
326		case hwmon_temp_fault:
327			return channel ? 0444 : 0;
328		case hwmon_temp_max:
329		case hwmon_temp_enable:
330			return 0644;
331		case hwmon_temp_max_hyst:
332			return channel ? 0444 : 0644;
333		case hwmon_temp_crit:
334			return (channel && channel < 3) ? 0644 : 0;
335		default:
336			break;
337		}
338		break;
339	default:
340		break;
341	}
342	return 0;
343}
344
345static const struct hwmon_channel_info * const lm95234_info[] = {
346	HWMON_CHANNEL_INFO(chip, HWMON_C_UPDATE_INTERVAL),
347	HWMON_CHANNEL_INFO(temp,
348			   HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
349			   HWMON_T_MAX_ALARM | HWMON_T_ENABLE,
350			   HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
351			   HWMON_T_MAX_ALARM | HWMON_T_FAULT | HWMON_T_TYPE |
352			   HWMON_T_CRIT | HWMON_T_CRIT_HYST |
353			   HWMON_T_CRIT_ALARM | HWMON_T_OFFSET | HWMON_T_ENABLE,
354			   HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
355			   HWMON_T_MAX_ALARM | HWMON_T_FAULT | HWMON_T_TYPE |
356			   HWMON_T_CRIT | HWMON_T_CRIT_HYST |
357			   HWMON_T_CRIT_ALARM | HWMON_T_OFFSET | HWMON_T_ENABLE,
358			   HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
359			   HWMON_T_MAX_ALARM | HWMON_T_FAULT | HWMON_T_TYPE |
360			   HWMON_T_OFFSET | HWMON_T_ENABLE,
361			   HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST |
362			   HWMON_T_MAX_ALARM | HWMON_T_FAULT | HWMON_T_TYPE |
363			   HWMON_T_OFFSET | HWMON_T_ENABLE),
364	NULL
365};
366
367static const struct hwmon_ops lm95234_hwmon_ops = {
368	.is_visible = lm95234_is_visible,
369	.read = lm95234_read,
370	.write = lm95234_write,
371};
372
373static const struct hwmon_chip_info lm95234_chip_info = {
374	.ops = &lm95234_hwmon_ops,
375	.info = lm95234_info,
376};
377
378static bool lm95234_volatile_reg(struct device *dev, unsigned int reg)
379{
380	switch (reg) {
381	case LM95234_REG_TEMPH(0) ... LM95234_REG_TEMPH(4):
382	case LM95234_REG_TEMPL(0) ... LM95234_REG_TEMPL(4):
383	case LM95234_REG_UTEMPH(0) ... LM95234_REG_UTEMPH(3):
384	case LM95234_REG_UTEMPL(0) ... LM95234_REG_UTEMPL(3):
385	case LM95234_REG_STS_FAULT:
386	case LM95234_REG_STS_TCRIT1:
387	case LM95234_REG_STS_TCRIT2:
388	case LM95234_REG_REM_MODEL_STS:
389		return true;
390	default:
391		return false;
392	}
393}
394
395static bool lm95234_writeable_reg(struct device *dev, unsigned int reg)
396{
397	switch (reg) {
398	case LM95234_REG_CONFIG ... LM95234_REG_FILTER:
399	case LM95234_REG_REM_MODEL ... LM95234_REG_OFFSET(3):
400	case LM95234_REG_TCRIT1(0) ... LM95234_REG_TCRIT1(4):
401	case LM95234_REG_TCRIT2(0) ... LM95234_REG_TCRIT2(1):
402	case LM95234_REG_TCRIT_HYST:
403		return true;
404	default:
405		return false;
406	}
407}
408
409static const struct regmap_config lm95234_regmap_config = {
410	.reg_bits = 8,
411	.val_bits = 8,
412	.writeable_reg = lm95234_writeable_reg,
413	.volatile_reg = lm95234_volatile_reg,
414	.cache_type = REGCACHE_MAPLE,
415};
416
417static int lm95234_detect(struct i2c_client *client,
418			  struct i2c_board_info *info)
419{
420	struct i2c_adapter *adapter = client->adapter;
421	int address = client->addr;
422	u8 config_mask, model_mask;
423	int mfg_id, chip_id, val;
424	const char *name;
425
426	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
427		return -ENODEV;
428
429	mfg_id = i2c_smbus_read_byte_data(client, LM95234_REG_MAN_ID);
430	if (mfg_id != NATSEMI_MAN_ID)
431		return -ENODEV;
432
433	chip_id = i2c_smbus_read_byte_data(client, LM95234_REG_CHIP_ID);
434	switch (chip_id) {
435	case LM95233_CHIP_ID:
436		if (address != 0x18 && address != 0x2a && address != 0x2b)
437			return -ENODEV;
438		config_mask = 0xbf;
439		model_mask = 0xf9;
440		name = "lm95233";
441		break;
442	case LM95234_CHIP_ID:
443		if (address != 0x18 && address != 0x4d && address != 0x4e)
444			return -ENODEV;
445		config_mask = 0xbc;
446		model_mask = 0xe1;
447		name = "lm95234";
448		break;
449	default:
450		return -ENODEV;
451	}
452
453	val = i2c_smbus_read_byte_data(client, LM95234_REG_STATUS);
454	if (val & 0x30)
455		return -ENODEV;
456
457	val = i2c_smbus_read_byte_data(client, LM95234_REG_CONFIG);
458	if (val & config_mask)
459		return -ENODEV;
460
461	val = i2c_smbus_read_byte_data(client, LM95234_REG_CONVRATE);
462	if (val & 0xfc)
463		return -ENODEV;
464
465	val = i2c_smbus_read_byte_data(client, LM95234_REG_REM_MODEL);
466	if (val & model_mask)
467		return -ENODEV;
468
469	val = i2c_smbus_read_byte_data(client, LM95234_REG_REM_MODEL_STS);
470	if (val & model_mask)
471		return -ENODEV;
472
473	strscpy(info->type, name, I2C_NAME_SIZE);
474	return 0;
475}
476
477static int lm95234_init_client(struct device *dev, struct regmap *regmap)
478{
479	u32 val, model;
480	int ret;
481
482	/* start conversion if necessary */
483	ret = regmap_clear_bits(regmap, LM95234_REG_CONFIG, 0x40);
484	if (ret)
485		return ret;
486
487	/* If diode type status reports an error, try to fix it */
488	ret = regmap_read(regmap, LM95234_REG_REM_MODEL_STS, &val);
489	if (ret < 0)
490		return ret;
491	ret = regmap_read(regmap, LM95234_REG_REM_MODEL, &model);
492	if (ret < 0)
493		return ret;
494	if (model & val) {
495		dev_notice(dev,
496			   "Fixing remote diode type misconfiguration (0x%x)\n",
497			   val);
498		ret = regmap_write(regmap, LM95234_REG_REM_MODEL, model & ~val);
499	}
500	return ret;
501}
502
503static int lm95234_probe(struct i2c_client *client)
504{
505	struct device *dev = &client->dev;
506	struct lm95234_data *data;
507	struct device *hwmon_dev;
508	struct regmap *regmap;
509	int err;
510
511	data = devm_kzalloc(dev, sizeof(struct lm95234_data), GFP_KERNEL);
512	if (!data)
513		return -ENOMEM;
514
515	data->type = (uintptr_t)i2c_get_match_data(client);
516
517	regmap = devm_regmap_init_i2c(client, &lm95234_regmap_config);
518	if (IS_ERR(regmap))
519		return PTR_ERR(regmap);
520
521	data->regmap = regmap;
522
523	/* Initialize the LM95234 chip */
524	err = lm95234_init_client(dev, regmap);
525	if (err < 0)
526		return err;
527
528	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
529							 data, &lm95234_chip_info, NULL);
530	return PTR_ERR_OR_ZERO(hwmon_dev);
531}
532
533/* Driver data (common to all clients) */
534static const struct i2c_device_id lm95234_id[] = {
535	{ "lm95233", lm95233 },
536	{ "lm95234", lm95234 },
537	{ }
538};
539MODULE_DEVICE_TABLE(i2c, lm95234_id);
540
541static struct i2c_driver lm95234_driver = {
542	.class		= I2C_CLASS_HWMON,
543	.driver = {
544		.name	= DRVNAME,
545	},
546	.probe		= lm95234_probe,
547	.id_table	= lm95234_id,
548	.detect		= lm95234_detect,
549	.address_list	= normal_i2c,
550};
551
552module_i2c_driver(lm95234_driver);
553
554MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
555MODULE_DESCRIPTION("LM95233/LM95234 sensor driver");
556MODULE_LICENSE("GPL");