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lm90.c
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linux-6.19.14/drivers/hwmon/lm90.c
1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * lm90.c - Part of lm_sensors, Linux kernel modules for hardware 4 * monitoring 5 * Copyright (C) 2003-2010 Jean Delvare <jdelvare@suse.de> 6 * 7 * Based on the lm83 driver. The LM90 is a sensor chip made by National 8 * Semiconductor. It reports up to two temperatures (its own plus up to 9 * one external one) with a 0.125 deg resolution (1 deg for local 10 * temperature) and a 3-4 deg accuracy. 11 * 12 * This driver also supports the LM89 and LM99, two other sensor chips 13 * made by National Semiconductor. Both have an increased remote 14 * temperature measurement accuracy (1 degree), and the LM99 15 * additionally shifts remote temperatures (measured and limits) by 16 16 * degrees, which allows for higher temperatures measurement. 17 * Note that there is no way to differentiate between both chips. 18 * When device is auto-detected, the driver will assume an LM99. 19 * 20 * This driver also supports the LM86, another sensor chip made by 21 * National Semiconductor. It is exactly similar to the LM90 except it 22 * has a higher accuracy. 23 * 24 * This driver also supports the ADM1032, a sensor chip made by Analog 25 * Devices. That chip is similar to the LM90, with a few differences 26 * that are not handled by this driver. Among others, it has a higher 27 * accuracy than the LM90, much like the LM86 does. 28 * 29 * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor 30 * chips made by Maxim. These chips are similar to the LM86. 31 * Note that there is no easy way to differentiate between the three 32 * variants. We use the device address to detect MAX6659, which will result 33 * in a detection as max6657 if it is on address 0x4c. The extra address 34 * and features of the MAX6659 are only supported if the chip is configured 35 * explicitly as max6659, or if its address is not 0x4c. 36 * These chips lack the remote temperature offset feature. 37 * 38 * This driver also supports the MAX6654 chip made by Maxim. This chip can be 39 * at 9 different addresses, similar to MAX6680/MAX6681. The MAX6654 is similar 40 * to MAX6657/MAX6658/MAX6659, but does not support critical temperature 41 * limits. Extended range is available by setting the configuration register 42 * accordingly, and is done during initialization. Extended precision is only 43 * available at conversion rates of 1 Hz and slower. Note that extended 44 * precision is not enabled by default, as this driver initializes all chips 45 * to 2 Hz by design. The driver also supports MAX6690, which is practically 46 * identical to MAX6654. 47 * 48 * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and 49 * MAX6692 chips made by Maxim. These are again similar to the LM86, 50 * but they use unsigned temperature values and can report temperatures 51 * from 0 to 145 degrees. 52 * 53 * This driver also supports the MAX6680 and MAX6681, two other sensor 54 * chips made by Maxim. These are quite similar to the other Maxim 55 * chips. The MAX6680 and MAX6681 only differ in the pinout so they can 56 * be treated identically. 57 * 58 * This driver also supports the MAX6695 and MAX6696, two other sensor 59 * chips made by Maxim. These are also quite similar to other Maxim 60 * chips, but support three temperature sensors instead of two. MAX6695 61 * and MAX6696 only differ in the pinout so they can be treated identically. 62 * 63 * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as 64 * NCT1008 from ON Semiconductor. The chips are supported in both compatibility 65 * and extended mode. They are mostly compatible with LM90 except for a data 66 * format difference for the temperature value registers. 67 * 68 * This driver also supports ADT7481, ADT7482, and ADT7483 from Analog Devices 69 * / ON Semiconductor. The chips are similar to ADT7461 but support two external 70 * temperature sensors. 71 * 72 * This driver also supports NCT72, NCT214, and NCT218 from ON Semiconductor. 73 * The chips are similar to ADT7461/ADT7461A but have full PEC support 74 * (undocumented). 75 * 76 * This driver also supports the SA56004 from Philips. This device is 77 * pin-compatible with the LM86, the ED/EDP parts are also address-compatible. 78 * 79 * This driver also supports the G781 from GMT. This device is compatible 80 * with the ADM1032. 81 * 82 * This driver also supports TMP451 and TMP461 from Texas Instruments. 83 * Those devices are supported in both compatibility and extended mode. 84 * They are mostly compatible with ADT7461 except for local temperature 85 * low byte register and max conversion rate. 86 * 87 * This driver also supports MAX1617 and various clones such as G767 88 * and NE1617. Such clones will be detected as MAX1617. 89 * 90 * This driver also supports NE1618 from Philips. It is similar to NE1617 91 * but supports 11 bit external temperature values. 92 * 93 * This driver also supports NCT7716, NCT7717 and NCT7718 from Nuvoton. 94 * The NCT7716 is similar to NCT7717 but has one more address support. 95 * 96 * Since the LM90 was the first chipset supported by this driver, most 97 * comments will refer to this chipset, but are actually general and 98 * concern all supported chipsets, unless mentioned otherwise. 99 */ 100 101#include <linux/bits.h> 102#include <linux/device.h> 103#include <linux/err.h> 104#include <linux/i2c.h> 105#include <linux/init.h> 106#include <linux/interrupt.h> 107#include <linux/jiffies.h> 108#include <linux/hwmon.h> 109#include <linux/kstrtox.h> 110#include <linux/module.h> 111#include <linux/of.h> 112#include <linux/regulator/consumer.h> 113#include <linux/slab.h> 114#include <linux/workqueue.h> 115 116/* The maximum number of channels currently supported */ 117#define MAX_CHANNELS 3 118 119/* 120 * Addresses to scan 121 * Address is fully defined internally and cannot be changed except for 122 * MAX6659, MAX6680 and MAX6681. 123 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649, 124 * MAX6657, MAX6658, NCT1008, NCT7718 and W83L771 have address 0x4c. 125 * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D 126 * have address 0x4d. 127 * MAX6647 has address 0x4e. 128 * MAX6659 can have address 0x4c, 0x4d or 0x4e. 129 * MAX6654, MAX6680, and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29, 130 * 0x2a, 0x2b, 0x4c, 0x4d or 0x4e. 131 * NCT7716 can have address 0x48 or 0x49. 132 * NCT7717 has address 0x48. 133 * SA56004 can have address 0x48 through 0x4F. 134 */ 135 136static const unsigned short normal_i2c[] = { 137 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c, 138 0x4d, 0x4e, 0x4f, I2C_CLIENT_END }; 139 140enum chips { adm1023, adm1032, adt7461, adt7461a, adt7481, 141 g781, lm84, lm90, lm99, 142 max1617, max6642, max6646, max6648, max6654, max6657, max6659, max6680, max6696, 143 nct210, nct72, nct7716, nct7717, nct7718, ne1618, sa56004, tmp451, tmp461, w83l771, 144}; 145 146/* 147 * The LM90 registers 148 */ 149 150#define LM90_REG_MAN_ID 0xFE 151#define LM90_REG_CHIP_ID 0xFF 152#define LM90_REG_CONFIG1 0x03 153#define LM90_REG_CONFIG2 0xBF 154#define LM90_REG_CONVRATE 0x04 155#define LM90_REG_STATUS 0x02 156#define LM90_REG_LOCAL_TEMP 0x00 157#define LM90_REG_LOCAL_HIGH 0x05 158#define LM90_REG_LOCAL_LOW 0x06 159#define LM90_REG_LOCAL_CRIT 0x20 160#define LM90_REG_REMOTE_TEMPH 0x01 161#define LM90_REG_REMOTE_TEMPL 0x10 162#define LM90_REG_REMOTE_OFFSH 0x11 163#define LM90_REG_REMOTE_OFFSL 0x12 164#define LM90_REG_REMOTE_HIGHH 0x07 165#define LM90_REG_REMOTE_HIGHL 0x13 166#define LM90_REG_REMOTE_LOWH 0x08 167#define LM90_REG_REMOTE_LOWL 0x14 168#define LM90_REG_REMOTE_CRIT 0x19 169#define LM90_REG_TCRIT_HYST 0x21 170 171/* MAX6646/6647/6649/6654/6657/6658/6659/6695/6696 registers */ 172 173#define MAX6657_REG_LOCAL_TEMPL 0x11 174#define MAX6696_REG_STATUS2 0x12 175#define MAX6659_REG_REMOTE_EMERG 0x16 176#define MAX6659_REG_LOCAL_EMERG 0x17 177 178/* SA56004 registers */ 179 180#define SA56004_REG_LOCAL_TEMPL 0x22 181 182#define LM90_MAX_CONVRATE_MS 16000 /* Maximum conversion rate in ms */ 183 184/* TMP451/TMP461 registers */ 185#define TMP451_REG_LOCAL_TEMPL 0x15 186#define TMP451_REG_CONALERT 0x22 187 188#define TMP461_REG_CHEN 0x16 189#define TMP461_REG_DFC 0x24 190 191/* ADT7481 registers */ 192#define ADT7481_REG_STATUS2 0x23 193#define ADT7481_REG_CONFIG2 0x24 194 195#define ADT7481_REG_MAN_ID 0x3e 196#define ADT7481_REG_CHIP_ID 0x3d 197 198/* NCT7716/7717/7718 registers */ 199#define NCT7716_REG_CHIP_ID 0xFD 200 201/* Device features */ 202#define LM90_HAVE_EXTENDED_TEMP BIT(0) /* extended temperature support */ 203#define LM90_HAVE_OFFSET BIT(1) /* temperature offset register */ 204#define LM90_HAVE_UNSIGNED_TEMP BIT(2) /* temperatures are unsigned */ 205#define LM90_HAVE_REM_LIMIT_EXT BIT(3) /* extended remote limit */ 206#define LM90_HAVE_EMERGENCY BIT(4) /* 3rd upper (emergency) limit */ 207#define LM90_HAVE_EMERGENCY_ALARM BIT(5)/* emergency alarm */ 208#define LM90_HAVE_TEMP3 BIT(6) /* 3rd temperature sensor */ 209#define LM90_HAVE_BROKEN_ALERT BIT(7) /* Broken alert */ 210#define LM90_PAUSE_FOR_CONFIG BIT(8) /* Pause conversion for config */ 211#define LM90_HAVE_CRIT BIT(9) /* Chip supports CRIT/OVERT register */ 212#define LM90_HAVE_CRIT_ALRM_SWP BIT(10) /* critical alarm bits swapped */ 213#define LM90_HAVE_PEC BIT(11) /* Chip supports PEC */ 214#define LM90_HAVE_PARTIAL_PEC BIT(12) /* Partial PEC support (adm1032)*/ 215#define LM90_HAVE_ALARMS BIT(13) /* Create 'alarms' attribute */ 216#define LM90_HAVE_EXT_UNSIGNED BIT(14) /* extended unsigned temperature*/ 217#define LM90_HAVE_LOW BIT(15) /* low limits */ 218#define LM90_HAVE_CONVRATE BIT(16) /* conversion rate */ 219#define LM90_HAVE_REMOTE_EXT BIT(17) /* extended remote temperature */ 220#define LM90_HAVE_FAULTQUEUE BIT(18) /* configurable samples count */ 221 222/* LM90 status */ 223#define LM90_STATUS_LTHRM BIT(0) /* local THERM limit tripped */ 224#define LM90_STATUS_RTHRM BIT(1) /* remote THERM limit tripped */ 225#define LM90_STATUS_ROPEN BIT(2) /* remote is an open circuit */ 226#define LM90_STATUS_RLOW BIT(3) /* remote low temp limit tripped */ 227#define LM90_STATUS_RHIGH BIT(4) /* remote high temp limit tripped */ 228#define LM90_STATUS_LLOW BIT(5) /* local low temp limit tripped */ 229#define LM90_STATUS_LHIGH BIT(6) /* local high temp limit tripped */ 230#define LM90_STATUS_BUSY BIT(7) /* conversion is ongoing */ 231 232/* MAX6695/6696 and ADT7481 2nd status register */ 233#define MAX6696_STATUS2_R2THRM BIT(1) /* remote2 THERM limit tripped */ 234#define MAX6696_STATUS2_R2OPEN BIT(2) /* remote2 is an open circuit */ 235#define MAX6696_STATUS2_R2LOW BIT(3) /* remote2 low temp limit tripped */ 236#define MAX6696_STATUS2_R2HIGH BIT(4) /* remote2 high temp limit tripped */ 237#define MAX6696_STATUS2_ROT2 BIT(5) /* remote emergency limit tripped */ 238#define MAX6696_STATUS2_R2OT2 BIT(6) /* remote2 emergency limit tripped */ 239#define MAX6696_STATUS2_LOT2 BIT(7) /* local emergency limit tripped */ 240 241/* 242 * Driver data (common to all clients) 243 */ 244 245static const struct i2c_device_id lm90_id[] = { 246 { "adm1020", max1617 }, 247 { "adm1021", max1617 }, 248 { "adm1023", adm1023 }, 249 { "adm1032", adm1032 }, 250 { "adt7421", adt7461a }, 251 { "adt7461", adt7461 }, 252 { "adt7461a", adt7461a }, 253 { "adt7481", adt7481 }, 254 { "adt7482", adt7481 }, 255 { "adt7483a", adt7481 }, 256 { "g781", g781 }, 257 { "gl523sm", max1617 }, 258 { "lm84", lm84 }, 259 { "lm86", lm90 }, 260 { "lm89", lm90 }, 261 { "lm90", lm90 }, 262 { "lm99", lm99 }, 263 { "max1617", max1617 }, 264 { "max6642", max6642 }, 265 { "max6646", max6646 }, 266 { "max6647", max6646 }, 267 { "max6648", max6648 }, 268 { "max6649", max6646 }, 269 { "max6654", max6654 }, 270 { "max6657", max6657 }, 271 { "max6658", max6657 }, 272 { "max6659", max6659 }, 273 { "max6680", max6680 }, 274 { "max6681", max6680 }, 275 { "max6690", max6654 }, 276 { "max6692", max6648 }, 277 { "max6695", max6696 }, 278 { "max6696", max6696 }, 279 { "mc1066", max1617 }, 280 { "nct1008", adt7461a }, 281 { "nct210", nct210 }, 282 { "nct214", nct72 }, 283 { "nct218", nct72 }, 284 { "nct72", nct72 }, 285 { "nct7716", nct7716 }, 286 { "nct7717", nct7717 }, 287 { "nct7718", nct7718 }, 288 { "ne1618", ne1618 }, 289 { "w83l771", w83l771 }, 290 { "sa56004", sa56004 }, 291 { "thmc10", max1617 }, 292 { "tmp451", tmp451 }, 293 { "tmp461", tmp461 }, 294 { } 295}; 296MODULE_DEVICE_TABLE(i2c, lm90_id); 297 298static const struct of_device_id __maybe_unused lm90_of_match[] = { 299 { 300 .compatible = "adi,adm1032", 301 .data = (void *)adm1032 302 }, 303 { 304 .compatible = "adi,adt7461", 305 .data = (void *)adt7461 306 }, 307 { 308 .compatible = "adi,adt7461a", 309 .data = (void *)adt7461a 310 }, 311 { 312 .compatible = "adi,adt7481", 313 .data = (void *)adt7481 314 }, 315 { 316 .compatible = "gmt,g781", 317 .data = (void *)g781 318 }, 319 { 320 .compatible = "national,lm90", 321 .data = (void *)lm90 322 }, 323 { 324 .compatible = "national,lm86", 325 .data = (void *)lm90 326 }, 327 { 328 .compatible = "national,lm89", 329 .data = (void *)lm90 330 }, 331 { 332 .compatible = "national,lm99", 333 .data = (void *)lm99 334 }, 335 { 336 .compatible = "dallas,max6646", 337 .data = (void *)max6646 338 }, 339 { 340 .compatible = "dallas,max6647", 341 .data = (void *)max6646 342 }, 343 { 344 .compatible = "dallas,max6649", 345 .data = (void *)max6646 346 }, 347 { 348 .compatible = "dallas,max6654", 349 .data = (void *)max6654 350 }, 351 { 352 .compatible = "dallas,max6657", 353 .data = (void *)max6657 354 }, 355 { 356 .compatible = "dallas,max6658", 357 .data = (void *)max6657 358 }, 359 { 360 .compatible = "dallas,max6659", 361 .data = (void *)max6659 362 }, 363 { 364 .compatible = "dallas,max6680", 365 .data = (void *)max6680 366 }, 367 { 368 .compatible = "dallas,max6681", 369 .data = (void *)max6680 370 }, 371 { 372 .compatible = "dallas,max6695", 373 .data = (void *)max6696 374 }, 375 { 376 .compatible = "dallas,max6696", 377 .data = (void *)max6696 378 }, 379 { 380 .compatible = "onnn,nct1008", 381 .data = (void *)adt7461a 382 }, 383 { 384 .compatible = "onnn,nct214", 385 .data = (void *)nct72 386 }, 387 { 388 .compatible = "onnn,nct218", 389 .data = (void *)nct72 390 }, 391 { 392 .compatible = "onnn,nct72", 393 .data = (void *)nct72 394 }, 395 { 396 .compatible = "nuvoton,nct7716", 397 .data = (void *)nct7716 398 }, 399 { 400 .compatible = "nuvoton,nct7717", 401 .data = (void *)nct7717 402 }, 403 { 404 .compatible = "nuvoton,nct7718", 405 .data = (void *)nct7718 406 }, 407 { 408 .compatible = "winbond,w83l771", 409 .data = (void *)w83l771 410 }, 411 { 412 .compatible = "nxp,sa56004", 413 .data = (void *)sa56004 414 }, 415 { 416 .compatible = "ti,tmp451", 417 .data = (void *)tmp451 418 }, 419 { 420 .compatible = "ti,tmp461", 421 .data = (void *)tmp461 422 }, 423 { }, 424}; 425MODULE_DEVICE_TABLE(of, lm90_of_match); 426 427/* 428 * chip type specific parameters 429 */ 430struct lm90_params { 431 u32 flags; /* Capabilities */ 432 u16 alert_alarms; /* Which alarm bits trigger ALERT# */ 433 /* Upper 8 bits for max6695/96 */ 434 u8 max_convrate; /* Maximum conversion rate register value */ 435 u8 resolution; /* 16-bit resolution (default 11 bit) */ 436 u8 reg_status2; /* 2nd status register (optional) */ 437 u8 reg_local_ext; /* Extended local temp register (optional) */ 438 u8 faultqueue_mask; /* fault queue bit mask */ 439 u8 faultqueue_depth; /* fault queue depth if mask is used */ 440}; 441 442static const struct lm90_params lm90_params[] = { 443 [adm1023] = { 444 .flags = LM90_HAVE_ALARMS | LM90_HAVE_OFFSET | LM90_HAVE_BROKEN_ALERT 445 | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 446 | LM90_HAVE_REMOTE_EXT, 447 .alert_alarms = 0x7c, 448 .resolution = 8, 449 .max_convrate = 7, 450 }, 451 [adm1032] = { 452 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 453 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT 454 | LM90_HAVE_PARTIAL_PEC | LM90_HAVE_ALARMS 455 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT 456 | LM90_HAVE_FAULTQUEUE, 457 .alert_alarms = 0x7c, 458 .max_convrate = 10, 459 }, 460 [adt7461] = { 461 /* 462 * Standard temperature range is supposed to be unsigned, 463 * but that does not match reality. Negative temperatures 464 * are always reported. 465 */ 466 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 467 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP 468 | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC 469 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 470 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, 471 .alert_alarms = 0x7c, 472 .max_convrate = 10, 473 .resolution = 10, 474 }, 475 [adt7461a] = { 476 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 477 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP 478 | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_ALARMS 479 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT 480 | LM90_HAVE_FAULTQUEUE, 481 .alert_alarms = 0x7c, 482 .max_convrate = 10, 483 }, 484 [adt7481] = { 485 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 486 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP 487 | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_PEC 488 | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT | LM90_HAVE_LOW 489 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT 490 | LM90_HAVE_FAULTQUEUE, 491 .alert_alarms = 0x1c7c, 492 .max_convrate = 11, 493 .resolution = 10, 494 .reg_status2 = ADT7481_REG_STATUS2, 495 }, 496 [g781] = { 497 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 498 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT 499 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 500 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, 501 .alert_alarms = 0x7c, 502 .max_convrate = 7, 503 }, 504 [lm84] = { 505 .flags = LM90_HAVE_ALARMS, 506 .resolution = 8, 507 }, 508 [lm90] = { 509 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 510 | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW 511 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT 512 | LM90_HAVE_FAULTQUEUE, 513 .alert_alarms = 0x7b, 514 .max_convrate = 9, 515 .faultqueue_mask = BIT(0), 516 .faultqueue_depth = 3, 517 }, 518 [lm99] = { 519 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 520 | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW 521 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT 522 | LM90_HAVE_FAULTQUEUE, 523 .alert_alarms = 0x7b, 524 .max_convrate = 9, 525 .faultqueue_mask = BIT(0), 526 .faultqueue_depth = 3, 527 }, 528 [max1617] = { 529 .flags = LM90_HAVE_CONVRATE | LM90_HAVE_BROKEN_ALERT | 530 LM90_HAVE_LOW | LM90_HAVE_ALARMS, 531 .alert_alarms = 0x78, 532 .resolution = 8, 533 .max_convrate = 7, 534 }, 535 [max6642] = { 536 .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXT_UNSIGNED 537 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, 538 .alert_alarms = 0x50, 539 .resolution = 10, 540 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, 541 .faultqueue_mask = BIT(4), 542 .faultqueue_depth = 2, 543 }, 544 [max6646] = { 545 .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT 546 | LM90_HAVE_EXT_UNSIGNED | LM90_HAVE_ALARMS | LM90_HAVE_LOW 547 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, 548 .alert_alarms = 0x7c, 549 .max_convrate = 6, 550 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, 551 }, 552 [max6648] = { 553 .flags = LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_CRIT 554 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_LOW 555 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, 556 .alert_alarms = 0x7c, 557 .max_convrate = 6, 558 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, 559 }, 560 [max6654] = { 561 .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_ALARMS | LM90_HAVE_LOW 562 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, 563 .alert_alarms = 0x7c, 564 .max_convrate = 7, 565 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, 566 }, 567 [max6657] = { 568 .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_CRIT 569 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 570 | LM90_HAVE_REMOTE_EXT, 571 .alert_alarms = 0x7c, 572 .max_convrate = 8, 573 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, 574 }, 575 [max6659] = { 576 .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_CRIT 577 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 578 | LM90_HAVE_REMOTE_EXT, 579 .alert_alarms = 0x7c, 580 .max_convrate = 8, 581 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, 582 }, 583 [max6680] = { 584 /* 585 * Apparent temperatures of 128 degrees C or higher are reported 586 * and treated as negative temperatures (meaning min_alarm will 587 * be set). 588 */ 589 .flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT 590 | LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT 591 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 592 | LM90_HAVE_REMOTE_EXT, 593 .alert_alarms = 0x7c, 594 .max_convrate = 7, 595 }, 596 [max6696] = { 597 .flags = LM90_HAVE_EMERGENCY 598 | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT 599 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 600 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, 601 .alert_alarms = 0x1c7c, 602 .max_convrate = 6, 603 .reg_status2 = MAX6696_REG_STATUS2, 604 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, 605 .faultqueue_mask = BIT(5), 606 .faultqueue_depth = 4, 607 }, 608 [nct72] = { 609 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 610 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP 611 | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_UNSIGNED_TEMP 612 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT 613 | LM90_HAVE_FAULTQUEUE, 614 .alert_alarms = 0x7c, 615 .max_convrate = 10, 616 .resolution = 10, 617 }, 618 [nct210] = { 619 .flags = LM90_HAVE_ALARMS | LM90_HAVE_BROKEN_ALERT 620 | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 621 | LM90_HAVE_REMOTE_EXT, 622 .alert_alarms = 0x7c, 623 .resolution = 11, 624 .max_convrate = 7, 625 }, 626 [nct7716] = { 627 .flags = LM90_HAVE_ALARMS | LM90_HAVE_CONVRATE, 628 .alert_alarms = 0x40, 629 .resolution = 8, 630 .max_convrate = 8, 631 }, 632 [nct7717] = { 633 .flags = LM90_HAVE_ALARMS | LM90_HAVE_CONVRATE, 634 .alert_alarms = 0x40, 635 .resolution = 8, 636 .max_convrate = 8, 637 }, 638 [nct7718] = { 639 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT 640 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 641 | LM90_HAVE_REMOTE_EXT, 642 .alert_alarms = 0x7c, 643 .resolution = 11, 644 .max_convrate = 8, 645 }, 646 [ne1618] = { 647 .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_BROKEN_ALERT 648 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, 649 .alert_alarms = 0x7c, 650 .resolution = 11, 651 .max_convrate = 7, 652 }, 653 [w83l771] = { 654 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT 655 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 656 | LM90_HAVE_REMOTE_EXT, 657 .alert_alarms = 0x7c, 658 .max_convrate = 8, 659 }, 660 [sa56004] = { 661 /* 662 * Apparent temperatures of 128 degrees C or higher are reported 663 * and treated as negative temperatures (meaning min_alarm will 664 * be set). 665 */ 666 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT 667 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 668 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, 669 .alert_alarms = 0x7b, 670 .max_convrate = 9, 671 .reg_local_ext = SA56004_REG_LOCAL_TEMPL, 672 .faultqueue_mask = BIT(0), 673 .faultqueue_depth = 3, 674 }, 675 [tmp451] = { 676 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 677 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT 678 | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_ALARMS | LM90_HAVE_LOW 679 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, 680 .alert_alarms = 0x7c, 681 .max_convrate = 9, 682 .resolution = 12, 683 .reg_local_ext = TMP451_REG_LOCAL_TEMPL, 684 }, 685 [tmp461] = { 686 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 687 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT 688 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 689 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, 690 .alert_alarms = 0x7c, 691 .max_convrate = 9, 692 .resolution = 12, 693 .reg_local_ext = TMP451_REG_LOCAL_TEMPL, 694 }, 695}; 696 697/* 698 * temperature register index 699 */ 700enum lm90_temp_reg_index { 701 LOCAL_LOW = 0, 702 LOCAL_HIGH, 703 LOCAL_CRIT, 704 REMOTE_CRIT, 705 LOCAL_EMERG, /* max6659 and max6695/96 */ 706 REMOTE_EMERG, /* max6659 and max6695/96 */ 707 REMOTE2_CRIT, /* max6695/96 only */ 708 REMOTE2_EMERG, /* max6695/96 only */ 709 710 REMOTE_TEMP, 711 REMOTE_LOW, 712 REMOTE_HIGH, 713 REMOTE_OFFSET, /* except max6646, max6657/58/59, and max6695/96 */ 714 LOCAL_TEMP, 715 REMOTE2_TEMP, /* max6695/96 only */ 716 REMOTE2_LOW, /* max6695/96 only */ 717 REMOTE2_HIGH, /* max6695/96 only */ 718 REMOTE2_OFFSET, 719 720 TEMP_REG_NUM 721}; 722 723/* 724 * Client data (each client gets its own) 725 */ 726 727struct lm90_data { 728 struct i2c_client *client; 729 struct device *hwmon_dev; 730 u32 chip_config[2]; 731 u32 channel_config[MAX_CHANNELS + 1]; 732 const char *channel_label[MAX_CHANNELS]; 733 struct hwmon_channel_info chip_info; 734 struct hwmon_channel_info temp_info; 735 const struct hwmon_channel_info *info[3]; 736 struct hwmon_chip_info chip; 737 struct delayed_work alert_work; 738 struct work_struct report_work; 739 bool valid; /* true if register values are valid */ 740 bool alarms_valid; /* true if status register values are valid */ 741 unsigned long last_updated; /* in jiffies */ 742 unsigned long alarms_updated; /* in jiffies */ 743 int kind; 744 u32 flags; 745 746 unsigned int update_interval; /* in milliseconds */ 747 748 u8 config; /* Current configuration register value */ 749 u8 config_orig; /* Original configuration register value */ 750 u8 convrate_orig; /* Original conversion rate register value */ 751 u8 resolution; /* temperature resolution in bit */ 752 u16 alert_alarms; /* Which alarm bits trigger ALERT# */ 753 /* Upper 8 bits for max6695/96 */ 754 u8 max_convrate; /* Maximum conversion rate */ 755 u8 reg_status2; /* 2nd status register (optional) */ 756 u8 reg_local_ext; /* local extension register offset */ 757 u8 reg_remote_ext; /* remote temperature low byte */ 758 u8 faultqueue_mask; /* fault queue mask */ 759 u8 faultqueue_depth; /* fault queue mask */ 760 761 /* registers values */ 762 u16 temp[TEMP_REG_NUM]; 763 u8 temp_hyst; 764 u8 conalert; 765 u16 reported_alarms; /* alarms reported as sysfs/udev events */ 766 u16 current_alarms; /* current alarms, reported by chip */ 767 u16 alarms; /* alarms not yet reported to user */ 768}; 769 770/* 771 * Support functions 772 */ 773 774/* 775 * If the chip supports PEC but not on write byte transactions, we need 776 * to explicitly ask for a transaction without PEC. 777 */ 778static inline s32 lm90_write_no_pec(struct i2c_client *client, u8 value) 779{ 780 return i2c_smbus_xfer(client->adapter, client->addr, 781 client->flags & ~I2C_CLIENT_PEC, 782 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL); 783} 784 785/* 786 * It is assumed that client->update_lock is held (unless we are in 787 * detection or initialization steps). This matters when PEC is enabled 788 * for chips with partial PEC support, because we don't want the address 789 * pointer to change between the write byte and the read byte transactions. 790 */ 791static int lm90_read_reg(struct i2c_client *client, u8 reg) 792{ 793 struct lm90_data *data = i2c_get_clientdata(client); 794 bool partial_pec = (client->flags & I2C_CLIENT_PEC) && 795 (data->flags & LM90_HAVE_PARTIAL_PEC); 796 int err; 797 798 if (partial_pec) { 799 err = lm90_write_no_pec(client, reg); 800 if (err) 801 return err; 802 return i2c_smbus_read_byte(client); 803 } 804 return i2c_smbus_read_byte_data(client, reg); 805} 806 807/* 808 * Return register write address 809 * 810 * The write address for registers 0x03 .. 0x08 is the read address plus 6. 811 * For other registers the write address matches the read address. 812 */ 813static u8 lm90_write_reg_addr(u8 reg) 814{ 815 if (reg >= LM90_REG_CONFIG1 && reg <= LM90_REG_REMOTE_LOWH) 816 return reg + 6; 817 return reg; 818} 819 820/* 821 * Write into LM90 register. 822 * Convert register address to write address if needed, then execute the 823 * operation. 824 */ 825static int lm90_write_reg(struct i2c_client *client, u8 reg, u8 val) 826{ 827 return i2c_smbus_write_byte_data(client, lm90_write_reg_addr(reg), val); 828} 829 830/* 831 * Write into 16-bit LM90 register. 832 * Convert register addresses to write address if needed, then execute the 833 * operation. 834 */ 835static int lm90_write16(struct i2c_client *client, u8 regh, u8 regl, u16 val) 836{ 837 int ret; 838 839 ret = lm90_write_reg(client, regh, val >> 8); 840 if (ret < 0 || !regl) 841 return ret; 842 return lm90_write_reg(client, regl, val & 0xff); 843} 844 845static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl, 846 bool is_volatile) 847{ 848 int oldh, newh, l; 849 850 oldh = lm90_read_reg(client, regh); 851 if (oldh < 0) 852 return oldh; 853 854 if (!regl) 855 return oldh << 8; 856 857 l = lm90_read_reg(client, regl); 858 if (l < 0) 859 return l; 860 861 if (!is_volatile) 862 return (oldh << 8) | l; 863 864 /* 865 * For volatile registers we have to use a trick. 866 * We have to read two registers to have the sensor temperature, 867 * but we have to beware a conversion could occur between the 868 * readings. The datasheet says we should either use 869 * the one-shot conversion register, which we don't want to do 870 * (disables hardware monitoring) or monitor the busy bit, which is 871 * impossible (we can't read the values and monitor that bit at the 872 * exact same time). So the solution used here is to read the high 873 * the high byte again. If the new high byte matches the old one, 874 * then we have a valid reading. Otherwise we have to read the low 875 * byte again, and now we believe we have a correct reading. 876 */ 877 newh = lm90_read_reg(client, regh); 878 if (newh < 0) 879 return newh; 880 if (oldh != newh) { 881 l = lm90_read_reg(client, regl); 882 if (l < 0) 883 return l; 884 } 885 return (newh << 8) | l; 886} 887 888static int lm90_update_confreg(struct lm90_data *data, u8 config) 889{ 890 if (data->config != config) { 891 int err; 892 893 err = lm90_write_reg(data->client, LM90_REG_CONFIG1, config); 894 if (err) 895 return err; 896 data->config = config; 897 } 898 return 0; 899} 900 901/* 902 * client->update_lock must be held when calling this function (unless we are 903 * in detection or initialization steps), and while a remote channel other 904 * than channel 0 is selected. Also, calling code must make sure to re-select 905 * external channel 0 before releasing the lock. This is necessary because 906 * various registers have different meanings as a result of selecting a 907 * non-default remote channel. 908 */ 909static int lm90_select_remote_channel(struct lm90_data *data, bool second) 910{ 911 u8 config = data->config & ~0x08; 912 913 if (second) 914 config |= 0x08; 915 916 return lm90_update_confreg(data, config); 917} 918 919static int lm90_write_convrate(struct lm90_data *data, int val) 920{ 921 u8 config = data->config; 922 int err; 923 924 /* Save config and pause conversion */ 925 if (data->flags & LM90_PAUSE_FOR_CONFIG) { 926 err = lm90_update_confreg(data, config | 0x40); 927 if (err < 0) 928 return err; 929 } 930 931 /* Set conv rate */ 932 err = lm90_write_reg(data->client, LM90_REG_CONVRATE, val); 933 934 /* Revert change to config */ 935 lm90_update_confreg(data, config); 936 937 return err; 938} 939 940/* 941 * Set conversion rate. 942 * client->update_lock must be held when calling this function (unless we are 943 * in detection or initialization steps). 944 */ 945static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data, 946 unsigned int interval) 947{ 948 unsigned int update_interval; 949 int i, err; 950 951 /* Shift calculations to avoid rounding errors */ 952 interval <<= 6; 953 954 /* find the nearest update rate */ 955 for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6; 956 i < data->max_convrate; i++, update_interval >>= 1) 957 if (interval >= update_interval * 3 / 4) 958 break; 959 960 err = lm90_write_convrate(data, i); 961 data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64); 962 return err; 963} 964 965static int lm90_set_faultqueue(struct i2c_client *client, 966 struct lm90_data *data, int val) 967{ 968 int err; 969 970 if (data->faultqueue_mask) { 971 err = lm90_update_confreg(data, val <= data->faultqueue_depth / 2 ? 972 data->config & ~data->faultqueue_mask : 973 data->config | data->faultqueue_mask); 974 } else { 975 static const u8 values[4] = {0, 2, 6, 0x0e}; 976 977 data->conalert = (data->conalert & 0xf1) | values[val - 1]; 978 err = lm90_write_reg(data->client, TMP451_REG_CONALERT, 979 data->conalert); 980 } 981 982 return err; 983} 984 985static int lm90_update_limits(struct device *dev) 986{ 987 struct lm90_data *data = dev_get_drvdata(dev); 988 struct i2c_client *client = data->client; 989 int val; 990 991 if (data->flags & LM90_HAVE_CRIT) { 992 val = lm90_read_reg(client, LM90_REG_LOCAL_CRIT); 993 if (val < 0) 994 return val; 995 data->temp[LOCAL_CRIT] = val << 8; 996 997 val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT); 998 if (val < 0) 999 return val; 1000 data->temp[REMOTE_CRIT] = val << 8; 1001 1002 val = lm90_read_reg(client, LM90_REG_TCRIT_HYST); 1003 if (val < 0) 1004 return val; 1005 data->temp_hyst = val; 1006 } 1007 if ((data->flags & LM90_HAVE_FAULTQUEUE) && !data->faultqueue_mask) { 1008 val = lm90_read_reg(client, TMP451_REG_CONALERT); 1009 if (val < 0) 1010 return val; 1011 data->conalert = val; 1012 } 1013 1014 val = lm90_read16(client, LM90_REG_REMOTE_LOWH, 1015 (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_LOWL : 0, 1016 false); 1017 if (val < 0) 1018 return val; 1019 data->temp[REMOTE_LOW] = val; 1020 1021 val = lm90_read16(client, LM90_REG_REMOTE_HIGHH, 1022 (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_HIGHL : 0, 1023 false); 1024 if (val < 0) 1025 return val; 1026 data->temp[REMOTE_HIGH] = val; 1027 1028 if (data->flags & LM90_HAVE_OFFSET) { 1029 val = lm90_read16(client, LM90_REG_REMOTE_OFFSH, 1030 LM90_REG_REMOTE_OFFSL, false); 1031 if (val < 0) 1032 return val; 1033 data->temp[REMOTE_OFFSET] = val; 1034 } 1035 1036 if (data->flags & LM90_HAVE_EMERGENCY) { 1037 val = lm90_read_reg(client, MAX6659_REG_LOCAL_EMERG); 1038 if (val < 0) 1039 return val; 1040 data->temp[LOCAL_EMERG] = val << 8; 1041 1042 val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG); 1043 if (val < 0) 1044 return val; 1045 data->temp[REMOTE_EMERG] = val << 8; 1046 } 1047 1048 if (data->flags & LM90_HAVE_TEMP3) { 1049 val = lm90_select_remote_channel(data, true); 1050 if (val < 0) 1051 return val; 1052 1053 val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT); 1054 if (val < 0) 1055 return val; 1056 data->temp[REMOTE2_CRIT] = val << 8; 1057 1058 if (data->flags & LM90_HAVE_EMERGENCY) { 1059 val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG); 1060 if (val < 0) 1061 return val; 1062 data->temp[REMOTE2_EMERG] = val << 8; 1063 } 1064 1065 val = lm90_read_reg(client, LM90_REG_REMOTE_LOWH); 1066 if (val < 0) 1067 return val; 1068 data->temp[REMOTE2_LOW] = val << 8; 1069 1070 val = lm90_read_reg(client, LM90_REG_REMOTE_HIGHH); 1071 if (val < 0) 1072 return val; 1073 data->temp[REMOTE2_HIGH] = val << 8; 1074 1075 if (data->flags & LM90_HAVE_OFFSET) { 1076 val = lm90_read16(client, LM90_REG_REMOTE_OFFSH, 1077 LM90_REG_REMOTE_OFFSL, false); 1078 if (val < 0) 1079 return val; 1080 data->temp[REMOTE2_OFFSET] = val; 1081 } 1082 1083 lm90_select_remote_channel(data, false); 1084 } 1085 1086 return 0; 1087} 1088 1089static void lm90_report_alarms(struct work_struct *work) 1090{ 1091 struct lm90_data *data = container_of(work, struct lm90_data, report_work); 1092 u16 cleared_alarms, new_alarms, current_alarms; 1093 struct device *hwmon_dev = data->hwmon_dev; 1094 struct device *dev = &data->client->dev; 1095 int st, st2; 1096 1097 current_alarms = data->current_alarms; 1098 cleared_alarms = data->reported_alarms & ~current_alarms; 1099 new_alarms = current_alarms & ~data->reported_alarms; 1100 1101 if (!cleared_alarms && !new_alarms) 1102 return; 1103 1104 st = new_alarms & 0xff; 1105 st2 = new_alarms >> 8; 1106 1107 if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) || 1108 (st2 & MAX6696_STATUS2_LOT2)) 1109 dev_dbg(dev, "temp%d out of range, please check!\n", 1); 1110 if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) || 1111 (st2 & MAX6696_STATUS2_ROT2)) 1112 dev_dbg(dev, "temp%d out of range, please check!\n", 2); 1113 if (st & LM90_STATUS_ROPEN) 1114 dev_dbg(dev, "temp%d diode open, please check!\n", 2); 1115 if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH | 1116 MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2)) 1117 dev_dbg(dev, "temp%d out of range, please check!\n", 3); 1118 if (st2 & MAX6696_STATUS2_R2OPEN) 1119 dev_dbg(dev, "temp%d diode open, please check!\n", 3); 1120 1121 st |= cleared_alarms & 0xff; 1122 st2 |= cleared_alarms >> 8; 1123 1124 if (st & LM90_STATUS_LLOW) 1125 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 0); 1126 if (st & LM90_STATUS_RLOW) 1127 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 1); 1128 if (st2 & MAX6696_STATUS2_R2LOW) 1129 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 2); 1130 1131 if (st & LM90_STATUS_LHIGH) 1132 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 0); 1133 if (st & LM90_STATUS_RHIGH) 1134 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 1); 1135 if (st2 & MAX6696_STATUS2_R2HIGH) 1136 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 2); 1137 1138 if (st & LM90_STATUS_LTHRM) 1139 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 0); 1140 if (st & LM90_STATUS_RTHRM) 1141 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 1); 1142 if (st2 & MAX6696_STATUS2_R2THRM) 1143 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 2); 1144 1145 if (st2 & MAX6696_STATUS2_LOT2) 1146 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 0); 1147 if (st2 & MAX6696_STATUS2_ROT2) 1148 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 1); 1149 if (st2 & MAX6696_STATUS2_R2OT2) 1150 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 2); 1151 1152 data->reported_alarms = current_alarms; 1153} 1154 1155static int lm90_update_alarms_locked(struct lm90_data *data, bool force) 1156{ 1157 if (force || !data->alarms_valid || 1158 time_after(jiffies, data->alarms_updated + msecs_to_jiffies(data->update_interval))) { 1159 struct i2c_client *client = data->client; 1160 bool check_enable; 1161 u16 alarms; 1162 int val; 1163 1164 data->alarms_valid = false; 1165 1166 val = lm90_read_reg(client, LM90_REG_STATUS); 1167 if (val < 0) 1168 return val; 1169 alarms = val & ~LM90_STATUS_BUSY; 1170 1171 if (data->reg_status2) { 1172 val = lm90_read_reg(client, data->reg_status2); 1173 if (val < 0) 1174 return val; 1175 alarms |= val << 8; 1176 } 1177 /* 1178 * If the update is forced (called from interrupt or alert 1179 * handler) and alarm data is valid, the alarms may have been 1180 * updated after the last update interval, and the status 1181 * register may still be cleared. Only add additional alarms 1182 * in this case. Alarms will be cleared later if appropriate. 1183 */ 1184 if (force && data->alarms_valid) 1185 data->current_alarms |= alarms; 1186 else 1187 data->current_alarms = alarms; 1188 data->alarms |= alarms; 1189 1190 check_enable = (client->irq || !(data->config_orig & 0x80)) && 1191 (data->config & 0x80); 1192 1193 if (force || check_enable) 1194 schedule_work(&data->report_work); 1195 1196 /* 1197 * Re-enable ALERT# output if it was originally enabled, relevant 1198 * alarms are all clear, and alerts are currently disabled. 1199 * Otherwise (re)schedule worker if needed. 1200 */ 1201 if (check_enable) { 1202 if (!(data->current_alarms & data->alert_alarms)) { 1203 dev_dbg(&client->dev, "Re-enabling ALERT#\n"); 1204 lm90_update_confreg(data, data->config & ~0x80); 1205 /* 1206 * We may have been called from the update handler. 1207 * If so, the worker, if scheduled, is no longer 1208 * needed. Cancel it. Don't synchronize because 1209 * it may already be running. 1210 */ 1211 cancel_delayed_work(&data->alert_work); 1212 } else { 1213 schedule_delayed_work(&data->alert_work, 1214 max_t(int, HZ, msecs_to_jiffies(data->update_interval))); 1215 } 1216 } 1217 data->alarms_updated = jiffies; 1218 data->alarms_valid = true; 1219 } 1220 return 0; 1221} 1222 1223static int lm90_update_alarms(struct lm90_data *data, bool force) 1224{ 1225 int err; 1226 1227 hwmon_lock(data->hwmon_dev); 1228 err = lm90_update_alarms_locked(data, force); 1229 hwmon_unlock(data->hwmon_dev); 1230 1231 return err; 1232} 1233 1234static void lm90_alert_work(struct work_struct *__work) 1235{ 1236 struct delayed_work *delayed_work = to_delayed_work(__work); 1237 struct lm90_data *data = container_of(delayed_work, struct lm90_data, alert_work); 1238 1239 /* Nothing to do if alerts are enabled */ 1240 if (!(data->config & 0x80)) 1241 return; 1242 1243 lm90_update_alarms(data, true); 1244} 1245 1246static int lm90_update_device(struct device *dev) 1247{ 1248 struct lm90_data *data = dev_get_drvdata(dev); 1249 struct i2c_client *client = data->client; 1250 unsigned long next_update; 1251 int val; 1252 1253 if (!data->valid) { 1254 val = lm90_update_limits(dev); 1255 if (val < 0) 1256 return val; 1257 } 1258 1259 next_update = data->last_updated + 1260 msecs_to_jiffies(data->update_interval); 1261 if (time_after(jiffies, next_update) || !data->valid) { 1262 dev_dbg(&client->dev, "Updating lm90 data.\n"); 1263 1264 data->valid = false; 1265 1266 val = lm90_read_reg(client, LM90_REG_LOCAL_LOW); 1267 if (val < 0) 1268 return val; 1269 data->temp[LOCAL_LOW] = val << 8; 1270 1271 val = lm90_read_reg(client, LM90_REG_LOCAL_HIGH); 1272 if (val < 0) 1273 return val; 1274 data->temp[LOCAL_HIGH] = val << 8; 1275 1276 val = lm90_read16(client, LM90_REG_LOCAL_TEMP, 1277 data->reg_local_ext, true); 1278 if (val < 0) 1279 return val; 1280 data->temp[LOCAL_TEMP] = val; 1281 val = lm90_read16(client, LM90_REG_REMOTE_TEMPH, 1282 data->reg_remote_ext, true); 1283 if (val < 0) 1284 return val; 1285 data->temp[REMOTE_TEMP] = val; 1286 1287 if (data->flags & LM90_HAVE_TEMP3) { 1288 val = lm90_select_remote_channel(data, true); 1289 if (val < 0) 1290 return val; 1291 1292 val = lm90_read16(client, LM90_REG_REMOTE_TEMPH, 1293 data->reg_remote_ext, true); 1294 if (val < 0) { 1295 lm90_select_remote_channel(data, false); 1296 return val; 1297 } 1298 data->temp[REMOTE2_TEMP] = val; 1299 1300 lm90_select_remote_channel(data, false); 1301 } 1302 1303 val = lm90_update_alarms_locked(data, false); 1304 if (val < 0) 1305 return val; 1306 1307 data->last_updated = jiffies; 1308 data->valid = true; 1309 } 1310 1311 return 0; 1312} 1313 1314static int lm90_temp_get_resolution(struct lm90_data *data, int index) 1315{ 1316 switch (index) { 1317 case REMOTE_TEMP: 1318 if (data->reg_remote_ext) 1319 return data->resolution; 1320 return 8; 1321 case REMOTE_OFFSET: 1322 case REMOTE2_OFFSET: 1323 case REMOTE2_TEMP: 1324 return data->resolution; 1325 case LOCAL_TEMP: 1326 if (data->reg_local_ext) 1327 return data->resolution; 1328 return 8; 1329 case REMOTE_LOW: 1330 case REMOTE_HIGH: 1331 case REMOTE2_LOW: 1332 case REMOTE2_HIGH: 1333 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) 1334 return data->resolution; 1335 return 8; 1336 default: 1337 return 8; 1338 } 1339} 1340 1341static int lm90_temp_from_reg(u32 flags, u16 regval, u8 resolution) 1342{ 1343 int val; 1344 1345 if (flags & LM90_HAVE_EXTENDED_TEMP) 1346 val = regval - 0x4000; 1347 else if (flags & (LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_EXT_UNSIGNED)) 1348 val = regval; 1349 else 1350 val = (s16)regval; 1351 1352 return ((val >> (16 - resolution)) * 1000) >> (resolution - 8); 1353} 1354 1355static int lm90_get_temp(struct lm90_data *data, int index, int channel) 1356{ 1357 int temp = lm90_temp_from_reg(data->flags, data->temp[index], 1358 lm90_temp_get_resolution(data, index)); 1359 1360 /* +16 degrees offset for remote temperature on LM99 */ 1361 if (data->kind == lm99 && channel) 1362 temp += 16000; 1363 1364 return temp; 1365} 1366 1367static u16 lm90_temp_to_reg(u32 flags, long val, u8 resolution) 1368{ 1369 int fraction = resolution > 8 ? 1370 1000 - DIV_ROUND_CLOSEST(1000, BIT(resolution - 8)) : 0; 1371 1372 if (flags & LM90_HAVE_EXTENDED_TEMP) { 1373 val = clamp_val(val, -64000, 191000 + fraction); 1374 val += 64000; 1375 } else if (flags & LM90_HAVE_EXT_UNSIGNED) { 1376 val = clamp_val(val, 0, 255000 + fraction); 1377 } else if (flags & LM90_HAVE_UNSIGNED_TEMP) { 1378 val = clamp_val(val, 0, 127000 + fraction); 1379 } else { 1380 val = clamp_val(val, -128000, 127000 + fraction); 1381 } 1382 1383 return DIV_ROUND_CLOSEST(val << (resolution - 8), 1000) << (16 - resolution); 1384} 1385 1386static int lm90_set_temp(struct lm90_data *data, int index, int channel, long val) 1387{ 1388 static const u8 regs[] = { 1389 [LOCAL_LOW] = LM90_REG_LOCAL_LOW, 1390 [LOCAL_HIGH] = LM90_REG_LOCAL_HIGH, 1391 [LOCAL_CRIT] = LM90_REG_LOCAL_CRIT, 1392 [REMOTE_CRIT] = LM90_REG_REMOTE_CRIT, 1393 [LOCAL_EMERG] = MAX6659_REG_LOCAL_EMERG, 1394 [REMOTE_EMERG] = MAX6659_REG_REMOTE_EMERG, 1395 [REMOTE2_CRIT] = LM90_REG_REMOTE_CRIT, 1396 [REMOTE2_EMERG] = MAX6659_REG_REMOTE_EMERG, 1397 [REMOTE_LOW] = LM90_REG_REMOTE_LOWH, 1398 [REMOTE_HIGH] = LM90_REG_REMOTE_HIGHH, 1399 [REMOTE2_LOW] = LM90_REG_REMOTE_LOWH, 1400 [REMOTE2_HIGH] = LM90_REG_REMOTE_HIGHH, 1401 }; 1402 struct i2c_client *client = data->client; 1403 u8 regh = regs[index]; 1404 u8 regl = 0; 1405 int err; 1406 1407 if (channel && (data->flags & LM90_HAVE_REM_LIMIT_EXT)) { 1408 if (index == REMOTE_LOW || index == REMOTE2_LOW) 1409 regl = LM90_REG_REMOTE_LOWL; 1410 else if (index == REMOTE_HIGH || index == REMOTE2_HIGH) 1411 regl = LM90_REG_REMOTE_HIGHL; 1412 } 1413 1414 /* +16 degrees offset for remote temperature on LM99 */ 1415 if (data->kind == lm99 && channel) { 1416 /* prevent integer underflow */ 1417 val = max(val, -128000l); 1418 val -= 16000; 1419 } 1420 1421 data->temp[index] = lm90_temp_to_reg(data->flags, val, 1422 lm90_temp_get_resolution(data, index)); 1423 1424 if (channel > 1) 1425 lm90_select_remote_channel(data, true); 1426 1427 err = lm90_write16(client, regh, regl, data->temp[index]); 1428 1429 if (channel > 1) 1430 lm90_select_remote_channel(data, false); 1431 1432 return err; 1433} 1434 1435static int lm90_get_temphyst(struct lm90_data *data, int index, int channel) 1436{ 1437 int temp = lm90_get_temp(data, index, channel); 1438 1439 return temp - data->temp_hyst * 1000; 1440} 1441 1442static int lm90_set_temphyst(struct lm90_data *data, long val) 1443{ 1444 int temp = lm90_get_temp(data, LOCAL_CRIT, 0); 1445 1446 /* prevent integer overflow/underflow */ 1447 val = clamp_val(val, -128000l, 255000l); 1448 data->temp_hyst = clamp_val(DIV_ROUND_CLOSEST(temp - val, 1000), 0, 31); 1449 1450 return lm90_write_reg(data->client, LM90_REG_TCRIT_HYST, data->temp_hyst); 1451} 1452 1453static int lm90_get_temp_offset(struct lm90_data *data, int index) 1454{ 1455 int res = lm90_temp_get_resolution(data, index); 1456 1457 return lm90_temp_from_reg(0, data->temp[index], res); 1458} 1459 1460static int lm90_set_temp_offset(struct lm90_data *data, int index, int channel, long val) 1461{ 1462 int err; 1463 1464 val = lm90_temp_to_reg(0, val, lm90_temp_get_resolution(data, index)); 1465 1466 /* For ADT7481 we can use the same registers for remote channel 1 and 2 */ 1467 if (channel > 1) 1468 lm90_select_remote_channel(data, true); 1469 1470 err = lm90_write16(data->client, LM90_REG_REMOTE_OFFSH, LM90_REG_REMOTE_OFFSL, val); 1471 1472 if (channel > 1) 1473 lm90_select_remote_channel(data, false); 1474 1475 if (err) 1476 return err; 1477 1478 data->temp[index] = val; 1479 1480 return 0; 1481} 1482 1483static const u8 lm90_temp_index[MAX_CHANNELS] = { 1484 LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP 1485}; 1486 1487static const u8 lm90_temp_min_index[MAX_CHANNELS] = { 1488 LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW 1489}; 1490 1491static const u8 lm90_temp_max_index[MAX_CHANNELS] = { 1492 LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH 1493}; 1494 1495static const u8 lm90_temp_crit_index[MAX_CHANNELS] = { 1496 LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT 1497}; 1498 1499static const u8 lm90_temp_emerg_index[MAX_CHANNELS] = { 1500 LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG 1501}; 1502 1503static const s8 lm90_temp_offset_index[MAX_CHANNELS] = { 1504 -1, REMOTE_OFFSET, REMOTE2_OFFSET 1505}; 1506 1507static const u16 lm90_min_alarm_bits[MAX_CHANNELS] = { BIT(5), BIT(3), BIT(11) }; 1508static const u16 lm90_max_alarm_bits[MAX_CHANNELS] = { BIT(6), BIT(4), BIT(12) }; 1509static const u16 lm90_crit_alarm_bits[MAX_CHANNELS] = { BIT(0), BIT(1), BIT(9) }; 1510static const u16 lm90_crit_alarm_bits_swapped[MAX_CHANNELS] = { BIT(1), BIT(0), BIT(9) }; 1511static const u16 lm90_emergency_alarm_bits[MAX_CHANNELS] = { BIT(15), BIT(13), BIT(14) }; 1512static const u16 lm90_fault_bits[MAX_CHANNELS] = { BIT(0), BIT(2), BIT(10) }; 1513 1514static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val) 1515{ 1516 struct lm90_data *data = dev_get_drvdata(dev); 1517 int err; 1518 u16 bit; 1519 1520 err = lm90_update_device(dev); 1521 if (err) 1522 return err; 1523 1524 switch (attr) { 1525 case hwmon_temp_input: 1526 *val = lm90_get_temp(data, lm90_temp_index[channel], channel); 1527 break; 1528 case hwmon_temp_min_alarm: 1529 case hwmon_temp_max_alarm: 1530 case hwmon_temp_crit_alarm: 1531 case hwmon_temp_emergency_alarm: 1532 case hwmon_temp_fault: 1533 switch (attr) { 1534 case hwmon_temp_min_alarm: 1535 bit = lm90_min_alarm_bits[channel]; 1536 break; 1537 case hwmon_temp_max_alarm: 1538 bit = lm90_max_alarm_bits[channel]; 1539 break; 1540 case hwmon_temp_crit_alarm: 1541 if (data->flags & LM90_HAVE_CRIT_ALRM_SWP) 1542 bit = lm90_crit_alarm_bits_swapped[channel]; 1543 else 1544 bit = lm90_crit_alarm_bits[channel]; 1545 break; 1546 case hwmon_temp_emergency_alarm: 1547 bit = lm90_emergency_alarm_bits[channel]; 1548 break; 1549 case hwmon_temp_fault: 1550 bit = lm90_fault_bits[channel]; 1551 break; 1552 } 1553 *val = !!(data->alarms & bit); 1554 data->alarms &= ~bit; 1555 data->alarms |= data->current_alarms; 1556 break; 1557 case hwmon_temp_min: 1558 *val = lm90_get_temp(data, lm90_temp_min_index[channel], channel); 1559 break; 1560 case hwmon_temp_max: 1561 *val = lm90_get_temp(data, lm90_temp_max_index[channel], channel); 1562 break; 1563 case hwmon_temp_crit: 1564 *val = lm90_get_temp(data, lm90_temp_crit_index[channel], channel); 1565 break; 1566 case hwmon_temp_crit_hyst: 1567 *val = lm90_get_temphyst(data, lm90_temp_crit_index[channel], channel); 1568 break; 1569 case hwmon_temp_emergency: 1570 *val = lm90_get_temp(data, lm90_temp_emerg_index[channel], channel); 1571 break; 1572 case hwmon_temp_emergency_hyst: 1573 *val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel], channel); 1574 break; 1575 case hwmon_temp_offset: 1576 *val = lm90_get_temp_offset(data, lm90_temp_offset_index[channel]); 1577 break; 1578 default: 1579 return -EOPNOTSUPP; 1580 } 1581 return 0; 1582} 1583 1584static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val) 1585{ 1586 struct lm90_data *data = dev_get_drvdata(dev); 1587 int err; 1588 1589 err = lm90_update_device(dev); 1590 if (err) 1591 return err; 1592 1593 switch (attr) { 1594 case hwmon_temp_min: 1595 err = lm90_set_temp(data, lm90_temp_min_index[channel], 1596 channel, val); 1597 break; 1598 case hwmon_temp_max: 1599 err = lm90_set_temp(data, lm90_temp_max_index[channel], 1600 channel, val); 1601 break; 1602 case hwmon_temp_crit: 1603 err = lm90_set_temp(data, lm90_temp_crit_index[channel], 1604 channel, val); 1605 break; 1606 case hwmon_temp_crit_hyst: 1607 err = lm90_set_temphyst(data, val); 1608 break; 1609 case hwmon_temp_emergency: 1610 err = lm90_set_temp(data, lm90_temp_emerg_index[channel], 1611 channel, val); 1612 break; 1613 case hwmon_temp_offset: 1614 err = lm90_set_temp_offset(data, lm90_temp_offset_index[channel], 1615 channel, val); 1616 break; 1617 default: 1618 err = -EOPNOTSUPP; 1619 break; 1620 } 1621 return err; 1622} 1623 1624static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel) 1625{ 1626 switch (attr) { 1627 case hwmon_temp_input: 1628 case hwmon_temp_min_alarm: 1629 case hwmon_temp_max_alarm: 1630 case hwmon_temp_crit_alarm: 1631 case hwmon_temp_emergency_alarm: 1632 case hwmon_temp_emergency_hyst: 1633 case hwmon_temp_fault: 1634 case hwmon_temp_label: 1635 return 0444; 1636 case hwmon_temp_min: 1637 case hwmon_temp_max: 1638 case hwmon_temp_crit: 1639 case hwmon_temp_emergency: 1640 case hwmon_temp_offset: 1641 return 0644; 1642 case hwmon_temp_crit_hyst: 1643 if (channel == 0) 1644 return 0644; 1645 return 0444; 1646 default: 1647 return 0; 1648 } 1649} 1650 1651static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val) 1652{ 1653 struct lm90_data *data = dev_get_drvdata(dev); 1654 int err; 1655 1656 err = lm90_update_device(dev); 1657 if (err) 1658 return err; 1659 1660 switch (attr) { 1661 case hwmon_chip_update_interval: 1662 *val = data->update_interval; 1663 break; 1664 case hwmon_chip_alarms: 1665 *val = data->alarms; 1666 break; 1667 case hwmon_chip_temp_samples: 1668 if (data->faultqueue_mask) { 1669 *val = (data->config & data->faultqueue_mask) ? 1670 data->faultqueue_depth : 1; 1671 } else { 1672 switch (data->conalert & 0x0e) { 1673 case 0x0: 1674 default: 1675 *val = 1; 1676 break; 1677 case 0x2: 1678 *val = 2; 1679 break; 1680 case 0x6: 1681 *val = 3; 1682 break; 1683 case 0xe: 1684 *val = 4; 1685 break; 1686 } 1687 } 1688 break; 1689 default: 1690 return -EOPNOTSUPP; 1691 } 1692 1693 return 0; 1694} 1695 1696static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val) 1697{ 1698 struct lm90_data *data = dev_get_drvdata(dev); 1699 struct i2c_client *client = data->client; 1700 int err; 1701 1702 err = lm90_update_device(dev); 1703 if (err) 1704 return err; 1705 1706 switch (attr) { 1707 case hwmon_chip_update_interval: 1708 err = lm90_set_convrate(client, data, 1709 clamp_val(val, 0, 100000)); 1710 break; 1711 case hwmon_chip_temp_samples: 1712 err = lm90_set_faultqueue(client, data, clamp_val(val, 1, 4)); 1713 break; 1714 default: 1715 err = -EOPNOTSUPP; 1716 break; 1717 } 1718 return err; 1719} 1720 1721static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel) 1722{ 1723 switch (attr) { 1724 case hwmon_chip_update_interval: 1725 case hwmon_chip_temp_samples: 1726 return 0644; 1727 case hwmon_chip_alarms: 1728 return 0444; 1729 default: 1730 return 0; 1731 } 1732} 1733 1734static int lm90_read(struct device *dev, enum hwmon_sensor_types type, 1735 u32 attr, int channel, long *val) 1736{ 1737 switch (type) { 1738 case hwmon_chip: 1739 return lm90_chip_read(dev, attr, channel, val); 1740 case hwmon_temp: 1741 return lm90_temp_read(dev, attr, channel, val); 1742 default: 1743 return -EOPNOTSUPP; 1744 } 1745} 1746 1747static int lm90_read_string(struct device *dev, enum hwmon_sensor_types type, 1748 u32 attr, int channel, const char **str) 1749{ 1750 struct lm90_data *data = dev_get_drvdata(dev); 1751 1752 *str = data->channel_label[channel]; 1753 1754 return 0; 1755} 1756 1757static int lm90_write(struct device *dev, enum hwmon_sensor_types type, 1758 u32 attr, int channel, long val) 1759{ 1760 switch (type) { 1761 case hwmon_chip: 1762 return lm90_chip_write(dev, attr, channel, val); 1763 case hwmon_temp: 1764 return lm90_temp_write(dev, attr, channel, val); 1765 default: 1766 return -EOPNOTSUPP; 1767 } 1768} 1769 1770static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type, 1771 u32 attr, int channel) 1772{ 1773 switch (type) { 1774 case hwmon_chip: 1775 return lm90_chip_is_visible(data, attr, channel); 1776 case hwmon_temp: 1777 return lm90_temp_is_visible(data, attr, channel); 1778 default: 1779 return 0; 1780 } 1781} 1782 1783static const char *lm90_detect_lm84(struct i2c_client *client) 1784{ 1785 static const u8 regs[] = { 1786 LM90_REG_STATUS, LM90_REG_LOCAL_TEMP, LM90_REG_LOCAL_HIGH, 1787 LM90_REG_REMOTE_TEMPH, LM90_REG_REMOTE_HIGHH 1788 }; 1789 int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS); 1790 int reg1, reg2, reg3, reg4; 1791 bool nonzero = false; 1792 u8 ff = 0xff; 1793 int i; 1794 1795 if (status < 0 || (status & 0xab)) 1796 return NULL; 1797 1798 /* 1799 * For LM84, undefined registers return the most recent value. 1800 * Repeat several times, each time checking against a different 1801 * (presumably) existing register. 1802 */ 1803 for (i = 0; i < ARRAY_SIZE(regs); i++) { 1804 reg1 = i2c_smbus_read_byte_data(client, regs[i]); 1805 reg2 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL); 1806 reg3 = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW); 1807 reg4 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH); 1808 1809 if (reg1 < 0) 1810 return NULL; 1811 1812 /* If any register has a different value, this is not an LM84 */ 1813 if (reg2 != reg1 || reg3 != reg1 || reg4 != reg1) 1814 return NULL; 1815 1816 nonzero |= reg1 || reg2 || reg3 || reg4; 1817 ff &= reg1; 1818 } 1819 /* 1820 * If all registers always returned 0 or 0xff, all bets are off, 1821 * and we can not make any predictions about the chip type. 1822 */ 1823 return nonzero && ff != 0xff ? "lm84" : NULL; 1824} 1825 1826static const char *lm90_detect_max1617(struct i2c_client *client, int config1) 1827{ 1828 int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS); 1829 int llo, rlo, lhi, rhi; 1830 1831 if (status < 0 || (status & 0x03)) 1832 return NULL; 1833 1834 if (config1 & 0x3f) 1835 return NULL; 1836 1837 /* 1838 * Fail if unsupported registers return anything but 0xff. 1839 * The calling code already checked man_id and chip_id. 1840 * A byte read operation repeats the most recent read operation 1841 * and should also return 0xff. 1842 */ 1843 if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) != 0xff || 1844 i2c_smbus_read_byte_data(client, MAX6657_REG_LOCAL_TEMPL) != 0xff || 1845 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWL) != 0xff || 1846 i2c_smbus_read_byte(client) != 0xff) 1847 return NULL; 1848 1849 llo = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW); 1850 rlo = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH); 1851 1852 lhi = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH); 1853 rhi = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_HIGHH); 1854 1855 if (llo < 0 || rlo < 0) 1856 return NULL; 1857 1858 /* 1859 * A byte read operation repeats the most recent read and should 1860 * return the same value. 1861 */ 1862 if (i2c_smbus_read_byte(client) != rhi) 1863 return NULL; 1864 1865 /* 1866 * The following two checks are marginal since the checked values 1867 * are strictly speaking valid. 1868 */ 1869 1870 /* fail for negative high limits; this also catches read errors */ 1871 if ((s8)lhi < 0 || (s8)rhi < 0) 1872 return NULL; 1873 1874 /* fail if low limits are larger than or equal to high limits */ 1875 if ((s8)llo >= lhi || (s8)rlo >= rhi) 1876 return NULL; 1877 1878 if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA)) { 1879 /* 1880 * Word read operations return 0xff in second byte 1881 */ 1882 if (i2c_smbus_read_word_data(client, LM90_REG_REMOTE_TEMPL) != 1883 0xffff) 1884 return NULL; 1885 if (i2c_smbus_read_word_data(client, LM90_REG_CONFIG1) != 1886 (config1 | 0xff00)) 1887 return NULL; 1888 if (i2c_smbus_read_word_data(client, LM90_REG_LOCAL_HIGH) != 1889 (lhi | 0xff00)) 1890 return NULL; 1891 } 1892 1893 return "max1617"; 1894} 1895 1896static const char *lm90_detect_national(struct i2c_client *client, int chip_id, 1897 int config1, int convrate) 1898{ 1899 int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2); 1900 int address = client->addr; 1901 const char *name = NULL; 1902 1903 if (config2 < 0) 1904 return NULL; 1905 1906 if ((config1 & 0x2a) || (config2 & 0xf8) || convrate > 0x09) 1907 return NULL; 1908 1909 if (address != 0x4c && address != 0x4d) 1910 return NULL; 1911 1912 switch (chip_id & 0xf0) { 1913 case 0x10: /* LM86 */ 1914 if (address == 0x4c) 1915 name = "lm86"; 1916 break; 1917 case 0x20: /* LM90 */ 1918 if (address == 0x4c) 1919 name = "lm90"; 1920 break; 1921 case 0x30: /* LM89/LM99 */ 1922 name = "lm99"; /* detect LM89 as LM99 */ 1923 break; 1924 default: 1925 break; 1926 } 1927 1928 return name; 1929} 1930 1931static const char *lm90_detect_on(struct i2c_client *client, int chip_id, int config1, 1932 int convrate) 1933{ 1934 int address = client->addr; 1935 const char *name = NULL; 1936 1937 switch (chip_id) { 1938 case 0xca: /* NCT218 */ 1939 if ((address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && 1940 convrate <= 0x0a) 1941 name = "nct218"; 1942 break; 1943 default: 1944 break; 1945 } 1946 return name; 1947} 1948 1949static const char *lm90_detect_analog(struct i2c_client *client, bool common_address, 1950 int chip_id, int config1, int convrate) 1951{ 1952 int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS); 1953 int config2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CONFIG2); 1954 int man_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_MAN_ID); 1955 int chip_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CHIP_ID); 1956 int address = client->addr; 1957 const char *name = NULL; 1958 1959 if (status < 0 || config2 < 0 || man_id2 < 0 || chip_id2 < 0) 1960 return NULL; 1961 1962 /* 1963 * The following chips should be detected by this function. Known 1964 * register values are listed. Registers 0x3d .. 0x3e are undocumented 1965 * for most of the chips, yet appear to return a well defined value. 1966 * Register 0xff is undocumented for some of the chips. Register 0x3f 1967 * is undocumented for all chips, but also returns a well defined value. 1968 * Values are as reported from real chips unless mentioned otherwise. 1969 * The code below checks values for registers 0x3d, 0x3e, and 0xff, 1970 * but not for register 0x3f. 1971 * 1972 * Chip Register 1973 * 3d 3e 3f fe ff Notes 1974 * ---------------------------------------------------------- 1975 * adm1020 00 00 00 41 39 1976 * adm1021 00 00 00 41 03 1977 * adm1021a 00 00 00 41 3c 1978 * adm1023 00 00 00 41 3c same as adm1021a 1979 * adm1032 00 00 00 41 42 1980 * 1981 * adt7421 21 41 04 41 04 1982 * adt7461 00 00 00 41 51 1983 * adt7461a 61 41 05 41 57 1984 * adt7481 81 41 02 41 62 1985 * adt7482 - - - 41 65 datasheet 1986 * 82 41 05 41 75 real chip 1987 * adt7483 83 41 04 41 94 1988 * 1989 * nct72 61 41 07 41 55 1990 * nct210 00 00 00 41 3f 1991 * nct214 61 41 08 41 5a 1992 * nct1008 - - - 41 57 datasheet rev. 3 1993 * 61 41 06 41 54 real chip 1994 * 1995 * nvt210 - - - 41 - datasheet 1996 * nvt211 - - - 41 - datasheet 1997 */ 1998 switch (chip_id) { 1999 case 0x00 ... 0x03: /* ADM1021 */ 2000 case 0x05 ... 0x0f: 2001 if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address && 2002 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8)) 2003 name = "adm1021"; 2004 break; 2005 case 0x04: /* ADT7421 (undocumented) */ 2006 if (man_id2 == 0x41 && chip_id2 == 0x21 && 2007 (address == 0x4c || address == 0x4d) && 2008 (config1 & 0x0b) == 0x08 && convrate <= 0x0a) 2009 name = "adt7421"; 2010 break; 2011 case 0x30 ... 0x38: /* ADM1021A, ADM1023 */ 2012 case 0x3a ... 0x3e: 2013 /* 2014 * ADM1021A and compatible chips will be mis-detected as 2015 * ADM1023. Chips labeled 'ADM1021A' and 'ADM1023' were both 2016 * found to have a Chip ID of 0x3c. 2017 * ADM1021A does not officially support low byte registers 2018 * (0x12 .. 0x14), but a chip labeled ADM1021A does support it. 2019 * Official support for the temperature offset high byte 2020 * register (0x11) was added to revision F of the ADM1021A 2021 * datasheet. 2022 * It is currently unknown if there is a means to distinguish 2023 * ADM1021A from ADM1023, and/or if revisions of ADM1021A exist 2024 * which differ in functionality from ADM1023. 2025 */ 2026 if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address && 2027 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8)) 2028 name = "adm1023"; 2029 break; 2030 case 0x39: /* ADM1020 (undocumented) */ 2031 if (man_id2 == 0x00 && chip_id2 == 0x00 && 2032 (address == 0x4c || address == 0x4d || address == 0x4e) && 2033 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8)) 2034 name = "adm1020"; 2035 break; 2036 case 0x3f: /* NCT210 */ 2037 if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address && 2038 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8)) 2039 name = "nct210"; 2040 break; 2041 case 0x40 ... 0x4f: /* ADM1032 */ 2042 if (man_id2 == 0x00 && chip_id2 == 0x00 && 2043 (address == 0x4c || address == 0x4d) && !(config1 & 0x3f) && 2044 convrate <= 0x0a) 2045 name = "adm1032"; 2046 break; 2047 case 0x51: /* ADT7461 */ 2048 if (man_id2 == 0x00 && chip_id2 == 0x00 && 2049 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && 2050 convrate <= 0x0a) 2051 name = "adt7461"; 2052 break; 2053 case 0x54: /* NCT1008 */ 2054 if (man_id2 == 0x41 && chip_id2 == 0x61 && 2055 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && 2056 convrate <= 0x0a) 2057 name = "nct1008"; 2058 break; 2059 case 0x55: /* NCT72 */ 2060 if (man_id2 == 0x41 && chip_id2 == 0x61 && 2061 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && 2062 convrate <= 0x0a) 2063 name = "nct72"; 2064 break; 2065 case 0x57: /* ADT7461A, NCT1008 (datasheet rev. 3) */ 2066 if (man_id2 == 0x41 && chip_id2 == 0x61 && 2067 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && 2068 convrate <= 0x0a) 2069 name = "adt7461a"; 2070 break; 2071 case 0x5a: /* NCT214 */ 2072 if (man_id2 == 0x41 && chip_id2 == 0x61 && 2073 common_address && !(config1 & 0x1b) && convrate <= 0x0a) 2074 name = "nct214"; 2075 break; 2076 case 0x62: /* ADT7481, undocumented */ 2077 if (man_id2 == 0x41 && chip_id2 == 0x81 && 2078 (address == 0x4b || address == 0x4c) && !(config1 & 0x10) && 2079 !(config2 & 0x7f) && (convrate & 0x0f) <= 0x0b) { 2080 name = "adt7481"; 2081 } 2082 break; 2083 case 0x65: /* ADT7482, datasheet */ 2084 case 0x75: /* ADT7482, real chip */ 2085 if (man_id2 == 0x41 && chip_id2 == 0x82 && 2086 address == 0x4c && !(config1 & 0x10) && !(config2 & 0x7f) && 2087 convrate <= 0x0a) 2088 name = "adt7482"; 2089 break; 2090 case 0x94: /* ADT7483 */ 2091 if (man_id2 == 0x41 && chip_id2 == 0x83 && 2092 common_address && 2093 ((address >= 0x18 && address <= 0x1a) || 2094 (address >= 0x29 && address <= 0x2b) || 2095 (address >= 0x4c && address <= 0x4e)) && 2096 !(config1 & 0x10) && !(config2 & 0x7f) && convrate <= 0x0a) 2097 name = "adt7483a"; 2098 break; 2099 default: 2100 break; 2101 } 2102 2103 return name; 2104} 2105 2106static const char *lm90_detect_maxim(struct i2c_client *client, bool common_address, 2107 int chip_id, int config1, int convrate) 2108{ 2109 int man_id, emerg, emerg2, status2; 2110 int address = client->addr; 2111 const char *name = NULL; 2112 2113 switch (chip_id) { 2114 case 0x01: 2115 if (!common_address) 2116 break; 2117 2118 /* 2119 * We read MAX6659_REG_REMOTE_EMERG twice, and re-read 2120 * LM90_REG_MAN_ID in between. If MAX6659_REG_REMOTE_EMERG 2121 * exists, both readings will reflect the same value. Otherwise, 2122 * the readings will be different. 2123 */ 2124 emerg = i2c_smbus_read_byte_data(client, 2125 MAX6659_REG_REMOTE_EMERG); 2126 man_id = i2c_smbus_read_byte_data(client, 2127 LM90_REG_MAN_ID); 2128 emerg2 = i2c_smbus_read_byte_data(client, 2129 MAX6659_REG_REMOTE_EMERG); 2130 status2 = i2c_smbus_read_byte_data(client, 2131 MAX6696_REG_STATUS2); 2132 if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0) 2133 return NULL; 2134 2135 /* 2136 * Even though MAX6695 and MAX6696 do not have a chip ID 2137 * register, reading it returns 0x01. Bit 4 of the config1 2138 * register is unused and should return zero when read. Bit 0 of 2139 * the status2 register is unused and should return zero when 2140 * read. 2141 * 2142 * MAX6695 and MAX6696 have an additional set of temperature 2143 * limit registers. We can detect those chips by checking if 2144 * one of those registers exists. 2145 */ 2146 if (!(config1 & 0x10) && !(status2 & 0x01) && emerg == emerg2 && 2147 convrate <= 0x07) 2148 name = "max6696"; 2149 /* 2150 * The chip_id register of the MAX6680 and MAX6681 holds the 2151 * revision of the chip. The lowest bit of the config1 register 2152 * is unused and should return zero when read, so should the 2153 * second to last bit of config1 (software reset). Register 2154 * address 0x12 (LM90_REG_REMOTE_OFFSL) exists for this chip and 2155 * should differ from emerg2, and emerg2 should match man_id 2156 * since it does not exist. 2157 */ 2158 else if (!(config1 & 0x03) && convrate <= 0x07 && 2159 emerg2 == man_id && emerg2 != status2) 2160 name = "max6680"; 2161 /* 2162 * MAX1617A does not have any extended registers (register 2163 * address 0x10 or higher) except for manufacturer and 2164 * device ID registers. Unlike other chips of this series, 2165 * unsupported registers were observed to return a fixed value 2166 * of 0x01. 2167 * Note: Multiple chips with different markings labeled as 2168 * "MAX1617" (no "A") were observed to report manufacturer ID 2169 * 0x4d and device ID 0x01. It is unknown if other variants of 2170 * MAX1617/MAX617A with different behavior exist. The detection 2171 * code below works for those chips. 2172 */ 2173 else if (!(config1 & 0x03f) && convrate <= 0x07 && 2174 emerg == 0x01 && emerg2 == 0x01 && status2 == 0x01) 2175 name = "max1617"; 2176 break; 2177 case 0x08: 2178 /* 2179 * The chip_id of the MAX6654 holds the revision of the chip. 2180 * The lowest 3 bits of the config1 register are unused and 2181 * should return zero when read. 2182 */ 2183 if (common_address && !(config1 & 0x07) && convrate <= 0x07) 2184 name = "max6654"; 2185 break; 2186 case 0x09: 2187 /* 2188 * The chip_id of the MAX6690 holds the revision of the chip. 2189 * The lowest 3 bits of the config1 register are unused and 2190 * should return zero when read. 2191 * Note that MAX6654 and MAX6690 are practically the same chips. 2192 * The only diference is the rated accuracy. Rev. 1 of the 2193 * MAX6690 datasheet lists a chip ID of 0x08, and a chip labeled 2194 * MAX6654 was observed to have a chip ID of 0x09. 2195 */ 2196 if (common_address && !(config1 & 0x07) && convrate <= 0x07) 2197 name = "max6690"; 2198 break; 2199 case 0x4d: 2200 /* 2201 * MAX6642, MAX6657, MAX6658 and MAX6659 do NOT have a chip_id 2202 * register. Reading from that address will return the last 2203 * read value, which in our case is those of the man_id 2204 * register, or 0x4d. 2205 * MAX6642 does not have a conversion rate register, nor low 2206 * limit registers. Reading from those registers returns the 2207 * last read value. 2208 * 2209 * For MAX6657, MAX6658 and MAX6659, the config1 register lacks 2210 * a low nibble, so the value will be those of the previous 2211 * read, so in our case again those of the man_id register. 2212 * MAX6659 has a third set of upper temperature limit registers. 2213 * Those registers also return values on MAX6657 and MAX6658, 2214 * thus the only way to detect MAX6659 is by its address. 2215 * For this reason it will be mis-detected as MAX6657 if its 2216 * address is 0x4c. 2217 */ 2218 if (address >= 0x48 && address <= 0x4f && config1 == convrate && 2219 !(config1 & 0x0f)) { 2220 int regval; 2221 2222 /* 2223 * We know that this is not a MAX6657/58/59 because its 2224 * configuration register has the wrong value and it does 2225 * not appear to have a conversion rate register. 2226 */ 2227 2228 /* re-read manufacturer ID to have a good baseline */ 2229 if (i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID) != 0x4d) 2230 break; 2231 2232 /* check various non-existing registers */ 2233 if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != 0x4d || 2234 i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != 0x4d || 2235 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != 0x4d) 2236 break; 2237 2238 /* check for unused status register bits */ 2239 regval = i2c_smbus_read_byte_data(client, LM90_REG_STATUS); 2240 if (regval < 0 || (regval & 0x2b)) 2241 break; 2242 2243 /* re-check unsupported registers */ 2244 if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != regval || 2245 i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != regval || 2246 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != regval) 2247 break; 2248 2249 name = "max6642"; 2250 } else if ((address == 0x4c || address == 0x4d || address == 0x4e) && 2251 (config1 & 0x1f) == 0x0d && convrate <= 0x09) { 2252 if (address == 0x4c) 2253 name = "max6657"; 2254 else 2255 name = "max6659"; 2256 } 2257 break; 2258 case 0x59: 2259 /* 2260 * The chip_id register of the MAX6646/6647/6649 holds the 2261 * revision of the chip. The lowest 6 bits of the config1 2262 * register are unused and should return zero when read. 2263 * The I2C address of MAX6648/6692 is fixed at 0x4c. 2264 * MAX6646 is at address 0x4d, MAX6647 is at address 0x4e, 2265 * and MAX6649 is at address 0x4c. A slight difference between 2266 * the two sets of chips is that the remote temperature register 2267 * reports different values if the DXP pin is open or shorted. 2268 * We can use that information to help distinguish between the 2269 * chips. MAX6648 will be mis-detected as MAX6649 if the remote 2270 * diode is connected, but there isn't really anything we can 2271 * do about that. 2272 */ 2273 if (!(config1 & 0x3f) && convrate <= 0x07) { 2274 int temp; 2275 2276 switch (address) { 2277 case 0x4c: 2278 /* 2279 * MAX6649 reports an external temperature 2280 * value of 0xff if DXP is open or shorted. 2281 * MAX6648 reports 0x80 in that case. 2282 */ 2283 temp = i2c_smbus_read_byte_data(client, 2284 LM90_REG_REMOTE_TEMPH); 2285 if (temp == 0x80) 2286 name = "max6648"; 2287 else 2288 name = "max6649"; 2289 break; 2290 case 0x4d: 2291 name = "max6646"; 2292 break; 2293 case 0x4e: 2294 name = "max6647"; 2295 break; 2296 default: 2297 break; 2298 } 2299 } 2300 break; 2301 default: 2302 break; 2303 } 2304 2305 return name; 2306} 2307 2308static const char *lm90_detect_nuvoton(struct i2c_client *client, int chip_id, 2309 int config1, int convrate) 2310{ 2311 int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2); 2312 int address = client->addr; 2313 const char *name = NULL; 2314 2315 if (config2 < 0) 2316 return NULL; 2317 2318 if (address == 0x4c && !(config1 & 0x2a) && !(config2 & 0xf8)) { 2319 if (chip_id == 0x01 && convrate <= 0x09) { 2320 /* W83L771W/G */ 2321 name = "w83l771"; 2322 } else if ((chip_id & 0xfe) == 0x10 && convrate <= 0x08) { 2323 /* W83L771AWG/ASG */ 2324 name = "w83l771"; 2325 } 2326 } 2327 return name; 2328} 2329 2330static const char *lm90_detect_nuvoton_50(struct i2c_client *client, int chip_id, 2331 int config1, int convrate) 2332{ 2333 int chip_id2 = i2c_smbus_read_byte_data(client, NCT7716_REG_CHIP_ID); 2334 int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2); 2335 int address = client->addr; 2336 const char *name = NULL; 2337 2338 if (chip_id2 < 0 || config2 < 0) 2339 return NULL; 2340 2341 if (chip_id2 != 0x50 || convrate > 0x08) 2342 return NULL; 2343 2344 switch (chip_id) { 2345 case 0x90: 2346 if (address == 0x48 && !(config1 & 0x3e) && !(config2 & 0xfe)) 2347 name = "nct7717"; 2348 break; 2349 case 0x91: 2350 if ((address == 0x48 || address == 0x49) && !(config1 & 0x3e) && 2351 !(config2 & 0xfe)) 2352 name = "nct7716"; 2353 else if (address == 0x4c && !(config1 & 0x38) && !(config2 & 0xf8)) 2354 name = "nct7718"; 2355 break; 2356 default: 2357 break; 2358 } 2359 return name; 2360} 2361 2362static const char *lm90_detect_nxp(struct i2c_client *client, bool common_address, 2363 int chip_id, int config1, int convrate) 2364{ 2365 int address = client->addr; 2366 const char *name = NULL; 2367 int config2; 2368 2369 switch (chip_id) { 2370 case 0x00: 2371 config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2); 2372 if (config2 < 0) 2373 return NULL; 2374 if (address >= 0x48 && address <= 0x4f && 2375 !(config1 & 0x2a) && !(config2 & 0xfe) && convrate <= 0x09) 2376 name = "sa56004"; 2377 break; 2378 case 0x80: 2379 if (common_address && !(config1 & 0x3f) && convrate <= 0x07) 2380 name = "ne1618"; 2381 break; 2382 default: 2383 break; 2384 } 2385 return name; 2386} 2387 2388static const char *lm90_detect_gmt(struct i2c_client *client, int chip_id, 2389 int config1, int convrate) 2390{ 2391 int address = client->addr; 2392 2393 /* 2394 * According to the datasheet, G781 is supposed to be at I2C Address 2395 * 0x4c and have a chip ID of 0x01. G781-1 is supposed to be at I2C 2396 * address 0x4d and have a chip ID of 0x03. However, when support 2397 * for G781 was added, chips at 0x4c and 0x4d were found to have a 2398 * chip ID of 0x01. A G781-1 at I2C address 0x4d was now found with 2399 * chip ID 0x03. 2400 * To avoid detection failures, accept chip ID 0x01 and 0x03 at both 2401 * addresses. 2402 * G784 reports manufacturer ID 0x47 and chip ID 0x01. A public 2403 * datasheet is not available. Extensive testing suggests that 2404 * the chip appears to be fully compatible with G781. 2405 * Available register dumps show that G751 also reports manufacturer 2406 * ID 0x47 and chip ID 0x01 even though that chip does not officially 2407 * support those registers. This makes chip detection somewhat 2408 * vulnerable. To improve detection quality, read the offset low byte 2409 * and alert fault queue registers and verify that only expected bits 2410 * are set. 2411 */ 2412 if ((chip_id == 0x01 || chip_id == 0x03) && 2413 (address == 0x4c || address == 0x4d) && 2414 !(config1 & 0x3f) && convrate <= 0x08) { 2415 int reg; 2416 2417 reg = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_OFFSL); 2418 if (reg < 0 || reg & 0x1f) 2419 return NULL; 2420 reg = i2c_smbus_read_byte_data(client, TMP451_REG_CONALERT); 2421 if (reg < 0 || reg & 0xf1) 2422 return NULL; 2423 2424 return "g781"; 2425 } 2426 2427 return NULL; 2428} 2429 2430static const char *lm90_detect_ti49(struct i2c_client *client, bool common_address, 2431 int chip_id, int config1, int convrate) 2432{ 2433 if (common_address && chip_id == 0x00 && !(config1 & 0x3f) && !(convrate & 0xf8)) { 2434 /* THMC10: Unsupported registers return 0xff */ 2435 if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) == 0xff && 2436 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_CRIT) == 0xff) 2437 return "thmc10"; 2438 } 2439 return NULL; 2440} 2441 2442static const char *lm90_detect_ti(struct i2c_client *client, int chip_id, 2443 int config1, int convrate) 2444{ 2445 int address = client->addr; 2446 const char *name = NULL; 2447 2448 if (chip_id == 0x00 && !(config1 & 0x1b) && convrate <= 0x09) { 2449 int local_ext, conalert, chen, dfc; 2450 2451 local_ext = i2c_smbus_read_byte_data(client, 2452 TMP451_REG_LOCAL_TEMPL); 2453 conalert = i2c_smbus_read_byte_data(client, 2454 TMP451_REG_CONALERT); 2455 chen = i2c_smbus_read_byte_data(client, TMP461_REG_CHEN); 2456 dfc = i2c_smbus_read_byte_data(client, TMP461_REG_DFC); 2457 2458 if (!(local_ext & 0x0f) && (conalert & 0xf1) == 0x01 && 2459 (chen & 0xfc) == 0x00 && (dfc & 0xfc) == 0x00) { 2460 if (address == 0x4c && !(chen & 0x03)) 2461 name = "tmp451"; 2462 else if (address >= 0x48 && address <= 0x4f) 2463 name = "tmp461"; 2464 } 2465 } 2466 2467 return name; 2468} 2469 2470/* Return 0 if detection is successful, -ENODEV otherwise */ 2471static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info) 2472{ 2473 struct i2c_adapter *adapter = client->adapter; 2474 int man_id, chip_id, config1, convrate, lhigh; 2475 const char *name = NULL; 2476 int address = client->addr; 2477 bool common_address = 2478 (address >= 0x18 && address <= 0x1a) || 2479 (address >= 0x29 && address <= 0x2b) || 2480 (address >= 0x4c && address <= 0x4e); 2481 2482 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 2483 return -ENODEV; 2484 2485 /* 2486 * Get well defined register value for chips with neither man_id nor 2487 * chip_id registers. 2488 */ 2489 lhigh = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH); 2490 2491 /* detection and identification */ 2492 man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID); 2493 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID); 2494 config1 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG1); 2495 convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE); 2496 if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0 || lhigh < 0) 2497 return -ENODEV; 2498 2499 /* Bail out immediately if all register report the same value */ 2500 if (lhigh == man_id && lhigh == chip_id && lhigh == config1 && lhigh == convrate) 2501 return -ENODEV; 2502 2503 /* 2504 * If reading man_id and chip_id both return the same value as lhigh, 2505 * the chip may not support those registers and return the most recent read 2506 * value. Check again with a different register and handle accordingly. 2507 */ 2508 if (man_id == lhigh && chip_id == lhigh) { 2509 convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE); 2510 man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID); 2511 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID); 2512 if (convrate < 0 || man_id < 0 || chip_id < 0) 2513 return -ENODEV; 2514 if (man_id == convrate && chip_id == convrate) 2515 man_id = -1; 2516 } 2517 switch (man_id) { 2518 case -1: /* Chip does not support man_id / chip_id */ 2519 if (common_address && !convrate && !(config1 & 0x7f)) 2520 name = lm90_detect_lm84(client); 2521 break; 2522 case 0x01: /* National Semiconductor */ 2523 name = lm90_detect_national(client, chip_id, config1, convrate); 2524 break; 2525 case 0x1a: /* ON */ 2526 name = lm90_detect_on(client, chip_id, config1, convrate); 2527 break; 2528 case 0x23: /* Genesys Logic */ 2529 if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8)) 2530 name = "gl523sm"; 2531 break; 2532 case 0x41: /* Analog Devices */ 2533 name = lm90_detect_analog(client, common_address, chip_id, config1, 2534 convrate); 2535 break; 2536 case 0x47: /* GMT */ 2537 name = lm90_detect_gmt(client, chip_id, config1, convrate); 2538 break; 2539 case 0x49: /* TI */ 2540 name = lm90_detect_ti49(client, common_address, chip_id, config1, convrate); 2541 break; 2542 case 0x4d: /* Maxim Integrated */ 2543 name = lm90_detect_maxim(client, common_address, chip_id, 2544 config1, convrate); 2545 break; 2546 case 0x50: 2547 name = lm90_detect_nuvoton_50(client, chip_id, config1, convrate); 2548 break; 2549 case 0x54: /* ON MC1066, Microchip TC1068, TCM1617 (originally TelCom) */ 2550 if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8)) 2551 name = "mc1066"; 2552 break; 2553 case 0x55: /* TI */ 2554 name = lm90_detect_ti(client, chip_id, config1, convrate); 2555 break; 2556 case 0x5c: /* Winbond/Nuvoton */ 2557 name = lm90_detect_nuvoton(client, chip_id, config1, convrate); 2558 break; 2559 case 0xa1: /* NXP Semiconductor/Philips */ 2560 name = lm90_detect_nxp(client, common_address, chip_id, config1, convrate); 2561 break; 2562 case 0xff: /* MAX1617, G767, NE1617 */ 2563 if (common_address && chip_id == 0xff && convrate < 8) 2564 name = lm90_detect_max1617(client, config1); 2565 break; 2566 default: 2567 break; 2568 } 2569 2570 if (!name) { /* identification failed */ 2571 dev_dbg(&adapter->dev, 2572 "Unsupported chip at 0x%02x (man_id=0x%02X, chip_id=0x%02X)\n", 2573 client->addr, man_id, chip_id); 2574 return -ENODEV; 2575 } 2576 2577 strscpy(info->type, name, I2C_NAME_SIZE); 2578 2579 return 0; 2580} 2581 2582static void lm90_restore_conf(void *_data) 2583{ 2584 struct lm90_data *data = _data; 2585 struct i2c_client *client = data->client; 2586 2587 cancel_delayed_work_sync(&data->alert_work); 2588 cancel_work_sync(&data->report_work); 2589 2590 /* Restore initial configuration */ 2591 if (data->flags & LM90_HAVE_CONVRATE) 2592 lm90_write_convrate(data, data->convrate_orig); 2593 lm90_write_reg(client, LM90_REG_CONFIG1, data->config_orig); 2594} 2595 2596static int lm90_init_client(struct i2c_client *client, struct lm90_data *data) 2597{ 2598 struct device_node *np = client->dev.of_node; 2599 int config, convrate; 2600 2601 if (data->flags & LM90_HAVE_CONVRATE) { 2602 convrate = lm90_read_reg(client, LM90_REG_CONVRATE); 2603 if (convrate < 0) 2604 return convrate; 2605 data->convrate_orig = convrate; 2606 lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */ 2607 } else { 2608 data->update_interval = 500; 2609 } 2610 2611 /* 2612 * Start the conversions. 2613 */ 2614 config = lm90_read_reg(client, LM90_REG_CONFIG1); 2615 if (config < 0) 2616 return config; 2617 data->config_orig = config; 2618 data->config = config; 2619 2620 /* Check Temperature Range Select */ 2621 if (data->flags & LM90_HAVE_EXTENDED_TEMP) { 2622 if (of_property_read_bool(np, "ti,extended-range-enable")) 2623 config |= 0x04; 2624 if (!(config & 0x04)) 2625 data->flags &= ~LM90_HAVE_EXTENDED_TEMP; 2626 } 2627 2628 /* 2629 * Put MAX6680/MAX8881 into extended resolution (bit 0x10, 2630 * 0.125 degree resolution) and range (0x08, extend range 2631 * to -64 degree) mode for the remote temperature sensor. 2632 * Note that expeciments with an actual chip do not show a difference 2633 * if bit 3 is set or not. 2634 */ 2635 if (data->kind == max6680) 2636 config |= 0x18; 2637 2638 /* 2639 * Put MAX6654 into extended range (0x20, extend minimum range from 2640 * 0 degrees to -64 degrees). Note that extended resolution is not 2641 * possible on the MAX6654 unless conversion rate is set to 1 Hz or 2642 * slower, which is intentionally not done by default. 2643 */ 2644 if (data->kind == max6654) 2645 config |= 0x20; 2646 2647 /* 2648 * Select external channel 0 for devices with three sensors 2649 */ 2650 if (data->flags & LM90_HAVE_TEMP3) 2651 config &= ~0x08; 2652 2653 /* 2654 * Interrupt is enabled by default on reset, but it may be disabled 2655 * by bootloader, unmask it. 2656 */ 2657 if (client->irq) 2658 config &= ~0x80; 2659 2660 config &= 0xBF; /* run */ 2661 lm90_update_confreg(data, config); 2662 2663 return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data); 2664} 2665 2666static bool lm90_is_tripped(struct i2c_client *client) 2667{ 2668 struct lm90_data *data = i2c_get_clientdata(client); 2669 int ret; 2670 2671 ret = lm90_update_alarms(data, true); 2672 if (ret < 0) 2673 return false; 2674 2675 return !!data->current_alarms; 2676} 2677 2678static irqreturn_t lm90_irq_thread(int irq, void *dev_id) 2679{ 2680 struct i2c_client *client = dev_id; 2681 2682 if (lm90_is_tripped(client)) 2683 return IRQ_HANDLED; 2684 else 2685 return IRQ_NONE; 2686} 2687 2688static int lm90_probe_channel_from_dt(struct i2c_client *client, 2689 struct device_node *child, 2690 struct lm90_data *data) 2691{ 2692 u32 id; 2693 s32 val; 2694 int err; 2695 struct device *dev = &client->dev; 2696 2697 err = of_property_read_u32(child, "reg", &id); 2698 if (err) { 2699 dev_err(dev, "missing reg property of %pOFn\n", child); 2700 return err; 2701 } 2702 2703 if (id >= MAX_CHANNELS) { 2704 dev_err(dev, "invalid reg property value %d in %pOFn\n", id, child); 2705 return -EINVAL; 2706 } 2707 2708 err = of_property_read_string(child, "label", &data->channel_label[id]); 2709 if (err == -ENODATA || err == -EILSEQ) { 2710 dev_err(dev, "invalid label property in %pOFn\n", child); 2711 return err; 2712 } 2713 2714 if (data->channel_label[id]) 2715 data->channel_config[id] |= HWMON_T_LABEL; 2716 2717 err = of_property_read_s32(child, "temperature-offset-millicelsius", &val); 2718 if (!err) { 2719 if (id == 0) { 2720 dev_err(dev, "temperature-offset-millicelsius can't be set for internal channel\n"); 2721 return -EINVAL; 2722 } 2723 2724 err = lm90_set_temp_offset(data, lm90_temp_offset_index[id], id, val); 2725 if (err) { 2726 dev_err(dev, "can't set temperature offset %d for channel %d (%d)\n", 2727 val, id, err); 2728 return err; 2729 } 2730 } 2731 2732 return 0; 2733} 2734 2735static int lm90_parse_dt_channel_info(struct i2c_client *client, 2736 struct lm90_data *data) 2737{ 2738 int err; 2739 struct device *dev = &client->dev; 2740 const struct device_node *np = dev->of_node; 2741 2742 for_each_child_of_node_scoped(np, child) { 2743 if (strcmp(child->name, "channel")) 2744 continue; 2745 2746 err = lm90_probe_channel_from_dt(client, child, data); 2747 if (err) 2748 return err; 2749 } 2750 2751 return 0; 2752} 2753 2754static const struct hwmon_ops lm90_ops = { 2755 .is_visible = lm90_is_visible, 2756 .read = lm90_read, 2757 .read_string = lm90_read_string, 2758 .write = lm90_write, 2759}; 2760 2761static int lm90_probe(struct i2c_client *client) 2762{ 2763 struct device *dev = &client->dev; 2764 struct i2c_adapter *adapter = client->adapter; 2765 struct hwmon_channel_info *info; 2766 struct device *hwmon_dev; 2767 struct lm90_data *data; 2768 int err; 2769 2770 err = devm_regulator_get_enable(dev, "vcc"); 2771 if (err) 2772 return dev_err_probe(dev, err, "Failed to enable regulator\n"); 2773 2774 data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL); 2775 if (!data) 2776 return -ENOMEM; 2777 2778 data->client = client; 2779 i2c_set_clientdata(client, data); 2780 INIT_DELAYED_WORK(&data->alert_work, lm90_alert_work); 2781 INIT_WORK(&data->report_work, lm90_report_alarms); 2782 2783 /* Set the device type */ 2784 data->kind = (uintptr_t)i2c_get_match_data(client); 2785 2786 /* 2787 * Different devices have different alarm bits triggering the 2788 * ALERT# output 2789 */ 2790 data->alert_alarms = lm90_params[data->kind].alert_alarms; 2791 data->resolution = lm90_params[data->kind].resolution ? : 11; 2792 2793 /* Set chip capabilities */ 2794 data->flags = lm90_params[data->kind].flags; 2795 2796 if ((data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC)) && 2797 !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_PEC)) 2798 data->flags &= ~(LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC); 2799 2800 if ((data->flags & LM90_HAVE_PARTIAL_PEC) && 2801 !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE)) 2802 data->flags &= ~LM90_HAVE_PARTIAL_PEC; 2803 2804 data->chip.ops = &lm90_ops; 2805 data->chip.info = data->info; 2806 2807 data->info[0] = &data->chip_info; 2808 info = &data->chip_info; 2809 info->type = hwmon_chip; 2810 info->config = data->chip_config; 2811 2812 data->chip_config[0] = HWMON_C_REGISTER_TZ; 2813 if (data->flags & LM90_HAVE_ALARMS) 2814 data->chip_config[0] |= HWMON_C_ALARMS; 2815 if (data->flags & LM90_HAVE_CONVRATE) 2816 data->chip_config[0] |= HWMON_C_UPDATE_INTERVAL; 2817 if (data->flags & LM90_HAVE_FAULTQUEUE) 2818 data->chip_config[0] |= HWMON_C_TEMP_SAMPLES; 2819 if (data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC)) 2820 data->chip_config[0] |= HWMON_C_PEC; 2821 data->info[1] = &data->temp_info; 2822 2823 info = &data->temp_info; 2824 info->type = hwmon_temp; 2825 info->config = data->channel_config; 2826 2827 data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MAX | 2828 HWMON_T_MAX_ALARM; 2829 data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MAX | 2830 HWMON_T_MAX_ALARM | HWMON_T_FAULT; 2831 2832 if (data->flags & LM90_HAVE_LOW) { 2833 data->channel_config[0] |= HWMON_T_MIN | HWMON_T_MIN_ALARM; 2834 data->channel_config[1] |= HWMON_T_MIN | HWMON_T_MIN_ALARM; 2835 } 2836 2837 if (data->flags & LM90_HAVE_CRIT) { 2838 data->channel_config[0] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST; 2839 data->channel_config[1] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST; 2840 } 2841 2842 if (data->flags & LM90_HAVE_OFFSET) 2843 data->channel_config[1] |= HWMON_T_OFFSET; 2844 2845 if (data->flags & LM90_HAVE_EMERGENCY) { 2846 data->channel_config[0] |= HWMON_T_EMERGENCY | 2847 HWMON_T_EMERGENCY_HYST; 2848 data->channel_config[1] |= HWMON_T_EMERGENCY | 2849 HWMON_T_EMERGENCY_HYST; 2850 } 2851 2852 if (data->flags & LM90_HAVE_EMERGENCY_ALARM) { 2853 data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM; 2854 data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM; 2855 } 2856 2857 if (data->flags & LM90_HAVE_TEMP3) { 2858 data->channel_config[2] = HWMON_T_INPUT | 2859 HWMON_T_MIN | HWMON_T_MAX | 2860 HWMON_T_CRIT | HWMON_T_CRIT_HYST | 2861 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM | 2862 HWMON_T_CRIT_ALARM | HWMON_T_FAULT; 2863 if (data->flags & LM90_HAVE_EMERGENCY) { 2864 data->channel_config[2] |= HWMON_T_EMERGENCY | 2865 HWMON_T_EMERGENCY_HYST; 2866 } 2867 if (data->flags & LM90_HAVE_EMERGENCY_ALARM) 2868 data->channel_config[2] |= HWMON_T_EMERGENCY_ALARM; 2869 if (data->flags & LM90_HAVE_OFFSET) 2870 data->channel_config[2] |= HWMON_T_OFFSET; 2871 } 2872 2873 data->faultqueue_mask = lm90_params[data->kind].faultqueue_mask; 2874 data->faultqueue_depth = lm90_params[data->kind].faultqueue_depth; 2875 data->reg_local_ext = lm90_params[data->kind].reg_local_ext; 2876 if (data->flags & LM90_HAVE_REMOTE_EXT) 2877 data->reg_remote_ext = LM90_REG_REMOTE_TEMPL; 2878 data->reg_status2 = lm90_params[data->kind].reg_status2; 2879 2880 /* Set maximum conversion rate */ 2881 data->max_convrate = lm90_params[data->kind].max_convrate; 2882 2883 /* Parse device-tree channel information */ 2884 if (client->dev.of_node) { 2885 err = lm90_parse_dt_channel_info(client, data); 2886 if (err) 2887 return err; 2888 } 2889 2890 /* Initialize the LM90 chip */ 2891 err = lm90_init_client(client, data); 2892 if (err < 0) { 2893 dev_err(dev, "Failed to initialize device\n"); 2894 return err; 2895 } 2896 2897 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, 2898 data, &data->chip, 2899 NULL); 2900 if (IS_ERR(hwmon_dev)) 2901 return PTR_ERR(hwmon_dev); 2902 2903 data->hwmon_dev = hwmon_dev; 2904 2905 if (client->irq) { 2906 dev_dbg(dev, "IRQ: %d\n", client->irq); 2907 err = devm_request_threaded_irq(dev, client->irq, 2908 NULL, lm90_irq_thread, 2909 IRQF_ONESHOT, "lm90", client); 2910 if (err < 0) { 2911 dev_err(dev, "cannot request IRQ %d\n", client->irq); 2912 return err; 2913 } 2914 } 2915 2916 return 0; 2917} 2918 2919static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type, 2920 unsigned int flag) 2921{ 2922 if (type != I2C_PROTOCOL_SMBUS_ALERT) 2923 return; 2924 2925 if (lm90_is_tripped(client)) { 2926 /* 2927 * Disable ALERT# output, because these chips don't implement 2928 * SMBus alert correctly; they should only hold the alert line 2929 * low briefly. 2930 */ 2931 struct lm90_data *data = i2c_get_clientdata(client); 2932 2933 if ((data->flags & LM90_HAVE_BROKEN_ALERT) && 2934 (data->current_alarms & data->alert_alarms)) { 2935 if (!(data->config & 0x80)) { 2936 dev_dbg(&client->dev, "Disabling ALERT#\n"); 2937 lm90_update_confreg(data, data->config | 0x80); 2938 } 2939 schedule_delayed_work(&data->alert_work, 2940 max_t(int, HZ, msecs_to_jiffies(data->update_interval))); 2941 } 2942 } else { 2943 dev_dbg(&client->dev, "Everything OK\n"); 2944 } 2945} 2946 2947static int lm90_suspend(struct device *dev) 2948{ 2949 struct lm90_data *data = dev_get_drvdata(dev); 2950 struct i2c_client *client = data->client; 2951 2952 if (client->irq) 2953 disable_irq(client->irq); 2954 2955 return 0; 2956} 2957 2958static int lm90_resume(struct device *dev) 2959{ 2960 struct lm90_data *data = dev_get_drvdata(dev); 2961 struct i2c_client *client = data->client; 2962 2963 if (client->irq) 2964 enable_irq(client->irq); 2965 2966 return 0; 2967} 2968 2969static DEFINE_SIMPLE_DEV_PM_OPS(lm90_pm_ops, lm90_suspend, lm90_resume); 2970 2971static struct i2c_driver lm90_driver = { 2972 .class = I2C_CLASS_HWMON, 2973 .driver = { 2974 .name = "lm90", 2975 .of_match_table = of_match_ptr(lm90_of_match), 2976 .pm = pm_sleep_ptr(&lm90_pm_ops), 2977 }, 2978 .probe = lm90_probe, 2979 .alert = lm90_alert, 2980 .id_table = lm90_id, 2981 .detect = lm90_detect, 2982 .address_list = normal_i2c, 2983}; 2984 2985module_i2c_driver(lm90_driver); 2986 2987MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>"); 2988MODULE_DESCRIPTION("LM90/ADM1032 driver"); 2989MODULE_LICENSE("GPL");
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