hwmon-vid.c

  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * hwmon-vid.c - VID/VRM/VRD voltage conversions
  4 *
  5 * Copyright (c) 2004 Rudolf Marek <r.marek@assembler.cz>
  6 *
  7 * Partly imported from i2c-vid.h of the lm_sensors project
  8 * Copyright (c) 2002 Mark D. Studebaker <mdsxyz123@yahoo.com>
  9 * With assistance from Trent Piepho <xyzzy@speakeasy.org>
 10 */
 11
 12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 13
 14#include <linux/module.h>
 15#include <linux/kernel.h>
 16#include <linux/hwmon-vid.h>
 17
 18#ifdef CONFIG_X86
 19#include <asm/msr.h>
 20#endif
 21
 22/*
 23 * Common code for decoding VID pins.
 24 *
 25 * References:
 26 *
 27 * For VRM 8.4 to 9.1, "VRM x.y DC-DC Converter Design Guidelines",
 28 * available at http://developer.intel.com/.
 29 *
 30 * For VRD 10.0 and up, "VRD x.y Design Guide",
 31 * available at http://developer.intel.com/.
 32 *
 33 * AMD Athlon 64 and AMD Opteron Processors, AMD Publication 26094,
 34 * http://support.amd.com/us/Processor_TechDocs/26094.PDF
 35 * Table 74. VID Code Voltages
 36 * This corresponds to an arbitrary VRM code of 24 in the functions below.
 37 * These CPU models (K8 revision <= E) have 5 VID pins. See also:
 38 * Revision Guide for AMD Athlon 64 and AMD Opteron Processors, AMD Publication 25759,
 39 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25759.pdf
 40 *
 41 * AMD NPT Family 0Fh Processors, AMD Publication 32559,
 42 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/32559.pdf
 43 * Table 71. VID Code Voltages
 44 * This corresponds to an arbitrary VRM code of 25 in the functions below.
 45 * These CPU models (K8 revision >= F) have 6 VID pins. See also:
 46 * Revision Guide for AMD NPT Family 0Fh Processors, AMD Publication 33610,
 47 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/33610.pdf
 48 *
 49 * The 17 specification is in fact Intel Mobile Voltage Positioning -
 50 * (IMVP-II). You can find more information in the datasheet of Max1718
 51 * http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2452
 52 *
 53 * The 13 specification corresponds to the Intel Pentium M series. There
 54 * doesn't seem to be any named specification for these. The conversion
 55 * tables are detailed directly in the various Pentium M datasheets:
 56 * https://www.intel.com/design/intarch/pentiumm/docs_pentiumm.htm
 57 *
 58 * The 14 specification corresponds to Intel Core series. There
 59 * doesn't seem to be any named specification for these. The conversion
 60 * tables are detailed directly in the various Pentium Core datasheets:
 61 * https://www.intel.com/design/mobile/datashts/309221.htm
 62 *
 63 * The 110 (VRM 11) specification corresponds to Intel Conroe based series.
 64 * https://www.intel.com/design/processor/applnots/313214.htm
 65 */
 66
 67/*
 68 * vrm is the VRM/VRD document version multiplied by 10.
 69 * val is the 4-bit or more VID code.
 70 * Returned value is in mV to avoid floating point in the kernel.
 71 * Some VID have some bits in uV scale, this is rounded to mV.
 72 */
 73int vid_from_reg(int val, u8 vrm)
 74{
 75	int vid;
 76
 77	switch (vrm) {
 78
 79	case 100:		/* VRD 10.0 */
 80		/* compute in uV, round to mV */
 81		val &= 0x3f;
 82		if ((val & 0x1f) == 0x1f)
 83			return 0;
 84		if ((val & 0x1f) <= 0x09 || val == 0x0a)
 85			vid = 1087500 - (val & 0x1f) * 25000;
 86		else
 87			vid = 1862500 - (val & 0x1f) * 25000;
 88		if (val & 0x20)
 89			vid -= 12500;
 90		return (vid + 500) / 1000;
 91
 92	case 110:		/* Intel Conroe */
 93				/* compute in uV, round to mV */
 94		val &= 0xff;
 95		if (val < 0x02 || val > 0xb2)
 96			return 0;
 97		return (1600000 - (val - 2) * 6250 + 500) / 1000;
 98
 99	case 24:		/* Athlon64 & Opteron */
100		val &= 0x1f;
101		if (val == 0x1f)
102			return 0;
103		fallthrough;
104	case 25:		/* AMD NPT 0Fh */
105		val &= 0x3f;
106		return (val < 32) ? 1550 - 25 * val
107			: 775 - (25 * (val - 31)) / 2;
108
109	case 26:		/* AMD family 10h to 15h, serial VID */
110		val &= 0x7f;
111		if (val >= 0x7c)
112			return 0;
113		return DIV_ROUND_CLOSEST(15500 - 125 * val, 10);
114
115	case 91:		/* VRM 9.1 */
116	case 90:		/* VRM 9.0 */
117		val &= 0x1f;
118		return val == 0x1f ? 0 :
119				     1850 - val * 25;
120
121	case 85:		/* VRM 8.5 */
122		val &= 0x1f;
123		return (val & 0x10  ? 25 : 0) +
124		       ((val & 0x0f) > 0x04 ? 2050 : 1250) -
125		       ((val & 0x0f) * 50);
126
127	case 84:		/* VRM 8.4 */
128		val &= 0x0f;
129		fallthrough;
130	case 82:		/* VRM 8.2 */
131		val &= 0x1f;
132		return val == 0x1f ? 0 :
133		       val & 0x10  ? 5100 - (val) * 100 :
134				     2050 - (val) * 50;
135	case 17:		/* Intel IMVP-II */
136		val &= 0x1f;
137		return val & 0x10 ? 975 - (val & 0xF) * 25 :
138				    1750 - val * 50;
139	case 13:
140	case 131:
141		val &= 0x3f;
142		/* Exception for Eden ULV 500 MHz */
143		if (vrm == 131 && val == 0x3f)
144			val++;
145		return 1708 - val * 16;
146	case 14:		/* Intel Core */
147				/* compute in uV, round to mV */
148		val &= 0x7f;
149		return val > 0x77 ? 0 : (1500000 - (val * 12500) + 500) / 1000;
150	default:		/* report 0 for unknown */
151		if (vrm)
152			pr_warn("Requested unsupported VRM version (%u)\n",
153				(unsigned int)vrm);
154		return 0;
155	}
156}
157EXPORT_SYMBOL(vid_from_reg);
158
159/*
160 * After this point is the code to automatically determine which
161 * VRM/VRD specification should be used depending on the CPU.
162 */
163
164struct vrm_model {
165	u8 vendor;
166	u8 family;
167	u8 model_from;
168	u8 model_to;
169	u8 stepping_to;
170	u8 vrm_type;
171};
172
173#define ANY 0xFF
174
175#ifdef CONFIG_X86
176
177/*
178 * The stepping_to parameter is highest acceptable stepping for current line.
179 * The model match must be exact for 4-bit values. For model values 0x10
180 * and above (extended model), all models below the parameter will match.
181 */
182
183static struct vrm_model vrm_models[] = {
184	{X86_VENDOR_AMD, 0x6, 0x0, ANY, ANY, 90},	/* Athlon Duron etc */
185	{X86_VENDOR_AMD, 0xF, 0x0, 0x3F, ANY, 24},	/* Athlon 64, Opteron */
186	/*
187	 * In theory, all NPT family 0Fh processors have 6 VID pins and should
188	 * thus use vrm 25, however in practice not all mainboards route the
189	 * 6th VID pin because it is never needed. So we use the 5 VID pin
190	 * variant (vrm 24) for the models which exist today.
191	 */
192	{X86_VENDOR_AMD, 0xF, 0x40, 0x7F, ANY, 24},	/* NPT family 0Fh */
193	{X86_VENDOR_AMD, 0xF, 0x80, ANY, ANY, 25},	/* future fam. 0Fh */
194	{X86_VENDOR_AMD, 0x10, 0x0, ANY, ANY, 25},	/* NPT family 10h */
195	{X86_VENDOR_AMD, 0x11, 0x0, ANY, ANY, 26},	/* family 11h */
196	{X86_VENDOR_AMD, 0x12, 0x0, ANY, ANY, 26},	/* family 12h */
197	{X86_VENDOR_AMD, 0x14, 0x0, ANY, ANY, 26},	/* family 14h */
198	{X86_VENDOR_AMD, 0x15, 0x0, ANY, ANY, 26},	/* family 15h */
199
200	{X86_VENDOR_INTEL, 0x6, 0x0, 0x6, ANY, 82},	/* Pentium Pro,
201							 * Pentium II, Xeon,
202							 * Mobile Pentium,
203							 * Celeron */
204	{X86_VENDOR_INTEL, 0x6, 0x7, 0x7, ANY, 84},	/* Pentium III, Xeon */
205	{X86_VENDOR_INTEL, 0x6, 0x8, 0x8, ANY, 82},	/* Pentium III, Xeon */
206	{X86_VENDOR_INTEL, 0x6, 0x9, 0x9, ANY, 13},	/* Pentium M (130 nm) */
207	{X86_VENDOR_INTEL, 0x6, 0xA, 0xA, ANY, 82},	/* Pentium III Xeon */
208	{X86_VENDOR_INTEL, 0x6, 0xB, 0xB, ANY, 85},	/* Tualatin */
209	{X86_VENDOR_INTEL, 0x6, 0xD, 0xD, ANY, 13},	/* Pentium M (90 nm) */
210	{X86_VENDOR_INTEL, 0x6, 0xE, 0xE, ANY, 14},	/* Intel Core (65 nm) */
211	{X86_VENDOR_INTEL, 0x6, 0xF, ANY, ANY, 110},	/* Intel Conroe and
212							 * later */
213	{X86_VENDOR_INTEL, 0xF, 0x0, 0x0, ANY, 90},	/* P4 */
214	{X86_VENDOR_INTEL, 0xF, 0x1, 0x1, ANY, 90},	/* P4 Willamette */
215	{X86_VENDOR_INTEL, 0xF, 0x2, 0x2, ANY, 90},	/* P4 Northwood */
216	{X86_VENDOR_INTEL, 0xF, 0x3, ANY, ANY, 100},	/* Prescott and above
217							 * assume VRD 10 */
218
219	{X86_VENDOR_CENTAUR, 0x6, 0x7, 0x7, ANY, 85},	/* Eden ESP/Ezra */
220	{X86_VENDOR_CENTAUR, 0x6, 0x8, 0x8, 0x7, 85},	/* Ezra T */
221	{X86_VENDOR_CENTAUR, 0x6, 0x9, 0x9, 0x7, 85},	/* Nehemiah */
222	{X86_VENDOR_CENTAUR, 0x6, 0x9, 0x9, ANY, 17},	/* C3-M, Eden-N */
223	{X86_VENDOR_CENTAUR, 0x6, 0xA, 0xA, 0x7, 0},	/* No information */
224	{X86_VENDOR_CENTAUR, 0x6, 0xA, 0xA, ANY, 13},	/* C7-M, C7,
225							 * Eden (Esther) */
226	{X86_VENDOR_CENTAUR, 0x6, 0xD, 0xD, ANY, 134},	/* C7-D, C7-M, C7,
227							 * Eden (Esther) */
228};
229
230/*
231 * Special case for VIA model D: there are two different possible
232 * VID tables, so we have to figure out first, which one must be
233 * used. This resolves temporary drm value 134 to 14 (Intel Core
234 * 7-bit VID), 13 (Pentium M 6-bit VID) or 131 (Pentium M 6-bit VID
235 * + quirk for Eden ULV 500 MHz).
236 * Note: something similar might be needed for model A, I'm not sure.
237 */
238static u8 get_via_model_d_vrm(void)
239{
240	unsigned int vid, brand, __maybe_unused dummy;
241	static const char *brands[4] = {
242		"C7-M", "C7", "Eden", "C7-D"
243	};
244
245	rdmsr(0x198, dummy, vid);
246	vid &= 0xff;
247
248	rdmsr(0x1154, brand, dummy);
249	brand = ((brand >> 4) ^ (brand >> 2)) & 0x03;
250
251	if (vid > 0x3f) {
252		pr_info("Using %d-bit VID table for VIA %s CPU\n",
253			7, brands[brand]);
254		return 14;
255	} else {
256		pr_info("Using %d-bit VID table for VIA %s CPU\n",
257			6, brands[brand]);
258		/* Enable quirk for Eden */
259		return brand == 2 ? 131 : 13;
260	}
261}
262
263static u8 find_vrm(u8 family, u8 model, u8 stepping, u8 vendor)
264{
265	int i;
266
267	for (i = 0; i < ARRAY_SIZE(vrm_models); i++) {
268		if (vendor == vrm_models[i].vendor &&
269		    family == vrm_models[i].family &&
270		    model >= vrm_models[i].model_from &&
271		    model <= vrm_models[i].model_to &&
272		    stepping <= vrm_models[i].stepping_to)
273			return vrm_models[i].vrm_type;
274	}
275
276	return 0;
277}
278
279u8 vid_which_vrm(void)
280{
281	struct cpuinfo_x86 *c = &cpu_data(0);
282	u8 vrm_ret;
283
284	if (c->x86 < 6)		/* Any CPU with family lower than 6 */
285		return 0;	/* doesn't have VID */
286
287	vrm_ret = find_vrm(c->x86, c->x86_model, c->x86_stepping, c->x86_vendor);
288	if (vrm_ret == 134)
289		vrm_ret = get_via_model_d_vrm();
290	if (vrm_ret == 0)
291		pr_info("Unknown VRM version of your x86 CPU\n");
292	return vrm_ret;
293}
294
295/* and now for something completely different for the non-x86 world */
296#else
297u8 vid_which_vrm(void)
298{
299	pr_info("Unknown VRM version of your CPU\n");
300	return 0;
301}
302#endif
303EXPORT_SYMBOL(vid_which_vrm);
304
305MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
306
307MODULE_DESCRIPTION("hwmon-vid driver");
308MODULE_LICENSE("GPL");