amd_sfh_common.h

  1/* SPDX-License-Identifier: GPL-2.0-or-later */
  2/*
  3 * AMD MP2 common macros and structures
  4 *
  5 * Copyright (c) 2022, Advanced Micro Devices, Inc.
  6 * All Rights Reserved.
  7 *
  8 * Author: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
  9 */
 10#ifndef AMD_SFH_COMMON_H
 11#define AMD_SFH_COMMON_H
 12
 13#include <linux/mutex.h>
 14#include <linux/pci.h>
 15#include "amd_sfh_hid.h"
 16
 17#define PCI_DEVICE_ID_AMD_MP2		0x15E4
 18#define PCI_DEVICE_ID_AMD_MP2_1_1	0x164A
 19
 20#define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4))
 21#define AMD_P2C_MSG(regno) (0x10680 + ((regno) * 4))
 22
 23#define AMD_C2P_MSG_V1(regno) (0x10900 + ((regno) * 4))
 24#define AMD_P2C_MSG_V1(regno) (0x10500 + ((regno) * 4))
 25
 26#define SENSOR_ENABLED			4
 27#define SENSOR_DISABLED			5
 28
 29#define AMD_SFH_IDLE_LOOP		200
 30
 31enum cmd_id {
 32	NO_OP,
 33	ENABLE_SENSOR,
 34	DISABLE_SENSOR,
 35	STOP_ALL_SENSORS = 8,
 36};
 37
 38struct amd_mp2_sensor_info {
 39	u8 sensor_idx;
 40	u32 period;
 41	dma_addr_t dma_address;
 42};
 43
 44struct sfh_dev_status {
 45	bool is_hpd_present;
 46	bool is_hpd_enabled;
 47	bool is_als_present;
 48	bool is_sra_present;
 49};
 50
 51struct amd_mp2_dev {
 52	struct pci_dev *pdev;
 53	struct amdtp_cl_data *cl_data;
 54	void __iomem *mmio;
 55	void __iomem *vsbase;
 56	const struct amd_sfh1_1_ops *sfh1_1_ops;
 57	struct amd_mp2_ops *mp2_ops;
 58	struct amd_input_data in_data;
 59	/* mp2 active control status */
 60	u32 mp2_acs;
 61	struct sfh_dev_status dev_en;
 62	struct work_struct work;
 63	/* mp2 to protect data */
 64	struct mutex lock;
 65	u8 init_done;
 66	u8 rver;
 67};
 68
 69struct amd_mp2_ops {
 70	void (*start)(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info);
 71	void (*stop)(struct amd_mp2_dev *privdata, u16 sensor_idx);
 72	void (*stop_all)(struct amd_mp2_dev *privdata);
 73	int (*response)(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts);
 74	void (*clear_intr)(struct amd_mp2_dev *privdata);
 75	int (*init_intr)(struct amd_mp2_dev *privdata);
 76	int (*discovery_status)(struct amd_mp2_dev *privdata);
 77	void (*suspend)(struct amd_mp2_dev *mp2);
 78	void (*resume)(struct amd_mp2_dev *mp2);
 79	void (*remove)(void *privdata);
 80	int (*get_rep_desc)(int sensor_idx, u8 rep_desc[]);
 81	u32 (*get_desc_sz)(int sensor_idx, int descriptor_name);
 82	u8 (*get_feat_rep)(int sensor_idx, int report_id, u8 *feature_report);
 83	u8 (*get_in_rep)(u8 current_index, int sensor_idx, int report_id,
 84			 struct amd_input_data *in_data);
 85};
 86
 87void amd_sfh_work(struct work_struct *work);
 88void amd_sfh_work_buffer(struct work_struct *work);
 89void amd_sfh_clear_intr_v2(struct amd_mp2_dev *privdata);
 90int amd_sfh_irq_init_v2(struct amd_mp2_dev *privdata);
 91void amd_sfh_clear_intr(struct amd_mp2_dev *privdata);
 92int amd_sfh_irq_init(struct amd_mp2_dev *privdata);
 93
 94static inline u64 amd_get_c2p_val(struct amd_mp2_dev *mp2, u32 idx)
 95{
 96	return mp2->rver == 1 ? AMD_C2P_MSG_V1(idx) :  AMD_C2P_MSG(idx);
 97}
 98
 99static inline u64 amd_get_p2c_val(struct amd_mp2_dev *mp2, u32 idx)
100{
101	return mp2->rver == 1 ? AMD_P2C_MSG_V1(idx) :  AMD_P2C_MSG(idx);
102}
103#endif