xe_pt_types.h

  1/* SPDX-License-Identifier: MIT */
  2/*
  3 * Copyright © 2022 Intel Corporation
  4 */
  5
  6#ifndef _XE_PT_TYPES_H_
  7#define _XE_PT_TYPES_H_
  8
  9#include <linux/types.h>
 10
 11#include "xe_pt_walk.h"
 12
 13struct xe_bo;
 14struct xe_device;
 15struct xe_vma;
 16
 17enum xe_cache_level {
 18	XE_CACHE_NONE,
 19	XE_CACHE_WT,
 20	XE_CACHE_WB,
 21	XE_CACHE_NONE_COMPRESSION, /*UC + COH_NONE + COMPRESSION */
 22	__XE_CACHE_LEVEL_COUNT,
 23};
 24
 25#define XE_VM_MAX_LEVEL 4
 26
 27struct xe_pt {
 28	struct xe_ptw base;
 29	struct xe_bo *bo;
 30	unsigned int level;
 31	unsigned int num_live;
 32	bool rebind;
 33	bool is_compact;
 34#if IS_ENABLED(CONFIG_DRM_XE_DEBUG_VM)
 35	/** addr: Virtual address start address of the PT. */
 36	u64 addr;
 37#endif
 38};
 39
 40struct xe_pt_ops {
 41	u64 (*pte_encode_bo)(struct xe_bo *bo, u64 bo_offset,
 42			     u16 pat_index, u32 pt_level);
 43	u64 (*pte_encode_vma)(u64 pte, struct xe_vma *vma,
 44			      u16 pat_index, u32 pt_level);
 45	u64 (*pte_encode_addr)(struct xe_device *xe, u64 addr,
 46			       u16 pat_index,
 47			       u32 pt_level, bool devmem, u64 flags);
 48	u64 (*pde_encode_bo)(struct xe_bo *bo, u64 bo_offset);
 49};
 50
 51struct xe_pt_entry {
 52	struct xe_pt *pt;
 53	u64 pte;
 54};
 55
 56struct xe_vm_pgtable_update {
 57	/** @bo: page table bo to write to */
 58	struct xe_bo *pt_bo;
 59
 60	/** @ofs: offset inside this PTE to begin writing to (in qwords) */
 61	u32 ofs;
 62
 63	/** @qwords: number of PTE's to write */
 64	u32 qwords;
 65
 66	/** @pt: opaque pointer useful for the caller of xe_migrate_update_pgtables */
 67	struct xe_pt *pt;
 68
 69	/** @pt_entries: Newly added pagetable entries */
 70	struct xe_pt_entry *pt_entries;
 71
 72	/** @flags: Target flags */
 73	u32 flags;
 74};
 75
 76/** struct xe_vm_pgtable_update_op - Page table update operation */
 77struct xe_vm_pgtable_update_op {
 78	/** @entries: entries to update for this operation */
 79	struct xe_vm_pgtable_update entries[XE_VM_MAX_LEVEL * 2 + 1];
 80	/** @vma: VMA for operation, operation not valid if NULL */
 81	struct xe_vma *vma;
 82	/** @num_entries: number of entries for this update operation */
 83	u32 num_entries;
 84	/** @bind: is a bind */
 85	bool bind;
 86	/** @rebind: is a rebind */
 87	bool rebind;
 88};
 89
 90/** struct xe_vm_pgtable_update_ops: page table update operations */
 91struct xe_vm_pgtable_update_ops {
 92	/** @ops: operations */
 93	struct xe_vm_pgtable_update_op *ops;
 94	/** @deferred: deferred list to destroy PT entries */
 95	struct llist_head deferred;
 96	/** @q: exec queue for PT operations */
 97	struct xe_exec_queue *q;
 98	/** @start: start address of ops */
 99	u64 start;
100	/** @last: last address of ops */
101	u64 last;
102	/** @num_ops: number of operations */
103	u32 num_ops;
104	/** @current_op: current operations */
105	u32 current_op;
106	/** @needs_svm_lock: Needs SVM lock */
107	bool needs_svm_lock;
108	/** @needs_invalidation: Needs invalidation */
109	bool needs_invalidation;
110	/**
111	 * @wait_vm_bookkeep: PT operations need to wait until VM is idle
112	 * (bookkeep dma-resv slots are idle) and stage all future VM activity
113	 * behind these operations (install PT operations into VM kernel
114	 * dma-resv slot).
115	 */
116	bool wait_vm_bookkeep;
117	/**
118	 * @wait_vm_kernel: PT operations need to wait until VM kernel dma-resv
119	 * slots are idle.
120	 */
121	bool wait_vm_kernel;
122};
123
124#endif