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xe_oa_types.h

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linux-6.19.14/drivers/gpu/drm/xe/xe_oa_types.h C
  1/* SPDX-License-Identifier: MIT */
  2/*
  3 * Copyright © 2023-2024 Intel Corporation
  4 */
  5
  6#ifndef _XE_OA_TYPES_H_
  7#define _XE_OA_TYPES_H_
  8
  9#include <linux/bitops.h>
 10#include <linux/idr.h>
 11#include <linux/mutex.h>
 12#include <linux/types.h>
 13
 14#include <uapi/drm/xe_drm.h>
 15#include "regs/xe_reg_defs.h"
 16#include "xe_hw_engine_types.h"
 17
 18struct drm_syncobj;
 19
 20#define DEFAULT_XE_OA_BUFFER_SIZE SZ_16M
 21
 22enum xe_oa_report_header {
 23	HDR_32_BIT = 0,
 24	HDR_64_BIT,
 25};
 26
 27enum xe_oa_format_name {
 28	XE_OA_FORMAT_C4_B8,
 29
 30	/* Gen8+ */
 31	XE_OA_FORMAT_A12,
 32	XE_OA_FORMAT_A12_B8_C8,
 33	XE_OA_FORMAT_A32u40_A4u32_B8_C8,
 34
 35	/* DG2 */
 36	XE_OAR_FORMAT_A32u40_A4u32_B8_C8,
 37	XE_OA_FORMAT_A24u40_A14u32_B8_C8,
 38
 39	/* DG2/MTL OAC */
 40	XE_OAC_FORMAT_A24u64_B8_C8,
 41	XE_OAC_FORMAT_A22u32_R2u32_B8_C8,
 42
 43	/* MTL OAM */
 44	XE_OAM_FORMAT_MPEC8u64_B8_C8,
 45	XE_OAM_FORMAT_MPEC8u32_B8_C8,
 46
 47	/* Xe2+ */
 48	XE_OA_FORMAT_PEC64u64,
 49	XE_OA_FORMAT_PEC64u64_B8_C8,
 50	XE_OA_FORMAT_PEC64u32,
 51	XE_OA_FORMAT_PEC32u64_G1,
 52	XE_OA_FORMAT_PEC32u32_G1,
 53	XE_OA_FORMAT_PEC32u64_G2,
 54	XE_OA_FORMAT_PEC32u32_G2,
 55	XE_OA_FORMAT_PEC36u64_G1_32_G2_4,
 56	XE_OA_FORMAT_PEC36u64_G1_4_G2_32,
 57
 58	__XE_OA_FORMAT_MAX,
 59};
 60
 61/**
 62 * struct xe_oa_format - Format fields for supported OA formats. OA format
 63 * properties are specified in PRM/Bspec 52198 and 60942
 64 */
 65struct xe_oa_format {
 66	/** @counter_select: counter select value (see Bspec 52198/60942) */
 67	u32 counter_select;
 68	/** @size: record size as written by HW (multiple of 64 byte cachelines) */
 69	int size;
 70	/** @type: of enum @drm_xe_oa_format_type */
 71	int type;
 72	/** @header: 32 or 64 bit report headers */
 73	enum xe_oa_report_header header;
 74	/** @counter_size: counter size value (see Bspec 60942) */
 75	u16 counter_size;
 76	/** @bc_report: BC report value (see Bspec 60942) */
 77	u16 bc_report;
 78};
 79
 80/** struct xe_oa_regs - Registers for each OA unit */
 81struct xe_oa_regs {
 82	u32 base;
 83	struct xe_reg oa_head_ptr;
 84	struct xe_reg oa_tail_ptr;
 85	struct xe_reg oa_buffer;
 86	struct xe_reg oa_ctx_ctrl;
 87	struct xe_reg oa_ctrl;
 88	struct xe_reg oa_debug;
 89	struct xe_reg oa_status;
 90	u32 oa_ctrl_counter_select_mask;
 91};
 92
 93/**
 94 * struct xe_oa_unit - Hardware OA unit
 95 */
 96struct xe_oa_unit {
 97	/** @oa_unit_id: identifier for the OA unit */
 98	u16 oa_unit_id;
 99
100	/** @gt: gt associated with the OA unit */
101	struct xe_gt *gt;
102
103	/** @type: Type of OA unit - OAM, OAG etc. */
104	enum drm_xe_oa_unit_type type;
105
106	/** @regs: OA registers for programming the OA unit */
107	struct xe_oa_regs regs;
108
109	/** @num_engines: number of engines attached to this OA unit */
110	u32 num_engines;
111
112	/** @exclusive_stream: The stream currently using the OA unit */
113	struct xe_oa_stream *exclusive_stream;
114};
115
116/**
117 * struct xe_oa_gt - OA per-gt information
118 */
119struct xe_oa_gt {
120	/** @gt_lock: lock protecting create/destroy OA streams */
121	struct mutex gt_lock;
122
123	/** @num_oa_units: number of oa units for each gt */
124	u32 num_oa_units;
125
126	/** @oa_unit: array of oa_units */
127	struct xe_oa_unit *oa_unit;
128};
129
130/**
131 * struct xe_oa - OA device level information
132 */
133struct xe_oa {
134	/** @xe: back pointer to xe device */
135	struct xe_device *xe;
136
137	/** @metrics_kobj: kobj for metrics sysfs */
138	struct kobject *metrics_kobj;
139
140	/** @metrics_lock: lock protecting add/remove configs */
141	struct mutex metrics_lock;
142
143	/** @metrics_idr: List of dynamic configurations (struct xe_oa_config) */
144	struct idr metrics_idr;
145
146	/** @oa_formats: tracks all OA formats across platforms */
147	const struct xe_oa_format *oa_formats;
148
149	/** @format_mask: tracks valid OA formats for a platform */
150	unsigned long format_mask[BITS_TO_LONGS(__XE_OA_FORMAT_MAX)];
151
152	/** @oa_unit_ids: tracks oa unit ids assigned across gt's */
153	u16 oa_unit_ids;
154};
155
156/** @xe_oa_buffer: State of the stream OA buffer */
157struct xe_oa_buffer {
158	/** @format: data format */
159	const struct xe_oa_format *format;
160
161	/** @format: xe_bo backing the OA buffer */
162	struct xe_bo *bo;
163
164	/** @vaddr: mapped vaddr of the OA buffer */
165	u8 *vaddr;
166
167	/** @ptr_lock: Lock protecting reads/writes to head/tail pointers */
168	spinlock_t ptr_lock;
169
170	/** @head: Cached head to read from */
171	u32 head;
172
173	/** @tail: The last verified cached tail where HW has completed writing */
174	u32 tail;
175
176	/** @circ_size: The effective circular buffer size, for Xe2+ */
177	u32 circ_size;
178};
179
180/**
181 * struct xe_oa_stream - state for a single open stream FD
182 */
183struct xe_oa_stream {
184	/** @oa: xe_oa backpointer */
185	struct xe_oa *oa;
186
187	/** @gt: gt associated with the oa stream */
188	struct xe_gt *gt;
189
190	/** @oa_unit: oa unit for this stream */
191	struct xe_oa_unit *oa_unit;
192
193	/** @hwe: hardware engine associated with this oa stream */
194	struct xe_hw_engine *hwe;
195
196	/** @stream_lock: Lock serializing stream operations */
197	struct mutex stream_lock;
198
199	/** @sample: true if DRM_XE_OA_PROP_SAMPLE_OA is provided */
200	bool sample;
201
202	/** @exec_q: Exec queue corresponding to DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID */
203	struct xe_exec_queue *exec_q;
204
205	/** @k_exec_q: kernel exec_q used for OA programming batch submissions */
206	struct xe_exec_queue *k_exec_q;
207
208	/** @enabled: Whether the stream is currently enabled */
209	bool enabled;
210
211	/** @oa_config: OA configuration used by the stream */
212	struct xe_oa_config *oa_config;
213
214	/** @oa_config_bos: List of struct @xe_oa_config_bo's */
215	struct llist_head oa_config_bos;
216
217	/** @poll_check_timer: Timer to periodically check for data in the OA buffer */
218	struct hrtimer poll_check_timer;
219
220	/** @poll_wq: Wait queue for waiting for OA data to be available */
221	wait_queue_head_t poll_wq;
222
223	/** @pollin: Whether there is data available to read */
224	bool pollin;
225
226	/** @wait_num_reports: Number of reports to wait for before signalling pollin */
227	int wait_num_reports;
228
229	/** @periodic: Whether periodic sampling is currently enabled */
230	bool periodic;
231
232	/** @period_exponent: OA unit sampling frequency is derived from this */
233	int period_exponent;
234
235	/** @oa_buffer: OA buffer for the stream */
236	struct xe_oa_buffer oa_buffer;
237
238	/** @poll_period_ns: hrtimer period for checking OA buffer for available data */
239	u64 poll_period_ns;
240
241	/** @override_gucrc: GuC RC has been overridden for the OA stream */
242	bool override_gucrc;
243
244	/** @oa_status: temporary storage for oa_status register value */
245	u32 oa_status;
246
247	/** @no_preempt: Whether preemption and timeslicing is disabled for stream exec_q */
248	u32 no_preempt;
249
250	/** @xef: xe_file with which the stream was opened */
251	struct xe_file *xef;
252
253	/** @ufence_syncobj: User fence syncobj */
254	struct drm_syncobj *ufence_syncobj;
255
256	/** @ufence_timeline_value: User fence timeline value */
257	u64 ufence_timeline_value;
258
259	/** @last_fence: fence to use in stream destroy when needed */
260	struct dma_fence *last_fence;
261
262	/** @num_syncs: size of @syncs array */
263	u32 num_syncs;
264
265	/** @syncs: syncs to wait on and to signal */
266	struct xe_sync_entry *syncs;
267
268	/** @fw_ref: Forcewake reference */
269	unsigned int fw_ref;
270};
271#endif
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