xe_i2c.c

  1// SPDX-License-Identifier: GPL-2.0 OR MIT
  2/*
  3 * Intel Xe I2C attached Microcontroller Units (MCU)
  4 *
  5 * Copyright (C) 2025 Intel Corporation.
  6 */
  7
  8#include <linux/array_size.h>
  9#include <linux/container_of.h>
 10#include <linux/device.h>
 11#include <linux/err.h>
 12#include <linux/i2c.h>
 13#include <linux/ioport.h>
 14#include <linux/irq.h>
 15#include <linux/irqdomain.h>
 16#include <linux/notifier.h>
 17#include <linux/pci.h>
 18#include <linux/platform_device.h>
 19#include <linux/property.h>
 20#include <linux/regmap.h>
 21#include <linux/sprintf.h>
 22#include <linux/string.h>
 23#include <linux/types.h>
 24#include <linux/workqueue.h>
 25
 26#include "regs/xe_i2c_regs.h"
 27#include "regs/xe_irq_regs.h"
 28
 29#include "xe_device.h"
 30#include "xe_device_types.h"
 31#include "xe_i2c.h"
 32#include "xe_mmio.h"
 33#include "xe_platform_types.h"
 34
 35/**
 36 * DOC: Xe I2C devices
 37 *
 38 * Register a platform device for the I2C host controller (Synpsys DesignWare
 39 * I2C) if the registers of that controller are mapped to the MMIO, and also the
 40 * I2C client device for the Add-In Management Controller (the MCU) attached to
 41 * the host controller.
 42 *
 43 * See drivers/i2c/busses/i2c-designware-* for more information on the I2C host
 44 * controller.
 45 */
 46
 47static const char adapter_name[] = "i2c_designware";
 48
 49static const struct property_entry xe_i2c_adapter_properties[] = {
 50	PROPERTY_ENTRY_STRING("compatible", "intel,xe-i2c"),
 51	PROPERTY_ENTRY_U32("clock-frequency", I2C_MAX_FAST_MODE_PLUS_FREQ),
 52	{ }
 53};
 54
 55static inline void xe_i2c_read_endpoint(struct xe_mmio *mmio, void *ep)
 56{
 57	u32 *val = ep;
 58
 59	val[0] = xe_mmio_read32(mmio, REG_SG_REMAP_ADDR_PREFIX);
 60	val[1] = xe_mmio_read32(mmio, REG_SG_REMAP_ADDR_POSTFIX);
 61}
 62
 63static void xe_i2c_client_work(struct work_struct *work)
 64{
 65	struct xe_i2c *i2c = container_of(work, struct xe_i2c, work);
 66	struct i2c_board_info info = {
 67		.type	= "amc",
 68		.flags	= I2C_CLIENT_HOST_NOTIFY,
 69		.addr	= i2c->ep.addr[1],
 70	};
 71
 72	i2c->client[0] = i2c_new_client_device(i2c->adapter, &info);
 73}
 74
 75static int xe_i2c_notifier(struct notifier_block *nb, unsigned long action, void *data)
 76{
 77	struct xe_i2c *i2c = container_of(nb, struct xe_i2c, bus_notifier);
 78	struct i2c_adapter *adapter = i2c_verify_adapter(data);
 79	struct device *dev = data;
 80
 81	if (action == BUS_NOTIFY_ADD_DEVICE &&
 82	    adapter && dev->parent == &i2c->pdev->dev) {
 83		i2c->adapter = adapter;
 84		schedule_work(&i2c->work);
 85		return NOTIFY_OK;
 86	}
 87
 88	return NOTIFY_DONE;
 89}
 90
 91static int xe_i2c_register_adapter(struct xe_i2c *i2c)
 92{
 93	struct pci_dev *pci = to_pci_dev(i2c->drm_dev);
 94	struct platform_device *pdev;
 95	struct fwnode_handle *fwnode;
 96	int ret;
 97
 98	fwnode = fwnode_create_software_node(xe_i2c_adapter_properties, NULL);
 99	if (IS_ERR(fwnode))
100		return PTR_ERR(fwnode);
101
102	/*
103	 * Not using platform_device_register_full() here because we don't have
104	 * a handle to the platform_device before it returns. xe_i2c_notifier()
105	 * uses that handle, but it may be called before
106	 * platform_device_register_full() is done.
107	 */
108	pdev = platform_device_alloc(adapter_name, pci_dev_id(pci));
109	if (!pdev) {
110		ret = -ENOMEM;
111		goto err_fwnode_remove;
112	}
113
114	if (i2c->adapter_irq) {
115		struct resource res;
116
117		res = DEFINE_RES_IRQ_NAMED(i2c->adapter_irq, "xe_i2c");
118
119		ret = platform_device_add_resources(pdev, &res, 1);
120		if (ret)
121			goto err_pdev_put;
122	}
123
124	pdev->dev.parent = i2c->drm_dev;
125	pdev->dev.fwnode = fwnode;
126	i2c->adapter_node = fwnode;
127	i2c->pdev = pdev;
128
129	ret = platform_device_add(pdev);
130	if (ret)
131		goto err_pdev_put;
132
133	return 0;
134
135err_pdev_put:
136	platform_device_put(pdev);
137err_fwnode_remove:
138	fwnode_remove_software_node(fwnode);
139
140	return ret;
141}
142
143static void xe_i2c_unregister_adapter(struct xe_i2c *i2c)
144{
145	platform_device_unregister(i2c->pdev);
146	fwnode_remove_software_node(i2c->adapter_node);
147}
148
149/**
150 * xe_i2c_present - I2C controller is present and functional
151 * @xe: xe device instance
152 *
153 * Check whether the I2C controller is present and functioning with valid
154 * endpoint cookie.
155 *
156 * Return: %true if present, %false otherwise.
157 */
158bool xe_i2c_present(struct xe_device *xe)
159{
160	return xe->i2c && xe->i2c->ep.cookie == XE_I2C_EP_COOKIE_DEVICE;
161}
162
163static bool xe_i2c_irq_present(struct xe_device *xe)
164{
165	return xe->i2c && xe->i2c->adapter_irq;
166}
167
168/**
169 * xe_i2c_irq_handler: Handler for I2C interrupts
170 * @xe: xe device instance
171 * @master_ctl: interrupt register
172 *
173 * Forward interrupts generated by the I2C host adapter to the I2C host adapter
174 * driver.
175 */
176void xe_i2c_irq_handler(struct xe_device *xe, u32 master_ctl)
177{
178	if (!xe_i2c_irq_present(xe))
179		return;
180
181	if (master_ctl & I2C_IRQ)
182		generic_handle_irq_safe(xe->i2c->adapter_irq);
183}
184
185void xe_i2c_irq_reset(struct xe_device *xe)
186{
187	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
188
189	if (!xe_i2c_irq_present(xe))
190		return;
191
192	xe_mmio_rmw32(mmio, I2C_BRIDGE_PCICFGCTL, ACPI_INTR_EN, 0);
193}
194
195void xe_i2c_irq_postinstall(struct xe_device *xe)
196{
197	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
198
199	if (!xe_i2c_irq_present(xe))
200		return;
201
202	xe_mmio_rmw32(mmio, I2C_BRIDGE_PCICFGCTL, 0, ACPI_INTR_EN);
203}
204
205static int xe_i2c_irq_map(struct irq_domain *h, unsigned int virq,
206			  irq_hw_number_t hw_irq_num)
207{
208	irq_set_chip_and_handler(virq, &dummy_irq_chip, handle_simple_irq);
209	return 0;
210}
211
212static const struct irq_domain_ops xe_i2c_irq_ops = {
213	.map = xe_i2c_irq_map,
214};
215
216static int xe_i2c_create_irq(struct xe_i2c *i2c)
217{
218	struct irq_domain *domain;
219
220	if (!(i2c->ep.capabilities & XE_I2C_EP_CAP_IRQ))
221		return 0;
222
223	domain = irq_domain_create_linear(dev_fwnode(i2c->drm_dev), 1, &xe_i2c_irq_ops, NULL);
224	if (!domain)
225		return -ENOMEM;
226
227	i2c->adapter_irq = irq_create_mapping(domain, 0);
228	i2c->irqdomain = domain;
229
230	return 0;
231}
232
233static void xe_i2c_remove_irq(struct xe_i2c *i2c)
234{
235	if (!i2c->irqdomain)
236		return;
237
238	irq_dispose_mapping(i2c->adapter_irq);
239	irq_domain_remove(i2c->irqdomain);
240}
241
242static int xe_i2c_read(void *context, unsigned int reg, unsigned int *val)
243{
244	struct xe_i2c *i2c = context;
245
246	*val = xe_mmio_read32(i2c->mmio, XE_REG(reg + I2C_MEM_SPACE_OFFSET));
247
248	return 0;
249}
250
251static int xe_i2c_write(void *context, unsigned int reg, unsigned int val)
252{
253	struct xe_i2c *i2c = context;
254
255	xe_mmio_write32(i2c->mmio, XE_REG(reg + I2C_MEM_SPACE_OFFSET), val);
256
257	return 0;
258}
259
260static const struct regmap_config i2c_regmap_config = {
261	.reg_bits = 32,
262	.val_bits = 32,
263	.reg_read = xe_i2c_read,
264	.reg_write = xe_i2c_write,
265	.fast_io = true,
266};
267
268void xe_i2c_pm_suspend(struct xe_device *xe)
269{
270	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
271
272	if (!xe_i2c_present(xe))
273		return;
274
275	xe_mmio_rmw32(mmio, I2C_CONFIG_PMCSR, PCI_PM_CTRL_STATE_MASK, (__force u32)PCI_D3hot);
276	drm_dbg(&xe->drm, "pmcsr: 0x%08x\n", xe_mmio_read32(mmio, I2C_CONFIG_PMCSR));
277}
278
279void xe_i2c_pm_resume(struct xe_device *xe, bool d3cold)
280{
281	struct xe_mmio *mmio = xe_root_tile_mmio(xe);
282
283	if (!xe_i2c_present(xe))
284		return;
285
286	if (d3cold)
287		xe_mmio_rmw32(mmio, I2C_CONFIG_CMD, 0, PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
288
289	xe_mmio_rmw32(mmio, I2C_CONFIG_PMCSR, PCI_PM_CTRL_STATE_MASK, (__force u32)PCI_D0);
290	drm_dbg(&xe->drm, "pmcsr: 0x%08x\n", xe_mmio_read32(mmio, I2C_CONFIG_PMCSR));
291}
292
293static void xe_i2c_remove(void *data)
294{
295	struct xe_i2c *i2c = data;
296	unsigned int i;
297
298	for (i = 0; i < XE_I2C_MAX_CLIENTS; i++)
299		i2c_unregister_device(i2c->client[i]);
300
301	bus_unregister_notifier(&i2c_bus_type, &i2c->bus_notifier);
302	xe_i2c_unregister_adapter(i2c);
303	xe_i2c_remove_irq(i2c);
304}
305
306/**
307 * xe_i2c_probe: Probe the I2C host adapter and the I2C clients attached to it
308 * @xe: xe device instance
309 *
310 * Register all the I2C devices described in the I2C Endpoint data structure.
311 *
312 * Return: 0 on success, error code on failure
313 */
314int xe_i2c_probe(struct xe_device *xe)
315{
316	struct device *drm_dev = xe->drm.dev;
317	struct xe_i2c_endpoint ep;
318	struct regmap *regmap;
319	struct xe_i2c *i2c;
320	int ret;
321
322	if (xe->info.platform != XE_BATTLEMAGE)
323		return 0;
324
325	if (IS_SRIOV_VF(xe))
326		return 0;
327
328	xe_i2c_read_endpoint(xe_root_tile_mmio(xe), &ep);
329	if (ep.cookie != XE_I2C_EP_COOKIE_DEVICE)
330		return 0;
331
332	i2c = devm_kzalloc(drm_dev, sizeof(*i2c), GFP_KERNEL);
333	if (!i2c)
334		return -ENOMEM;
335
336	INIT_WORK(&i2c->work, xe_i2c_client_work);
337	i2c->mmio = xe_root_tile_mmio(xe);
338	i2c->drm_dev = drm_dev;
339	i2c->ep = ep;
340	xe->i2c = i2c;
341
342	/* PCI PM isn't aware of this device, bring it up and match it with SGUnit state. */
343	xe_i2c_pm_resume(xe, true);
344
345	regmap = devm_regmap_init(drm_dev, NULL, i2c, &i2c_regmap_config);
346	if (IS_ERR(regmap))
347		return PTR_ERR(regmap);
348
349	i2c->bus_notifier.notifier_call = xe_i2c_notifier;
350	ret = bus_register_notifier(&i2c_bus_type, &i2c->bus_notifier);
351	if (ret)
352		return ret;
353
354	ret = xe_i2c_create_irq(i2c);
355	if (ret)
356		goto err_unregister_notifier;
357
358	ret = xe_i2c_register_adapter(i2c);
359	if (ret)
360		goto err_remove_irq;
361
362	xe_i2c_irq_postinstall(xe);
363	return devm_add_action_or_reset(drm_dev, xe_i2c_remove, i2c);
364
365err_remove_irq:
366	xe_i2c_remove_irq(i2c);
367
368err_unregister_notifier:
369	bus_unregister_notifier(&i2c_bus_type, &i2c->bus_notifier);
370
371	return ret;
372}