vc4_txp.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Copyright © 2018 Broadcom
  4 *
  5 * Authors:
  6 *	Eric Anholt <eric@anholt.net>
  7 *	Boris Brezillon <boris.brezillon@bootlin.com>
  8 */
  9
 10#include <linux/clk.h>
 11#include <linux/component.h>
 12#include <linux/mod_devicetable.h>
 13#include <linux/platform_device.h>
 14#include <linux/pm_runtime.h>
 15
 16#include <drm/drm_atomic.h>
 17#include <drm/drm_atomic_helper.h>
 18#include <drm/drm_drv.h>
 19#include <drm/drm_edid.h>
 20#include <drm/drm_fb_dma_helper.h>
 21#include <drm/drm_fourcc.h>
 22#include <drm/drm_framebuffer.h>
 23#include <drm/drm_panel.h>
 24#include <drm/drm_print.h>
 25#include <drm/drm_probe_helper.h>
 26#include <drm/drm_vblank.h>
 27#include <drm/drm_writeback.h>
 28
 29#include "vc4_drv.h"
 30#include "vc4_regs.h"
 31
 32/* Base address of the output.  Raster formats must be 4-byte aligned,
 33 * T and LT must be 16-byte aligned or maybe utile-aligned (docs are
 34 * inconsistent, but probably utile).
 35 */
 36#define TXP_DST_PTR		0x00
 37
 38/* Pitch in bytes for raster images, 16-byte aligned.  For tiled, it's
 39 * the width in tiles.
 40 */
 41#define TXP_DST_PITCH		0x04
 42/* For T-tiled imgaes, DST_PITCH should be the number of tiles wide,
 43 * shifted up.
 44 */
 45# define TXP_T_TILE_WIDTH_SHIFT		7
 46/* For LT-tiled images, DST_PITCH should be the number of utiles wide,
 47 * shifted up.
 48 */
 49# define TXP_LT_TILE_WIDTH_SHIFT	4
 50
 51/* Pre-rotation width/height of the image.  Must match HVS config.
 52 *
 53 * If TFORMAT and 32-bit, limit is 1920 for 32-bit and 3840 to 16-bit
 54 * and width/height must be tile or utile-aligned as appropriate.  If
 55 * transposing (rotating), width is limited to 1920.
 56 *
 57 * Height is limited to various numbers between 4088 and 4095.  I'd
 58 * just use 4088 to be safe.
 59 */
 60#define TXP_DIM			0x08
 61# define TXP_HEIGHT_SHIFT		16
 62# define TXP_HEIGHT_MASK		GENMASK(31, 16)
 63# define TXP_WIDTH_SHIFT		0
 64# define TXP_WIDTH_MASK			GENMASK(15, 0)
 65
 66#define TXP_DST_CTRL		0x0c
 67/* These bits are set to 0x54 */
 68#define TXP_PILOT_SHIFT			24
 69#define TXP_PILOT_MASK			GENMASK(31, 24)
 70/* Bits 22-23 are set to 0x01 */
 71#define TXP_VERSION_SHIFT		22
 72#define TXP_VERSION_MASK		GENMASK(23, 22)
 73
 74/* Powers down the internal memory. */
 75# define TXP_POWERDOWN			BIT(21)
 76
 77/* Enables storing the alpha component in 8888/4444, instead of
 78 * filling with ~ALPHA_INVERT.
 79 */
 80# define TXP_ALPHA_ENABLE		BIT(20)
 81
 82/* 4 bits, each enables stores for a channel in each set of 4 bytes.
 83 * Set to 0xf for normal operation.
 84 */
 85# define TXP_BYTE_ENABLE_SHIFT		16
 86# define TXP_BYTE_ENABLE_MASK		GENMASK(19, 16)
 87
 88/* Debug: Generate VSTART again at EOF. */
 89# define TXP_VSTART_AT_EOF		BIT(15)
 90
 91/* Debug: Terminate the current frame immediately.  Stops AXI
 92 * writes.
 93 */
 94# define TXP_ABORT			BIT(14)
 95
 96# define TXP_DITHER			BIT(13)
 97
 98/* Inverts alpha if TXP_ALPHA_ENABLE, chooses fill value for
 99 * !TXP_ALPHA_ENABLE.
100 */
101# define TXP_ALPHA_INVERT		BIT(12)
102
103/* Note: I've listed the channels here in high bit (in byte 3/2/1) to
104 * low bit (in byte 0) order.
105 */
106# define TXP_FORMAT_SHIFT		8
107# define TXP_FORMAT_MASK		GENMASK(11, 8)
108# define TXP_FORMAT_ABGR4444		0
109# define TXP_FORMAT_ARGB4444		1
110# define TXP_FORMAT_BGRA4444		2
111# define TXP_FORMAT_RGBA4444		3
112# define TXP_FORMAT_BGR565		6
113# define TXP_FORMAT_RGB565		7
114/* 888s are non-rotated, raster-only */
115# define TXP_FORMAT_BGR888		8
116# define TXP_FORMAT_RGB888		9
117# define TXP_FORMAT_ABGR8888		12
118# define TXP_FORMAT_ARGB8888		13
119# define TXP_FORMAT_BGRA8888		14
120# define TXP_FORMAT_RGBA8888		15
121
122/* If TFORMAT is set, generates LT instead of T format. */
123# define TXP_LINEAR_UTILE		BIT(7)
124
125/* Rotate output by 90 degrees. */
126# define TXP_TRANSPOSE			BIT(6)
127
128/* Generate a tiled format for V3D. */
129# define TXP_TFORMAT			BIT(5)
130
131/* Generates some undefined test mode output. */
132# define TXP_TEST_MODE			BIT(4)
133
134/* Request odd field from HVS. */
135# define TXP_FIELD			BIT(3)
136
137/* Raise interrupt when idle. */
138# define TXP_EI				BIT(2)
139
140/* Set when generating a frame, clears when idle. */
141# define TXP_BUSY			BIT(1)
142
143/* Starts a frame.  Self-clearing. */
144# define TXP_GO				BIT(0)
145
146/* Number of lines received and committed to memory. */
147#define TXP_PROGRESS		0x10
148
149#define TXP_DST_PTR_HIGH_MOPLET	0x1c
150#define TXP_DST_PTR_HIGH_MOP	0x24
151
152#define TXP_READ(offset)								\
153	({										\
154		kunit_fail_current_test("Accessing a register in a unit test!\n");	\
155		readl(txp->regs + (offset));						\
156	})
157
158#define TXP_WRITE(offset, val)								\
159	do {										\
160		kunit_fail_current_test("Accessing a register in a unit test!\n");	\
161		writel(val, txp->regs + (offset));					\
162	} while (0)
163
164struct vc4_txp {
165	struct vc4_crtc	base;
166	const struct vc4_txp_data *data;
167
168	struct platform_device *pdev;
169
170	struct vc4_encoder encoder;
171	struct drm_writeback_connector connector;
172
173	void __iomem *regs;
174};
175
176#define encoder_to_vc4_txp(_encoder)					\
177	container_of_const(_encoder, struct vc4_txp, encoder.base)
178
179#define connector_to_vc4_txp(_connector)				\
180	container_of_const(_connector, struct vc4_txp, connector.base)
181
182static const struct debugfs_reg32 txp_regs[] = {
183	VC4_REG32(TXP_DST_PTR),
184	VC4_REG32(TXP_DST_PITCH),
185	VC4_REG32(TXP_DIM),
186	VC4_REG32(TXP_DST_CTRL),
187	VC4_REG32(TXP_PROGRESS),
188};
189
190static int vc4_txp_connector_get_modes(struct drm_connector *connector)
191{
192	struct drm_device *dev = connector->dev;
193
194	return drm_add_modes_noedid(connector, dev->mode_config.max_width,
195				    dev->mode_config.max_height);
196}
197
198static enum drm_mode_status
199vc4_txp_connector_mode_valid(struct drm_connector *connector,
200			     const struct drm_display_mode *mode)
201{
202	struct drm_device *dev = connector->dev;
203	struct drm_mode_config *mode_config = &dev->mode_config;
204	int w = mode->hdisplay, h = mode->vdisplay;
205
206	if (w < mode_config->min_width || w > mode_config->max_width)
207		return MODE_BAD_HVALUE;
208
209	if (h < mode_config->min_height || h > mode_config->max_height)
210		return MODE_BAD_VVALUE;
211
212	return MODE_OK;
213}
214
215static const u32 drm_fmts[] = {
216	DRM_FORMAT_RGB888,
217	DRM_FORMAT_BGR888,
218	DRM_FORMAT_XRGB8888,
219	DRM_FORMAT_XBGR8888,
220	DRM_FORMAT_ARGB8888,
221	DRM_FORMAT_ABGR8888,
222	DRM_FORMAT_RGBX8888,
223	DRM_FORMAT_BGRX8888,
224	DRM_FORMAT_RGBA8888,
225	DRM_FORMAT_BGRA8888,
226};
227
228static const u32 txp_fmts[] = {
229	TXP_FORMAT_RGB888,
230	TXP_FORMAT_BGR888,
231	TXP_FORMAT_ARGB8888,
232	TXP_FORMAT_ABGR8888,
233	TXP_FORMAT_ARGB8888,
234	TXP_FORMAT_ABGR8888,
235	TXP_FORMAT_RGBA8888,
236	TXP_FORMAT_BGRA8888,
237	TXP_FORMAT_RGBA8888,
238	TXP_FORMAT_BGRA8888,
239};
240
241static void vc4_txp_armed(struct drm_crtc_state *state)
242{
243	struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state);
244
245	vc4_state->txp_armed = true;
246}
247
248static int vc4_txp_connector_atomic_check(struct drm_connector *conn,
249					  struct drm_atomic_state *state)
250{
251	struct drm_connector_state *conn_state;
252	struct drm_crtc_state *crtc_state;
253	struct drm_framebuffer *fb;
254	int i;
255
256	conn_state = drm_atomic_get_new_connector_state(state, conn);
257	if (!conn_state->writeback_job)
258		return 0;
259
260	crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
261
262	fb = conn_state->writeback_job->fb;
263	if (fb->width != crtc_state->mode.hdisplay ||
264	    fb->height != crtc_state->mode.vdisplay) {
265		DRM_DEBUG_KMS("Invalid framebuffer size %ux%u\n",
266			      fb->width, fb->height);
267		return -EINVAL;
268	}
269
270	for (i = 0; i < ARRAY_SIZE(drm_fmts); i++) {
271		if (fb->format->format == drm_fmts[i])
272			break;
273	}
274
275	if (i == ARRAY_SIZE(drm_fmts))
276		return -EINVAL;
277
278	/* Pitch must be aligned on 16 bytes. */
279	if (fb->pitches[0] & GENMASK(3, 0))
280		return -EINVAL;
281
282	vc4_txp_armed(crtc_state);
283
284	return 0;
285}
286
287static void vc4_txp_connector_atomic_commit(struct drm_connector *conn,
288					struct drm_atomic_state *state)
289{
290	struct drm_device *drm = conn->dev;
291	struct drm_connector_state *conn_state = drm_atomic_get_new_connector_state(state,
292										    conn);
293	struct vc4_txp *txp = connector_to_vc4_txp(conn);
294	const struct vc4_txp_data *txp_data = txp->data;
295	struct drm_gem_dma_object *gem;
296	struct drm_display_mode *mode;
297	struct drm_framebuffer *fb;
298	unsigned int hdisplay;
299	unsigned int vdisplay;
300	dma_addr_t addr;
301	u32 ctrl;
302	int idx;
303	int i;
304
305	if (WARN_ON(!conn_state->writeback_job))
306		return;
307
308	mode = &conn_state->crtc->state->adjusted_mode;
309	fb = conn_state->writeback_job->fb;
310
311	for (i = 0; i < ARRAY_SIZE(drm_fmts); i++) {
312		if (fb->format->format == drm_fmts[i])
313			break;
314	}
315
316	if (WARN_ON(i == ARRAY_SIZE(drm_fmts)))
317		return;
318
319	ctrl = TXP_GO | TXP_EI |
320	       VC4_SET_FIELD(txp_fmts[i], TXP_FORMAT);
321
322	if (txp_data->has_byte_enable)
323		ctrl |= VC4_SET_FIELD(0xf, TXP_BYTE_ENABLE);
324
325	if (fb->format->has_alpha)
326		ctrl |= TXP_ALPHA_ENABLE;
327	else
328		/*
329		 * If TXP_ALPHA_ENABLE isn't set and TXP_ALPHA_INVERT is, the
330		 * hardware will force the output padding to be 0xff.
331		 */
332		ctrl |= TXP_ALPHA_INVERT;
333
334	if (!drm_dev_enter(drm, &idx))
335		return;
336
337	gem = drm_fb_dma_get_gem_obj(fb, 0);
338	addr = gem->dma_addr + fb->offsets[0];
339
340	TXP_WRITE(TXP_DST_PTR, lower_32_bits(addr));
341
342	if (txp_data->supports_40bit_addresses)
343		TXP_WRITE(txp_data->high_addr_ptr_reg, upper_32_bits(addr) & 0xff);
344
345	TXP_WRITE(TXP_DST_PITCH, fb->pitches[0]);
346
347	hdisplay = mode->hdisplay ?: 1;
348	vdisplay = mode->vdisplay ?: 1;
349	if (txp_data->size_minus_one) {
350		hdisplay -= 1;
351		vdisplay -= 1;
352	}
353
354	TXP_WRITE(TXP_DIM,
355		  VC4_SET_FIELD(hdisplay, TXP_WIDTH) |
356		  VC4_SET_FIELD(vdisplay, TXP_HEIGHT));
357
358	TXP_WRITE(TXP_DST_CTRL, ctrl);
359
360	drm_writeback_queue_job(&txp->connector, conn_state);
361
362	drm_dev_exit(idx);
363}
364
365static const struct drm_connector_helper_funcs vc4_txp_connector_helper_funcs = {
366	.get_modes = vc4_txp_connector_get_modes,
367	.mode_valid = vc4_txp_connector_mode_valid,
368	.atomic_check = vc4_txp_connector_atomic_check,
369	.atomic_commit = vc4_txp_connector_atomic_commit,
370};
371
372static enum drm_connector_status
373vc4_txp_connector_detect(struct drm_connector *connector, bool force)
374{
375	return connector_status_connected;
376}
377
378static const struct drm_connector_funcs vc4_txp_connector_funcs = {
379	.detect = vc4_txp_connector_detect,
380	.fill_modes = drm_helper_probe_single_connector_modes,
381	.destroy = drm_connector_cleanup,
382	.reset = drm_atomic_helper_connector_reset,
383	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
384	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
385};
386
387static void vc4_txp_encoder_disable(struct drm_encoder *encoder)
388{
389	struct drm_device *drm = encoder->dev;
390	struct vc4_dev *vc4 = to_vc4_dev(drm);
391	struct vc4_txp *txp = encoder_to_vc4_txp(encoder);
392	int idx;
393
394	if (!drm_dev_enter(drm, &idx))
395		return;
396
397	if (TXP_READ(TXP_DST_CTRL) & TXP_BUSY) {
398		unsigned long timeout = jiffies + msecs_to_jiffies(1000);
399
400		TXP_WRITE(TXP_DST_CTRL, TXP_ABORT);
401
402		while (TXP_READ(TXP_DST_CTRL) & TXP_BUSY &&
403		       time_before(jiffies, timeout))
404			;
405
406		WARN_ON(TXP_READ(TXP_DST_CTRL) & TXP_BUSY);
407	}
408
409	if (vc4->gen < VC4_GEN_6_C)
410		TXP_WRITE(TXP_DST_CTRL, TXP_POWERDOWN);
411
412	drm_dev_exit(idx);
413}
414
415static const struct drm_encoder_helper_funcs vc4_txp_encoder_helper_funcs = {
416	.disable = vc4_txp_encoder_disable,
417};
418
419static int vc4_txp_enable_vblank(struct drm_crtc *crtc)
420{
421	return 0;
422}
423
424static void vc4_txp_disable_vblank(struct drm_crtc *crtc) {}
425
426static const struct drm_crtc_funcs vc4_txp_crtc_funcs = {
427	.set_config		= drm_atomic_helper_set_config,
428	.page_flip		= vc4_page_flip,
429	.reset			= vc4_crtc_reset,
430	.atomic_duplicate_state	= vc4_crtc_duplicate_state,
431	.atomic_destroy_state	= vc4_crtc_destroy_state,
432	.enable_vblank		= vc4_txp_enable_vblank,
433	.disable_vblank		= vc4_txp_disable_vblank,
434	.late_register		= vc4_crtc_late_register,
435};
436
437static int vc4_txp_atomic_check(struct drm_crtc *crtc,
438				struct drm_atomic_state *state)
439{
440	struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
441									  crtc);
442	int ret;
443
444	ret = vc4_hvs_atomic_check(crtc, state);
445	if (ret)
446		return ret;
447
448	crtc_state->no_vblank = true;
449
450	return 0;
451}
452
453static void vc4_txp_atomic_enable(struct drm_crtc *crtc,
454				  struct drm_atomic_state *state)
455{
456	drm_crtc_vblank_on(crtc);
457	vc4_hvs_atomic_enable(crtc, state);
458}
459
460static void vc4_txp_atomic_disable(struct drm_crtc *crtc,
461				   struct drm_atomic_state *state)
462{
463	struct drm_device *dev = crtc->dev;
464
465	/* Disable vblank irq handling before crtc is disabled. */
466	drm_crtc_vblank_off(crtc);
467
468	vc4_hvs_atomic_disable(crtc, state);
469
470	/*
471	 * Make sure we issue a vblank event after disabling the CRTC if
472	 * someone was waiting it.
473	 */
474	if (crtc->state->event) {
475		unsigned long flags;
476
477		spin_lock_irqsave(&dev->event_lock, flags);
478		drm_crtc_send_vblank_event(crtc, crtc->state->event);
479		crtc->state->event = NULL;
480		spin_unlock_irqrestore(&dev->event_lock, flags);
481	}
482}
483
484static const struct drm_crtc_helper_funcs vc4_txp_crtc_helper_funcs = {
485	.atomic_check	= vc4_txp_atomic_check,
486	.atomic_begin	= vc4_hvs_atomic_begin,
487	.atomic_flush	= vc4_hvs_atomic_flush,
488	.atomic_enable	= vc4_txp_atomic_enable,
489	.atomic_disable	= vc4_txp_atomic_disable,
490};
491
492static irqreturn_t vc4_txp_interrupt(int irq, void *data)
493{
494	struct vc4_txp *txp = data;
495	struct vc4_crtc *vc4_crtc = &txp->base;
496
497	/*
498	 * We don't need to protect the register access using
499	 * drm_dev_enter() there because the interrupt handler lifetime
500	 * is tied to the device itself, and not to the DRM device.
501	 *
502	 * So when the device will be gone, one of the first thing we
503	 * will be doing will be to unregister the interrupt handler,
504	 * and then unregister the DRM device. drm_dev_enter() would
505	 * thus always succeed if we are here.
506	 */
507	TXP_WRITE(TXP_DST_CTRL, TXP_READ(TXP_DST_CTRL) & ~TXP_EI);
508	vc4_crtc_handle_vblank(vc4_crtc);
509	drm_writeback_signal_completion(&txp->connector, 0);
510
511	return IRQ_HANDLED;
512}
513
514static const struct vc4_txp_data bcm2712_mop_data = {
515	.base = {
516		.name = "mop",
517		.debugfs_name = "mop_regs",
518		.hvs_available_channels = BIT(2),
519		.hvs_output = 2,
520	},
521	.encoder_type = VC4_ENCODER_TYPE_TXP0,
522	.high_addr_ptr_reg = TXP_DST_PTR_HIGH_MOP,
523	.has_byte_enable = true,
524	.size_minus_one = true,
525	.supports_40bit_addresses = true,
526};
527
528static const struct vc4_txp_data bcm2712_moplet_data = {
529	.base = {
530		.name = "moplet",
531		.debugfs_name = "moplet_regs",
532		.hvs_available_channels = BIT(1),
533		.hvs_output = 4,
534	},
535	.encoder_type = VC4_ENCODER_TYPE_TXP1,
536	.high_addr_ptr_reg = TXP_DST_PTR_HIGH_MOPLET,
537	.size_minus_one = true,
538	.supports_40bit_addresses = true,
539};
540
541const struct vc4_txp_data bcm2835_txp_data = {
542	.base = {
543		.name = "txp",
544		.debugfs_name = "txp_regs",
545		.hvs_available_channels = BIT(2),
546		.hvs_output = 2,
547	},
548	.encoder_type = VC4_ENCODER_TYPE_TXP0,
549	.has_byte_enable = true,
550};
551
552static int vc4_txp_bind(struct device *dev, struct device *master, void *data)
553{
554	struct platform_device *pdev = to_platform_device(dev);
555	struct drm_device *drm = dev_get_drvdata(master);
556	const struct vc4_txp_data *txp_data;
557	struct vc4_encoder *vc4_encoder;
558	struct drm_encoder *encoder;
559	struct vc4_crtc *vc4_crtc;
560	struct vc4_txp *txp;
561	int ret, irq;
562
563	irq = platform_get_irq(pdev, 0);
564	if (irq < 0)
565		return irq;
566
567	txp = drmm_kzalloc(drm, sizeof(*txp), GFP_KERNEL);
568	if (!txp)
569		return -ENOMEM;
570
571	txp_data = of_device_get_match_data(dev);
572	if (!txp_data)
573		return -ENODEV;
574
575	txp->data = txp_data;
576	txp->pdev = pdev;
577	txp->regs = vc4_ioremap_regs(pdev, 0);
578	if (IS_ERR(txp->regs))
579		return PTR_ERR(txp->regs);
580
581	vc4_crtc = &txp->base;
582	vc4_crtc->regset.base = txp->regs;
583	vc4_crtc->regset.regs = txp_regs;
584	vc4_crtc->regset.nregs = ARRAY_SIZE(txp_regs);
585
586	ret = vc4_crtc_init(drm, pdev, vc4_crtc, &txp_data->base,
587			    &vc4_txp_crtc_funcs, &vc4_txp_crtc_helper_funcs, true);
588	if (ret)
589		return ret;
590
591	vc4_encoder = &txp->encoder;
592	txp->encoder.type = txp_data->encoder_type;
593
594	encoder = &vc4_encoder->base;
595	encoder->possible_crtcs = drm_crtc_mask(&vc4_crtc->base);
596
597	drm_encoder_helper_add(encoder, &vc4_txp_encoder_helper_funcs);
598
599	ret = drmm_encoder_init(drm, encoder, NULL, DRM_MODE_ENCODER_VIRTUAL, NULL);
600	if (ret)
601		return ret;
602
603	drm_connector_helper_add(&txp->connector.base,
604				 &vc4_txp_connector_helper_funcs);
605	ret = drm_writeback_connector_init_with_encoder(drm, &txp->connector,
606							encoder,
607							&vc4_txp_connector_funcs,
608							drm_fmts, ARRAY_SIZE(drm_fmts));
609	if (ret)
610		return ret;
611
612	ret = devm_request_irq(dev, irq, vc4_txp_interrupt, 0,
613			       dev_name(dev), txp);
614	if (ret)
615		return ret;
616
617	dev_set_drvdata(dev, txp);
618
619	return 0;
620}
621
622static void vc4_txp_unbind(struct device *dev, struct device *master,
623			   void *data)
624{
625	struct vc4_txp *txp = dev_get_drvdata(dev);
626
627	drm_connector_cleanup(&txp->connector.base);
628}
629
630static const struct component_ops vc4_txp_ops = {
631	.bind   = vc4_txp_bind,
632	.unbind = vc4_txp_unbind,
633};
634
635static int vc4_txp_probe(struct platform_device *pdev)
636{
637	return component_add(&pdev->dev, &vc4_txp_ops);
638}
639
640static void vc4_txp_remove(struct platform_device *pdev)
641{
642	component_del(&pdev->dev, &vc4_txp_ops);
643}
644
645static const struct of_device_id vc4_txp_dt_match[] = {
646	{ .compatible = "brcm,bcm2712-mop", .data = &bcm2712_mop_data },
647	{ .compatible = "brcm,bcm2712-moplet", .data = &bcm2712_moplet_data },
648	{ .compatible = "brcm,bcm2835-txp", .data = &bcm2835_txp_data },
649	{ /* sentinel */ },
650};
651
652struct platform_driver vc4_txp_driver = {
653	.probe = vc4_txp_probe,
654	.remove = vc4_txp_remove,
655	.driver = {
656		.name = "vc4_txp",
657		.of_match_table = vc4_txp_dt_match,
658	},
659};