vc4_hdmi.h

  1#ifndef _VC4_HDMI_H_
  2#define _VC4_HDMI_H_
  3
  4#include <drm/drm_connector.h>
  5#include <media/cec.h>
  6#include <sound/dmaengine_pcm.h>
  7#include <sound/hdmi-codec.h>
  8#include <sound/soc.h>
  9
 10#include "vc4_drv.h"
 11
 12struct vc4_hdmi;
 13struct vc4_hdmi_register;
 14
 15enum vc4_hdmi_phy_channel {
 16	PHY_LANE_0 = 0,
 17	PHY_LANE_1,
 18	PHY_LANE_2,
 19	PHY_LANE_CK,
 20};
 21
 22struct vc4_hdmi_variant {
 23	/* Encoder Type for that controller */
 24	enum vc4_encoder_type encoder_type;
 25
 26	/* ALSA card name */
 27	const char *card_name;
 28
 29	/* Filename to expose the registers in debugfs */
 30	const char *debugfs_name;
 31
 32	/* Maximum pixel clock supported by the controller (in Hz) */
 33	unsigned long long max_pixel_clock;
 34
 35	/* List of the registers available on that variant */
 36	const struct vc4_hdmi_register *registers;
 37
 38	/* Number of registers on that variant */
 39	unsigned int num_registers;
 40
 41	/* BCM2711 Only.
 42	 * The variants don't map the lane in the same order in the
 43	 * PHY, so this is an array mapping the HDMI channel (index)
 44	 * to the PHY lane (value).
 45	 */
 46	enum vc4_hdmi_phy_channel phy_lane_mapping[4];
 47
 48	/* The BCM2711 cannot deal with odd horizontal pixel timings */
 49	bool unsupported_odd_h_timings;
 50
 51	/*
 52	 * The BCM2711 CEC/hotplug IRQ controller is shared between the
 53	 * two HDMI controllers, and we have a proper irqchip driver for
 54	 * it.
 55	 */
 56	bool external_irq_controller;
 57
 58	/* Callback to get the resources (memory region, interrupts,
 59	 * clocks, etc) for that variant.
 60	 */
 61	int (*init_resources)(struct drm_device *drm,
 62			      struct vc4_hdmi *vc4_hdmi);
 63
 64	/* Callback to reset the HDMI block */
 65	void (*reset)(struct vc4_hdmi *vc4_hdmi);
 66
 67	/* Callback to enable / disable the CSC */
 68	void (*csc_setup)(struct vc4_hdmi *vc4_hdmi,
 69			  struct drm_connector_state *state,
 70			  const struct drm_display_mode *mode);
 71
 72	/* Callback to configure the video timings in the HDMI block */
 73	void (*set_timings)(struct vc4_hdmi *vc4_hdmi,
 74			    struct drm_connector_state *state,
 75			    const struct drm_display_mode *mode);
 76
 77	/* Callback to initialize the PHY according to the connector state */
 78	void (*phy_init)(struct vc4_hdmi *vc4_hdmi,
 79			 struct drm_connector_state *conn_state);
 80
 81	/* Callback to disable the PHY */
 82	void (*phy_disable)(struct vc4_hdmi *vc4_hdmi);
 83
 84	/* Callback to enable the RNG in the PHY */
 85	void (*phy_rng_enable)(struct vc4_hdmi *vc4_hdmi);
 86
 87	/* Callback to disable the RNG in the PHY */
 88	void (*phy_rng_disable)(struct vc4_hdmi *vc4_hdmi);
 89
 90	/* Callback to get channel map */
 91	u32 (*channel_map)(struct vc4_hdmi *vc4_hdmi, u32 channel_mask);
 92
 93	/* Enables HDR metadata */
 94	bool supports_hdr;
 95
 96	/* Callback for hardware specific hotplug detect */
 97	bool (*hp_detect)(struct vc4_hdmi *vc4_hdmi);
 98};
 99
100/* HDMI audio information */
101struct vc4_hdmi_audio {
102	struct snd_soc_card card;
103	struct snd_soc_dai_link link;
104	struct snd_soc_dai_link_component cpu;
105	struct snd_soc_dai_link_component codec;
106	struct snd_soc_dai_link_component platform;
107	struct snd_dmaengine_dai_dma_data dma_data;
108	bool streaming;
109};
110
111/* General HDMI hardware state. */
112struct vc4_hdmi {
113	struct vc4_hdmi_audio audio;
114
115	struct platform_device *pdev;
116	const struct vc4_hdmi_variant *variant;
117
118	struct vc4_encoder encoder;
119	struct drm_connector connector;
120
121	struct delayed_work scrambling_work;
122
123	struct i2c_adapter *ddc;
124	void __iomem *hdmicore_regs;
125	void __iomem *hd_regs;
126
127	/* VC5 Only */
128	void __iomem *cec_regs;
129	/* VC5 Only */
130	void __iomem *csc_regs;
131	/* VC5 Only */
132	void __iomem *dvp_regs;
133	/* VC5 Only */
134	void __iomem *phy_regs;
135	/* VC5 Only */
136	void __iomem *ram_regs;
137	/* VC5 Only */
138	void __iomem *rm_regs;
139
140	struct gpio_desc *hpd_gpio;
141
142	/*
143	 * On some systems (like the RPi4), some modes are in the same
144	 * frequency range than the WiFi channels (1440p@60Hz for
145	 * example). Should we take evasive actions because that system
146	 * has a wifi adapter?
147	 */
148	bool disable_wifi_frequencies;
149
150	struct cec_msg cec_rx_msg;
151	bool cec_tx_ok;
152	bool cec_irq_was_rx;
153
154	struct clk *cec_clock;
155	struct clk *pixel_clock;
156	struct clk *hsm_clock;
157	struct clk *audio_clock;
158	struct clk *pixel_bvb_clock;
159
160	struct reset_control *reset;
161
162	struct debugfs_regset32 hdmi_regset;
163	struct debugfs_regset32 hd_regset;
164
165	/* VC5 only */
166	struct debugfs_regset32 cec_regset;
167	struct debugfs_regset32 csc_regset;
168	struct debugfs_regset32 dvp_regset;
169	struct debugfs_regset32 phy_regset;
170	struct debugfs_regset32 ram_regset;
171	struct debugfs_regset32 rm_regset;
172
173	/**
174	 * @hw_lock: Spinlock protecting device register access.
175	 */
176	spinlock_t hw_lock;
177
178	/**
179	 * @mutex: Mutex protecting the driver access across multiple
180	 * frameworks (KMS, ALSA, CEC).
181	 */
182	struct mutex mutex;
183
184	/**
185	 * @saved_adjusted_mode: Copy of @drm_crtc_state.adjusted_mode
186	 * for use by ALSA hooks and interrupt handlers. Protected by @mutex.
187	 */
188	struct drm_display_mode saved_adjusted_mode;
189
190	/**
191	 * @packet_ram_enabled: Is the HDMI controller packet RAM currently
192	 * on? Protected by @mutex.
193	 */
194	bool packet_ram_enabled;
195
196	/**
197	 * @scdc_enabled: Is the HDMI controller currently running with
198	 * the scrambler on? Protected by @mutex.
199	 */
200	bool scdc_enabled;
201
202	/**
203	 * @output_bpc: Copy of @drm_connector_state.hdmi.output_bpc for
204	 * use outside of KMS hooks. Protected by @mutex.
205	 */
206	unsigned int output_bpc;
207
208	/**
209	 * @output_format: Copy of
210	 * @drm_connector_state.hdmi.output_format for use outside of
211	 * KMS hooks. Protected by @mutex.
212	 */
213	enum hdmi_colorspace output_format;
214
215	/**
216	 * @hdmi_jack: Represents the connection state of the HDMI plug, for
217	 * ALSA jack detection.
218	 */
219	struct snd_soc_jack hdmi_jack;
220};
221
222#define connector_to_vc4_hdmi(_connector)				\
223	container_of_const(_connector, struct vc4_hdmi, connector)
224
225static inline struct vc4_hdmi *
226encoder_to_vc4_hdmi(struct drm_encoder *encoder)
227{
228	struct vc4_encoder *_encoder = to_vc4_encoder(encoder);
229	return container_of_const(_encoder, struct vc4_hdmi, encoder);
230}
231
232void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
233		       struct drm_connector_state *conn_state);
234void vc4_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi);
235void vc4_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi);
236void vc4_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi);
237
238void vc5_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
239		       struct drm_connector_state *conn_state);
240void vc5_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi);
241void vc5_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi);
242void vc5_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi);
243
244void vc6_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
245		       struct drm_connector_state *conn_state);
246void vc6_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi);
247
248#endif /* _VC4_HDMI_H_ */