ili9486.c

  1// SPDX-License-Identifier: GPL-2.0+
  2/*
  3 * DRM driver for Ilitek ILI9486 panels
  4 *
  5 * Copyright 2020 Kamlesh Gurudasani <kamlesh.gurudasani@gmail.com>
  6 */
  7
  8#include <linux/backlight.h>
  9#include <linux/delay.h>
 10#include <linux/gpio/consumer.h>
 11#include <linux/module.h>
 12#include <linux/property.h>
 13#include <linux/spi/spi.h>
 14
 15#include <video/mipi_display.h>
 16
 17#include <drm/clients/drm_client_setup.h>
 18#include <drm/drm_atomic_helper.h>
 19#include <drm/drm_drv.h>
 20#include <drm/drm_fbdev_dma.h>
 21#include <drm/drm_gem_atomic_helper.h>
 22#include <drm/drm_gem_dma_helper.h>
 23#include <drm/drm_managed.h>
 24#include <drm/drm_mipi_dbi.h>
 25#include <drm/drm_modeset_helper.h>
 26#include <drm/drm_print.h>
 27
 28#define ILI9486_ITFCTR1         0xb0
 29#define ILI9486_PWCTRL1         0xc2
 30#define ILI9486_VMCTRL1         0xc5
 31#define ILI9486_PGAMCTRL        0xe0
 32#define ILI9486_NGAMCTRL        0xe1
 33#define ILI9486_DGAMCTRL        0xe2
 34#define ILI9486_MADCTL_BGR      BIT(3)
 35#define ILI9486_MADCTL_MV       BIT(5)
 36#define ILI9486_MADCTL_MX       BIT(6)
 37#define ILI9486_MADCTL_MY       BIT(7)
 38
 39/*
 40 * The PiScreen/waveshare rpi-lcd-35 has a SPI to 16-bit parallel bus converter
 41 * in front of the  display controller. This means that 8-bit values have to be
 42 * transferred as 16-bit.
 43 */
 44static int waveshare_command(struct mipi_dbi *mipi, u8 *cmd, u8 *par,
 45			     size_t num)
 46{
 47	struct spi_device *spi = mipi->spi;
 48	unsigned int bpw = 8;
 49	void *data = par;
 50	u32 speed_hz;
 51	int i, ret;
 52	__be16 *buf;
 53
 54	buf = kmalloc(32 * sizeof(u16), GFP_KERNEL);
 55	if (!buf)
 56		return -ENOMEM;
 57
 58	/*
 59	 * The displays are Raspberry Pi HATs and connected to the 8-bit only
 60	 * SPI controller, so 16-bit command and parameters need byte swapping
 61	 * before being transferred as 8-bit on the big endian SPI bus.
 62	 */
 63	buf[0] = cpu_to_be16(*cmd);
 64	spi_bus_lock(spi->controller);
 65	gpiod_set_value_cansleep(mipi->dc, 0);
 66	speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 2);
 67	ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, buf, 2);
 68	spi_bus_unlock(spi->controller);
 69	if (ret || !num)
 70		goto free;
 71
 72	/* 8-bit configuration data, not 16-bit pixel data */
 73	if (num <= 32) {
 74		for (i = 0; i < num; i++)
 75			buf[i] = cpu_to_be16(par[i]);
 76		num *= 2;
 77		data = buf;
 78	}
 79
 80	/*
 81	 * Check whether pixel data bytes needs to be swapped or not
 82	 */
 83	if (*cmd == MIPI_DCS_WRITE_MEMORY_START && !mipi->swap_bytes)
 84		bpw = 16;
 85
 86	spi_bus_lock(spi->controller);
 87	gpiod_set_value_cansleep(mipi->dc, 1);
 88	speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num);
 89	ret = mipi_dbi_spi_transfer(spi, speed_hz, bpw, data, num);
 90	spi_bus_unlock(spi->controller);
 91 free:
 92	kfree(buf);
 93
 94	return ret;
 95}
 96
 97static void waveshare_enable(struct drm_simple_display_pipe *pipe,
 98			     struct drm_crtc_state *crtc_state,
 99			     struct drm_plane_state *plane_state)
100{
101	struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
102	struct mipi_dbi *dbi = &dbidev->dbi;
103	u8 addr_mode;
104	int ret, idx;
105
106	if (!drm_dev_enter(pipe->crtc.dev, &idx))
107		return;
108
109	DRM_DEBUG_KMS("\n");
110
111	ret = mipi_dbi_poweron_conditional_reset(dbidev);
112	if (ret < 0)
113		goto out_exit;
114	if (ret == 1)
115		goto out_enable;
116
117	mipi_dbi_command(dbi, ILI9486_ITFCTR1);
118	mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
119	msleep(250);
120
121	mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, 0x55);
122
123	mipi_dbi_command(dbi, ILI9486_PWCTRL1, 0x44);
124
125	mipi_dbi_command(dbi, ILI9486_VMCTRL1, 0x00, 0x00, 0x00, 0x00);
126
127	mipi_dbi_command(dbi, ILI9486_PGAMCTRL,
128			 0x0F, 0x1F, 0x1C, 0x0C, 0x0F, 0x08, 0x48, 0x98,
129			 0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x0);
130	mipi_dbi_command(dbi, ILI9486_NGAMCTRL,
131			 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
132			 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00);
133	mipi_dbi_command(dbi, ILI9486_DGAMCTRL,
134			 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
135			 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00);
136
137	mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
138	msleep(100);
139
140 out_enable:
141	switch (dbidev->rotation) {
142	case 90:
143		addr_mode = ILI9486_MADCTL_MY;
144		break;
145	case 180:
146		addr_mode = ILI9486_MADCTL_MV;
147		break;
148	case 270:
149		addr_mode = ILI9486_MADCTL_MX;
150		break;
151	default:
152		addr_mode = ILI9486_MADCTL_MV | ILI9486_MADCTL_MY |
153			ILI9486_MADCTL_MX;
154		break;
155	}
156	addr_mode |= ILI9486_MADCTL_BGR;
157	mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
158	mipi_dbi_enable_flush(dbidev, crtc_state, plane_state);
159 out_exit:
160	drm_dev_exit(idx);
161}
162
163static const struct drm_simple_display_pipe_funcs waveshare_pipe_funcs = {
164	DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCS(waveshare_enable),
165};
166
167static const struct drm_display_mode waveshare_mode = {
168	DRM_SIMPLE_MODE(480, 320, 73, 49),
169};
170
171DEFINE_DRM_GEM_DMA_FOPS(ili9486_fops);
172
173static const struct drm_driver ili9486_driver = {
174	.driver_features	= DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
175	.fops			= &ili9486_fops,
176	DRM_GEM_DMA_DRIVER_OPS_VMAP,
177	DRM_FBDEV_DMA_DRIVER_OPS,
178	.debugfs_init		= mipi_dbi_debugfs_init,
179	.name			= "ili9486",
180	.desc			= "Ilitek ILI9486",
181	.major			= 1,
182	.minor			= 0,
183};
184
185static const struct of_device_id ili9486_of_match[] = {
186	{ .compatible = "waveshare,rpi-lcd-35" },
187	{ .compatible = "ozzmaker,piscreen" },
188	{},
189};
190MODULE_DEVICE_TABLE(of, ili9486_of_match);
191
192static const struct spi_device_id ili9486_id[] = {
193	{ "ili9486", 0 },
194	{ "rpi-lcd-35", 0 },
195	{ "piscreen", 0 },
196	{ }
197};
198MODULE_DEVICE_TABLE(spi, ili9486_id);
199
200static int ili9486_probe(struct spi_device *spi)
201{
202	struct device *dev = &spi->dev;
203	struct mipi_dbi_dev *dbidev;
204	struct drm_device *drm;
205	struct mipi_dbi *dbi;
206	struct gpio_desc *dc;
207	u32 rotation = 0;
208	int ret;
209
210	dbidev = devm_drm_dev_alloc(dev, &ili9486_driver,
211				    struct mipi_dbi_dev, drm);
212	if (IS_ERR(dbidev))
213		return PTR_ERR(dbidev);
214
215	dbi = &dbidev->dbi;
216	drm = &dbidev->drm;
217
218	dbi->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
219	if (IS_ERR(dbi->reset))
220		return dev_err_probe(dev, PTR_ERR(dbi->reset), "Failed to get GPIO 'reset'\n");
221
222	dc = devm_gpiod_get(dev, "dc", GPIOD_OUT_LOW);
223	if (IS_ERR(dc))
224		return dev_err_probe(dev, PTR_ERR(dc), "Failed to get GPIO 'dc'\n");
225
226	dbidev->backlight = devm_of_find_backlight(dev);
227	if (IS_ERR(dbidev->backlight))
228		return PTR_ERR(dbidev->backlight);
229
230	device_property_read_u32(dev, "rotation", &rotation);
231
232	ret = mipi_dbi_spi_init(spi, dbi, dc);
233	if (ret)
234		return ret;
235
236	dbi->command = waveshare_command;
237	dbi->read_commands = NULL;
238
239	ret = mipi_dbi_dev_init(dbidev, &waveshare_pipe_funcs,
240				&waveshare_mode, rotation);
241	if (ret)
242		return ret;
243
244	drm_mode_config_reset(drm);
245
246	ret = drm_dev_register(drm, 0);
247	if (ret)
248		return ret;
249
250	spi_set_drvdata(spi, drm);
251
252	drm_client_setup(drm, NULL);
253
254	return 0;
255}
256
257static void ili9486_remove(struct spi_device *spi)
258{
259	struct drm_device *drm = spi_get_drvdata(spi);
260
261	drm_dev_unplug(drm);
262	drm_atomic_helper_shutdown(drm);
263}
264
265static void ili9486_shutdown(struct spi_device *spi)
266{
267	drm_atomic_helper_shutdown(spi_get_drvdata(spi));
268}
269
270static struct spi_driver ili9486_spi_driver = {
271	.driver = {
272		.name = "ili9486",
273		.of_match_table = ili9486_of_match,
274	},
275	.id_table = ili9486_id,
276	.probe = ili9486_probe,
277	.remove = ili9486_remove,
278	.shutdown = ili9486_shutdown,
279};
280module_spi_driver(ili9486_spi_driver);
281
282MODULE_DESCRIPTION("Ilitek ILI9486 DRM driver");
283MODULE_AUTHOR("Kamlesh Gurudasani <kamlesh.gurudasani@gmail.com>");
284MODULE_LICENSE("GPL");