tidss_kms.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
  4 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
  5 */
  6
  7#include <drm/drm_atomic.h>
  8#include <drm/drm_atomic_helper.h>
  9#include <drm/drm_bridge.h>
 10#include <drm/drm_gem_framebuffer_helper.h>
 11#include <drm/drm_of.h>
 12#include <drm/drm_panel.h>
 13#include <drm/drm_vblank.h>
 14
 15#include "tidss_crtc.h"
 16#include "tidss_dispc.h"
 17#include "tidss_drv.h"
 18#include "tidss_encoder.h"
 19#include "tidss_kms.h"
 20#include "tidss_plane.h"
 21
 22static void tidss_atomic_commit_tail(struct drm_atomic_state *old_state)
 23{
 24	struct drm_device *ddev = old_state->dev;
 25	struct tidss_device *tidss = to_tidss(ddev);
 26
 27	tidss_runtime_get(tidss);
 28
 29	/*
 30	 * TI's OLDI and DSI encoders need to be set up before the crtc is
 31	 * enabled. Thus drm_atomic_helper_commit_modeset_enables() and
 32	 * drm_atomic_helper_commit_modeset_disables() cannot be used here, as
 33	 * they enable the crtc before bridges' pre-enable, and disable the crtc
 34	 * after bridges' post-disable.
 35	 *
 36	 * Open code the functions here and first call the bridges' pre-enables,
 37	 * then crtc enable, then bridges' post-enable (and vice versa for
 38	 * disable).
 39	 */
 40
 41	drm_atomic_helper_commit_encoder_bridge_disable(ddev, old_state);
 42	drm_atomic_helper_commit_crtc_disable(ddev, old_state);
 43	drm_atomic_helper_commit_encoder_bridge_post_disable(ddev, old_state);
 44
 45	drm_atomic_helper_update_legacy_modeset_state(ddev, old_state);
 46	drm_atomic_helper_calc_timestamping_constants(old_state);
 47	drm_atomic_helper_commit_crtc_set_mode(ddev, old_state);
 48
 49	drm_atomic_helper_commit_planes(ddev, old_state,
 50					DRM_PLANE_COMMIT_ACTIVE_ONLY);
 51
 52	drm_atomic_helper_commit_encoder_bridge_pre_enable(ddev, old_state);
 53	drm_atomic_helper_commit_crtc_enable(ddev, old_state);
 54	drm_atomic_helper_commit_encoder_bridge_enable(ddev, old_state);
 55	drm_atomic_helper_commit_writebacks(ddev, old_state);
 56
 57	drm_atomic_helper_commit_hw_done(old_state);
 58	drm_atomic_helper_wait_for_flip_done(ddev, old_state);
 59
 60	drm_atomic_helper_cleanup_planes(ddev, old_state);
 61
 62	tidss_runtime_put(tidss);
 63}
 64
 65static const struct drm_mode_config_helper_funcs mode_config_helper_funcs = {
 66	.atomic_commit_tail = tidss_atomic_commit_tail,
 67};
 68
 69static int tidss_atomic_check(struct drm_device *ddev,
 70			      struct drm_atomic_state *state)
 71{
 72	struct drm_plane_state *opstate;
 73	struct drm_plane_state *npstate;
 74	struct drm_plane *plane;
 75	struct drm_crtc_state *cstate;
 76	struct drm_crtc *crtc;
 77	int ret, i;
 78
 79	ret = drm_atomic_helper_check(ddev, state);
 80	if (ret)
 81		return ret;
 82
 83	/*
 84	 * Add all active planes on a CRTC to the atomic state, if
 85	 * x/y/z position or activity of any plane on that CRTC
 86	 * changes. This is needed for updating the plane positions in
 87	 * tidss_crtc_position_planes() which is called from
 88	 * crtc_atomic_enable() and crtc_atomic_flush(). We have an
 89	 * extra flag to mark x,y-position changes and together
 90	 * with zpos_changed the condition recognizes all the above
 91	 * cases.
 92	 */
 93	for_each_oldnew_plane_in_state(state, plane, opstate, npstate, i) {
 94		if (!npstate->crtc || !npstate->visible)
 95			continue;
 96
 97		if (!opstate->crtc || opstate->crtc_x != npstate->crtc_x ||
 98		    opstate->crtc_y != npstate->crtc_y) {
 99			cstate = drm_atomic_get_crtc_state(state,
100							   npstate->crtc);
101			if (IS_ERR(cstate))
102				return PTR_ERR(cstate);
103			to_tidss_crtc_state(cstate)->plane_pos_changed = true;
104		}
105	}
106
107	for_each_new_crtc_in_state(state, crtc, cstate, i) {
108		if (to_tidss_crtc_state(cstate)->plane_pos_changed ||
109		    cstate->zpos_changed) {
110			ret = drm_atomic_add_affected_planes(state, crtc);
111			if (ret)
112				return ret;
113		}
114	}
115
116	return 0;
117}
118
119static const struct drm_mode_config_funcs mode_config_funcs = {
120	.fb_create = drm_gem_fb_create,
121	.atomic_check = tidss_atomic_check,
122	.atomic_commit = drm_atomic_helper_commit,
123};
124
125static int tidss_dispc_modeset_init(struct tidss_device *tidss)
126{
127	struct device *dev = tidss->dev;
128	unsigned int fourccs_len;
129	const u32 *fourccs = dispc_plane_formats(tidss->dispc, &fourccs_len);
130	unsigned int i;
131
132	struct pipe {
133		u32 hw_videoport;
134		struct drm_bridge *bridge;
135		u32 enc_type;
136	};
137
138	const struct dispc_features *feat = tidss->feat;
139	u32 max_vps = feat->num_vps;
140	u32 max_planes = feat->num_vids;
141
142	struct pipe pipes[TIDSS_MAX_PORTS];
143	u32 num_pipes = 0;
144	u32 crtc_mask;
145
146	/* first find all the connected panels & bridges */
147
148	for (i = 0; i < max_vps; i++) {
149		struct drm_panel *panel;
150		struct drm_bridge *bridge;
151		u32 enc_type = DRM_MODE_ENCODER_NONE;
152		int ret;
153
154		ret = drm_of_find_panel_or_bridge(dev->of_node, i, 0,
155						  &panel, &bridge);
156		if (ret == -ENODEV) {
157			dev_dbg(dev, "no panel/bridge for port %d\n", i);
158			continue;
159		} else if (ret) {
160			return dev_err_probe(dev, ret, "port %d probe failed\n", i);
161		}
162
163		if (panel) {
164			u32 conn_type;
165
166			dev_dbg(dev, "Setting up panel for port %d\n", i);
167
168			switch (feat->vp_bus_type[i]) {
169			case DISPC_VP_OLDI_AM65X:
170				enc_type = DRM_MODE_ENCODER_LVDS;
171				conn_type = DRM_MODE_CONNECTOR_LVDS;
172				break;
173			case DISPC_VP_DPI:
174				enc_type = DRM_MODE_ENCODER_DPI;
175				conn_type = DRM_MODE_CONNECTOR_DPI;
176				break;
177			default:
178				WARN_ON(1);
179				return -EINVAL;
180			}
181
182			if (panel->connector_type != conn_type) {
183				dev_err(dev,
184					"%s: Panel %s has incompatible connector type for vp%d (%d != %d)\n",
185					 __func__, dev_name(panel->dev), i,
186					 panel->connector_type, conn_type);
187				return -EINVAL;
188			}
189
190			bridge = devm_drm_panel_bridge_add(dev, panel);
191			if (IS_ERR(bridge)) {
192				dev_err(dev,
193					"failed to set up panel bridge for port %d\n",
194					i);
195				return PTR_ERR(bridge);
196			}
197		}
198
199		pipes[num_pipes].hw_videoport = i;
200		pipes[num_pipes].bridge = bridge;
201		pipes[num_pipes].enc_type = enc_type;
202		num_pipes++;
203	}
204
205	/* all planes can be on any crtc */
206	crtc_mask = (1 << num_pipes) - 1;
207
208	/* then create a plane, a crtc and an encoder for each panel/bridge */
209
210	for (i = 0; i < num_pipes; ++i) {
211		struct tidss_plane *tplane;
212		struct tidss_crtc *tcrtc;
213		u32 hw_plane_id = feat->vid_order[tidss->num_planes];
214		int ret;
215
216		tplane = tidss_plane_create(tidss, hw_plane_id,
217					    DRM_PLANE_TYPE_PRIMARY, crtc_mask,
218					    fourccs, fourccs_len);
219		if (IS_ERR(tplane)) {
220			dev_err(tidss->dev, "plane create failed\n");
221			return PTR_ERR(tplane);
222		}
223
224		tidss->planes[tidss->num_planes++] = &tplane->plane;
225
226		tcrtc = tidss_crtc_create(tidss, pipes[i].hw_videoport,
227					  &tplane->plane);
228		if (IS_ERR(tcrtc)) {
229			dev_err(tidss->dev, "crtc create failed\n");
230			return PTR_ERR(tcrtc);
231		}
232
233		tidss->crtcs[tidss->num_crtcs++] = &tcrtc->crtc;
234
235		ret = tidss_encoder_create(tidss, pipes[i].bridge,
236					   pipes[i].enc_type,
237					   1 << tcrtc->crtc.index);
238		if (ret) {
239			dev_err(tidss->dev, "encoder create failed\n");
240			return ret;
241		}
242	}
243
244	/* create overlay planes of the leftover planes */
245
246	while (tidss->num_planes < max_planes) {
247		struct tidss_plane *tplane;
248		u32 hw_plane_id = feat->vid_order[tidss->num_planes];
249
250		tplane = tidss_plane_create(tidss, hw_plane_id,
251					    DRM_PLANE_TYPE_OVERLAY, crtc_mask,
252					    fourccs, fourccs_len);
253
254		if (IS_ERR(tplane)) {
255			dev_err(tidss->dev, "plane create failed\n");
256			return PTR_ERR(tplane);
257		}
258
259		tidss->planes[tidss->num_planes++] = &tplane->plane;
260	}
261
262	return 0;
263}
264
265int tidss_modeset_init(struct tidss_device *tidss)
266{
267	struct drm_device *ddev = &tidss->ddev;
268	int ret;
269
270	ret = drmm_mode_config_init(ddev);
271	if (ret)
272		return ret;
273
274	ddev->mode_config.min_width = 8;
275	ddev->mode_config.min_height = 8;
276	ddev->mode_config.max_width = 8096;
277	ddev->mode_config.max_height = 8096;
278	ddev->mode_config.normalize_zpos = true;
279	ddev->mode_config.funcs = &mode_config_funcs;
280	ddev->mode_config.helper_private = &mode_config_helper_funcs;
281
282	ret = tidss_dispc_modeset_init(tidss);
283	if (ret)
284		return ret;
285
286	ret = drm_vblank_init(ddev, tidss->num_crtcs);
287	if (ret)
288		return ret;
289
290	drm_mode_config_reset(ddev);
291
292	dev_dbg(tidss->dev, "%s done\n", __func__);
293
294	return 0;
295}