sun8i_ui_layer.c

  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * Copyright (C) Icenowy Zheng <icenowy@aosc.io>
  4 *
  5 * Based on sun4i_layer.h, which is:
  6 *   Copyright (C) 2015 Free Electrons
  7 *   Copyright (C) 2015 NextThing Co
  8 *
  9 *   Maxime Ripard <maxime.ripard@free-electrons.com>
 10 */
 11
 12#include <drm/drm_atomic.h>
 13#include <drm/drm_atomic_helper.h>
 14#include <drm/drm_blend.h>
 15#include <drm/drm_crtc.h>
 16#include <drm/drm_fb_dma_helper.h>
 17#include <drm/drm_fourcc.h>
 18#include <drm/drm_framebuffer.h>
 19#include <drm/drm_gem_atomic_helper.h>
 20#include <drm/drm_gem_dma_helper.h>
 21#include <drm/drm_print.h>
 22#include <drm/drm_probe_helper.h>
 23
 24#include "sun8i_mixer.h"
 25#include "sun8i_ui_layer.h"
 26#include "sun8i_ui_scaler.h"
 27#include "sun8i_vi_scaler.h"
 28
 29static void sun8i_ui_layer_disable(struct sun8i_layer *layer)
 30{
 31	u32 ch_base = sun8i_channel_base(layer);
 32
 33	regmap_write(layer->regs,
 34		     SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, layer->overlay), 0);
 35}
 36
 37static void sun8i_ui_layer_update_attributes(struct sun8i_layer *layer,
 38					     struct drm_plane *plane)
 39{
 40	struct drm_plane_state *state = plane->state;
 41	const struct drm_format_info *fmt;
 42	u32 val, ch_base, hw_fmt;
 43
 44	ch_base = sun8i_channel_base(layer);
 45	fmt = state->fb->format;
 46	sun8i_mixer_drm_format_to_hw(fmt->format, &hw_fmt);
 47
 48	val = SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA(state->alpha >> 8);
 49	val |= (state->alpha == DRM_BLEND_ALPHA_OPAQUE) ?
 50		SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_PIXEL :
 51		SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_COMBINED;
 52	val |= hw_fmt << SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_OFFSET;
 53	val |= SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN;
 54
 55	regmap_write(layer->regs,
 56		     SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, layer->overlay), val);
 57}
 58
 59static void sun8i_ui_layer_update_coord(struct sun8i_layer *layer,
 60					struct drm_plane *plane)
 61{
 62	struct drm_plane_state *state = plane->state;
 63	u32 src_w, src_h, dst_w, dst_h;
 64	u32 outsize, insize;
 65	u32 hphase, vphase;
 66	u32 ch_base;
 67
 68	DRM_DEBUG_DRIVER("Updating UI channel %d overlay %d\n",
 69			 layer->channel, layer->overlay);
 70
 71	ch_base = sun8i_channel_base(layer);
 72
 73	src_w = drm_rect_width(&state->src) >> 16;
 74	src_h = drm_rect_height(&state->src) >> 16;
 75	dst_w = drm_rect_width(&state->dst);
 76	dst_h = drm_rect_height(&state->dst);
 77
 78	hphase = state->src.x1 & 0xffff;
 79	vphase = state->src.y1 & 0xffff;
 80
 81	insize = SUN8I_MIXER_SIZE(src_w, src_h);
 82	outsize = SUN8I_MIXER_SIZE(dst_w, dst_h);
 83
 84	/* Set height and width */
 85	DRM_DEBUG_DRIVER("Layer source offset X: %d Y: %d\n",
 86			 state->src.x1 >> 16, state->src.y1 >> 16);
 87	DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h);
 88	regmap_write(layer->regs,
 89		     SUN8I_MIXER_CHAN_UI_LAYER_SIZE(ch_base, layer->overlay),
 90		     insize);
 91	regmap_write(layer->regs,
 92		     SUN8I_MIXER_CHAN_UI_OVL_SIZE(ch_base),
 93		     insize);
 94
 95	if (insize != outsize || hphase || vphase) {
 96		u32 hscale, vscale;
 97
 98		DRM_DEBUG_DRIVER("HW scaling is enabled\n");
 99
100		hscale = state->src_w / state->crtc_w;
101		vscale = state->src_h / state->crtc_h;
102
103		if (layer->cfg->de_type == SUN8I_MIXER_DE33) {
104			sun8i_vi_scaler_setup(layer, src_w, src_h, dst_w, dst_h,
105					      hscale, vscale, hphase, vphase,
106					      state->fb->format);
107			sun8i_vi_scaler_enable(layer, true);
108		} else {
109			sun8i_ui_scaler_setup(layer, src_w, src_h, dst_w, dst_h,
110					      hscale, vscale, hphase, vphase);
111			sun8i_ui_scaler_enable(layer, true);
112		}
113	} else {
114		DRM_DEBUG_DRIVER("HW scaling is not needed\n");
115		if (layer->cfg->de_type == SUN8I_MIXER_DE33)
116			sun8i_vi_scaler_enable(layer, false);
117		else
118			sun8i_ui_scaler_enable(layer, false);
119	}
120}
121
122static void sun8i_ui_layer_update_buffer(struct sun8i_layer *layer,
123					 struct drm_plane *plane)
124{
125	struct drm_plane_state *state = plane->state;
126	struct drm_framebuffer *fb = state->fb;
127	struct drm_gem_dma_object *gem;
128	dma_addr_t dma_addr;
129	u32 ch_base;
130	int bpp;
131
132	ch_base = sun8i_channel_base(layer);
133
134	/* Get the physical address of the buffer in memory */
135	gem = drm_fb_dma_get_gem_obj(fb, 0);
136
137	DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->dma_addr);
138
139	/* Compute the start of the displayed memory */
140	bpp = fb->format->cpp[0];
141	dma_addr = gem->dma_addr + fb->offsets[0];
142
143	/* Fixup framebuffer address for src coordinates */
144	dma_addr += (state->src.x1 >> 16) * bpp;
145	dma_addr += (state->src.y1 >> 16) * fb->pitches[0];
146
147	/* Set the line width */
148	DRM_DEBUG_DRIVER("Layer line width: %d bytes\n", fb->pitches[0]);
149	regmap_write(layer->regs,
150		     SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ch_base, layer->overlay),
151		     fb->pitches[0]);
152
153	DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &dma_addr);
154
155	regmap_write(layer->regs,
156		     SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ch_base, layer->overlay),
157		     lower_32_bits(dma_addr));
158}
159
160static int sun8i_ui_layer_atomic_check(struct drm_plane *plane,
161				       struct drm_atomic_state *state)
162{
163	struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
164										 plane);
165	struct sun8i_layer *layer = plane_to_sun8i_layer(plane);
166	struct drm_crtc *crtc = new_plane_state->crtc;
167	struct drm_crtc_state *crtc_state;
168	const struct drm_format_info *fmt;
169	int min_scale, max_scale, ret;
170	u32 hw_fmt;
171
172	if (!crtc)
173		return 0;
174
175	crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
176	if (WARN_ON(!crtc_state))
177		return -EINVAL;
178
179	fmt = new_plane_state->fb->format;
180	ret = sun8i_mixer_drm_format_to_hw(fmt->format, &hw_fmt);
181	if (ret || fmt->is_yuv) {
182		DRM_DEBUG_DRIVER("Invalid plane format\n");
183		return -EINVAL;
184	}
185
186	min_scale = DRM_PLANE_NO_SCALING;
187	max_scale = DRM_PLANE_NO_SCALING;
188
189	if (layer->cfg->scaler_mask & BIT(layer->channel)) {
190		min_scale = SUN8I_UI_SCALER_SCALE_MIN;
191		max_scale = SUN8I_UI_SCALER_SCALE_MAX;
192	}
193
194	return drm_atomic_helper_check_plane_state(new_plane_state,
195						   crtc_state,
196						   min_scale, max_scale,
197						   true, true);
198}
199
200
201static void sun8i_ui_layer_atomic_update(struct drm_plane *plane,
202					 struct drm_atomic_state *state)
203{
204	struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
205									   plane);
206	struct sun8i_layer *layer = plane_to_sun8i_layer(plane);
207
208	if (!new_state->crtc || !new_state->visible) {
209		sun8i_ui_layer_disable(layer);
210		return;
211	}
212
213	sun8i_ui_layer_update_attributes(layer, plane);
214	sun8i_ui_layer_update_coord(layer, plane);
215	sun8i_ui_layer_update_buffer(layer, plane);
216}
217
218static const struct drm_plane_helper_funcs sun8i_ui_layer_helper_funcs = {
219	.atomic_check	= sun8i_ui_layer_atomic_check,
220	.atomic_update	= sun8i_ui_layer_atomic_update,
221};
222
223static const struct drm_plane_funcs sun8i_ui_layer_funcs = {
224	.atomic_destroy_state	= drm_atomic_helper_plane_destroy_state,
225	.atomic_duplicate_state	= drm_atomic_helper_plane_duplicate_state,
226	.destroy		= drm_plane_cleanup,
227	.disable_plane		= drm_atomic_helper_disable_plane,
228	.reset			= drm_atomic_helper_plane_reset,
229	.update_plane		= drm_atomic_helper_update_plane,
230};
231
232static const u32 sun8i_ui_layer_formats[] = {
233	DRM_FORMAT_ABGR1555,
234	DRM_FORMAT_ABGR4444,
235	DRM_FORMAT_ABGR8888,
236	DRM_FORMAT_ARGB1555,
237	DRM_FORMAT_ARGB4444,
238	DRM_FORMAT_ARGB8888,
239	DRM_FORMAT_BGR565,
240	DRM_FORMAT_BGR888,
241	DRM_FORMAT_BGRA5551,
242	DRM_FORMAT_BGRA4444,
243	DRM_FORMAT_BGRA8888,
244	DRM_FORMAT_BGRX8888,
245	DRM_FORMAT_RGB565,
246	DRM_FORMAT_RGB888,
247	DRM_FORMAT_RGBA4444,
248	DRM_FORMAT_RGBA5551,
249	DRM_FORMAT_RGBA8888,
250	DRM_FORMAT_RGBX8888,
251	DRM_FORMAT_XBGR8888,
252	DRM_FORMAT_XRGB8888,
253};
254
255static const uint64_t sun8i_layer_modifiers[] = {
256	DRM_FORMAT_MOD_LINEAR,
257	DRM_FORMAT_MOD_INVALID
258};
259
260struct sun8i_layer *sun8i_ui_layer_init_one(struct drm_device *drm,
261					    enum drm_plane_type type,
262					    struct regmap *regs,
263					    int index, int phy_index,
264					    int plane_cnt,
265					    const struct sun8i_layer_cfg *cfg)
266{
267	struct sun8i_layer *layer;
268	int ret;
269
270	layer = devm_kzalloc(drm->dev, sizeof(*layer), GFP_KERNEL);
271	if (!layer)
272		return ERR_PTR(-ENOMEM);
273
274	layer->type = SUN8I_LAYER_TYPE_UI;
275	layer->index = index;
276	layer->channel = phy_index;
277	layer->overlay = 0;
278	layer->regs = regs;
279	layer->cfg = cfg;
280
281	/* possible crtcs are set later */
282	ret = drm_universal_plane_init(drm, &layer->plane, 0,
283				       &sun8i_ui_layer_funcs,
284				       sun8i_ui_layer_formats,
285				       ARRAY_SIZE(sun8i_ui_layer_formats),
286				       sun8i_layer_modifiers, type, NULL);
287	if (ret) {
288		dev_err(drm->dev, "Couldn't initialize layer\n");
289		return ERR_PTR(ret);
290	}
291
292	ret = drm_plane_create_alpha_property(&layer->plane);
293	if (ret) {
294		dev_err(drm->dev, "Couldn't add alpha property\n");
295		return ERR_PTR(ret);
296	}
297
298	ret = drm_plane_create_zpos_property(&layer->plane, index,
299					     0, plane_cnt - 1);
300	if (ret) {
301		dev_err(drm->dev, "Couldn't add zpos property\n");
302		return ERR_PTR(ret);
303	}
304
305	drm_plane_helper_add(&layer->plane, &sun8i_ui_layer_helper_funcs);
306
307	return layer;
308}