panel-ilitek-ili9341.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Ilitek ILI9341 TFT LCD drm_panel driver.
  4 *
  5 * This panel can be configured to support:
  6 * - 16-bit parallel RGB interface
  7 * - 18-bit parallel RGB interface
  8 * - 4-line serial spi interface
  9 *
 10 * Copyright (C) 2021 Dillon Min <dillon.minfei@gmail.com>
 11 *
 12 * For dbi+dpi part:
 13 * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c
 14 * the reuse of DBI abstraction part referred from Linus's patch
 15 * "drm/panel: s6e63m0: Switch to DBI abstraction for SPI"
 16 */
 17
 18#include <linux/backlight.h>
 19#include <linux/bitops.h>
 20#include <linux/delay.h>
 21#include <linux/gpio/consumer.h>
 22#include <linux/mod_devicetable.h>
 23#include <linux/module.h>
 24#include <linux/property.h>
 25#include <linux/regulator/consumer.h>
 26#include <linux/spi/spi.h>
 27
 28#include <video/mipi_display.h>
 29
 30#include <drm/drm_atomic_helper.h>
 31#include <drm/drm_drv.h>
 32#include <drm/drm_fbdev_dma.h>
 33#include <drm/drm_gem_atomic_helper.h>
 34#include <drm/drm_gem_dma_helper.h>
 35#include <drm/drm_gem_framebuffer_helper.h>
 36#include <drm/drm_mipi_dbi.h>
 37#include <drm/drm_modes.h>
 38#include <drm/drm_panel.h>
 39#include <drm/drm_print.h>
 40
 41#define ILI9341_RGB_INTERFACE  0xb0   /* RGB Interface Signal Control */
 42#define ILI9341_FRC            0xb1   /* Frame Rate Control register */
 43#define ILI9341_DFC            0xb6   /* Display Function Control register */
 44#define ILI9341_POWER1         0xc0   /* Power Control 1 register */
 45#define ILI9341_POWER2         0xc1   /* Power Control 2 register */
 46#define ILI9341_VCOM1          0xc5   /* VCOM Control 1 register */
 47#define ILI9341_VCOM2          0xc7   /* VCOM Control 2 register */
 48#define ILI9341_POWERA         0xcb   /* Power control A register */
 49#define ILI9341_POWERB         0xcf   /* Power control B register */
 50#define ILI9341_PGAMMA         0xe0   /* Positive Gamma Correction register */
 51#define ILI9341_NGAMMA         0xe1   /* Negative Gamma Correction register */
 52#define ILI9341_DTCA           0xe8   /* Driver timing control A */
 53#define ILI9341_DTCB           0xea   /* Driver timing control B */
 54#define ILI9341_POWER_SEQ      0xed   /* Power on sequence register */
 55#define ILI9341_3GAMMA_EN      0xf2   /* 3 Gamma enable register */
 56#define ILI9341_INTERFACE      0xf6   /* Interface control register */
 57#define ILI9341_PRC            0xf7   /* Pump ratio control register */
 58#define ILI9341_ETMOD	       0xb7   /* Entry mode set */
 59
 60#define ILI9341_MADCTL_BGR	BIT(3)
 61#define ILI9341_MADCTL_MV	BIT(5)
 62#define ILI9341_MADCTL_MX	BIT(6)
 63#define ILI9341_MADCTL_MY	BIT(7)
 64
 65#define ILI9341_POWER_B_LEN	3
 66#define ILI9341_POWER_SEQ_LEN	4
 67#define ILI9341_DTCA_LEN	3
 68#define ILI9341_DTCB_LEN	2
 69#define ILI9341_POWER_A_LEN	5
 70#define ILI9341_DFC_1_LEN	2
 71#define ILI9341_FRC_LEN		2
 72#define ILI9341_VCOM_1_LEN	2
 73#define ILI9341_DFC_2_LEN	4
 74#define ILI9341_COLUMN_ADDR_LEN	4
 75#define ILI9341_PAGE_ADDR_LEN	4
 76#define ILI9341_INTERFACE_LEN	3
 77#define ILI9341_PGAMMA_LEN	15
 78#define ILI9341_NGAMMA_LEN	15
 79#define ILI9341_CA_LEN		3
 80
 81#define ILI9341_PIXEL_DPI_16_BITS	(BIT(6) | BIT(4))
 82#define ILI9341_PIXEL_DPI_18_BITS	(BIT(6) | BIT(5))
 83#define ILI9341_GAMMA_CURVE_1		BIT(0)
 84#define ILI9341_IF_WE_MODE		BIT(0)
 85#define ILI9341_IF_BIG_ENDIAN		0x00
 86#define ILI9341_IF_DM_RGB		BIT(2)
 87#define ILI9341_IF_DM_INTERNAL		0x00
 88#define ILI9341_IF_DM_VSYNC		BIT(3)
 89#define ILI9341_IF_RM_RGB		BIT(1)
 90#define ILI9341_IF_RIM_RGB		0x00
 91
 92#define ILI9341_COLUMN_ADDR		0x00ef
 93#define ILI9341_PAGE_ADDR		0x013f
 94
 95#define ILI9341_RGB_EPL			BIT(0)
 96#define ILI9341_RGB_DPL			BIT(1)
 97#define ILI9341_RGB_HSPL		BIT(2)
 98#define ILI9341_RGB_VSPL		BIT(3)
 99#define ILI9341_RGB_DE_MODE		BIT(6)
100#define ILI9341_RGB_DISP_PATH_MEM	BIT(7)
101
102#define ILI9341_DBI_VCOMH_4P6V		0x23
103#define ILI9341_DBI_PWR_2_DEFAULT	0x10
104#define ILI9341_DBI_PRC_NORMAL		0x20
105#define ILI9341_DBI_VCOM_1_VMH_4P25V	0x3e
106#define ILI9341_DBI_VCOM_1_VML_1P5V	0x28
107#define ILI9341_DBI_VCOM_2_DEC_58	0x86
108#define ILI9341_DBI_FRC_DIVA		0x00
109#define ILI9341_DBI_FRC_RTNA		0x1b
110#define ILI9341_DBI_EMS_GAS		BIT(0)
111#define ILI9341_DBI_EMS_DTS		BIT(1)
112#define ILI9341_DBI_EMS_GON		BIT(2)
113
114/* struct ili9341_config - the system specific ILI9341 configuration */
115struct ili9341_config {
116	u32 max_spi_speed;
117	/* mode: the drm display mode */
118	const struct drm_display_mode mode;
119	/* ca: TODO: need comments for this register */
120	u8 ca[ILI9341_CA_LEN];
121	/* power_b: Power control B (CFh) */
122	u8 power_b[ILI9341_POWER_B_LEN];
123	/* power_seq: Power on sequence control (EDh) */
124	u8 power_seq[ILI9341_POWER_SEQ_LEN];
125	/* dtca: Driver timing control A (E8h) */
126	u8 dtca[ILI9341_DTCA_LEN];
127	/* dtcb: Driver timing control B (EAh) */
128	u8 dtcb[ILI9341_DTCB_LEN];
129	/* power_a: Power control A (CBh) */
130	u8 power_a[ILI9341_POWER_A_LEN];
131	/* frc: Frame Rate Control (In Normal Mode/Full Colors) (B1h) */
132	u8 frc[ILI9341_FRC_LEN];
133	/* prc: Pump ratio control (F7h) */
134	u8 prc;
135	/* dfc_1: B6h DISCTRL (Display Function Control) */
136	u8 dfc_1[ILI9341_DFC_1_LEN];
137	/* power_1: Power Control 1 (C0h) */
138	u8 power_1;
139	/* power_2: Power Control 2 (C1h) */
140	u8 power_2;
141	/* vcom_1: VCOM Control 1(C5h) */
142	u8 vcom_1[ILI9341_VCOM_1_LEN];
143	/* vcom_2: VCOM Control 2(C7h) */
144	u8 vcom_2;
145	/* address_mode: Memory Access Control (36h) */
146	u8 address_mode;
147	/* g3amma_en: Enable 3G (F2h) */
148	u8 g3amma_en;
149	/* rgb_interface: RGB Interface Signal Control (B0h) */
150	u8 rgb_interface;
151	/* dfc_2: refer to dfc_1 */
152	u8 dfc_2[ILI9341_DFC_2_LEN];
153	/* column_addr: Column Address Set (2Ah) */
154	u8 column_addr[ILI9341_COLUMN_ADDR_LEN];
155	/* page_addr: Page Address Set (2Bh) */
156	u8 page_addr[ILI9341_PAGE_ADDR_LEN];
157	/* interface: Interface Control (F6h) */
158	u8 interface[ILI9341_INTERFACE_LEN];
159	/*
160	 * pixel_format: This command sets the pixel format for the RGB
161	 * image data used by
162	 */
163	u8 pixel_format;
164	/*
165	 * gamma_curve: This command is used to select the desired Gamma
166	 * curve for the
167	 */
168	u8 gamma_curve;
169	/* pgamma: Positive Gamma Correction (E0h) */
170	u8 pgamma[ILI9341_PGAMMA_LEN];
171	/* ngamma: Negative Gamma Correction (E1h) */
172	u8 ngamma[ILI9341_NGAMMA_LEN];
173};
174
175struct ili9341 {
176	const struct ili9341_config *conf;
177	struct drm_panel panel;
178	struct gpio_desc *reset_gpio;
179	struct gpio_desc *dc_gpio;
180	struct mipi_dbi *dbi;
181	u32 max_spi_speed;
182	struct regulator_bulk_data supplies[3];
183};
184
185/*
186 * The Stm32f429-disco board has a panel ili9341 connected to ltdc controller
187 */
188static const struct ili9341_config ili9341_stm32f429_disco_data = {
189	.max_spi_speed = 10000000,
190	.mode = {
191		.clock = 6100,
192		.hdisplay = 240,
193		.hsync_start = 240 + 10,/* hfp 10 */
194		.hsync_end = 240 + 10 + 10,/* hsync 10 */
195		.htotal = 240 + 10 + 10 + 20,/* hbp 20 */
196		.vdisplay = 320,
197		.vsync_start = 320 + 4,/* vfp 4 */
198		.vsync_end = 320 + 4 + 2,/* vsync 2 */
199		.vtotal = 320 + 4 + 2 + 2,/* vbp 2 */
200		.flags = 0,
201		.width_mm = 65,
202		.height_mm = 50,
203		.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
204	},
205	.ca = {0xc3, 0x08, 0x50},
206	.power_b = {0x00, 0xc1, 0x30},
207	.power_seq = {0x64, 0x03, 0x12, 0x81},
208	.dtca = {0x85, 0x00, 0x78},
209	.power_a = {0x39, 0x2c, 0x00, 0x34, 0x02},
210	.prc = 0x20,
211	.dtcb = {0x00, 0x00},
212	/* 0x00 fosc, 0x1b 70hz */
213	.frc = {0x00, 0x1b},
214	/*
215	 * 0x0a Interval scan, AGND AGND AGND AGND
216	 * 0xa2 Normally white, G1 -> G320, S720 -> S1,
217	 *	Scan Cycle 5 frames,85ms
218	 */
219	.dfc_1 = {0x0a, 0xa2},
220	/* 0x10 3.65v */
221	.power_1 = 0x10,
222	/* 0x10 AVDD=vci*2, VGH=vci*7, VGL=-vci*4 */
223	.power_2 = 0x10,
224	/* 0x45 VCOMH 4.425v, 0x15 VCOML -1.975*/
225	.vcom_1 = {0x45, 0x15},
226	/* 0x90 offset voltage, VMH-48, VML-48 */
227	.vcom_2 = 0x90,
228	/*
229	 * 0xc8 Row Address Order, Column Address Order
230	 * BGR 1
231	 */
232	.address_mode = 0xc8,
233	.g3amma_en = 0x00,
234	/*
235	 * 0xc2
236	 * Display Data Path: Memory
237	 * RGB: DE mode
238	 * DOTCLK polarity set (data fetched at the falling time)
239	 */
240	.rgb_interface = ILI9341_RGB_DISP_PATH_MEM |
241			ILI9341_RGB_DE_MODE |
242			ILI9341_RGB_DPL,
243	/*
244	 * 0x0a
245	 * Gate outputs in non-display area: Interval scan
246	 * Determine source/VCOM output in a non-display area in the partial
247	 * display mode: AGND AGND AGND AGND
248	 *
249	 * 0xa7
250	 * Scan Cycle: 15 frames
251	 * fFLM = 60Hz: 255ms
252	 * Liquid crystal type: Normally white
253	 * Gate Output Scan Direction: G1 -> G320
254	 * Source Output Scan Direction: S720 -> S1
255	 *
256	 * 0x27
257	 * LCD Driver Line: 320 lines
258	 *
259	 * 0x04
260	 * PCDIV: 4
261	 */
262	.dfc_2 = {0x0a, 0xa7, 0x27, 0x04},
263	/* column address: 240 */
264	.column_addr = {0x00, 0x00, (ILI9341_COLUMN_ADDR >> 4) & 0xff,
265				ILI9341_COLUMN_ADDR & 0xff},
266	/* page address: 320 */
267	.page_addr = {0x00, 0x00, (ILI9341_PAGE_ADDR >> 4) & 0xff,
268				ILI9341_PAGE_ADDR & 0xff},
269	/*
270	 * Memory write control: When the transfer number of data exceeds
271	 * (EC-SC+1)*(EP-SP+1), the column and page number will be
272	 * reset, and the exceeding data will be written into the following
273	 * column and page.
274	 * Display Operation Mode: RGB Interface Mode
275	 * Interface for RAM Access: RGB interface
276	 * 16- bit RGB interface (1 transfer/pixel)
277	 */
278	.interface = {ILI9341_IF_WE_MODE, 0x00,
279			ILI9341_IF_DM_RGB | ILI9341_IF_RM_RGB},
280	/* DPI: 16 bits / pixel */
281	.pixel_format = ILI9341_PIXEL_DPI_16_BITS,
282	/* Curve Selected: Gamma curve 1 (G2.2) */
283	.gamma_curve = ILI9341_GAMMA_CURVE_1,
284	.pgamma = {0x0f, 0x29, 0x24, 0x0c, 0x0e,
285			0x09, 0x4e, 0x78, 0x3c, 0x09,
286			0x13, 0x05, 0x17, 0x11, 0x00},
287	.ngamma = {0x00, 0x16, 0x1b, 0x04, 0x11,
288			0x07, 0x31, 0x33, 0x42, 0x05,
289			0x0c, 0x0a, 0x28, 0x2f, 0x0f},
290};
291
292static inline struct ili9341 *panel_to_ili9341(struct drm_panel *panel)
293{
294	return container_of(panel, struct ili9341, panel);
295}
296
297static void ili9341_dpi_init(struct ili9341 *ili)
298{
299	struct device *dev = (&ili->panel)->dev;
300	struct mipi_dbi *dbi = ili->dbi;
301	struct ili9341_config *cfg = (struct ili9341_config *)ili->conf;
302
303	/* Power Control */
304	mipi_dbi_command_stackbuf(dbi, 0xca, cfg->ca, ILI9341_CA_LEN);
305	mipi_dbi_command_stackbuf(dbi, ILI9341_POWERB, cfg->power_b,
306				  ILI9341_POWER_B_LEN);
307	mipi_dbi_command_stackbuf(dbi, ILI9341_POWER_SEQ, cfg->power_seq,
308				  ILI9341_POWER_SEQ_LEN);
309	mipi_dbi_command_stackbuf(dbi, ILI9341_DTCA, cfg->dtca,
310				  ILI9341_DTCA_LEN);
311	mipi_dbi_command_stackbuf(dbi, ILI9341_POWERA, cfg->power_a,
312				  ILI9341_POWER_A_LEN);
313	mipi_dbi_command(ili->dbi, ILI9341_PRC, cfg->prc);
314	mipi_dbi_command_stackbuf(dbi, ILI9341_DTCB, cfg->dtcb,
315				  ILI9341_DTCB_LEN);
316	mipi_dbi_command_stackbuf(dbi, ILI9341_FRC, cfg->frc, ILI9341_FRC_LEN);
317	mipi_dbi_command_stackbuf(dbi, ILI9341_DFC, cfg->dfc_1,
318				  ILI9341_DFC_1_LEN);
319	mipi_dbi_command(dbi, ILI9341_POWER1, cfg->power_1);
320	mipi_dbi_command(dbi, ILI9341_POWER2, cfg->power_2);
321
322	/* VCOM */
323	mipi_dbi_command_stackbuf(dbi, ILI9341_VCOM1, cfg->vcom_1,
324				  ILI9341_VCOM_1_LEN);
325	mipi_dbi_command(dbi, ILI9341_VCOM2, cfg->vcom_2);
326	mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, cfg->address_mode);
327
328	/* Gamma */
329	mipi_dbi_command(dbi, ILI9341_3GAMMA_EN, cfg->g3amma_en);
330	mipi_dbi_command(dbi, ILI9341_RGB_INTERFACE, cfg->rgb_interface);
331	mipi_dbi_command_stackbuf(dbi, ILI9341_DFC, cfg->dfc_2,
332				  ILI9341_DFC_2_LEN);
333
334	/* Colomn address set */
335	mipi_dbi_command_stackbuf(dbi, MIPI_DCS_SET_COLUMN_ADDRESS,
336				  cfg->column_addr, ILI9341_COLUMN_ADDR_LEN);
337
338	/* Page address set */
339	mipi_dbi_command_stackbuf(dbi, MIPI_DCS_SET_PAGE_ADDRESS,
340				  cfg->page_addr, ILI9341_PAGE_ADDR_LEN);
341	mipi_dbi_command_stackbuf(dbi, ILI9341_INTERFACE, cfg->interface,
342				  ILI9341_INTERFACE_LEN);
343
344	/* Format */
345	mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, cfg->pixel_format);
346	mipi_dbi_command(dbi, MIPI_DCS_WRITE_MEMORY_START);
347	msleep(200);
348	mipi_dbi_command(dbi, MIPI_DCS_SET_GAMMA_CURVE, cfg->gamma_curve);
349	mipi_dbi_command_stackbuf(dbi, ILI9341_PGAMMA, cfg->pgamma,
350				  ILI9341_PGAMMA_LEN);
351	mipi_dbi_command_stackbuf(dbi, ILI9341_NGAMMA, cfg->ngamma,
352				  ILI9341_NGAMMA_LEN);
353	mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
354	msleep(200);
355	mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
356	mipi_dbi_command(dbi, MIPI_DCS_WRITE_MEMORY_START);
357
358	dev_info(dev, "Initialized display rgb interface\n");
359}
360
361static int ili9341_dpi_power_on(struct ili9341 *ili)
362{
363	struct device *dev = (&ili->panel)->dev;
364	int ret = 0;
365
366	/* Assert RESET */
367	gpiod_set_value(ili->reset_gpio, 1);
368
369	/* Enable power */
370	ret = regulator_bulk_enable(ARRAY_SIZE(ili->supplies),
371				    ili->supplies);
372	if (ret < 0) {
373		dev_err(dev, "unable to enable vcc\n");
374		return ret;
375	}
376	msleep(20);
377
378	/* De-assert RESET */
379	gpiod_set_value(ili->reset_gpio, 0);
380	msleep(20);
381
382	return 0;
383}
384
385static int ili9341_dpi_power_off(struct ili9341 *ili)
386{
387	/* Assert RESET */
388	gpiod_set_value(ili->reset_gpio, 1);
389
390	/* Disable power */
391	return regulator_bulk_disable(ARRAY_SIZE(ili->supplies),
392				      ili->supplies);
393}
394
395static int ili9341_dpi_disable(struct drm_panel *panel)
396{
397	struct ili9341 *ili = panel_to_ili9341(panel);
398
399	mipi_dbi_command(ili->dbi, MIPI_DCS_SET_DISPLAY_OFF);
400	return 0;
401}
402
403static int ili9341_dpi_unprepare(struct drm_panel *panel)
404{
405	struct ili9341 *ili = panel_to_ili9341(panel);
406
407	return ili9341_dpi_power_off(ili);
408}
409
410static int ili9341_dpi_prepare(struct drm_panel *panel)
411{
412	struct ili9341 *ili = panel_to_ili9341(panel);
413	int ret;
414
415	ret = ili9341_dpi_power_on(ili);
416	if (ret < 0)
417		return ret;
418
419	ili9341_dpi_init(ili);
420
421	return 0;
422}
423
424static int ili9341_dpi_enable(struct drm_panel *panel)
425{
426	struct ili9341 *ili = panel_to_ili9341(panel);
427
428	mipi_dbi_command(ili->dbi, MIPI_DCS_SET_DISPLAY_ON);
429	return 0;
430}
431
432static int ili9341_dpi_get_modes(struct drm_panel *panel,
433				 struct drm_connector *connector)
434{
435	struct ili9341 *ili = panel_to_ili9341(panel);
436	struct drm_device *drm = connector->dev;
437	struct drm_display_mode *mode;
438	struct drm_display_info *info;
439
440	info = &connector->display_info;
441	info->width_mm = ili->conf->mode.width_mm;
442	info->height_mm = ili->conf->mode.height_mm;
443
444	if (ili->conf->rgb_interface & ILI9341_RGB_DPL)
445		info->bus_flags |= DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE;
446	else
447		info->bus_flags |= DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE;
448
449	if (ili->conf->rgb_interface & ILI9341_RGB_EPL)
450		info->bus_flags |= DRM_BUS_FLAG_DE_LOW;
451	else
452		info->bus_flags |= DRM_BUS_FLAG_DE_HIGH;
453
454	mode = drm_mode_duplicate(drm, &ili->conf->mode);
455	if (!mode) {
456		drm_err(drm, "bad mode or failed to add mode\n");
457		return -EINVAL;
458	}
459	drm_mode_set_name(mode);
460
461	/* Set up the polarity */
462	if (ili->conf->rgb_interface & ILI9341_RGB_HSPL)
463		mode->flags |= DRM_MODE_FLAG_PHSYNC;
464	else
465		mode->flags |= DRM_MODE_FLAG_NHSYNC;
466
467	if (ili->conf->rgb_interface & ILI9341_RGB_VSPL)
468		mode->flags |= DRM_MODE_FLAG_PVSYNC;
469	else
470		mode->flags |= DRM_MODE_FLAG_NVSYNC;
471
472	drm_mode_probed_add(connector, mode);
473
474	return 1; /* Number of modes */
475}
476
477static const struct drm_panel_funcs ili9341_dpi_funcs = {
478	.disable = ili9341_dpi_disable,
479	.unprepare = ili9341_dpi_unprepare,
480	.prepare = ili9341_dpi_prepare,
481	.enable = ili9341_dpi_enable,
482	.get_modes = ili9341_dpi_get_modes,
483};
484
485static int ili9341_dpi_probe(struct spi_device *spi, struct gpio_desc *dc,
486			     struct gpio_desc *reset)
487{
488	struct device *dev = &spi->dev;
489	struct ili9341 *ili;
490	int ret;
491
492	ili = devm_drm_panel_alloc(dev, struct ili9341, panel,
493				   &ili9341_dpi_funcs,
494				   DRM_MODE_CONNECTOR_DPI);
495	if (IS_ERR(ili))
496		return PTR_ERR(ili);
497
498	ili->dbi = devm_kzalloc(dev, sizeof(struct mipi_dbi),
499				GFP_KERNEL);
500	if (!ili->dbi)
501		return -ENOMEM;
502
503	ili->supplies[0].supply = "vci";
504	ili->supplies[1].supply = "vddi";
505	ili->supplies[2].supply = "vddi-led";
506	ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ili->supplies),
507				      ili->supplies);
508	if (ret < 0) {
509		dev_err(dev, "failed to get regulators: %d\n", ret);
510		return ret;
511	}
512
513	ret = mipi_dbi_spi_init(spi, ili->dbi, dc);
514	if (ret)
515		return ret;
516
517	spi_set_drvdata(spi, ili);
518	ili->reset_gpio = reset;
519	/*
520	 * Every new incarnation of this display must have a unique
521	 * data entry for the system in this driver.
522	 */
523	ili->conf = device_get_match_data(dev);
524	if (!ili->conf) {
525		dev_err(dev, "missing device configuration\n");
526		return -ENODEV;
527	}
528
529	ili->max_spi_speed = ili->conf->max_spi_speed;
530	drm_panel_add(&ili->panel);
531
532	return 0;
533}
534
535static int ili9341_probe(struct spi_device *spi)
536{
537	struct device *dev = &spi->dev;
538	struct gpio_desc *dc;
539	struct gpio_desc *reset;
540
541	reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
542	if (IS_ERR(reset))
543		return dev_err_probe(dev, PTR_ERR(reset), "Failed to get gpio 'reset'\n");
544
545	dc = devm_gpiod_get_optional(dev, "dc", GPIOD_OUT_LOW);
546	if (IS_ERR(dc))
547		return dev_err_probe(dev, PTR_ERR(dc), "Failed to get gpio 'dc'\n");
548
549	return ili9341_dpi_probe(spi, dc, reset);
550}
551
552static void ili9341_remove(struct spi_device *spi)
553{
554	struct ili9341 *ili = spi_get_drvdata(spi);
555
556	ili9341_dpi_power_off(ili);
557	drm_panel_remove(&ili->panel);
558}
559
560static const struct of_device_id ili9341_of_match[] = {
561	{
562		.compatible = "st,sf-tc240t-9370-t",
563		.data = &ili9341_stm32f429_disco_data,
564	},
565	{ }
566};
567MODULE_DEVICE_TABLE(of, ili9341_of_match);
568
569static const struct spi_device_id ili9341_id[] = {
570	{ "sf-tc240t-9370-t", 0 },
571	{ }
572};
573MODULE_DEVICE_TABLE(spi, ili9341_id);
574
575static struct spi_driver ili9341_driver = {
576	.probe = ili9341_probe,
577	.remove = ili9341_remove,
578	.id_table = ili9341_id,
579	.driver = {
580		.name = "panel-ilitek-ili9341",
581		.of_match_table = ili9341_of_match,
582	},
583};
584module_spi_driver(ili9341_driver);
585
586MODULE_AUTHOR("Dillon Min <dillon.minfei@gmail.com>");
587MODULE_DESCRIPTION("ILI9341 LCD panel driver");
588MODULE_LICENSE("GPL v2");