ga100.c

 1/*
 2 * Copyright 2022 Red Hat Inc.
 3 *
 4 * Permission is hereby granted, free of charge, to any person obtaining a
 5 * copy of this software and associated documentation files (the "Software"),
 6 * to deal in the Software without restriction, including without limitation
 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 8 * and/or sell copies of the Software, and to permit persons to whom the
 9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22#include "priv.h"
23
24static const struct nvkm_falcon_func
25ga100_gsp_flcn = {
26	.disable = gm200_flcn_disable,
27	.enable = gm200_flcn_enable,
28	.addr2 = 0x1000,
29	.riscv_irqmask = 0x2b4,
30	.reset_eng = gp102_flcn_reset_eng,
31	.reset_wait_mem_scrubbing = gm200_flcn_reset_wait_mem_scrubbing,
32	.bind_inst = gm200_flcn_bind_inst,
33	.bind_stat = gm200_flcn_bind_stat,
34	.bind_intr = true,
35	.imem_pio = &gm200_flcn_imem_pio,
36	.dmem_pio = &gm200_flcn_dmem_pio,
37	.riscv_active = tu102_flcn_riscv_active,
38	.intr_retrigger = ga100_flcn_intr_retrigger,
39};
40
41static const struct nvkm_gsp_func
42ga100_gsp = {
43	.flcn = &ga100_gsp_flcn,
44	.fwsec = &tu102_gsp_fwsec,
45
46	.sig_section = ".fwsignature_ga100",
47
48	.booter.ctor = tu102_gsp_booter_ctor,
49
50	.fwsec_sb.ctor = tu102_gsp_fwsec_sb_ctor,
51	.fwsec_sb.dtor = tu102_gsp_fwsec_sb_dtor,
52
53	.dtor = r535_gsp_dtor,
54	.oneinit = tu102_gsp_oneinit,
55	.init = tu102_gsp_init,
56	.fini = tu102_gsp_fini,
57	.reset = tu102_gsp_reset,
58
59	.rm.gpu = &ga100_gpu,
60};
61
62static struct nvkm_gsp_fwif
63ga100_gsps[] = {
64	{  1, tu102_gsp_load, &ga100_gsp, &r570_rm_tu102, "570.144" },
65	{  0, tu102_gsp_load, &ga100_gsp, &r535_rm_tu102, "535.113.01" },
66	{ -1, gv100_gsp_nofw, &gv100_gsp },
67	{}
68};
69
70int
71ga100_gsp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
72	      struct nvkm_gsp **pgsp)
73{
74	return nvkm_gsp_new_(ga100_gsps, device, type, inst, pgsp);
75}
76
77NVKM_GSP_FIRMWARE_BOOTER(ga100, 535.113.01);
78NVKM_GSP_FIRMWARE_BOOTER(ga100, 570.144);