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gk208.c

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linux-6.19.14/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk208.c C
  1/*
  2 * Copyright 2013 Red Hat Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: Ben Skeggs <bskeggs@redhat.com>
 23 */
 24#include "gf100.h"
 25#include "ctxgf100.h"
 26
 27#include <subdev/timer.h>
 28
 29#include <nvif/class.h>
 30
 31/*******************************************************************************
 32 * PGRAPH register lists
 33 ******************************************************************************/
 34
 35static const struct gf100_gr_init
 36gk208_gr_init_main_0[] = {
 37	{ 0x400080,   1, 0x04, 0x003083c2 },
 38	{ 0x400088,   1, 0x04, 0x0001bfe7 },
 39	{ 0x40008c,   1, 0x04, 0x00000000 },
 40	{ 0x400090,   1, 0x04, 0x00000030 },
 41	{ 0x40013c,   1, 0x04, 0x003901f7 },
 42	{ 0x400140,   1, 0x04, 0x00000100 },
 43	{ 0x400144,   1, 0x04, 0x00000000 },
 44	{ 0x400148,   1, 0x04, 0x00000110 },
 45	{ 0x400138,   1, 0x04, 0x00000000 },
 46	{ 0x400130,   2, 0x04, 0x00000000 },
 47	{ 0x400124,   1, 0x04, 0x00000002 },
 48	{}
 49};
 50
 51static const struct gf100_gr_init
 52gk208_gr_init_ds_0[] = {
 53	{ 0x405844,   1, 0x04, 0x00ffffff },
 54	{ 0x405850,   1, 0x04, 0x00000000 },
 55	{ 0x405900,   1, 0x04, 0x00000000 },
 56	{ 0x405908,   1, 0x04, 0x00000000 },
 57	{ 0x405928,   2, 0x04, 0x00000000 },
 58	{}
 59};
 60
 61const struct gf100_gr_init
 62gk208_gr_init_gpc_unk_0[] = {
 63	{ 0x418604,   1, 0x04, 0x00000000 },
 64	{ 0x418680,   1, 0x04, 0x00000000 },
 65	{ 0x418714,   1, 0x04, 0x00000000 },
 66	{ 0x418384,   2, 0x04, 0x00000000 },
 67	{}
 68};
 69
 70static const struct gf100_gr_init
 71gk208_gr_init_setup_1[] = {
 72	{ 0x4188c8,   2, 0x04, 0x00000000 },
 73	{ 0x4188d0,   1, 0x04, 0x00010000 },
 74	{ 0x4188d4,   1, 0x04, 0x00000201 },
 75	{}
 76};
 77
 78static const struct gf100_gr_init
 79gk208_gr_init_tex_0[] = {
 80	{ 0x419ab0,   1, 0x04, 0x00000000 },
 81	{ 0x419ac8,   1, 0x04, 0x00000000 },
 82	{ 0x419ab8,   1, 0x04, 0x000000e7 },
 83	{ 0x419abc,   2, 0x04, 0x00000000 },
 84	{ 0x419ab4,   1, 0x04, 0x00000000 },
 85	{ 0x419aa8,   2, 0x04, 0x00000000 },
 86	{}
 87};
 88
 89static const struct gf100_gr_init
 90gk208_gr_init_l1c_0[] = {
 91	{ 0x419c98,   1, 0x04, 0x00000000 },
 92	{ 0x419ca8,   1, 0x04, 0x00000000 },
 93	{ 0x419cb0,   1, 0x04, 0x01000000 },
 94	{ 0x419cb4,   1, 0x04, 0x00000000 },
 95	{ 0x419cb8,   1, 0x04, 0x00b08bea },
 96	{ 0x419c84,   1, 0x04, 0x00010384 },
 97	{ 0x419cbc,   1, 0x04, 0x281b3646 },
 98	{ 0x419cc0,   2, 0x04, 0x00000000 },
 99	{ 0x419c80,   1, 0x04, 0x00000230 },
100	{ 0x419ccc,   2, 0x04, 0x00000000 },
101	{}
102};
103
104static const struct gf100_gr_pack
105gk208_gr_pack_mmio[] = {
106	{ gk208_gr_init_main_0 },
107	{ gk110_gr_init_fe_0 },
108	{ gf100_gr_init_pri_0 },
109	{ gf100_gr_init_rstr2d_0 },
110	{ gf119_gr_init_pd_0 },
111	{ gk208_gr_init_ds_0 },
112	{ gf100_gr_init_scc_0 },
113	{ gk110_gr_init_sked_0 },
114	{ gk110_gr_init_cwd_0 },
115	{ gf119_gr_init_prop_0 },
116	{ gk208_gr_init_gpc_unk_0 },
117	{ gf100_gr_init_setup_0 },
118	{ gf100_gr_init_crstr_0 },
119	{ gk208_gr_init_setup_1 },
120	{ gf100_gr_init_zcull_0 },
121	{ gf119_gr_init_gpm_0 },
122	{ gk110_gr_init_gpc_unk_1 },
123	{ gf100_gr_init_gcc_0 },
124	{ gk104_gr_init_gpc_unk_2 },
125	{ gk104_gr_init_tpccs_0 },
126	{ gk208_gr_init_tex_0 },
127	{ gk104_gr_init_pe_0 },
128	{ gk208_gr_init_l1c_0 },
129	{ gf100_gr_init_mpc_0 },
130	{ gk110_gr_init_sm_0 },
131	{ gf117_gr_init_pes_0 },
132	{ gf117_gr_init_wwdx_0 },
133	{ gf117_gr_init_cbm_0 },
134	{ gk104_gr_init_be_0 },
135	{ gf100_gr_init_fe_1 },
136	{}
137};
138
139/*******************************************************************************
140 * PGRAPH engine/subdev functions
141 ******************************************************************************/
142
143#include "fuc/hubgk208.fuc5.h"
144
145static struct gf100_gr_ucode
146gk208_gr_fecs_ucode = {
147	.code.data = gk208_grhub_code,
148	.code.size = sizeof(gk208_grhub_code),
149	.data.data = gk208_grhub_data,
150	.data.size = sizeof(gk208_grhub_data),
151};
152
153#include "fuc/gpcgk208.fuc5.h"
154
155static struct gf100_gr_ucode
156gk208_gr_gpccs_ucode = {
157	.code.data = gk208_grgpc_code,
158	.code.size = sizeof(gk208_grgpc_code),
159	.data.data = gk208_grgpc_data,
160	.data.size = sizeof(gk208_grgpc_data),
161};
162
163static const struct gf100_gr_func
164gk208_gr = {
165	.oneinit_tiles = gf100_gr_oneinit_tiles,
166	.oneinit_sm_id = gf100_gr_oneinit_sm_id,
167	.init = gf100_gr_init,
168	.init_gpc_mmu = gf100_gr_init_gpc_mmu,
169	.init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
170	.init_zcull = gf117_gr_init_zcull,
171	.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
172	.init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
173	.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
174	.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
175	.init_419cc0 = gf100_gr_init_419cc0,
176	.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
177	.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
178	.init_shader_exceptions = gf100_gr_init_shader_exceptions,
179	.init_rop_exceptions = gf100_gr_init_rop_exceptions,
180	.init_exception2 = gf100_gr_init_exception2,
181	.init_400054 = gf100_gr_init_400054,
182	.trap_mp = gf100_gr_trap_mp,
183	.mmio = gk208_gr_pack_mmio,
184	.fecs.ucode = &gk208_gr_fecs_ucode,
185	.fecs.reset = gf100_gr_fecs_reset,
186	.gpccs.ucode = &gk208_gr_gpccs_ucode,
187	.rops = gf100_gr_rops,
188	.ppc_nr = 1,
189	.grctx = &gk208_grctx,
190	.zbc = &gf100_gr_zbc,
191	.sclass = {
192		{ -1, -1, FERMI_TWOD_A },
193		{ -1, -1, KEPLER_INLINE_TO_MEMORY_B },
194		{ -1, -1, KEPLER_B, &gf100_fermi },
195		{ -1, -1, KEPLER_COMPUTE_B },
196		{}
197	}
198};
199
200static const struct gf100_gr_fwif
201gk208_gr_fwif[] = {
202	{ -1, gf100_gr_load, &gk208_gr },
203	{ -1, gf100_gr_nofw, &gk208_gr },
204	{}
205};
206
207int
208gk208_gr_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_gr **pgr)
209{
210	return gf100_gr_new_(gk208_gr_fwif, device, type, inst, pgr);
211}
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