FILE
a7xx_perfcntrs.xml
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linux-6.19.14/drivers/gpu/drm/msm/registers/adreno/a7xx_perfcntrs.xml
1<?xml version="1.0" encoding="UTF-8"?> 2<database xmlns="http://nouveau.freedesktop.org/" 3xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" 4xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd"> 5<import file="freedreno_copyright.xml"/> 6<import file="adreno/adreno_common.xml"/> 7<import file="adreno/adreno_pm4.xml"/> 8 9<enum name="a7xx_cp_perfcounter_select"> 10 <value value="0" name="A7XX_PERF_CP_ALWAYS_COUNT"/> 11 <value value="1" name="A7XX_PERF_CP_BUSY_GFX_CORE_IDLE"/> 12 <value value="2" name="A7XX_PERF_CP_BUSY_CYCLES"/> 13 <value value="3" name="A7XX_PERF_CP_NUM_PREEMPTIONS"/> 14 <value value="4" name="A7XX_PERF_CP_PREEMPTION_REACTION_DELAY"/> 15 <value value="5" name="A7XX_PERF_CP_PREEMPTION_SWITCH_OUT_TIME"/> 16 <value value="6" name="A7XX_PERF_CP_PREEMPTION_SWITCH_IN_TIME"/> 17 <value value="7" name="A7XX_PERF_CP_DEAD_DRAWS_IN_BIN_RENDER"/> 18 <value value="8" name="A7XX_PERF_CP_PREDICATED_DRAWS_KILLED"/> 19 <value value="9" name="A7XX_PERF_CP_MODE_SWITCH"/> 20 <value value="10" name="A7XX_PERF_CP_ZPASS_DONE"/> 21 <value value="11" name="A7XX_PERF_CP_CONTEXT_DONE"/> 22 <value value="12" name="A7XX_PERF_CP_CACHE_FLUSH"/> 23 <value value="13" name="A7XX_PERF_CP_LONG_PREEMPTIONS"/> 24 <value value="14" name="A7XX_PERF_CP_SQE_I_CACHE_STARVE"/> 25 <value value="15" name="A7XX_PERF_CP_SQE_IDLE"/> 26 <value value="16" name="A7XX_PERF_CP_SQE_PM4_STARVE_RB_IB"/> 27 <value value="17" name="A7XX_PERF_CP_SQE_PM4_STARVE_SDS"/> 28 <value value="18" name="A7XX_PERF_CP_SQE_MRB_STARVE"/> 29 <value value="19" name="A7XX_PERF_CP_SQE_RRB_STARVE"/> 30 <value value="20" name="A7XX_PERF_CP_SQE_VSD_STARVE"/> 31 <value value="21" name="A7XX_PERF_CP_VSD_DECODE_STARVE"/> 32 <value value="22" name="A7XX_PERF_CP_SQE_PIPE_OUT_STALL"/> 33 <value value="23" name="A7XX_PERF_CP_SQE_SYNC_STALL"/> 34 <value value="24" name="A7XX_PERF_CP_SQE_PM4_WFI_STALL"/> 35 <value value="25" name="A7XX_PERF_CP_SQE_SYS_WFI_STALL"/> 36 <value value="26" name="A7XX_PERF_CP_SQE_T4_EXEC"/> 37 <value value="27" name="A7XX_PERF_CP_SQE_LOAD_STATE_EXEC"/> 38 <value value="28" name="A7XX_PERF_CP_SQE_SAVE_SDS_STATE"/> 39 <value value="29" name="A7XX_PERF_CP_SQE_DRAW_EXEC"/> 40 <value value="30" name="A7XX_PERF_CP_SQE_CTXT_REG_BUNCH_EXEC"/> 41 <value value="31" name="A7XX_PERF_CP_SQE_EXEC_PROFILED"/> 42 <value value="32" name="A7XX_PERF_CP_MEMORY_POOL_EMPTY"/> 43 <value value="33" name="A7XX_PERF_CP_MEMORY_POOL_SYNC_STALL"/> 44 <value value="34" name="A7XX_PERF_CP_MEMORY_POOL_ABOVE_THRESH"/> 45 <value value="35" name="A7XX_PERF_CP_AHB_WR_STALL_PRE_DRAWS"/> 46 <value value="36" name="A7XX_PERF_CP_AHB_STALL_SQE_GMU"/> 47 <value value="37" name="A7XX_PERF_CP_AHB_STALL_SQE_WR_OTHER"/> 48 <value value="38" name="A7XX_PERF_CP_AHB_STALL_SQE_RD_OTHER"/> 49 <value value="39" name="A7XX_PERF_CP_CLUSTER0_EMPTY"/> 50 <value value="40" name="A7XX_PERF_CP_CLUSTER1_EMPTY"/> 51 <value value="41" name="A7XX_PERF_CP_CLUSTER2_EMPTY"/> 52 <value value="42" name="A7XX_PERF_CP_CLUSTER3_EMPTY"/> 53 <value value="43" name="A7XX_PERF_CP_CLUSTER4_EMPTY"/> 54 <value value="44" name="A7XX_PERF_CP_CLUSTER5_EMPTY"/> 55 <value value="45" name="A7XX_PERF_CP_PM4_DATA"/> 56 <value value="46" name="A7XX_PERF_CP_PM4_HEADERS"/> 57 <value value="47" name="A7XX_PERF_CP_VBIF_READ_BEATS"/> 58 <value value="48" name="A7XX_PERF_CP_VBIF_WRITE_BEATS"/> 59 <value value="49" name="A7XX_PERF_CP_SQE_INSTR_COUNTER"/> 60 <value value="50" name="A7XX_PERF_CP_RESERVED_50"/> 61 <value value="51" name="A7XX_PERF_CP_RESERVED_51"/> 62 <value value="52" name="A7XX_PERF_CP_RESERVED_52"/> 63 <value value="53" name="A7XX_PERF_CP_RESERVED_53"/> 64 <value value="54" name="A7XX_PERF_CP_RESERVED_54"/> 65 <value value="55" name="A7XX_PERF_CP_RESERVED_55"/> 66 <value value="56" name="A7XX_PERF_CP_RESERVED_56"/> 67 <value value="57" name="A7XX_PERF_CP_RESERVED_57"/> 68 <value value="58" name="A7XX_PERF_CP_RESERVED_58"/> 69 <value value="59" name="A7XX_PERF_CP_RESERVED_59"/> 70 <value value="60" name="A7XX_PERF_CP_CLUSTER0_FULL"/> 71 <value value="61" name="A7XX_PERF_CP_CLUSTER1_FULL"/> 72 <value value="62" name="A7XX_PERF_CP_CLUSTER2_FULL"/> 73 <value value="63" name="A7XX_PERF_CP_CLUSTER3_FULL"/> 74 <value value="64" name="A7XX_PERF_CP_CLUSTER4_FULL"/> 75 <value value="65" name="A7XX_PERF_CP_CLUSTER5_FULL"/> 76 <value value="66" name="A7XX_PERF_CP_CLUSTER6_FULL"/> 77 <value value="67" name="A7XX_PERF_CP_CLUSTER6_EMPTY"/> 78 <value value="68" name="A7XX_PERF_CP_ICACHE_MISSES"/> 79 <value value="69" name="A7XX_PERF_CP_ICACHE_HITS"/> 80 <value value="70" name="A7XX_PERF_CP_ICACHE_STALL"/> 81 <value value="71" name="A7XX_PERF_CP_DCACHE_MISSES"/> 82 <value value="72" name="A7XX_PERF_CP_DCACHE_HITS"/> 83 <value value="73" name="A7XX_PERF_CP_DCACHE_STALLS"/> 84 <value value="74" name="A7XX_PERF_CP_AQE_SQE_STALL"/> 85 <value value="75" name="A7XX_PERF_CP_SQE_AQE_STARVE"/> 86 <value value="76" name="A7XX_PERF_CP_PREEMPT_LATENCY"/> 87 <value value="77" name="A7XX_PERF_CP_SQE_MD8_STALL_CYCLES"/> 88 <value value="78" name="A7XX_PERF_CP_SQE_MESH_EXEC_CYCLES"/> 89 <value value="79" name="A7XX_PERF_CP_AQE_NUM_AS_CHUNKS"/> 90 <value value="80" name="A7XX_PERF_CP_AQE_NUM_MS_CHUNKS"/> 91</enum> 92 93<enum name="a7xx_rbbm_perfcounter_select"> 94 <value value="0" name="A7XX_PERF_RBBM_ALWAYS_COUNT"/> 95 <value value="1" name="A7XX_PERF_RBBM_ALWAYS_ON"/> 96 <value value="2" name="A7XX_PERF_RBBM_TSE_BUSY"/> 97 <value value="3" name="A7XX_PERF_RBBM_RAS_BUSY"/> 98 <value value="4" name="A7XX_PERF_RBBM_PC_DCALL_BUSY"/> 99 <value value="5" name="A7XX_PERF_RBBM_PC_VSD_BUSY"/> 100 <value value="6" name="A7XX_PERF_RBBM_STATUS_MASKED"/> 101 <value value="7" name="A7XX_PERF_RBBM_COM_BUSY"/> 102 <value value="8" name="A7XX_PERF_RBBM_DCOM_BUSY"/> 103 <value value="9" name="A7XX_PERF_RBBM_VBIF_BUSY"/> 104 <value value="10" name="A7XX_PERF_RBBM_VSC_BUSY"/> 105 <value value="11" name="A7XX_PERF_RBBM_TESS_BUSY"/> 106 <value value="12" name="A7XX_PERF_RBBM_UCHE_BUSY"/> 107 <value value="13" name="A7XX_PERF_RBBM_HLSQ_BUSY"/> 108</enum> 109 110<enum name="a7xx_pc_perfcounter_select"> 111 <value value="0" name="A7XX_PERF_PC_BUSY_CYCLES"/> 112 <value value="1" name="A7XX_PERF_PC_WORKING_CYCLES"/> 113 <value value="2" name="A7XX_PERF_PC_STALL_CYCLES_VFD"/> 114 <value value="3" name="A7XX_PERF_PC_RESERVED"/> 115 <value value="4" name="A7XX_PERF_PC_STALL_CYCLES_VPC"/> 116 <value value="5" name="A7XX_PERF_PC_STALL_CYCLES_UCHE"/> 117 <value value="6" name="A7XX_PERF_PC_STALL_CYCLES_TESS"/> 118 <value value="7" name="A7XX_PERF_PC_STALL_CYCLES_VFD_ONLY"/> 119 <value value="8" name="A7XX_PERF_PC_STALL_CYCLES_VPC_ONLY"/> 120 <value value="9" name="A7XX_PERF_PC_PASS1_TF_STALL_CYCLES"/> 121 <value value="10" name="A7XX_PERF_PC_STARVE_CYCLES_FOR_INDEX"/> 122 <value value="11" name="A7XX_PERF_PC_STARVE_CYCLES_FOR_TESS_FACTOR"/> 123 <value value="12" name="A7XX_PERF_PC_STARVE_CYCLES_FOR_VIZ_STREAM"/> 124 <value value="13" name="A7XX_PERF_PC_STARVE_CYCLES_DI"/> 125 <value value="14" name="A7XX_PERF_PC_VIS_STREAMS_LOADED"/> 126 <value value="15" name="A7XX_PERF_PC_INSTANCES"/> 127 <value value="16" name="A7XX_PERF_PC_VPC_PRIMITIVES"/> 128 <value value="17" name="A7XX_PERF_PC_DEAD_PRIM"/> 129 <value value="18" name="A7XX_PERF_PC_LIVE_PRIM"/> 130 <value value="19" name="A7XX_PERF_PC_VERTEX_HITS"/> 131 <value value="20" name="A7XX_PERF_PC_IA_VERTICES"/> 132 <value value="21" name="A7XX_PERF_PC_IA_PRIMITIVES"/> 133 <value value="22" name="A7XX_PERF_PC_RESERVED_22"/> 134 <value value="23" name="A7XX_PERF_PC_HS_INVOCATIONS"/> 135 <value value="24" name="A7XX_PERF_PC_DS_INVOCATIONS"/> 136 <value value="25" name="A7XX_PERF_PC_VS_INVOCATIONS"/> 137 <value value="26" name="A7XX_PERF_PC_GS_INVOCATIONS"/> 138 <value value="27" name="A7XX_PERF_PC_DS_PRIMITIVES"/> 139 <value value="28" name="A7XX_PERF_PC_3D_DRAWCALLS"/> 140 <value value="29" name="A7XX_PERF_PC_2D_DRAWCALLS"/> 141 <value value="30" name="A7XX_PERF_PC_NON_DRAWCALL_GLOBAL_EVENTS"/> 142 <value value="31" name="A7XX_PERF_PC_TESS_BUSY_CYCLES"/> 143 <value value="32" name="A7XX_PERF_PC_TESS_WORKING_CYCLES"/> 144 <value value="33" name="A7XX_PERF_PC_TESS_STALL_CYCLES_PC"/> 145 <value value="34" name="A7XX_PERF_PC_TESS_STARVE_CYCLES_PC"/> 146 <value value="35" name="A7XX_PERF_PC_TESS_SINGLE_PRIM_CYCLES"/> 147 <value value="36" name="A7XX_PERF_PC_TESS_PC_UV_TRANS"/> 148 <value value="37" name="A7XX_PERF_PC_TESS_PC_UV_PATCHES"/> 149 <value value="38" name="A7XX_PERF_PC_TESS_FACTOR_TRANS"/> 150 <value value="39" name="A7XX_PERF_PC_TAG_CHECKED_VERTICES"/> 151 <value value="40" name="A7XX_PERF_PC_MESH_VS_WAVES"/> 152 <value value="41" name="A7XX_PERF_PC_MESH_DRAWS"/> 153 <value value="42" name="A7XX_PERF_PC_MESH_DEAD_DRAWS"/> 154 <value value="43" name="A7XX_PERF_PC_MESH_MVIS_EN_DRAWS"/> 155 <value value="44" name="A7XX_PERF_PC_MESH_DEAD_PRIM"/> 156 <value value="45" name="A7XX_PERF_PC_MESH_LIVE_PRIM"/> 157 <value value="46" name="A7XX_PERF_PC_MESH_PA_EN_PRIM"/> 158 <value value="47" name="A7XX_PERF_PC_STARVE_CYCLES_FOR_MVIS_STREAM"/> 159 <value value="48" name="A7XX_PERF_PC_STARVE_CYCLES_PREDRAW"/> 160 <value value="49" name="A7XX_PERF_PC_STALL_CYCLES_COMPUTE_GFX"/> 161 <value value="50" name="A7XX_PERF_PC_STALL_CYCLES_GFX_COMPUTE"/> 162 <value value="51" name="A7XX_PERF_PC_TESS_PC_MULTI_PATCH_TRANS"/> 163</enum> 164 165<enum name="a7xx_vfd_perfcounter_select"> 166 <value value="0" name="A7XX_PERF_VFD_BUSY_CYCLES"/> 167 <value value="1" name="A7XX_PERF_VFD_STALL_CYCLES_UCHE"/> 168 <value value="2" name="A7XX_PERF_VFD_STALL_CYCLES_VPC_ALLOC"/> 169 <value value="3" name="A7XX_PERF_VFD_STALL_CYCLES_SP_INFO"/> 170 <value value="4" name="A7XX_PERF_VFD_STALL_CYCLES_SP_ATTR"/> 171 <value value="5" name="A7XX_PERF_VFD_STARVE_CYCLES_UCHE"/> 172 <value value="6" name="A7XX_PERF_VFD_RBUFFER_FULL"/> 173 <value value="7" name="A7XX_PERF_VFD_ATTR_INFO_FIFO_FULL"/> 174 <value value="8" name="A7XX_PERF_VFD_DECODED_ATTRIBUTE_BYTES"/> 175 <value value="9" name="A7XX_PERF_VFD_NUM_ATTRIBUTES"/> 176 <value value="10" name="A7XX_PERF_VFD_UPPER_SHADER_FIBERS"/> 177 <value value="11" name="A7XX_PERF_VFD_LOWER_SHADER_FIBERS"/> 178 <value value="12" name="A7XX_PERF_VFD_MODE_0_FIBERS"/> 179 <value value="13" name="A7XX_PERF_VFD_MODE_1_FIBERS"/> 180 <value value="14" name="A7XX_PERF_VFD_MODE_2_FIBERS"/> 181 <value value="15" name="A7XX_PERF_VFD_MODE_3_FIBERS"/> 182 <value value="16" name="A7XX_PERF_VFD_MODE_4_FIBERS"/> 183 <value value="17" name="A7XX_PERF_VFD_TOTAL_VERTICES"/> 184 <value value="18" name="A7XX_PERF_VFDP_STALL_CYCLES_VFD"/> 185 <value value="19" name="A7XX_PERF_VFDP_STALL_CYCLES_VFD_INDEX"/> 186 <value value="20" name="A7XX_PERF_VFDP_STALL_CYCLES_VFD_PROG"/> 187 <value value="21" name="A7XX_PERF_VFDP_STARVE_CYCLES_PC"/> 188 <value value="22" name="A7XX_PERF_VFDP_VS_STAGE_WAVES"/> 189 <value value="23" name="A7XX_PERF_VFD_STALL_CYCLES_PRG_END_FE"/> 190 <value value="24" name="A7XX_PERF_VFD_STALL_CYCLES_CBSYNC"/> 191</enum> 192 193<enum name="a7xx_hlsq_perfcounter_select"> 194 <value value="0" name="A7XX_PERF_HLSQ_BUSY_CYCLES"/> 195 <value value="1" name="A7XX_PERF_HLSQ_STALL_CYCLES_UCHE"/> 196 <value value="2" name="A7XX_PERF_HLSQ_STALL_CYCLES_SP_STATE"/> 197 <value value="3" name="A7XX_PERF_HLSQ_STALL_CYCLES_SP_FS_STAGE"/> 198 <value value="4" name="A7XX_PERF_HLSQ_UCHE_LATENCY_CYCLES"/> 199 <value value="5" name="A7XX_PERF_HLSQ_UCHE_LATENCY_COUNT"/> 200 <value value="6" name="A7XX_PERF_HLSQ_RESERVED_6"/> 201 <value value="7" name="A7XX_PERF_HLSQ_RESERVED_7"/> 202 <value value="8" name="A7XX_PERF_HLSQ_RESERVED_8"/> 203 <value value="9" name="A7XX_PERF_HLSQ_RESERVED_9"/> 204 <value value="10" name="A7XX_PERF_HLSQ_COMPUTE_DRAWCALLS"/> 205 <value value="11" name="A7XX_PERF_HLSQ_FS_DATA_WAIT_PROGRAMMING"/> 206 <value value="12" name="A7XX_PERF_HLSQ_DUAL_FS_PROG_ACTIVE"/> 207 <value value="13" name="A7XX_PERF_HLSQ_DUAL_VS_PROG_ACTIVE"/> 208 <value value="14" name="A7XX_PERF_HLSQ_FS_BATCH_COUNT_ZERO"/> 209 <value value="15" name="A7XX_PERF_HLSQ_VS_BATCH_COUNT_ZERO"/> 210 <value value="16" name="A7XX_PERF_HLSQ_WAVE_PENDING_NO_QUAD"/> 211 <value value="17" name="A7XX_PERF_HLSQ_WAVE_PENDING_NO_PRIM_BASE"/> 212 <value value="18" name="A7XX_PERF_HLSQ_STALL_CYCLES_VPC"/> 213 <value value="19" name="A7XX_PERF_HLSQ_RESERVED_19"/> 214 <value value="20" name="A7XX_PERF_HLSQ_DRAW_MODE_SWITCH_VSFS_SYNC"/> 215 <value value="21" name="A7XX_PERF_HLSQ_VSBR_STALL_CYCLES"/> 216 <value value="22" name="A7XX_PERF_HLSQ_FS_STALL_CYCLES"/> 217 <value value="23" name="A7XX_PERF_HLSQ_LPAC_STALL_CYCLES"/> 218 <value value="24" name="A7XX_PERF_HLSQ_BV_STALL_CYCLES"/> 219 <value value="25" name="A7XX_PERF_HLSQ_VSBR_DEREF_CYCLES"/> 220 <value value="26" name="A7XX_PERF_HLSQ_FS_DEREF_CYCLES"/> 221 <value value="27" name="A7XX_PERF_HLSQ_LPAC_DEREF_CYCLES"/> 222 <value value="28" name="A7XX_PERF_HLSQ_BV_DEREF_CYCLES"/> 223 <value value="29" name="A7XX_PERF_HLSQ_VSBR_S2W_CYCLES"/> 224 <value value="30" name="A7XX_PERF_HLSQ_FS_S2W_CYCLES"/> 225 <value value="31" name="A7XX_PERF_HLSQ_LPAC_S2W_CYCLES"/> 226 <value value="32" name="A7XX_PERF_HLSQ_BV_S2W_CYCLES"/> 227 <value value="33" name="A7XX_PERF_HLSQ_VSBR_WAIT_FS_S2W"/> 228 <value value="34" name="A7XX_PERF_HLSQ_FS_WAIT_VS_S2W"/> 229 <value value="35" name="A7XX_PERF_HLSQ_LPAC_WAIT_VS_S2W"/> 230 <value value="36" name="A7XX_PERF_HLSQ_BV_WAIT_FS_S2W"/> 231 <value value="37" name="A7XX_PERF_HLSQ_VS_WAIT_CONST_RESOURCE"/> 232 <value value="38" name="A7XX_PERF_HLSQ_FS_WAIT_SAME_VS_S2W"/> 233 <value value="39" name="A7XX_PERF_HLSQ_FS_STARVING_SP"/> 234 <value value="40" name="A7XX_PERF_HLSQ_VS_DATA_WAIT_PROGRAMMING"/> 235 <value value="41" name="A7XX_PERF_HLSQ_BV_DATA_WAIT_PROGRAMMING"/> 236 <value value="42" name="A7XX_PERF_HLSQ_STPROC_WAVE_CONTEXTS_VS"/> 237 <value value="43" name="A7XX_PERF_HLSQ_STPROC_WAVE_CONTEXT_CYCLES_VS"/> 238 <value value="44" name="A7XX_PERF_HLSQ_STPROC_WAVE_CONTEXTS_FS"/> 239 <value value="45" name="A7XX_PERF_HLSQ_STPROC_WAVE_CONTEXT_CYCLES_FS"/> 240 <value value="46" name="A7XX_PERF_HLSQ_STPROC_WAVE_CONTEXTS_BV"/> 241 <value value="47" name="A7XX_PERF_HLSQ_STPROC_WAVE_CONTEXT_CYCLES_BV"/> 242 <value value="48" name="A7XX_PERF_HLSQ_STPROC_WAVE_CONTEXTS_LPAC"/> 243 <value value="49" name="A7XX_PERF_HLSQ_STPROC_WAVE_CONTEXT_CYCLES_LPAC"/> 244 <value value="50" name="A7XX_PERF_HLSQ_SPTROC_STCHE_WARMUP_INC_VS"/> 245 <value value="51" name="A7XX_PERF_HLSQ_SPTROC_STCHE_WARMUP_INC_FS"/> 246 <value value="52" name="A7XX_PERF_HLSQ_SPTROC_STCHE_WARMUP_INC_BV"/> 247 <value value="53" name="A7XX_PERF_HLSQ_SPTROC_STCHE_WARMUP_INC_LPAC"/> 248 <value value="54" name="A7XX_PERF_HLSQ_SPTROC_STCHE_MISS_INC_VS"/> 249 <value value="55" name="A7XX_PERF_HLSQ_SPTROC_STCHE_MISS_INC_FS"/> 250 <value value="56" name="A7XX_PERF_HLSQ_SPTROC_STCHE_MISS_INC_BV"/> 251 <value value="57" name="A7XX_PERF_HLSQ_SPTROC_STCHE_MISS_INC_LPAC"/> 252</enum> 253 254<enum name="a7xx_vpc_perfcounter_select"> 255 <value value="0" name="A7XX_PERF_VPC_BUSY_CYCLES"/> 256 <value value="1" name="A7XX_PERF_VPC_WORKING_CYCLES"/> 257 <value value="2" name="A7XX_PERF_VPC_STALL_CYCLES_UCHE"/> 258 <value value="3" name="A7XX_PERF_VPC_STALL_CYCLES_VFD_WACK"/> 259 <value value="4" name="A7XX_PERF_VPC_STALL_CYCLES_HLSQ_PRIM_ALLOC"/> 260 <value value="5" name="A7XX_PERF_VPC_RESERVED_5"/> 261 <value value="6" name="A7XX_PERF_VPC_STALL_CYCLES_SP_LM"/> 262 <value value="7" name="A7XX_PERF_VPC_STARVE_CYCLES_SP"/> 263 <value value="8" name="A7XX_PERF_VPC_STARVE_CYCLES_LRZ"/> 264 <value value="9" name="A7XX_PERF_VPC_PC_PRIMITIVES"/> 265 <value value="10" name="A7XX_PERF_VPC_SP_COMPONENTS"/> 266 <value value="11" name="A7XX_PERF_VPC_STALL_CYCLES_VPCRAM_POS"/> 267 <value value="12" name="A7XX_PERF_VPC_LRZ_ASSIGN_PRIMITIVES"/> 268 <value value="13" name="A7XX_PERF_VPC_RB_VISIBLE_PRIMITIVES"/> 269 <value value="14" name="A7XX_PERF_VPC_LM_TRANSACTION"/> 270 <value value="15" name="A7XX_PERF_VPC_STREAMOUT_TRANSACTION"/> 271 <value value="16" name="A7XX_PERF_VPC_VS_BUSY_CYCLES"/> 272 <value value="17" name="A7XX_PERF_VPC_PS_BUSY_CYCLES"/> 273 <value value="18" name="A7XX_PERF_VPC_VS_WORKING_CYCLES"/> 274 <value value="19" name="A7XX_PERF_VPC_PS_WORKING_CYCLES"/> 275 <value value="20" name="A7XX_PERF_VPC_STARVE_CYCLES_RB"/> 276 <value value="21" name="A7XX_PERF_VPC_NUM_VPCRAM_READ_POS"/> 277 <value value="22" name="A7XX_PERF_VPC_WIT_FULL_CYCLES"/> 278 <value value="23" name="A7XX_PERF_VPC_VPCRAM_FULL_CYCLES"/> 279 <value value="24" name="A7XX_PERF_VPC_LM_FULL_WAIT_FOR_INTP_END"/> 280 <value value="25" name="A7XX_PERF_VPC_NUM_VPCRAM_WRITE"/> 281 <value value="26" name="A7XX_PERF_VPC_NUM_VPCRAM_READ_SO"/> 282 <value value="27" name="A7XX_PERF_VPC_NUM_ATTR_REQ_LM"/> 283 <value value="28" name="A7XX_PERF_VPC_STALL_CYCLE_TSE"/> 284 <value value="29" name="A7XX_PERF_VPC_TSE_PRIMITIVES"/> 285 <value value="30" name="A7XX_PERF_VPC_GS_PRIMITIVES"/> 286 <value value="31" name="A7XX_PERF_VPC_TSE_TRANSACTIONS"/> 287 <value value="32" name="A7XX_PERF_VPC_STALL_CYCLES_CCU"/> 288 <value value="33" name="A7XX_PERF_VPC_NUM_WM_HIT"/> 289 <value value="34" name="A7XX_PERF_VPC_STALL_DQ_WACK"/> 290 <value value="35" name="A7XX_PERF_VPC_STALL_CYCLES_CCHE"/> 291 <value value="36" name="A7XX_PERF_VPC_STARVE_CYCLES_CCHE"/> 292 <value value="37" name="A7XX_PERF_VPC_NUM_PA_REQ"/> 293 <value value="38" name="A7XX_PERF_VPC_NUM_LM_REQ_HIT"/> 294 <value value="39" name="A7XX_PERF_VPC_CCHE_REQBUF_FULL"/> 295 <value value="40" name="A7XX_PERF_VPC_STALL_CYCLES_LM_ACK"/> 296 <value value="41" name="A7XX_PERF_VPC_STALL_CYCLES_PRG_END_FE"/> 297 <value value="42" name="A7XX_PERF_VPC_STALL_CYCLES_PRG_END_PCVS"/> 298 <value value="43" name="A7XX_PERF_VPC_STALL_CYCLES_PRG_END_VPCPS"/> 299</enum> 300 301<enum name="a7xx_tse_perfcounter_select"> 302 <value value="0" name="A7XX_PERF_TSE_BUSY_CYCLES"/> 303 <value value="1" name="A7XX_PERF_TSE_CLIPPING_CYCLES"/> 304 <value value="2" name="A7XX_PERF_TSE_STALL_CYCLES_RAS"/> 305 <value value="3" name="A7XX_PERF_TSE_STALL_CYCLES_LRZ_BARYPLANE"/> 306 <value value="4" name="A7XX_PERF_TSE_STALL_CYCLES_LRZ_ZPLANE"/> 307 <value value="5" name="A7XX_PERF_TSE_STARVE_CYCLES_PC"/> 308 <value value="6" name="A7XX_PERF_TSE_INPUT_PRIM"/> 309 <value value="7" name="A7XX_PERF_TSE_INPUT_NULL_PRIM"/> 310 <value value="8" name="A7XX_PERF_TSE_TRIVAL_REJ_PRIM"/> 311 <value value="9" name="A7XX_PERF_TSE_CLIPPED_PRIM"/> 312 <value value="10" name="A7XX_PERF_TSE_ZERO_AREA_PRIM"/> 313 <value value="11" name="A7XX_PERF_TSE_FACENESS_CULLED_PRIM"/> 314 <value value="12" name="A7XX_PERF_TSE_ZERO_PIXEL_PRIM"/> 315 <value value="13" name="A7XX_PERF_TSE_OUTPUT_NULL_PRIM"/> 316 <value value="14" name="A7XX_PERF_TSE_OUTPUT_VISIBLE_PRIM"/> 317 <value value="15" name="A7XX_PERF_TSE_CINVOCATION"/> 318 <value value="16" name="A7XX_PERF_TSE_CPRIMITIVES"/> 319 <value value="17" name="A7XX_PERF_TSE_2D_INPUT_PRIM"/> 320 <value value="18" name="A7XX_PERF_TSE_2D_ALIVE_CYCLES"/> 321 <value value="19" name="A7XX_PERF_TSE_CLIP_PLANES"/> 322</enum> 323 324<enum name="a7xx_ras_perfcounter_select"> 325 <value value="0" name="A7XX_PERF_RAS_BUSY_CYCLES"/> 326 <value value="1" name="A7XX_PERF_RAS_SUPERTILE_ACTIVE_CYCLES"/> 327 <value value="2" name="A7XX_PERF_RAS_STALL_CYCLES_LRZ"/> 328 <value value="3" name="A7XX_PERF_RAS_STARVE_CYCLES_TSE"/> 329 <value value="4" name="A7XX_PERF_RAS_SUPER_TILES"/> 330 <value value="5" name="A7XX_PERF_RAS_8X4_TILES"/> 331 <value value="6" name="A7XX_PERF_RAS_MASKGEN_ACTIVE"/> 332 <value value="7" name="A7XX_PERF_RAS_FULLY_COVERED_SUPER_TILES"/> 333 <value value="8" name="A7XX_PERF_RAS_FULLY_COVERED_8X4_TILES"/> 334 <value value="9" name="A7XX_PERF_RAS_PRIM_KILLED_INVISILBE"/> 335 <value value="10" name="A7XX_PERF_RAS_SUPERTILE_GEN_ACTIVE_CYCLES"/> 336 <value value="11" name="A7XX_PERF_RAS_LRZ_INTF_WORKING_CYCLES"/> 337 <value value="12" name="A7XX_PERF_RAS_BLOCKS"/> 338 <value value="13" name="A7XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_0_WORKING_CC_l2"/> 339 <value value="14" name="A7XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_1_WORKING_CC_l2"/> 340 <value value="15" name="A7XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_2_WORKING_CC_l2"/> 341 <value value="16" name="A7XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_3_WORKING_CC_l2"/> 342 <value value="17" name="A7XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_4_WORKING_CC_l2"/> 343 <value value="18" name="A7XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_5_WORKING_CC_l2"/> 344 <value value="19" name="A7XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_6_WORKING_CC_l2"/> 345 <value value="20" name="A7XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_7_WORKING_CC_l2"/> 346 <value value="21" name="A7XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_8_WORKING_CC_l2"/> 347 <value value="22" name="A7XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_9_WORKING_CC_l2"/> 348 <value value="23" name="A7XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_10_WORKING_CC_l2"/> 349 <value value="24" name="A7XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_11_WORKING_CC_l2"/> 350 <value value="25" name="A7XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_12_WORKING_CC_l2"/> 351 <value value="26" name="A7XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_13_WORKING_CC_l2"/> 352 <value value="27" name="A7XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_14_WORKING_CC_l2"/> 353 <value value="28" name="A7XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_15_WORKING_CC_l2"/> 354 <value value="29" name="A7XX_PERF_RAS_FALSE_PARTIAL_STILE"/> 355 356</enum> 357 358<enum name="a7xx_uche_perfcounter_select"> 359 <value value="0" name="A7XX_PERF_UCHE_BUSY_CYCLES"/> 360 <value value="1" name="A7XX_PERF_UCHE_STALL_CYCLES_ARBITER"/> 361 <value value="2" name="A7XX_PERF_UCHE_VBIF_LATENCY_CYCLES"/> 362 <value value="3" name="A7XX_PERF_UCHE_VBIF_LATENCY_SAMPLES"/> 363 <value value="4" name="A7XX_PERF_UCHE_VBIF_READ_BEATS_TP"/> 364 <value value="5" name="A7XX_PERF_UCHE_VBIF_READ_BEATS_VFD"/> 365 <value value="6" name="A7XX_PERF_UCHE_VBIF_READ_BEATS_HLSQ"/> 366 <value value="7" name="A7XX_PERF_UCHE_VBIF_READ_BEATS_LRZ"/> 367 <value value="8" name="A7XX_PERF_UCHE_VBIF_READ_BEATS_SP"/> 368 <value value="9" name="A7XX_PERF_UCHE_READ_REQUESTS_TP"/> 369 <value value="10" name="A7XX_PERF_UCHE_READ_REQUESTS_VFD"/> 370 <value value="11" name="A7XX_PERF_UCHE_READ_REQUESTS_HLSQ"/> 371 <value value="12" name="A7XX_PERF_UCHE_READ_REQUESTS_LRZ"/> 372 <value value="13" name="A7XX_PERF_UCHE_READ_REQUESTS_SP"/> 373 <value value="14" name="A7XX_PERF_UCHE_WRITE_REQUESTS_LRZ"/> 374 <value value="15" name="A7XX_PERF_UCHE_WRITE_REQUESTS_SP"/> 375 <value value="16" name="A7XX_PERF_UCHE_WRITE_REQUESTS_VPC"/> 376 <value value="17" name="A7XX_PERF_UCHE_WRITE_REQUESTS_VSC"/> 377 <value value="18" name="A7XX_PERF_UCHE_EVICTS"/> 378 <value value="19" name="A7XX_PERF_UCHE_BANK_REQ0"/> 379 <value value="20" name="A7XX_PERF_UCHE_BANK_REQ1"/> 380 <value value="21" name="A7XX_PERF_UCHE_BANK_REQ2"/> 381 <value value="22" name="A7XX_PERF_UCHE_BANK_REQ3"/> 382 <value value="23" name="A7XX_PERF_UCHE_BANK_REQ4"/> 383 <value value="24" name="A7XX_PERF_UCHE_BANK_REQ5"/> 384 <value value="25" name="A7XX_PERF_UCHE_BANK_REQ6"/> 385 <value value="26" name="A7XX_PERF_UCHE_BANK_REQ7"/> 386 <value value="27" name="A7XX_PERF_UCHE_VBIF_READ_BEATS_CH0"/> 387 <value value="28" name="A7XX_PERF_UCHE_VBIF_READ_BEATS_CH1"/> 388 <value value="29" name="A7XX_PERF_UCHE_GMEM_READ_BEATS"/> 389 <value value="30" name="A7XX_PERF_UCHE_TPH_REF_FULL"/> 390 <value value="31" name="A7XX_PERF_UCHE_TPH_VICTIM_FULL"/> 391 <value value="32" name="A7XX_PERF_UCHE_TPH_EXT_FULL"/> 392 <value value="33" name="A7XX_PERF_UCHE_VBIF_STALL_WRITE_DATA"/> 393 <value value="34" name="A7XX_PERF_UCHE_DCMP_LATENCY_SAMPLES"/> 394 <value value="35" name="A7XX_PERF_UCHE_DCMP_LATENCY_CYCLES"/> 395 <value value="36" name="A7XX_PERF_UCHE_VBIF_READ_BEATS_PC"/> 396 <value value="37" name="A7XX_PERF_UCHE_READ_REQUESTS_PC"/> 397 <value value="38" name="A7XX_PERF_UCHE_RAM_READ_REQ"/> 398 <value value="39" name="A7XX_PERF_UCHE_RAM_WRITE_REQ"/> 399 <value value="40" name="A7XX_PERF_UCHE_STARVED_CYCLES_VBIF_DECMP"/> 400 <value value="41" name="A7XX_PERF_UCHE_STALL_CYCLES_DECMP"/> 401 <value value="42" name="A7XX_PERF_UCHE_ARBITER_STALL_CYCLES_VBIF"/> 402 <value value="43" name="A7XX_PERF_UCHE_READ_REQUESTS_TP_UBWC"/> 403 <value value="44" name="A7XX_PERF_UCHE_READ_REQUESTS_TP_NONUBWC"/> 404 <value value="45" name="A7XX_PERF_UCHE_READ_REQUESTS_TP_GMEM"/> 405 <value value="46" name="A7XX_PERF_UCHE_LONG_LINE_ALL_EVICTS_KAILUA"/> 406 <value value="47" name="A7XX_PERF_UCHE_LONG_LINE_PARTIAL_EVICTS_KAILUA"/> 407 <value value="48" name="A7XX_PERF_UCHE_TPH_CONFLICT_CL_CCHE"/> 408 <value value="49" name="A7XX_PERF_UCHE_TPH_CONFLICT_CL_OTHER_KAILUA"/> 409 <value value="50" name="A7XX_PERF_UCHE_DBANK_CONFLICT_CL_CCHE"/> 410 <value value="51" name="A7XX_PERF_UCHE_DBANK_CONFLICT_CL_OTHER_CLIENTS"/> 411 <value value="52" name="A7XX_PERF_UCHE_VBIF_WRITE_BEATS_CH0"/> 412 <value value="53" name="A7XX_PERF_UCHE_VBIF_WRITE_BEATS_CH1"/> 413 <value value="54" name="A7XX_PERF_UCHE_CCHE_TPH_QUEUE_FULL"/> 414 <value value="55" name="A7XX_PERF_UCHE_CCHE_DPH_QUEUE_FULL"/> 415 <value value="56" name="A7XX_PERF_UCHE_GMEM_WRITE_BEATS"/> 416 <value value="57" name="A7XX_PERF_UCHE_UBWC_READ_BEATS"/> 417 <value value="58" name="A7XX_PERF_UCHE_UBWC_WRITE_BEATS"/> 418</enum> 419 420<enum name="a7xx_tp_perfcounter_select"> 421 <value value="0" name="A7XX_PERF_TP_BUSY_CYCLES"/> 422 <value value="1" name="A7XX_PERF_TP_STALL_CYCLES_UCHE"/> 423 <value value="2" name="A7XX_PERF_TP_LATENCY_CYCLES"/> 424 <value value="3" name="A7XX_PERF_TP_LATENCY_TRANS"/> 425 <value value="4" name="A7XX_PERF_TP_FLAG_FIFO_DELAY_SAMPLES"/> 426 <value value="5" name="A7XX_PERF_TP_FLAG_FIFO_DELAY_CYCLES"/> 427 <value value="6" name="A7XX_PERF_TP_L1_CACHELINE_REQUESTS"/> 428 <value value="7" name="A7XX_PERF_TP_L1_CACHELINE_MISSES"/> 429 <value value="8" name="A7XX_PERF_TP_SP_TP_TRANS"/> 430 <value value="9" name="A7XX_PERF_TP_TP_SP_TRANS"/> 431 <value value="10" name="A7XX_PERF_TP_OUTPUT_PIXELS"/> 432 <value value="11" name="A7XX_PERF_TP_FILTER_WORKLOAD_16BIT"/> 433 <value value="12" name="A7XX_PERF_TP_FILTER_WORKLOAD_32BIT"/> 434 <value value="13" name="A7XX_PERF_TP_QUADS_RECEIVED"/> 435 <value value="14" name="A7XX_PERF_TP_QUADS_OFFSET"/> 436 <value value="15" name="A7XX_PERF_TP_QUADS_SHADOW"/> 437 <value value="16" name="A7XX_PERF_TP_QUADS_ARRAY"/> 438 <value value="17" name="A7XX_PERF_TP_QUADS_GRADIENT"/> 439 <value value="18" name="A7XX_PERF_TP_QUADS_1D"/> 440 <value value="19" name="A7XX_PERF_TP_QUADS_2D"/> 441 <value value="20" name="A7XX_PERF_TP_QUADS_BUFFER"/> 442 <value value="21" name="A7XX_PERF_TP_QUADS_3D"/> 443 <value value="22" name="A7XX_PERF_TP_QUADS_CUBE"/> 444 <value value="23" name="A7XX_PERF_TP_DIVERGENT_QUADS_RECEIVED"/> 445 <value value="24" name="A7XX_PERF_TP_PRT_NON_RESIDENT_EVENTS"/> 446 <value value="25" name="A7XX_PERF_TP_OUTPUT_PIXELS_POINT"/> 447 <value value="26" name="A7XX_PERF_TP_OUTPUT_PIXELS_BILINEAR"/> 448 <value value="27" name="A7XX_PERF_TP_OUTPUT_PIXELS_MIP"/> 449 <value value="28" name="A7XX_PERF_TP_OUTPUT_PIXELS_ANISO"/> 450 <value value="29" name="A7XX_PERF_TP_OUTPUT_PIXELS_ZERO_LOD"/> 451 <value value="30" name="A7XX_PERF_TP_FLAG_CACHE_REQUESTS"/> 452 <value value="31" name="A7XX_PERF_TP_FLAG_CACHE_MISSES"/> 453 <value value="32" name="A7XX_PERF_TP_L1_5_L2_REQUESTS"/> 454 <value value="33" name="A7XX_PERF_TP_2D_OUTPUT_PIXELS"/> 455 <value value="34" name="A7XX_PERF_TP_2D_OUTPUT_PIXELS_POINT"/> 456 <value value="35" name="A7XX_PERF_TP_2D_OUTPUT_PIXELS_BILINEAR"/> 457 <value value="36" name="A7XX_PERF_TP_2D_FILTER_WORKLOAD_16BIT"/> 458 <value value="37" name="A7XX_PERF_TP_2D_FILTER_WORKLOAD_32BIT"/> 459 <value value="38" name="A7XX_PERF_TP_TPA2TPC_TRANS"/> 460 <value value="39" name="A7XX_PERF_TP_L1_MISSES_ASTC_1TILE"/> 461 <value value="40" name="A7XX_PERF_TP_L1_MISSES_ASTC_2TILE"/> 462 <value value="41" name="A7XX_PERF_TP_L1_MISSES_ASTC_4TILE"/> 463 <value value="42" name="A7XX_PERF_TP_L1_5_COMPRESS_REQS"/> 464 <value value="43" name="A7XX_PERF_TP_L1_5_L2_COMPRESS_MISS"/> 465 <value value="44" name="A7XX_PERF_TP_L1_BANK_CONFLICT"/> 466 <value value="45" name="A7XX_PERF_TP_L1_5_MISS_LATENCY_CYCLES"/> 467 <value value="46" name="A7XX_PERF_TP_L1_5_MISS_LATENCY_TRANS"/> 468 <value value="47" name="A7XX_PERF_TP_QUADS_CONSTANT_MULTIPLIED"/> 469 <value value="48" name="A7XX_PERF_TP_FRONTEND_WORKING_CYCLES"/> 470 <value value="49" name="A7XX_PERF_TP_L1_TAG_WORKING_CYCLES"/> 471 <value value="50" name="A7XX_PERF_TP_L1_DATA_WRITE_WORKING_CYCLES"/> 472 <value value="51" name="A7XX_PERF_TP_PRE_L1_DECOM_WORKING_CYCLES"/> 473 <value value="52" name="A7XX_PERF_TP_BACKEND_WORKING_CYCLES"/> 474 <value value="53" name="A7XX_PERF_TP_L1_5_CACHE_WORKING_CYCLES"/> 475 <value value="54" name="A7XX_PERF_TP_STARVE_CYCLES_SP"/> 476 <value value="55" name="A7XX_PERF_TP_STARVE_CYCLES_UCHE"/> 477 <value value="56" name="A7XX_PERF_TP_STALL_CYCLES_UFC"/> 478 <value value="57" name="A7XX_PERF_TP_FORMAT_DECOMP"/> 479 <value value="58" name="A7XX_PERF_TP_FILTER_POINT_FP16"/> 480 <value value="59" name="A7XX_PERF_TP_FILTER_POINT_FP32"/> 481 <value value="60" name="A7XX_PERF_TP_LATENCY_FIFO_FULL"/> 482 <value value="61" name="A7XX_PERF_TP_RESERVED_61"/> 483 <value value="62" name="A7XX_PERF_TP_RESERVED_62"/> 484 <value value="63" name="A7XX_PERF_TP_RESERVED_63"/> 485 <value value="64" name="A7XX_PERF_TP_RESERVED_64"/> 486 <value value="65" name="A7XX_PERF_TP_RESERVED_65"/> 487 <value value="66" name="A7XX_PERF_TP_RESERVED_66"/> 488 <value value="67" name="A7XX_PERF_TP_RESERVED_67"/> 489 <value value="68" name="A7XX_PERF_TP_RESERVED_68"/> 490 <value value="69" name="A7XX_PERF_TP_RESERVED_69"/> 491 <value value="70" name="A7XX_PERF_TP_RESERVED_70"/> 492 <value value="71" name="A7XX_PERF_TP_RESERVED_71"/> 493 <value value="72" name="A7XX_PERF_TP_RESERVED_72"/> 494 <value value="73" name="A7XX_PERF_TP_RESERVED_73"/> 495 <value value="74" name="A7XX_PERF_TP_RESERVED_74"/> 496 <value value="75" name="A7XX_PERF_TP_RESERVED_75"/> 497 <value value="76" name="A7XX_PERF_TP_RESERVED_76"/> 498 <value value="77" name="A7XX_PERF_TP_RESERVED_77"/> 499 <value value="78" name="A7XX_PERF_TP_RESERVED_78"/> 500 <value value="79" name="A7XX_PERF_TP_RESERVED_79"/> 501 <value value="80" name="A7XX_PERF_TP_RESERVED_80"/> 502 <value value="81" name="A7XX_PERF_TP_RESERVED_81"/> 503 <value value="82" name="A7XX_PERF_TP_RESERVED_82"/> 504 <value value="83" name="A7XX_PERF_TP_RESERVED_83"/> 505 <value value="84" name="A7XX_PERF_TP_RESERVED_84"/> 506 <value value="85" name="A7XX_PERF_TP_RESERVED_85"/> 507 <value value="86" name="A7XX_PERF_TP_RESERVED_86"/> 508 <value value="87" name="A7XX_PERF_TP_RESERVED_87"/> 509 <value value="88" name="A7XX_PERF_TP_RESERVED_88"/> 510 <value value="89" name="A7XX_PERF_TP_RESERVED_89"/> 511 <value value="90" name="A7XX_PERF_TP_RESERVED_90"/> 512 <value value="91" name="A7XX_PERF_TP_RESERVED_91"/> 513 <value value="92" name="A7XX_PERF_TP_RESERVED_92"/> 514 <value value="93" name="A7XX_PERF_TP_RESERVED_93"/> 515 <value value="94" name="A7XX_PERF_TP_RESERVED_94"/> 516 <value value="95" name="A7XX_PERF_TP_RESERVED_95"/> 517 <value value="96" name="A7XX_PERF_TP_RESERVED_96"/> 518 <value value="97" name="A7XX_PERF_TP_RESERVED_97"/> 519 <value value="98" name="A7XX_PERF_TP_RESERVED_98"/> 520 <value value="99" name="A7XX_PERF_TP_RESERVED_99"/> 521 <value value="100" name="A7XX_PERF_TP_RESERVED_100"/> 522 <value value="101" name="A7XX_PERF_TP_RESERVED_101"/> 523 <value value="102" name="A7XX_PERF_TP_RESERVED_102"/> 524 <value value="103" name="A7XX_PERF_TP_RESERVED_103"/> 525 <value value="104" name="A7XX_PERF_TP_RESERVED_104"/> 526 <value value="105" name="A7XX_PERF_TP_RESERVED_105"/> 527 <value value="106" name="A7XX_PERF_TP_RESERVED_106"/> 528 <value value="107" name="A7XX_PERF_TP_RESERVED_107"/> 529 <value value="108" name="A7XX_PERF_TP_RESERVED_108"/> 530 <value value="109" name="A7XX_PERF_TP_RESERVED_109"/> 531 <value value="110" name="A7XX_PERF_TP_RESERVED_110"/> 532 <value value="111" name="A7XX_PERF_TP_RESERVED_111"/> 533 <value value="112" name="A7XX_PERF_TP_RESERVED_112"/> 534 <value value="113" name="A7XX_PERF_TP_RESERVED_113"/> 535 <value value="114" name="A7XX_PERF_TP_RESERVED_114"/> 536 <value value="115" name="A7XX_PERF_TP_RESERVED_115"/> 537 <value value="116" name="A7XX_PERF_TP_RESERVED_116"/> 538 <value value="117" name="A7XX_PERF_TP_RESERVED_117"/> 539 <value value="118" name="A7XX_PERF_TP_RESERVED_118"/> 540 <value value="119" name="A7XX_PERF_TP_RESERVED_119"/> 541 <value value="120" name="A7XX_PERF_TP_RESERVED_120"/> 542 <value value="121" name="A7XX_PERF_TP_RESERVED_121"/> 543 <value value="122" name="A7XX_PERF_TP_RESERVED_122"/> 544 <value value="123" name="A7XX_PERF_TP_RESERVED_123"/> 545 <value value="124" name="A7XX_PERF_TP_RESERVED_124"/> 546 <value value="125" name="A7XX_PERF_TP_RESERVED_125"/> 547 <value value="126" name="A7XX_PERF_TP_RESERVED_126"/> 548 <value value="127" name="A7XX_PERF_TP_RESERVED_127"/> 549 <value value="128" name="A7XX_PERF_TP_FORMAT_DECOMP_BILINEAR"/> 550 <value value="129" name="A7XX_PERF_TP_PACKED_POINT_BOTH_VALID_FP16"/> 551 <value value="130" name="A7XX_PERF_TP_PACKED_POINT_SINGLE_VALID_FP16"/> 552 <value value="131" name="A7XX_PERF_TP_PACKED_POINT_BOTH_VALID_FP32"/> 553 <value value="132" name="A7XX_PERF_TP_PACKED_POINT_SINGLE_VALID_FP32"/> 554</enum> 555 556<enum name="a7xx_sp_perfcounter_select"> 557 <value value="0" name="A7XX_PERF_SP_BUSY_CYCLES"/> 558 <value value="1" name="A7XX_PERF_SP_ALU_WORKING_CYCLES"/> 559 <value value="2" name="A7XX_PERF_SP_EFU_WORKING_CYCLES"/> 560 <value value="3" name="A7XX_PERF_SP_STALL_CYCLES_VPC"/> 561 <value value="4" name="A7XX_PERF_SP_STALL_CYCLES_TP"/> 562 <value value="5" name="A7XX_PERF_SP_STALL_CYCLES_UCHE"/> 563 <value value="6" name="A7XX_PERF_SP_STALL_CYCLES_RB"/> 564 <value value="7" name="A7XX_PERF_SP_NON_EXECUTION_CYCLES"/> 565 <value value="8" name="A7XX_PERF_SP_WAVE_CONTEXTS"/> 566 <value value="9" name="A7XX_PERF_SP_WAVE_CONTEXT_CYCLES"/> 567 <value value="10" name="A7XX_PERF_SP_STAGE_WAVE_CYCLES"/> 568 <value value="11" name="A7XX_PERF_SP_STAGE_WAVE_SAMPLES"/> 569 <value value="12" name="A7XX_PERF_SP_VS_STAGE_WAVE_CYCLES"/> 570 <value value="13" name="A7XX_PERF_SP_VS_STAGE_WAVE_SAMPLES"/> 571 <value value="14" name="A7XX_PERF_SP_FS_STAGE_DURATION_CYCLES"/> 572 <value value="15" name="A7XX_PERF_SP_VS_STAGE_DURATION_CYCLES"/> 573 <value value="16" name="A7XX_PERF_SP_WAVE_CTRL_CYCLES"/> 574 <value value="17" name="A7XX_PERF_SP_WAVE_LOAD_CYCLES"/> 575 <value value="18" name="A7XX_PERF_SP_WAVE_EMIT_CYCLES"/> 576 <value value="19" name="A7XX_PERF_SP_WAVE_NOP_CYCLES"/> 577 <value value="20" name="A7XX_PERF_SP_WAVE_WAIT_CYCLES"/> 578 <value value="21" name="A7XX_PERF_SP_WAVE_FETCH_CYCLES"/> 579 <value value="22" name="A7XX_PERF_SP_WAVE_IDLE_CYCLES"/> 580 <value value="23" name="A7XX_PERF_SP_WAVE_END_CYCLES"/> 581 <value value="24" name="A7XX_PERF_SP_WAVE_LONG_SYNC_CYCLES"/> 582 <value value="25" name="A7XX_PERF_SP_WAVE_SHORT_SYNC_CYCLES"/> 583 <value value="26" name="A7XX_PERF_SP_WAVE_JOIN_CYCLES"/> 584 <value value="27" name="A7XX_PERF_SP_LM_LOAD_INSTRUCTIONS"/> 585 <value value="28" name="A7XX_PERF_SP_LM_STORE_INSTRUCTIONS"/> 586 <value value="29" name="A7XX_PERF_SP_LM_ATOMICS"/> 587 <value value="30" name="A7XX_PERF_SP_GM_LOAD_INSTRUCTIONS"/> 588 <value value="31" name="A7XX_PERF_SP_GM_STORE_INSTRUCTIONS"/> 589 <value value="32" name="A7XX_PERF_SP_GM_ATOMICS"/> 590 <value value="33" name="A7XX_PERF_SP_VS_STAGE_TEX_INSTRUCTIONS"/> 591 <value value="34" name="A7XX_PERF_SP_VS_STAGE_EFU_INSTRUCTIONS"/> 592 <value value="35" name="A7XX_PERF_SP_VS_STAGE_FULL_ALU_INSTRUCTIONS"/> 593 <value value="36" name="A7XX_PERF_SP_VS_STAGE_HALF_ALU_INSTRUCTIONS"/> 594 <value value="37" name="A7XX_PERF_SP_FS_STAGE_TEX_INSTRUCTIONS"/> 595 <value value="38" name="A7XX_PERF_SP_FS_STAGE_CFLOW_INSTRUCTIONS"/> 596 <value value="39" name="A7XX_PERF_SP_FS_STAGE_EFU_INSTRUCTIONS"/> 597 <value value="40" name="A7XX_PERF_SP_FS_STAGE_FULL_ALU_INSTRUCTIONS"/> 598 <value value="41" name="A7XX_PERF_SP_FS_STAGE_HALF_ALU_INSTRUCTIONS"/> 599 <value value="42" name="A7XX_PERF_SP_FS_STAGE_BARY_INSTRUCTIONS"/> 600 <value value="43" name="A7XX_PERF_SP_VS_INSTRUCTIONS"/> 601 <value value="44" name="A7XX_PERF_SP_FS_INSTRUCTIONS"/> 602 <value value="45" name="A7XX_PERF_SP_ADDR_LOCK_COUNT"/> 603 <value value="46" name="A7XX_PERF_SP_UCHE_READ_TRANS"/> 604 <value value="47" name="A7XX_PERF_SP_UCHE_WRITE_TRANS"/> 605 <value value="48" name="A7XX_PERF_SP_EXPORT_VPC_TRANS"/> 606 <value value="49" name="A7XX_PERF_SP_EXPORT_RB_TRANS"/> 607 <value value="50" name="A7XX_PERF_SP_PIXELS_KILLED"/> 608 <value value="51" name="A7XX_PERF_SP_ICL1_REQUESTS"/> 609 <value value="52" name="A7XX_PERF_SP_ICL1_MISSES"/> 610 <value value="53" name="A7XX_PERF_SP_HS_INSTRUCTIONS"/> 611 <value value="54" name="A7XX_PERF_SP_DS_INSTRUCTIONS"/> 612 <value value="55" name="A7XX_PERF_SP_GS_INSTRUCTIONS"/> 613 <value value="56" name="A7XX_PERF_SP_CS_INSTRUCTIONS"/> 614 <value value="57" name="A7XX_PERF_SP_GPR_READ"/> 615 <value value="58" name="A7XX_PERF_SP_GPR_WRITE"/> 616 <value value="59" name="A7XX_PERF_SP_FS_STAGE_HALF_EFU_INSTRUCTIONS"/> 617 <value value="60" name="A7XX_PERF_SP_VS_STAGE_HALF_EFU_INSTRUCTIONS"/> 618 <value value="61" name="A7XX_PERF_SP_LM_BANK_CONFLICTS"/> 619 <value value="62" name="A7XX_PERF_SP_TEX_CONTROL_WORKING_CYCLES"/> 620 <value value="63" name="A7XX_PERF_SP_LOAD_CONTROL_WORKING_CYCLES"/> 621 <value value="64" name="A7XX_PERF_SP_FLOW_CONTROL_WORKING_CYCLES"/> 622 <value value="65" name="A7XX_PERF_SP_LM_WORKING_CYCLES"/> 623 <value value="66" name="A7XX_PERF_SP_DISPATCHER_WORKING_CYCLES"/> 624 <value value="67" name="A7XX_PERF_SP_SEQUENCER_WORKING_CYCLES"/> 625 <value value="68" name="A7XX_PERF_SP_LOW_EFFICIENCY_STARVED_BY_TP"/> 626 <value value="69" name="A7XX_PERF_SP_STARVE_CYCLES_HLSQ"/> 627 <value value="70" name="A7XX_PERF_SP_NON_EXECUTION_LS_CYCLES"/> 628 <value value="71" name="A7XX_PERF_SP_WORKING_EU"/> 629 <value value="72" name="A7XX_PERF_SP_ANY_EU_WORKING"/> 630 <value value="73" name="A7XX_PERF_SP_WORKING_EU_FS_STAGE"/> 631 <value value="74" name="A7XX_PERF_SP_ANY_EU_WORKING_FS_STAGE"/> 632 <value value="75" name="A7XX_PERF_SP_WORKING_EU_VS_STAGE"/> 633 <value value="76" name="A7XX_PERF_SP_ANY_EU_WORKING_VS_STAGE"/> 634 <value value="77" name="A7XX_PERF_SP_WORKING_EU_CS_STAGE"/> 635 <value value="78" name="A7XX_PERF_SP_ANY_EU_WORKING_CS_STAGE"/> 636 <value value="79" name="A7XX_PERF_SP_GPR_READ_PREFETCH"/> 637 <value value="80" name="A7XX_PERF_SP_GPR_READ_CONFLICT"/> 638 <value value="81" name="A7XX_PERF_SP_GPR_WRITE_CONFLICT"/> 639 <value value="82" name="A7XX_PERF_SP_GM_LOAD_LATENCY_CYCLES"/> 640 <value value="83" name="A7XX_PERF_SP_GM_LOAD_LATENCY_SAMPLES"/> 641 <value value="84" name="A7XX_PERF_SP_EXECUTABLE_WAVES"/> 642 <value value="85" name="A7XX_PERF_SP_ICL1_MISS_FETCH_CYCLES"/> 643 <value value="86" name="A7XX_PERF_SP_WORKING_EU_LPAC"/> 644 <value value="87" name="A7XX_PERF_SP_BYPASS_BUSY_CYCLES"/> 645 <value value="88" name="A7XX_PERF_SP_ANY_EU_WORKING_LPAC"/> 646 <value value="89" name="A7XX_PERF_SP_WAVE_ALU_CYCLES"/> 647 <value value="90" name="A7XX_PERF_SP_WAVE_EFU_CYCLES"/> 648 <value value="91" name="A7XX_PERF_SP_WAVE_INT_CYCLES"/> 649 <value value="92" name="A7XX_PERF_SP_WAVE_CSP_CYCLES"/> 650 <value value="93" name="A7XX_PERF_SP_EWAVE_CONTEXTS"/> 651 <value value="94" name="A7XX_PERF_SP_EWAVE_CONTEXT_CYCLES"/> 652 <value value="95" name="A7XX_PERF_SP_LPAC_BUSY_CYCLES"/> 653 <value value="96" name="A7XX_PERF_SP_LPAC_INSTRUCTIONS"/> 654 <value value="97" name="A7XX_PERF_SP_FS_STAGE_1X_WAVES"/> 655 <value value="98" name="A7XX_PERF_SP_FS_STAGE_2X_WAVES"/> 656 <value value="99" name="A7XX_PERF_SP_QUADS"/> 657 <value value="100" name="A7XX_PERF_SP_CS_INVOCATIONS"/> 658 <value value="101" name="A7XX_PERF_SP_PIXELS"/> 659 <value value="102" name="A7XX_PERF_SP_LPAC_DRAWCALLS"/> 660 <value value="103" name="A7XX_PERF_SP_PI_WORKING_CYCLES"/> 661 <value value="104" name="A7XX_PERF_SP_WAVE_INPUT_CYCLES"/> 662 <value value="105" name="A7XX_PERF_SP_WAVE_OUTPUT_CYCLES"/> 663 <value value="106" name="A7XX_PERF_SP_WAVE_HWAVE_WAIT_CYCLES"/> 664 <value value="107" name="A7XX_PERF_SP_WAVE_HWAVE_SYNC"/> 665 <value value="108" name="A7XX_PERF_SP_OUTPUT_3D_PIXELS"/> 666 <value value="109" name="A7XX_PERF_SP_FULL_ALU_MAD_INSTRUCTIONS"/> 667 <value value="110" name="A7XX_PERF_SP_HALF_ALU_MAD_INSTRUCTIONS"/> 668 <value value="111" name="A7XX_PERF_SP_FULL_ALU_MUL_INSTRUCTIONS"/> 669 <value value="112" name="A7XX_PERF_SP_HALF_ALU_MUL_INSTRUCTIONS"/> 670 <value value="113" name="A7XX_PERF_SP_FULL_ALU_ADD_INSTRUCTIONS"/> 671 <value value="114" name="A7XX_PERF_SP_HALF_ALU_ADD_INSTRUCTIONS"/> 672 <value value="115" name="A7XX_PERF_SP_BARY_FP32_INSTRUCTIONS"/> 673 <value value="116" name="A7XX_PERF_SP_ALU_GPR_READ_CYCLES"/> 674 <value value="117" name="A7XX_PERF_SP_ALU_DATA_FORWARDING_CYCLES"/> 675 <value value="118" name="A7XX_PERF_SP_LM_FULL_CYCLES"/> 676 <value value="119" name="A7XX_PERF_SP_TEXTURE_FETCH_LATENCY_CYCLES"/> 677 <value value="120" name="A7XX_PERF_SP_TEXTURE_FETCH_LATENCY_SAMPLES"/> 678 <value value="121" name="A7XX_PERF_SP_FS_STAGE_PI_TEX_INSTRUCTION"/> 679 <value value="122" name="A7XX_PERF_SP_RAY_QUERY_INSTRUCTIONS"/> 680 <value value="123" name="A7XX_PERF_SP_RBRT_KICKOFF_FIBERS"/> 681 <value value="124" name="A7XX_PERF_SP_RBRT_KICKOFF_DQUADS"/> 682 <value value="125" name="A7XX_PERF_SP_RTU_BUSY_CYCLES"/> 683 <value value="126" name="A7XX_PERF_SP_RTU_L0_HITS"/> 684 <value value="127" name="A7XX_PERF_SP_RTU_L0_MISSES"/> 685 <value value="128" name="A7XX_PERF_SP_RTU_L0_HIT_ON_MISS"/> 686 <value value="129" name="A7XX_PERF_SP_RTU_STALL_CYCLES_WAVE_QUEUE"/> 687 <value value="130" name="A7XX_PERF_SP_RTU_STALL_CYCLES_L0_HIT_QUEUE"/> 688 <value value="131" name="A7XX_PERF_SP_RTU_STALL_CYCLES_L0_MISS_QUEUE"/> 689 <value value="132" name="A7XX_PERF_SP_RTU_STALL_CYCLES_L0D_IDX_QUEUE"/> 690 <value value="133" name="A7XX_PERF_SP_RTU_STALL_CYCLES_L0DATA"/> 691 <value value="134" name="A7XX_PERF_SP_RTU_STALL_CYCLES_REPLACE_CNT"/> 692 <value value="135" name="A7XX_PERF_SP_RTU_STALL_CYCLES_MRG_CNT"/> 693 <value value="136" name="A7XX_PERF_SP_RTU_STALL_CYCLES_UCHE"/> 694 <value value="137" name="A7XX_PERF_SP_RTU_OPERAND_FETCH_STALL_CYCLES_L0"/> 695 <value value="138" name="A7XX_PERF_SP_RTU_OPERAND_FETCH_STALL_CYCLES_INS_FIFO"/> 696 <value value="139" name="A7XX_PERF_SP_RTU_BVH_FETCH_LATENCY_CYCLES"/> 697 <value value="140" name="A7XX_PERF_SP_RTU_BVH_FETCH_LATENCY_SAMPLES"/> 698 <value value="141" name="A7XX_PERF_SP_STCHE_MISS_INC_VS"/> 699 <value value="142" name="A7XX_PERF_SP_STCHE_MISS_INC_FS"/> 700 <value value="143" name="A7XX_PERF_SP_STCHE_MISS_INC_BV"/> 701 <value value="144" name="A7XX_PERF_SP_STCHE_MISS_INC_LPAC"/> 702 <value value="145" name="A7XX_PERF_SP_VGPR_ACTIVE_CONTEXTS"/> 703 <value value="146" name="A7XX_PERF_SP_PGPR_ALLOC_CONTEXTS"/> 704 <value value="147" name="A7XX_PERF_SP_VGPR_ALLOC_CONTEXTS"/> 705 <value value="148" name="A7XX_PERF_SP_RTU_RAY_BOX_INTERSECTIONS"/> 706 <value value="149" name="A7XX_PERF_SP_RTU_RAY_TRIANGLE_INTERSECTIONS"/> 707 <value value="150" name="A7XX_PERF_SP_SCH_STALL_CYCLES_RTU"/> 708</enum> 709 710<enum name="a7xx_rb_perfcounter_select"> 711 <value value="0" name="A7XX_PERF_RB_BUSY_CYCLES"/> 712 <value value="1" name="A7XX_PERF_RB_STALL_CYCLES_HLSQ"/> 713 <value value="2" name="A7XX_PERF_RB_STALL_CYCLES_FIFO0_FULL"/> 714 <value value="3" name="A7XX_PERF_RB_STALL_CYCLES_FIFO1_FULL"/> 715 <value value="4" name="A7XX_PERF_RB_STALL_CYCLES_FIFO2_FULL"/> 716 <value value="5" name="A7XX_PERF_RB_STARVE_CYCLES_SP"/> 717 <value value="6" name="A7XX_PERF_RB_STARVE_CYCLES_LRZ_TILE"/> 718 <value value="7" name="A7XX_PERF_RB_STARVE_CYCLES_CCU"/> 719 <value value="8" name="A7XX_PERF_RB_STARVE_CYCLES_Z_PLANE"/> 720 <value value="9" name="A7XX_PERF_RB_STARVE_CYCLES_BARY_PLANE"/> 721 <value value="10" name="A7XX_PERF_RB_Z_WORKLOAD"/> 722 <value value="11" name="A7XX_PERF_RB_HLSQ_ACTIVE"/> 723 <value value="12" name="A7XX_PERF_RB_Z_READ"/> 724 <value value="13" name="A7XX_PERF_RB_Z_WRITE"/> 725 <value value="14" name="A7XX_PERF_RB_C_READ"/> 726 <value value="15" name="A7XX_PERF_RB_C_WRITE"/> 727 <value value="16" name="A7XX_PERF_RB_TOTAL_PASS"/> 728 <value value="17" name="A7XX_PERF_RB_Z_PASS"/> 729 <value value="18" name="A7XX_PERF_RB_Z_FAIL"/> 730 <value value="19" name="A7XX_PERF_RB_S_FAIL"/> 731 <value value="20" name="A7XX_PERF_RB_BLENDED_FXP_COMPONENTS"/> 732 <value value="21" name="A7XX_PERF_RB_BLENDED_FP16_COMPONENTS"/> 733 <value value="22" name="A7XX_PERF_RB_PS_INVOCATIONS"/> 734 <value value="23" name="A7XX_PERF_RB_2D_ALIVE_CYCLES"/> 735 <value value="24" name="A7XX_PERF_RB_2D_STALL_CYCLES_A2D"/> 736 <value value="25" name="A7XX_PERF_RB_2D_STARVE_CYCLES_SRC"/> 737 <value value="26" name="A7XX_PERF_RB_2D_STARVE_CYCLES_SP"/> 738 <value value="27" name="A7XX_PERF_RB_2D_STARVE_CYCLES_DST"/> 739 <value value="28" name="A7XX_PERF_RB_2D_VALID_PIXELS"/> 740 <value value="29" name="A7XX_PERF_RB_3D_PIXELS"/> 741 <value value="30" name="A7XX_PERF_RB_BLENDER_WORKING_CYCLES"/> 742 <value value="31" name="A7XX_PERF_RB_ZPROC_WORKING_CYCLES"/> 743 <value value="32" name="A7XX_PERF_RB_CPROC_WORKING_CYCLES"/> 744 <value value="33" name="A7XX_PERF_RB_SAMPLER_WORKING_CYCLES"/> 745 <value value="34" name="A7XX_PERF_RB_STALL_CYCLES_CCU_COLOR_READ"/> 746 <value value="35" name="A7XX_PERF_RB_STALL_CYCLES_CCU_COLOR_WRITE"/> 747 <value value="36" name="A7XX_PERF_RB_STALL_CYCLES_CCU_DEPTH_READ"/> 748 <value value="37" name="A7XX_PERF_RB_STALL_CYCLES_CCU_DEPTH_WRITE"/> 749 <value value="38" name="A7XX_PERF_RB_STALL_CYCLES_VPC"/> 750 <value value="39" name="A7XX_PERF_RB_2D_INPUT_TRANS"/> 751 <value value="40" name="A7XX_PERF_RB_2D_OUTPUT_RB_DST_TRANS"/> 752 <value value="41" name="A7XX_PERF_RB_2D_OUTPUT_RB_SRC_TRANS"/> 753 <value value="42" name="A7XX_PERF_RB_BLENDED_FP32_COMPONENTS"/> 754 <value value="43" name="A7XX_PERF_RB_COLOR_PIX_TILES"/> 755 <value value="44" name="A7XX_PERF_RB_STALL_CYCLES_CCU"/> 756 <value value="45" name="A7XX_PERF_RB_EARLY_Z_ARB3_GRANT"/> 757 <value value="46" name="A7XX_PERF_RB_LATE_Z_ARB3_GRANT"/> 758 <value value="47" name="A7XX_PERF_RB_EARLY_Z_SKIP_GRANT"/> 759 <value value="48" name="A7XX_PERF_RB_VRS_1x1_QUADS"/> 760 <value value="49" name="A7XX_PERF_RB_VRS_2x1_QUADS"/> 761 <value value="50" name="A7XX_PERF_RB_VRS_1x2_QUADS"/> 762 <value value="51" name="A7XX_PERF_RB_VRS_2x2_QUADS"/> 763 <value value="52" name="A7XX_PERF_RB_VRS_4x2_QUADS"/> 764 <value value="53" name="A7XX_PERF_RB_VRS_4x4_QUADS"/> 765</enum> 766 767<enum name="a7xx_vsc_perfcounter_select"> 768 <value value="0" name="A7XX_PERF_VSC_BUSY_CYCLES"/> 769 <value value="1" name="A7XX_PERF_VSC_WORKING_CYCLES"/> 770 <value value="2" name="A7XX_PERF_VSC_STALL_CYCLES_UCHE"/> 771 <value value="3" name="A7XX_PERF_VSC_EOT_NUM"/> 772 <value value="4" name="A7XX_PERF_VSC_INPUT_TILES"/> 773</enum> 774 775<enum name="a7xx_ccu_perfcounter_select"> 776 <value value="0" name="A7XX_PERF_CCU_BUSY_CYCLES"/> 777 <value value="1" name="A7XX_PERF_CCU_STALL_CYCLES_RB_DEPTH_RETURN"/> 778 <value value="2" name="A7XX_PERF_CCU_STALL_CYCLES_RB_COLOR_RETURN"/> 779 <value value="3" name="A7XX_PERF_CCU_DEPTH_BLOCKS"/> 780 <value value="4" name="A7XX_PERF_CCU_COLOR_BLOCKS"/> 781 <value value="5" name="A7XX_PERF_CCU_DEPTH_BLOCK_HIT"/> 782 <value value="6" name="A7XX_PERF_CCU_COLOR_BLOCK_HIT"/> 783 <value value="7" name="A7XX_PERF_CCU_PARTIAL_BLOCK_READ"/> 784 <value value="8" name="A7XX_PERF_CCU_GMEM_READ"/> 785 <value value="9" name="A7XX_PERF_CCU_GMEM_WRITE"/> 786 <value value="10" name="A7XX_PERF_CCU_2D_RD_REQ"/> 787 <value value="11" name="A7XX_PERF_CCU_2D_WR_REQ"/> 788 <value value="12" name="A7XX_PERF_CCU_UBWC_COLOR_BLOCKS_CONCURRENT"/> 789 <value value="13" name="A7XX_PERF_CCU_UBWC_DEPTH_BLOCKS_CONCURRENT"/> 790 <value value="14" name="A7XX_PERF_CCU_COLOR_RESOLVE_DROPPED"/> 791 <value value="15" name="A7XX_PERF_CCU_DEPTH_RESOLVE_DROPPED"/> 792 <value value="16" name="A7XX_PERF_CCU_COLOR_RENDER_CONCURRENT"/> 793 <value value="17" name="A7XX_PERF_CCU_DEPTH_RENDER_CONCURRENT"/> 794 <value value="18" name="A7XX_PERF_CCU_COLOR_RESOLVE_AFTER_RENDER"/> 795 <value value="19" name="A7XX_PERF_CCU_DEPTH_RESOLVE_AFTER_RENDER"/> 796 <value value="20" name="A7XX_PERF_CCU_GMEM_EXTRA_DEPTH_READ"/> 797 <value value="21" name="A7XX_PERF_CCU_GMEM_COLOR_READ_4AA"/> 798 <value value="22" name="A7XX_PERF_CCU_GMEM_COLOR_READ_4AA_FULL"/> 799</enum> 800 801<enum name="a7xx_lrz_perfcounter_select"> 802 <value value="0" name="A7XX_PERF_LRZ_BUSY_CYCLES"/> 803 <value value="1" name="A7XX_PERF_LRZ_STARVE_CYCLES_RAS"/> 804 <value value="2" name="A7XX_PERF_LRZ_STALL_CYCLES_RB"/> 805 <value value="3" name="A7XX_PERF_LRZ_STALL_CYCLES_VSC"/> 806 <value value="4" name="A7XX_PERF_LRZ_STALL_CYCLES_VPC"/> 807 <value value="5" name="A7XX_PERF_LRZ_STALL_CYCLES_FLAG_PREFETCH"/> 808 <value value="6" name="A7XX_PERF_LRZ_STALL_CYCLES_UCHE"/> 809 <value value="7" name="A7XX_PERF_LRZ_LRZ_READ"/> 810 <value value="8" name="A7XX_PERF_LRZ_LRZ_WRITE"/> 811 <value value="9" name="A7XX_PERF_LRZ_READ_LATENCY"/> 812 <value value="10" name="A7XX_PERF_LRZ_MERGE_CACHE_UPDATING"/> 813 <value value="11" name="A7XX_PERF_LRZ_PRIM_KILLED_BY_MASKGEN"/> 814 <value value="12" name="A7XX_PERF_LRZ_PRIM_KILLED_BY_LRZ"/> 815 <value value="13" name="A7XX_PERF_LRZ_VISIBLE_PRIM_AFTER_LRZ"/> 816 <value value="14" name="A7XX_PERF_LRZ_FULL_8X8_TILES"/> 817 <value value="15" name="A7XX_PERF_LRZ_PARTIAL_8X8_TILES"/> 818 <value value="16" name="A7XX_PERF_LRZ_TILE_KILLED"/> 819 <value value="17" name="A7XX_PERF_LRZ_TOTAL_PIXEL"/> 820 <value value="18" name="A7XX_PERF_LRZ_VISIBLE_PIXEL_AFTER_LRZ"/> 821 <value value="19" name="A7XX_PERF_LRZ_FEEDBACK_ACCEPT"/> 822 <value value="20" name="A7XX_PERF_LRZ_FEEDBACK_DISCARD"/> 823 <value value="21" name="A7XX_PERF_LRZ_FEEDBACK_STALL"/> 824 <value value="22" name="A7XX_PERF_LRZ_STALL_CYCLES_RB_ZPLANE"/> 825 <value value="23" name="A7XX_PERF_LRZ_STALL_CYCLES_RB_BPLANE"/> 826 <value value="24" name="A7XX_PERF_LRZ_RAS_MASK_TRANS"/> 827 <value value="25" name="A7XX_PERF_LRZ_STALL_CYCLES_MVC"/> 828 <value value="26" name="A7XX_PERF_LRZ_TILE_KILLED_BY_IMAGE_VRS"/> 829 <value value="27" name="A7XX_PERF_LRZ_TILE_KILLED_BY_Z"/> 830</enum> 831 832<enum name="a7xx_cmp_perfcounter_select"> 833 <value value="0" name="A7XX_PERF_CMPDECMP_STALL_CYCLES_ARB"/> 834 <value value="1" name="A7XX_PERF_CMPDECMP_VBIF_LATENCY_CYCLES"/> 835 <value value="2" name="A7XX_PERF_CMPDECMP_VBIF_LATENCY_SAMPLES"/> 836 <value value="3" name="A7XX_PERF_CMPDECMP_VBIF_READ_DATA_CCU"/> 837 <value value="4" name="A7XX_PERF_CMPDECMP_VBIF_WRITE_DATA_CCU"/> 838 <value value="5" name="A7XX_PERF_CMPDECMP_VBIF_READ_REQUEST"/> 839 <value value="6" name="A7XX_PERF_CMPDECMP_VBIF_WRITE_REQUEST"/> 840 <value value="7" name="A7XX_PERF_CMPDECMP_VBIF_READ_DATA"/> 841 <value value="8" name="A7XX_PERF_CMPDECMP_VBIF_WRITE_DATA"/> 842 <value value="9" name="A7XX_PERF_CMPDECMP_DEPTH_WRITE_FLAG1_COUNT"/> 843 <value value="10" name="A7XX_PERF_CMPDECMP_DEPTH_WRITE_FLAG2_COUNT"/> 844 <value value="11" name="A7XX_PERF_CMPDECMP_DEPTH_WRITE_FLAG3_COUNT"/> 845 <value value="12" name="A7XX_PERF_CMPDECMP_DEPTH_WRITE_FLAG4_COUNT"/> 846 <value value="13" name="A7XX_PERF_CMPDECMP_DEPTH_WRITE_FLAG5_COUNT"/> 847 <value value="14" name="A7XX_PERF_CMPDECMP_DEPTH_WRITE_FLAG6_COUNT"/> 848 <value value="15" name="A7XX_PERF_CMPDECMP_DEPTH_WRITE_FLAG8_COUNT"/> 849 <value value="16" name="A7XX_PERF_CMPDECMP_COLOR_WRITE_FLAG1_COUNT"/> 850 <value value="17" name="A7XX_PERF_CMPDECMP_COLOR_WRITE_FLAG2_COUNT"/> 851 <value value="18" name="A7XX_PERF_CMPDECMP_COLOR_WRITE_FLAG3_COUNT"/> 852 <value value="19" name="A7XX_PERF_CMPDECMP_COLOR_WRITE_FLAG4_COUNT"/> 853 <value value="20" name="A7XX_PERF_CMPDECMP_COLOR_WRITE_FLAG5_COUNT"/> 854 <value value="21" name="A7XX_PERF_CMPDECMP_COLOR_WRITE_FLAG6_COUNT"/> 855 <value value="22" name="A7XX_PERF_CMPDECMP_COLOR_WRITE_FLAG8_COUNT"/> 856 <value value="23" name="A7XX_PERF_CMPDECMP_VBIF_READ_DATA_UCHE_CH0"/> 857 <value value="24" name="A7XX_PERF_CMPDECMP_VBIF_READ_DATA_UCHE_CH1"/> 858 <value value="25" name="A7XX_PERF_CMPDECMP_VBIF_WRITE_DATA_UCHE"/> 859 <value value="26" name="A7XX_PERF_CMPDECMP_DEPTH_WRITE_FLAG0_COUNT"/> 860 <value value="27" name="A7XX_PERF_CMPDECMP_COLOR_WRITE_FLAG0_COUNT"/> 861 <value value="28" name="A7XX_PERF_CMPDECMP_COLOR_WRITE_FLAGALPHA_COUNT"/> 862 <value value="29" name="A7XX_PERF_CMPDECMP_RESOLVE_EVENTS"/> 863 <value value="30" name="A7XX_PERF_CMPDECMP_CONCURRENT_RESOLVE_EVENTS"/> 864 <value value="31" name="A7XX_PERF_CMPDECMP_DROPPED_CLEAR_EVENTS"/> 865 <value value="32" name="A7XX_PERF_CMPDECMP_ST_BLOCKS_CONCURRENT"/> 866 <value value="33" name="A7XX_PERF_CMPDECMP_LRZ_ST_BLOCKS_CONCURRENT"/> 867 <value value="34" name="A7XX_PERF_CMPDECMP_DEPTH_READ_FLAG0_COUNT"/> 868 <value value="35" name="A7XX_PERF_CMPDECMP_DEPTH_READ_FLAG1_COUNT"/> 869 <value value="36" name="A7XX_PERF_CMPDECMP_DEPTH_READ_FLAG2_COUNT"/> 870 <value value="37" name="A7XX_PERF_CMPDECMP_DEPTH_READ_FLAG3_COUNT"/> 871 <value value="38" name="A7XX_PERF_CMPDECMP_DEPTH_READ_FLAG4_COUNT"/> 872 <value value="39" name="A7XX_PERF_CMPDECMP_DEPTH_READ_FLAG5_COUNT"/> 873 <value value="40" name="A7XX_PERF_CMPDECMP_DEPTH_READ_FLAG6_COUNT"/> 874 <value value="41" name="A7XX_PERF_CMPDECMP_DEPTH_READ_FLAG8_COUNT"/> 875 <value value="42" name="A7XX_PERF_CMPDECMP_COLOR_READ_FLAG0_COUNT"/> 876 <value value="43" name="A7XX_PERF_CMPDECMP_COLOR_READ_FLAG1_COUNT"/> 877 <value value="44" name="A7XX_PERF_CMPDECMP_COLOR_READ_FLAG2_COUNT"/> 878 <value value="45" name="A7XX_PERF_CMPDECMP_COLOR_READ_FLAG3_COUNT"/> 879 <value value="46" name="A7XX_PERF_CMPDECMP_COLOR_READ_FLAG4_COUNT"/> 880 <value value="47" name="A7XX_PERF_CMPDECMP_COLOR_READ_FLAG5_COUNT"/> 881 <value value="48" name="A7XX_PERF_CMPDECMP_COLOR_READ_FLAG6_COUNT"/> 882 <value value="49" name="A7XX_PERF_CMPDECMP_COLOR_READ_FLAG8_COUNT"/> 883</enum> 884 885<enum name="a7xx_gbif_perfcounter_select"> 886 <value value="0" name="A7XX_PERF_GBIF_RESERVED_0"/> 887 <value value="1" name="A7XX_PERF_GBIF_RESERVED_1"/> 888 <value value="2" name="A7XX_PERF_GBIF_RESERVED_2"/> 889 <value value="3" name="A7XX_PERF_GBIF_RESERVED_3"/> 890 <value value="4" name="A7XX_PERF_GBIF_RESERVED_4"/> 891 <value value="5" name="A7XX_PERF_GBIF_RESERVED_5"/> 892 <value value="6" name="A7XX_PERF_GBIF_RESERVED_6"/> 893 <value value="7" name="A7XX_PERF_GBIF_RESERVED_7"/> 894 <value value="8" name="A7XX_PERF_GBIF_RESERVED_8"/> 895 <value value="9" name="A7XX_PERF_GBIF_RESERVED_9"/> 896 <value value="10" name="A7XX_PERF_GBIF_AXI0_READ_REQUESTS_TOTAL"/> 897 <value value="11" name="A7XX_PERF_GBIF_AXI1_READ_REQUESTS_TOTAL"/> 898 <value value="12" name="A7XX_PERF_GBIF_RESERVED_12"/> 899 <value value="13" name="A7XX_PERF_GBIF_RESERVED_13"/> 900 <value value="14" name="A7XX_PERF_GBIF_RESERVED_14"/> 901 <value value="15" name="A7XX_PERF_GBIF_RESERVED_15"/> 902 <value value="16" name="A7XX_PERF_GBIF_RESERVED_16"/> 903 <value value="17" name="A7XX_PERF_GBIF_RESERVED_17"/> 904 <value value="18" name="A7XX_PERF_GBIF_RESERVED_18"/> 905 <value value="19" name="A7XX_PERF_GBIF_RESERVED_19"/> 906 <value value="20" name="A7XX_PERF_GBIF_RESERVED_20"/> 907 <value value="21" name="A7XX_PERF_GBIF_RESERVED_21"/> 908 <value value="22" name="A7XX_PERF_GBIF_AXI0_WRITE_REQUESTS_TOTAL"/> 909 <value value="23" name="A7XX_PERF_GBIF_AXI1_WRITE_REQUESTS_TOTAL"/> 910 <value value="24" name="A7XX_PERF_GBIF_RESERVED_24"/> 911 <value value="25" name="A7XX_PERF_GBIF_RESERVED_25"/> 912 <value value="26" name="A7XX_PERF_GBIF_RESERVED_26"/> 913 <value value="27" name="A7XX_PERF_GBIF_RESERVED_27"/> 914 <value value="28" name="A7XX_PERF_GBIF_RESERVED_28"/> 915 <value value="29" name="A7XX_PERF_GBIF_RESERVED_29"/> 916 <value value="30" name="A7XX_PERF_GBIF_RESERVED_30"/> 917 <value value="31" name="A7XX_PERF_GBIF_RESERVED_31"/> 918 <value value="32" name="A7XX_PERF_GBIF_RESERVED_32"/> 919 <value value="33" name="A7XX_PERF_GBIF_RESERVED_33"/> 920 <value value="34" name="A7XX_PERF_GBIF_AXI0_READ_DATA_BEATS_TOTAL"/> 921 <value value="35" name="A7XX_PERF_GBIF_AXI1_READ_DATA_BEATS_TOTAL"/> 922 <value value="36" name="A7XX_PERF_GBIF_RESERVED_36"/> 923 <value value="37" name="A7XX_PERF_GBIF_RESERVED_37"/> 924 <value value="38" name="A7XX_PERF_GBIF_RESERVED_38"/> 925 <value value="39" name="A7XX_PERF_GBIF_RESERVED_39"/> 926 <value value="40" name="A7XX_PERF_GBIF_RESERVED_40"/> 927 <value value="41" name="A7XX_PERF_GBIF_RESERVED_41"/> 928 <value value="42" name="A7XX_PERF_GBIF_RESERVED_42"/> 929 <value value="43" name="A7XX_PERF_GBIF_RESERVED_43"/> 930 <value value="44" name="A7XX_PERF_GBIF_RESERVED_44"/> 931 <value value="45" name="A7XX_PERF_GBIF_RESERVED_45"/> 932 <value value="46" name="A7XX_PERF_GBIF_AXI0_WRITE_DATA_BEATS_TOTAL"/> 933 <value value="47" name="A7XX_PERF_GBIF_AXI1_WRITE_DATA_BEATS_TOTAL"/> 934 <value value="48" name="A7XX_PERF_GBIF_RESERVED_48"/> 935 <value value="49" name="A7XX_PERF_GBIF_RESERVED_49"/> 936 <value value="50" name="A7XX_PERF_GBIF_RESERVED_50"/> 937 <value value="51" name="A7XX_PERF_GBIF_RESERVED_51"/> 938 <value value="52" name="A7XX_PERF_GBIF_RESERVED_52"/> 939 <value value="53" name="A7XX_PERF_GBIF_RESERVED_53"/> 940 <value value="54" name="A7XX_PERF_GBIF_RESERVED_54"/> 941 <value value="55" name="A7XX_PERF_GBIF_RESERVED_55"/> 942 <value value="56" name="A7XX_PERF_GBIF_RESERVED_56"/> 943 <value value="57" name="A7XX_PERF_GBIF_RESERVED_57"/> 944 <value value="58" name="A7XX_PERF_GBIF_RESERVED_58"/> 945 <value value="59" name="A7XX_PERF_GBIF_RESERVED_59"/> 946 <value value="60" name="A7XX_PERF_GBIF_RESERVED_60"/> 947 <value value="61" name="A7XX_PERF_GBIF_RESERVED_61"/> 948 <value value="62" name="A7XX_PERF_GBIF_RESERVED_62"/> 949 <value value="63" name="A7XX_PERF_GBIF_RESERVED_63"/> 950 <value value="64" name="A7XX_PERF_GBIF_RESERVED_64"/> 951 <value value="65" name="A7XX_PERF_GBIF_RESERVED_65"/> 952 <value value="66" name="A7XX_PERF_GBIF_RESERVED_66"/> 953 <value value="67" name="A7XX_PERF_GBIF_RESERVED_67"/> 954 <value value="68" name="A7XX_PERF_GBIF_CYCLES_CH0_HELD_OFF_RD_ALL"/> 955 <value value="69" name="A7XX_PERF_GBIF_CYCLES_CH1_HELD_OFF_RD_ALL"/> 956 <value value="70" name="A7XX_PERF_GBIF_CYCLES_CH0_HELD_OFF_WR_ALL"/> 957 <value value="71" name="A7XX_PERF_GBIF_CYCLES_CH1_HELD_OFF_WR_ALL"/> 958 <value value="72" name="A7XX_PERF_GBIF_AXI_CH0_REQUEST_HELD_OFF"/> 959 <value value="73" name="A7XX_PERF_GBIF_AXI_CH1_REQUEST_HELD_OFF"/> 960 <value value="74" name="A7XX_PERF_GBIF_AXI_REQUEST_HELD_OFF"/> 961 <value value="75" name="A7XX_PERF_GBIF_AXI_CH0_WRITE_DATA_HELD_OFF"/> 962 <value value="76" name="A7XX_PERF_GBIF_AXI_CH1_WRITE_DATA_HELD_OFF"/> 963 <value value="77" name="A7XX_PERF_GBIF_AXI_ALL_WRITE_DATA_HELD_OFF"/> 964 <value value="78" name="A7XX_PERF_GBIF_AXI_ALL_READ_BEATS"/> 965 <value value="79" name="A7XX_PERF_GBIF_AXI_ALL_WRITE_BEATS"/> 966 <value value="80" name="A7XX_PERF_GBIF_AXI_ALL_BEATS"/> 967</enum> 968 969<enum name="a7xx_ufc_perfcounter_select"> 970 <value value="0" name="A7XX_PERF_UFC_BUSY_CYCLES"/> 971 <value value="1" name="A7XX_PERF_UFC_READ_DATA_VBIF"/> 972 <value value="2" name="A7XX_PERF_UFC_WRITE_DATA_VBIF"/> 973 <value value="3" name="A7XX_PERF_UFC_READ_REQUEST_VBIF"/> 974 <value value="4" name="A7XX_PERF_UFC_WRITE_REQUEST_VBIF"/> 975 <value value="5" name="A7XX_PERF_UFC_LRZ_FILTER_HIT"/> 976 <value value="6" name="A7XX_PERF_UFC_LRZ_FILTER_MISS"/> 977 <value value="7" name="A7XX_PERF_UFC_CRE_FILTER_HIT"/> 978 <value value="8" name="A7XX_PERF_UFC_CRE_FILTER_MISS"/> 979 <value value="9" name="A7XX_PERF_UFC_SP_FILTER_HIT"/> 980 <value value="10" name="A7XX_PERF_UFC_SP_FILTER_MISS"/> 981 <value value="11" name="A7XX_PERF_UFC_SP_REQUESTS"/> 982 <value value="12" name="A7XX_PERF_UFC_TP_FILTER_HIT"/> 983 <value value="13" name="A7XX_PERF_UFC_TP_FILTER_MISS"/> 984 <value value="14" name="A7XX_PERF_UFC_TP_REQUESTS"/> 985 <value value="15" name="A7XX_PERF_UFC_MAIN_HIT_LRZ_PREFETCH"/> 986 <value value="16" name="A7XX_PERF_UFC_MAIN_HIT_CRE_PREFETCH"/> 987 <value value="17" name="A7XX_PERF_UFC_MAIN_HIT_SP_PREFETCH"/> 988 <value value="18" name="A7XX_PERF_UFC_MAIN_HIT_TP_PREFETCH"/> 989 <value value="19" name="A7XX_PERF_UFC_MAIN_HIT_UBWC_READ"/> 990 <value value="20" name="A7XX_PERF_UFC_MAIN_HIT_UBWC_WRITE"/> 991 <value value="21" name="A7XX_PERF_UFC_MAIN_MISS_LRZ_PREFETCH"/> 992 <value value="22" name="A7XX_PERF_UFC_MAIN_MISS_CRE_PREFETCH"/> 993 <value value="23" name="A7XX_PERF_UFC_MAIN_MISS_SP_PREFETCH"/> 994 <value value="24" name="A7XX_PERF_UFC_MAIN_MISS_TP_PREFETCH"/> 995 <value value="25" name="A7XX_PERF_UFC_MAIN_MISS_UBWC_READ"/> 996 <value value="26" name="A7XX_PERF_UFC_MAIN_MISS_UBWC_WRITE"/> 997 <value value="27" name="A7XX_PERF_UFC_UBWC_READ_UFC_TRANS"/> 998 <value value="28" name="A7XX_PERF_UFC_UBWC_WRITE_UFC_TRANS"/> 999 <value value="29" name="A7XX_PERF_UFC_STALL_CYCLES_GBIF_CMD"/> 1000 <value value="30" name="A7XX_PERF_UFC_STALL_CYCLES_GBIF_RDATA"/> 1001 <value value="31" name="A7XX_PERF_UFC_STALL_CYCLES_GBIF_WDATA"/> 1002 <value value="32" name="A7XX_PERF_UFC_STALL_CYCLES_UBWC_WR_FLAG"/> 1003 <value value="33" name="A7XX_PERF_UFC_STALL_CYCLES_UBWC_FLAG_RTN"/> 1004 <value value="34" name="A7XX_PERF_UFC_STALL_CYCLES_UBWC_EVENT"/> 1005 <value value="35" name="A7XX_PERF_UFC_LRZ_PREFETCH_STALLED_CYCLES"/> 1006 <value value="36" name="A7XX_PERF_UFC_CRE_PREFETCH_STALLED_CYCLES"/> 1007 <value value="37" name="A7XX_PERF_UFC_SPTP_PREFETCH_STALLED_CYCLES"/> 1008 <value value="38" name="A7XX_PERF_UFC_UBWC_RD_STALLED_CYCLES"/> 1009 <value value="39" name="A7XX_PERF_UFC_UBWC_WR_STALLED_CYCLES"/> 1010 <value value="40" name="A7XX_PERF_UFC_PREFETCH_STALLED_CYCLES"/> 1011 <value value="41" name="A7XX_PERF_UFC_EVICTION_STALLED_CYCLES"/> 1012 <value value="42" name="A7XX_PERF_UFC_LOCK_STALLED_CYCLES"/> 1013 <value value="43" name="A7XX_PERF_UFC_MISS_LATENCY_CYCLES"/> 1014 <value value="44" name="A7XX_PERF_UFC_MISS_LATENCY_SAMPLES"/> 1015 <value value="45" name="A7XX_PERF_UFC_UBWC_REQ_STALLED_CYCLES"/> 1016 <value value="46" name="A7XX_PERF_UFC_TP_HINT_TAG_MISS"/> 1017 <value value="47" name="A7XX_PERF_UFC_TP_HINT_TAG_HIT_RDY"/> 1018 <value value="48" name="A7XX_PERF_UFC_TP_HINT_TAG_HIT_NRDY"/> 1019 <value value="49" name="A7XX_PERF_UFC_TP_HINT_IS_FCLEAR"/> 1020 <value value="50" name="A7XX_PERF_UFC_TP_HINT_IS_ALPHA0"/> 1021 <value value="51" name="A7XX_PERF_UFC_SP_L1_FILTER_HIT"/> 1022 <value value="52" name="A7XX_PERF_UFC_SP_L1_FILTER_MISS"/> 1023 <value value="53" name="A7XX_PERF_UFC_SP_L1_FILTER_REQUESTS"/> 1024 <value value="54" name="A7XX_PERF_UFC_TP_L1_TAG_HIT_RDY"/> 1025 <value value="55" name="A7XX_PERF_UFC_TP_L1_TAG_HIT_NRDY"/> 1026 <value value="56" name="A7XX_PERF_UFC_TP_L1_TAG_MISS"/> 1027 <value value="57" name="A7XX_PERF_UFC_TP_L1_FILTER_REQUESTS"/> 1028</enum> 1029 1030</database>
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