File Index
Files and directories
Sign in
FILE

a6xx_descriptors.xml

File preview with syntax highlighting.

linux-6.19.14/drivers/gpu/drm/msm/registers/adreno/a6xx_descriptors.xml XML
  1<?xml version="1.0" encoding="UTF-8"?>
  2<database xmlns="http://nouveau.freedesktop.org/"
  3xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
  4xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
  5<import file="freedreno_copyright.xml"/>
  6<import file="adreno/adreno_common.xml"/>
  7<import file="adreno/adreno_pm4.xml"/>
  8<import file="adreno/a6xx_enums.xml"/>
  9
 10<domain name="A6XX_TEX_SAMP" width="32">
 11	<doc>Texture sampler dwords</doc>
 12
 13	<reg32 offset="0" name="0">
 14		<bitfield name="MIPFILTER_LINEAR_NEAR" pos="0" type="boolean"/>
 15		<bitfield name="XY_MAG" low="1" high="2" type="a6xx_tex_filter"/>
 16		<bitfield name="XY_MIN" low="3" high="4" type="a6xx_tex_filter"/>
 17		<bitfield name="WRAP_S" low="5" high="7" type="a6xx_tex_clamp"/>
 18		<bitfield name="WRAP_T" low="8" high="10" type="a6xx_tex_clamp"/>
 19		<bitfield name="WRAP_R" low="11" high="13" type="a6xx_tex_clamp"/>
 20		<bitfield name="ANISO" low="14" high="16" type="a6xx_tex_aniso"/>
 21		<bitfield name="LOD_BIAS" low="19" high="31" type="fixed" radix="8"/><!-- no idea how many bits for real -->
 22	</reg32>
 23	<reg32 offset="1" name="1">
 24		<bitfield name="CLAMPENABLE" pos="0" type="boolean">
 25			<doc>
 26				clamp result to [0, 1] if the format is unorm or
 27				[-1, 1] if the format is snorm, *after*
 28				filtering. Has no effect for other formats.
 29			</doc>
 30		</bitfield>
 31		<bitfield name="COMPARE_FUNC" low="1" high="3" type="adreno_compare_func"/>
 32		<bitfield name="CUBEMAPSEAMLESSFILTOFF" pos="4" type="boolean"/>
 33		<bitfield name="UNNORM_COORDS" pos="5" type="boolean"/>
 34		<bitfield name="MIPFILTER_LINEAR_FAR" pos="6" type="boolean"/>
 35		<bitfield name="MAX_LOD" low="8" high="19" type="ufixed" radix="8"/>
 36		<bitfield name="MIN_LOD" low="20" high="31" type="ufixed" radix="8"/>
 37	</reg32>
 38	<reg32 offset="2" name="2">
 39		<bitfield name="REDUCTION_MODE" low="0" high="1" type="a6xx_reduction_mode"/>
 40		<bitfield name="FASTBORDERCOLOR" low="2" high="3" type="a6xx_fast_border_color"/>
 41		<bitfield name="FASTBORDERCOLOREN" pos="4" type="boolean"/>
 42		<bitfield name="CHROMA_LINEAR" pos="5" type="boolean"/>
 43		<bitfield name="BCOLOR" low="7" high="31"/>
 44	</reg32>
 45	<reg32 offset="3" name="3"/>
 46</domain>
 47
 48<domain name="A6XX_TEX_CONST" width="32" varset="chip">
 49	<doc>Texture constant dwords</doc>
 50	<reg32 offset="0" name="0">
 51		<bitfield name="TILE_MODE" low="0" high="1" type="a6xx_tile_mode"/>
 52		<bitfield name="SRGB" pos="2" type="boolean"/>
 53		<bitfield name="SWIZ_X" low="4" high="6" type="a6xx_tex_swiz"/>
 54		<bitfield name="SWIZ_Y" low="7" high="9" type="a6xx_tex_swiz"/>
 55		<bitfield name="SWIZ_Z" low="10" high="12" type="a6xx_tex_swiz"/>
 56		<bitfield name="SWIZ_W" low="13" high="15" type="a6xx_tex_swiz"/>
 57		<bitfield name="MIPLVLS" low="16" high="19" type="uint"/>
 58		<!-- overlaps with MIPLVLS -->
 59		<bitfield name="CHROMA_MIDPOINT_X" pos="16" type="boolean"/>
 60		<bitfield name="CHROMA_MIDPOINT_Y" pos="18" type="boolean"/>
 61		<bitfield name="SAMPLES" low="20" high="21" type="a3xx_msaa_samples"/>
 62		<bitfield name="FMT" low="22" high="29" type="a6xx_format"/>
 63		<!--
 64			Why is the swap needed in addition to SWIZ_*? The swap
 65			is performed before border color replacement, while the
 66			swizzle is applied after after it.
 67		-->
 68		<bitfield name="SWAP" low="30" high="31" type="a3xx_color_swap"/>
 69	</reg32>
 70	<reg32 offset="1" name="1">
 71		<bitfield name="WIDTH" low="0" high="14" type="uint"/>
 72		<bitfield name="HEIGHT" low="15" high="29" type="uint"/>
 73		<bitfield name="MUTABLEEN" pos="31" type="boolean" variants="A7XX-"/>
 74	</reg32>
 75	<reg32 offset="2" name="2">
 76		<!--
 77			These fields overlap PITCH, and are used instead of
 78			PITCH/PITCHALIGN when TYPE is A6XX_TEX_BUFFER.
 79		 -->
 80		<doc> probably for D3D structured UAVs, normally set to 1 </doc>
 81		<bitfield name="STRUCTSIZETEXELS" low="4" high="15" type="uint"/>
 82		<bitfield name="STARTOFFSETTEXELS" low="16" high="21" type="uint"/>
 83
 84		<!-- minimum pitch (for mipmap levels): log2(pitchalign / 64) -->
 85		<bitfield name="PITCHALIGN" low="0" high="3" type="uint"/>
 86		<doc>Pitch in bytes (so actually stride)</doc>
 87		<bitfield name="PITCH" low="7" high="28" type="uint"/>
 88		<bitfield name="TYPE" low="29" high="31" type="a6xx_tex_type"/>
 89	</reg32>
 90	<reg32 offset="3" name="3">
 91		<!--
 92		ARRAY_PITCH is basically LAYERSZ for the first mipmap level, and
 93		for 3d textures (laid out mipmap level first) MIN_LAYERSZ is the
 94		layer size at the point that it stops being reduced moving to
 95		higher (smaller) mipmap levels
 96		 -->
 97		<bitfield name="ARRAY_PITCH" low="0" high="22" shr="12" type="uint"/>
 98		<bitfield name="MIN_LAYERSZ" low="23" high="26" shr="12"/>
 99		<!--
100		by default levels with w < 16 are linear
101		TILE_ALL makes all levels have tiling
102		seems required when using UBWC, since all levels have UBWC (can possibly be disabled?)
103		 -->
104		<bitfield name="TILE_ALL" pos="27" type="boolean"/>
105		<bitfield name="FLAG" pos="28" type="boolean"/>
106	</reg32>
107	<!-- for 2-3 plane format, BASE is flag buffer address (if enabled)
108	     the address of the non-flag base buffer is determined automatically,
109	     and must follow the flag buffer
110	 -->
111	<reg32 offset="4" name="4">
112		<bitfield name="BASE_LO" low="5" high="31" shr="5"/>
113	</reg32>
114	<reg32 offset="5" name="5">
115		<bitfield name="BASE_HI" low="0" high="16"/>
116		<bitfield name="DEPTH" low="17" high="29" type="uint"/>
117	</reg32>
118	<reg32 offset="6" name="6">
119		<!-- overlaps with PLANE_PITCH -->
120		<bitfield name="MIN_LOD_CLAMP" low="0" high="11" type="ufixed" radix="8"/>
121		<!-- pitch for plane 2 / plane 3 -->
122		<bitfield name="PLANE_PITCH" low="8" high="31" type="uint"/>
123	</reg32>
124	<!-- 7/8 is plane 2 address for planar formats -->
125	<reg32 offset="7" name="7">
126		<bitfield name="FLAG_LO" low="5" high="31" shr="5"/>
127	</reg32>
128	<reg32 offset="8" name="8">
129		<bitfield name="FLAG_HI" low="0" high="16"/>
130	</reg32>
131	<!-- 9/10 is plane 3 address for planar formats -->
132	<reg32 offset="9" name="9">
133		<bitfield name="FLAG_BUFFER_ARRAY_PITCH" low="0" high="16" shr="4" type="uint"/>
134	</reg32>
135	<reg32 offset="10" name="10">
136		<bitfield name="FLAG_BUFFER_PITCH" low="0" high="6" shr="6" type="uint"/>
137		<!-- log2 size of the first level, required for mipmapping -->
138		<bitfield name="FLAG_BUFFER_LOGW" low="8" high="11" type="uint"/>
139		<bitfield name="FLAG_BUFFER_LOGH" low="12" high="15" type="uint"/>
140	</reg32>
141	<reg32 offset="11" name="11"/>
142	<reg32 offset="12" name="12"/>
143	<reg32 offset="13" name="13"/>
144	<reg32 offset="14" name="14"/>
145	<reg32 offset="15" name="15"/>
146</domain>
147
148<domain name="A6XX_UBO" width="32">
149	<reg32 offset="0" name="0">
150		<bitfield name="BASE_LO" low="0" high="31"/>
151	</reg32>
152	<reg32 offset="1" name="1">
153		<bitfield name="BASE_HI" low="0" high="16"/>
154		<bitfield name="SIZE" low="17" high="31"/> <!-- size in vec4 (4xDWORD) units -->
155	</reg32>
156</domain>
157
158</database>
~/ Read-only file preview.