FILE
dpu_trace.h
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linux-6.19.14/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. 3 */ 4 5#if !defined(_DPU_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ) 6#define _DPU_TRACE_H_ 7 8#include <linux/stringify.h> 9#include <linux/types.h> 10#include <linux/tracepoint.h> 11 12#include <drm/drm_rect.h> 13#include "dpu_crtc.h" 14#include "dpu_encoder_phys.h" 15#include "dpu_hw_mdss.h" 16#include "dpu_hw_vbif.h" 17#include "dpu_plane.h" 18 19#undef TRACE_SYSTEM 20#define TRACE_SYSTEM dpu 21#undef TRACE_INCLUDE_FILE 22#define TRACE_INCLUDE_FILE dpu_trace 23 24TRACE_EVENT(dpu_perf_set_qos_luts, 25 TP_PROTO(u32 pnum, u32 fmt, bool rt, u32 fl, 26 u32 lut, u32 lut_usage), 27 TP_ARGS(pnum, fmt, rt, fl, lut, lut_usage), 28 TP_STRUCT__entry( 29 __field(u32, pnum) 30 __field(u32, fmt) 31 __field(bool, rt) 32 __field(u32, fl) 33 __field(u64, lut) 34 __field(u32, lut_usage) 35 ), 36 TP_fast_assign( 37 __entry->pnum = pnum; 38 __entry->fmt = fmt; 39 __entry->rt = rt; 40 __entry->fl = fl; 41 __entry->lut = lut; 42 __entry->lut_usage = lut_usage; 43 ), 44 TP_printk("pnum=%d fmt=%x rt=%d fl=%d lut=0x%llx lut_usage=%d", 45 __entry->pnum, __entry->fmt, 46 __entry->rt, __entry->fl, 47 __entry->lut, __entry->lut_usage) 48); 49 50TRACE_EVENT(dpu_perf_set_danger_luts, 51 TP_PROTO(u32 pnum, u32 fmt, u32 mode, u32 danger_lut, 52 u32 safe_lut), 53 TP_ARGS(pnum, fmt, mode, danger_lut, safe_lut), 54 TP_STRUCT__entry( 55 __field(u32, pnum) 56 __field(u32, fmt) 57 __field(u32, mode) 58 __field(u32, danger_lut) 59 __field(u32, safe_lut) 60 ), 61 TP_fast_assign( 62 __entry->pnum = pnum; 63 __entry->fmt = fmt; 64 __entry->mode = mode; 65 __entry->danger_lut = danger_lut; 66 __entry->safe_lut = safe_lut; 67 ), 68 TP_printk("pnum=%d fmt=%x mode=%d luts[0x%x, 0x%x]", 69 __entry->pnum, __entry->fmt, 70 __entry->mode, __entry->danger_lut, 71 __entry->safe_lut) 72); 73 74TRACE_EVENT(dpu_perf_set_ot, 75 TP_PROTO(u32 pnum, u32 xin_id, u32 rd_lim, u32 vbif_idx), 76 TP_ARGS(pnum, xin_id, rd_lim, vbif_idx), 77 TP_STRUCT__entry( 78 __field(u32, pnum) 79 __field(u32, xin_id) 80 __field(u32, rd_lim) 81 __field(u32, vbif_idx) 82 ), 83 TP_fast_assign( 84 __entry->pnum = pnum; 85 __entry->xin_id = xin_id; 86 __entry->rd_lim = rd_lim; 87 __entry->vbif_idx = vbif_idx; 88 ), 89 TP_printk("pnum:%d xin_id:%d ot:%d vbif:%d", 90 __entry->pnum, __entry->xin_id, __entry->rd_lim, 91 __entry->vbif_idx) 92) 93 94TRACE_EVENT(dpu_cmd_release_bw, 95 TP_PROTO(u32 crtc_id), 96 TP_ARGS(crtc_id), 97 TP_STRUCT__entry( 98 __field(u32, crtc_id) 99 ), 100 TP_fast_assign( 101 __entry->crtc_id = crtc_id; 102 ), 103 TP_printk("crtc:%d", __entry->crtc_id) 104); 105 106TRACE_EVENT(tracing_mark_write, 107 TP_PROTO(int pid, const char *name, bool trace_begin), 108 TP_ARGS(pid, name, trace_begin), 109 TP_STRUCT__entry( 110 __field(int, pid) 111 __string(trace_name, name) 112 __field(bool, trace_begin) 113 ), 114 TP_fast_assign( 115 __entry->pid = pid; 116 __assign_str(trace_name); 117 __entry->trace_begin = trace_begin; 118 ), 119 TP_printk("%s|%d|%s", __entry->trace_begin ? "B" : "E", 120 __entry->pid, __get_str(trace_name)) 121) 122 123TRACE_EVENT(dpu_trace_counter, 124 TP_PROTO(int pid, char *name, int value), 125 TP_ARGS(pid, name, value), 126 TP_STRUCT__entry( 127 __field(int, pid) 128 __string(counter_name, name) 129 __field(int, value) 130 ), 131 TP_fast_assign( 132 __entry->pid = current->tgid; 133 __assign_str(counter_name); 134 __entry->value = value; 135 ), 136 TP_printk("%d|%s|%d", __entry->pid, 137 __get_str(counter_name), __entry->value) 138) 139 140TRACE_EVENT(dpu_perf_crtc_update, 141 TP_PROTO(u32 crtc, u64 bw_ctl, u32 core_clk_rate, 142 bool stop_req, bool update_bus, bool update_clk), 143 TP_ARGS(crtc, bw_ctl, core_clk_rate, stop_req, update_bus, update_clk), 144 TP_STRUCT__entry( 145 __field(u32, crtc) 146 __field(u64, bw_ctl) 147 __field(u32, core_clk_rate) 148 __field(bool, stop_req) 149 __field(u32, update_bus) 150 __field(u32, update_clk) 151 ), 152 TP_fast_assign( 153 __entry->crtc = crtc; 154 __entry->bw_ctl = bw_ctl; 155 __entry->core_clk_rate = core_clk_rate; 156 __entry->stop_req = stop_req; 157 __entry->update_bus = update_bus; 158 __entry->update_clk = update_clk; 159 ), 160 TP_printk( 161 "crtc=%d bw_ctl=%llu clk_rate=%u stop_req=%d u_bus=%d u_clk=%d", 162 __entry->crtc, 163 __entry->bw_ctl, 164 __entry->core_clk_rate, 165 __entry->stop_req, 166 __entry->update_bus, 167 __entry->update_clk) 168); 169 170DECLARE_EVENT_CLASS(dpu_irq_template, 171 TP_PROTO(unsigned int irq_reg, unsigned int irq_bit), 172 TP_ARGS(irq_reg, irq_bit), 173 TP_STRUCT__entry( 174 __field( unsigned int, irq_reg ) 175 __field( unsigned int, irq_bit ) 176 ), 177 TP_fast_assign( 178 __entry->irq_reg = irq_reg; 179 __entry->irq_bit = irq_bit; 180 ), 181 TP_printk("IRQ=[%d, %d]", __entry->irq_reg, __entry->irq_bit) 182); 183DEFINE_EVENT(dpu_irq_template, dpu_irq_register_success, 184 TP_PROTO(unsigned int irq_reg, unsigned int irq_bit), 185 TP_ARGS(irq_reg, irq_bit) 186); 187DEFINE_EVENT(dpu_irq_template, dpu_irq_unregister_success, 188 TP_PROTO(unsigned int irq_reg, unsigned int irq_bit), 189 TP_ARGS(irq_reg, irq_bit) 190); 191 192TRACE_EVENT(dpu_enc_irq_wait_success, 193 TP_PROTO(uint32_t drm_id, void *func, 194 unsigned int irq_reg, unsigned int irq_bit, enum dpu_pingpong pp_idx, int atomic_cnt), 195 TP_ARGS(drm_id, func, irq_reg, irq_bit, pp_idx, atomic_cnt), 196 TP_STRUCT__entry( 197 __field( uint32_t, drm_id ) 198 __field( void *, func ) 199 __field( unsigned int, irq_reg ) 200 __field( unsigned int, irq_bit ) 201 __field( enum dpu_pingpong, pp_idx ) 202 __field( int, atomic_cnt ) 203 ), 204 TP_fast_assign( 205 __entry->drm_id = drm_id; 206 __entry->func = func; 207 __entry->irq_reg = irq_reg; 208 __entry->irq_bit = irq_bit; 209 __entry->pp_idx = pp_idx; 210 __entry->atomic_cnt = atomic_cnt; 211 ), 212 TP_printk("id=%u, callback=%ps, IRQ=[%d, %d], pp=%d, atomic_cnt=%d", 213 __entry->drm_id, __entry->func, 214 __entry->irq_reg, __entry->irq_bit, __entry->pp_idx, __entry->atomic_cnt) 215); 216 217DECLARE_EVENT_CLASS(dpu_drm_obj_template, 218 TP_PROTO(uint32_t drm_id), 219 TP_ARGS(drm_id), 220 TP_STRUCT__entry( 221 __field( uint32_t, drm_id ) 222 ), 223 TP_fast_assign( 224 __entry->drm_id = drm_id; 225 ), 226 TP_printk("id=%u", __entry->drm_id) 227); 228DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_atomic_check, 229 TP_PROTO(uint32_t drm_id), 230 TP_ARGS(drm_id) 231); 232DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_mode_set, 233 TP_PROTO(uint32_t drm_id), 234 TP_ARGS(drm_id) 235); 236DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_disable, 237 TP_PROTO(uint32_t drm_id), 238 TP_ARGS(drm_id) 239); 240DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_kickoff, 241 TP_PROTO(uint32_t drm_id), 242 TP_ARGS(drm_id) 243); 244DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_prepare_kickoff, 245 TP_PROTO(uint32_t drm_id), 246 TP_ARGS(drm_id) 247); 248DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_prepare_kickoff_reset, 249 TP_PROTO(uint32_t drm_id), 250 TP_ARGS(drm_id) 251); 252DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_flip, 253 TP_PROTO(uint32_t drm_id), 254 TP_ARGS(drm_id) 255); 256DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_vblank_cb, 257 TP_PROTO(uint32_t drm_id), 258 TP_ARGS(drm_id) 259); 260DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_commit, 261 TP_PROTO(uint32_t drm_id), 262 TP_ARGS(drm_id) 263); 264DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_commit, 265 TP_PROTO(uint32_t drm_id), 266 TP_ARGS(drm_id) 267); 268DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_wait_for_commit_done, 269 TP_PROTO(uint32_t drm_id), 270 TP_ARGS(drm_id) 271); 272DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_runtime_resume, 273 TP_PROTO(uint32_t drm_id), 274 TP_ARGS(drm_id) 275); 276DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_rc_enable, 277 TP_PROTO(uint32_t drm_id), 278 TP_ARGS(drm_id) 279); 280DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_rc_disable, 281 TP_PROTO(uint32_t drm_id), 282 TP_ARGS(drm_id) 283); 284 285TRACE_EVENT(dpu_enc_enable, 286 TP_PROTO(uint32_t drm_id, int hdisplay, int vdisplay), 287 TP_ARGS(drm_id, hdisplay, vdisplay), 288 TP_STRUCT__entry( 289 __field( uint32_t, drm_id ) 290 __field( int, hdisplay ) 291 __field( int, vdisplay ) 292 ), 293 TP_fast_assign( 294 __entry->drm_id = drm_id; 295 __entry->hdisplay = hdisplay; 296 __entry->vdisplay = vdisplay; 297 ), 298 TP_printk("id=%u, mode=%dx%d", 299 __entry->drm_id, __entry->hdisplay, __entry->vdisplay) 300); 301 302DECLARE_EVENT_CLASS(dpu_enc_keyval_template, 303 TP_PROTO(uint32_t drm_id, int val), 304 TP_ARGS(drm_id, val), 305 TP_STRUCT__entry( 306 __field( uint32_t, drm_id ) 307 __field( int, val ) 308 ), 309 TP_fast_assign( 310 __entry->drm_id = drm_id; 311 __entry->val = val; 312 ), 313 TP_printk("id=%u, val=%d", __entry->drm_id, __entry->val) 314); 315DEFINE_EVENT(dpu_enc_keyval_template, dpu_enc_underrun_cb, 316 TP_PROTO(uint32_t drm_id, int count), 317 TP_ARGS(drm_id, count) 318); 319DEFINE_EVENT(dpu_enc_keyval_template, dpu_enc_trigger_start, 320 TP_PROTO(uint32_t drm_id, int ctl_idx), 321 TP_ARGS(drm_id, ctl_idx) 322); 323 324TRACE_EVENT(dpu_enc_atomic_check_flags, 325 TP_PROTO(uint32_t drm_id, unsigned int flags), 326 TP_ARGS(drm_id, flags), 327 TP_STRUCT__entry( 328 __field( uint32_t, drm_id ) 329 __field( unsigned int, flags ) 330 ), 331 TP_fast_assign( 332 __entry->drm_id = drm_id; 333 __entry->flags = flags; 334 ), 335 TP_printk("id=%u, flags=%u", 336 __entry->drm_id, __entry->flags) 337); 338 339DECLARE_EVENT_CLASS(dpu_enc_id_enable_template, 340 TP_PROTO(uint32_t drm_id, bool enable), 341 TP_ARGS(drm_id, enable), 342 TP_STRUCT__entry( 343 __field( uint32_t, drm_id ) 344 __field( bool, enable ) 345 ), 346 TP_fast_assign( 347 __entry->drm_id = drm_id; 348 __entry->enable = enable; 349 ), 350 TP_printk("id=%u, enable=%s", 351 __entry->drm_id, __entry->enable ? "true" : "false") 352); 353DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_vblank_cb, 354 TP_PROTO(uint32_t drm_id, bool enable), 355 TP_ARGS(drm_id, enable) 356); 357DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_phys_cmd_connect_te, 358 TP_PROTO(uint32_t drm_id, bool enable), 359 TP_ARGS(drm_id, enable) 360); 361 362TRACE_EVENT(dpu_enc_rc, 363 TP_PROTO(uint32_t drm_id, u32 sw_event, bool idle_pc_supported, 364 int rc_state, const char *stage), 365 TP_ARGS(drm_id, sw_event, idle_pc_supported, rc_state, stage), 366 TP_STRUCT__entry( 367 __field( uint32_t, drm_id ) 368 __field( u32, sw_event ) 369 __field( bool, idle_pc_supported ) 370 __field( int, rc_state ) 371 __string( stage_str, stage ) 372 ), 373 TP_fast_assign( 374 __entry->drm_id = drm_id; 375 __entry->sw_event = sw_event; 376 __entry->idle_pc_supported = idle_pc_supported; 377 __entry->rc_state = rc_state; 378 __assign_str(stage_str); 379 ), 380 TP_printk("%s: id:%u, sw_event:%d, idle_pc_supported:%s, rc_state:%d", 381 __get_str(stage_str), __entry->drm_id, __entry->sw_event, 382 __entry->idle_pc_supported ? "true" : "false", 383 __entry->rc_state) 384); 385 386TRACE_EVENT(dpu_enc_frame_done_cb_not_busy, 387 TP_PROTO(uint32_t drm_id, u32 event, char *intf_mode, enum dpu_intf intf_idx, 388 enum dpu_wb wb_idx), 389 TP_ARGS(drm_id, event, intf_mode, intf_idx, wb_idx), 390 TP_STRUCT__entry( 391 __field( uint32_t, drm_id ) 392 __field( u32, event ) 393 __string( intf_mode_str, intf_mode ) 394 __field( enum dpu_intf, intf_idx ) 395 __field( enum dpu_wb, wb_idx ) 396 ), 397 TP_fast_assign( 398 __entry->drm_id = drm_id; 399 __entry->event = event; 400 __assign_str(intf_mode_str); 401 __entry->intf_idx = intf_idx; 402 __entry->wb_idx = wb_idx; 403 ), 404 TP_printk("id=%u, event=%u, intf_mode=%s intf=%d wb=%d", __entry->drm_id, 405 __entry->event, __get_str(intf_mode_str), 406 __entry->intf_idx, __entry->wb_idx) 407); 408 409TRACE_EVENT(dpu_enc_frame_done_cb, 410 TP_PROTO(uint32_t drm_id, unsigned int idx, 411 unsigned long frame_busy_mask), 412 TP_ARGS(drm_id, idx, frame_busy_mask), 413 TP_STRUCT__entry( 414 __field( uint32_t, drm_id ) 415 __field( unsigned int, idx ) 416 __field( unsigned long, frame_busy_mask ) 417 ), 418 TP_fast_assign( 419 __entry->drm_id = drm_id; 420 __entry->idx = idx; 421 __entry->frame_busy_mask = frame_busy_mask; 422 ), 423 TP_printk("id=%u, idx=%u, frame_busy_mask=%lx", __entry->drm_id, 424 __entry->idx, __entry->frame_busy_mask) 425); 426 427TRACE_EVENT(dpu_enc_trigger_flush, 428 TP_PROTO(uint32_t drm_id, char *intf_mode, enum dpu_intf intf_idx, enum dpu_wb wb_idx, 429 int pending_kickoff_cnt, int ctl_idx, u32 extra_flush_bits, 430 u32 pending_flush_ret), 431 TP_ARGS(drm_id, intf_mode, intf_idx, wb_idx, pending_kickoff_cnt, ctl_idx, 432 extra_flush_bits, pending_flush_ret), 433 TP_STRUCT__entry( 434 __field( uint32_t, drm_id ) 435 __string( intf_mode_str, intf_mode ) 436 __field( enum dpu_intf, intf_idx ) 437 __field( enum dpu_wb, wb_idx ) 438 __field( int, pending_kickoff_cnt ) 439 __field( int, ctl_idx ) 440 __field( u32, extra_flush_bits ) 441 __field( u32, pending_flush_ret ) 442 ), 443 TP_fast_assign( 444 __entry->drm_id = drm_id; 445 __assign_str(intf_mode_str); 446 __entry->intf_idx = intf_idx; 447 __entry->wb_idx = wb_idx; 448 __entry->pending_kickoff_cnt = pending_kickoff_cnt; 449 __entry->ctl_idx = ctl_idx; 450 __entry->extra_flush_bits = extra_flush_bits; 451 __entry->pending_flush_ret = pending_flush_ret; 452 ), 453 TP_printk("id=%u, intf_mode=%s, intf_idx=%d, wb_idx=%d, pending_kickoff_cnt=%d ctl_idx=%d " 454 "extra_flush_bits=0x%x pending_flush_ret=0x%x", 455 __entry->drm_id, __get_str(intf_mode_str), __entry->intf_idx, __entry->wb_idx, 456 __entry->pending_kickoff_cnt, __entry->ctl_idx, 457 __entry->extra_flush_bits, __entry->pending_flush_ret) 458); 459 460DECLARE_EVENT_CLASS(dpu_id_event_template, 461 TP_PROTO(uint32_t drm_id, u32 event), 462 TP_ARGS(drm_id, event), 463 TP_STRUCT__entry( 464 __field( uint32_t, drm_id ) 465 __field( u32, event ) 466 ), 467 TP_fast_assign( 468 __entry->drm_id = drm_id; 469 __entry->event = event; 470 ), 471 TP_printk("id=%u, event=%u", __entry->drm_id, __entry->event) 472); 473DEFINE_EVENT(dpu_id_event_template, dpu_enc_frame_done_timeout, 474 TP_PROTO(uint32_t drm_id, u32 event), 475 TP_ARGS(drm_id, event) 476); 477DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_cb, 478 TP_PROTO(uint32_t drm_id, u32 event), 479 TP_ARGS(drm_id, event) 480); 481DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_done, 482 TP_PROTO(uint32_t drm_id, u32 event), 483 TP_ARGS(drm_id, event) 484); 485DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_more_pending, 486 TP_PROTO(uint32_t drm_id, u32 event), 487 TP_ARGS(drm_id, event) 488); 489 490TRACE_EVENT(dpu_enc_wait_event_timeout, 491 TP_PROTO(uint32_t drm_id, unsigned int irq_reg, unsigned int irq_bit, int rc, s64 time, 492 s64 expected_time, int atomic_cnt), 493 TP_ARGS(drm_id, irq_reg, irq_bit, rc, time, expected_time, atomic_cnt), 494 TP_STRUCT__entry( 495 __field( uint32_t, drm_id ) 496 __field( unsigned int, irq_reg ) 497 __field( unsigned int, irq_bit ) 498 __field( int, rc ) 499 __field( s64, time ) 500 __field( s64, expected_time ) 501 __field( int, atomic_cnt ) 502 ), 503 TP_fast_assign( 504 __entry->drm_id = drm_id; 505 __entry->irq_reg = irq_reg; 506 __entry->irq_bit = irq_bit; 507 __entry->rc = rc; 508 __entry->time = time; 509 __entry->expected_time = expected_time; 510 __entry->atomic_cnt = atomic_cnt; 511 ), 512 TP_printk("id=%u, IRQ=[%d, %d], rc=%d, time=%lld, expected=%lld cnt=%d", 513 __entry->drm_id, __entry->irq_reg, __entry->irq_bit, __entry->rc, __entry->time, 514 __entry->expected_time, __entry->atomic_cnt) 515); 516 517TRACE_EVENT(dpu_enc_phys_cmd_irq_enable, 518 TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, 519 int refcnt), 520 TP_ARGS(drm_id, pp, refcnt), 521 TP_STRUCT__entry( 522 __field( uint32_t, drm_id ) 523 __field( enum dpu_pingpong, pp ) 524 __field( int, refcnt ) 525 ), 526 TP_fast_assign( 527 __entry->drm_id = drm_id; 528 __entry->pp = pp; 529 __entry->refcnt = refcnt; 530 ), 531 TP_printk("id=%u, pp=%d, refcnt=%d", __entry->drm_id, 532 __entry->pp, 533 __entry->refcnt) 534); 535 536TRACE_EVENT(dpu_enc_phys_cmd_irq_disable, 537 TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, 538 int refcnt), 539 TP_ARGS(drm_id, pp, refcnt), 540 TP_STRUCT__entry( 541 __field( uint32_t, drm_id ) 542 __field( enum dpu_pingpong, pp ) 543 __field( int, refcnt ) 544 ), 545 TP_fast_assign( 546 __entry->drm_id = drm_id; 547 __entry->pp = pp; 548 __entry->refcnt = refcnt; 549 ), 550 TP_printk("id=%u, pp=%d, refcnt=%d", __entry->drm_id, 551 __entry->pp, 552 __entry->refcnt) 553); 554 555TRACE_EVENT(dpu_enc_phys_cmd_pp_tx_done, 556 TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, int new_count, 557 u32 event), 558 TP_ARGS(drm_id, pp, new_count, event), 559 TP_STRUCT__entry( 560 __field( uint32_t, drm_id ) 561 __field( enum dpu_pingpong, pp ) 562 __field( int, new_count ) 563 __field( u32, event ) 564 ), 565 TP_fast_assign( 566 __entry->drm_id = drm_id; 567 __entry->pp = pp; 568 __entry->new_count = new_count; 569 __entry->event = event; 570 ), 571 TP_printk("id=%u, pp=%d, new_count=%d, event=%u", __entry->drm_id, 572 __entry->pp, __entry->new_count, __entry->event) 573); 574 575TRACE_EVENT(dpu_enc_phys_cmd_pdone_timeout, 576 TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, int timeout_count, 577 int kickoff_count, u32 event), 578 TP_ARGS(drm_id, pp, timeout_count, kickoff_count, event), 579 TP_STRUCT__entry( 580 __field( uint32_t, drm_id ) 581 __field( enum dpu_pingpong, pp ) 582 __field( int, timeout_count ) 583 __field( int, kickoff_count ) 584 __field( u32, event ) 585 ), 586 TP_fast_assign( 587 __entry->drm_id = drm_id; 588 __entry->pp = pp; 589 __entry->timeout_count = timeout_count; 590 __entry->kickoff_count = kickoff_count; 591 __entry->event = event; 592 ), 593 TP_printk("id=%u, pp=%d, timeout_count=%d, kickoff_count=%d, event=%u", 594 __entry->drm_id, __entry->pp, __entry->timeout_count, 595 __entry->kickoff_count, __entry->event) 596); 597 598TRACE_EVENT(dpu_enc_phys_vid_post_kickoff, 599 TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx), 600 TP_ARGS(drm_id, intf_idx), 601 TP_STRUCT__entry( 602 __field( uint32_t, drm_id ) 603 __field( enum dpu_intf, intf_idx ) 604 ), 605 TP_fast_assign( 606 __entry->drm_id = drm_id; 607 __entry->intf_idx = intf_idx; 608 ), 609 TP_printk("id=%u, intf_idx=%d", __entry->drm_id, __entry->intf_idx) 610); 611 612TRACE_EVENT(dpu_enc_phys_vid_irq_enable, 613 TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx, 614 int refcnt), 615 TP_ARGS(drm_id, intf_idx, refcnt), 616 TP_STRUCT__entry( 617 __field( uint32_t, drm_id ) 618 __field( enum dpu_intf, intf_idx ) 619 __field( int, refcnt ) 620 ), 621 TP_fast_assign( 622 __entry->drm_id = drm_id; 623 __entry->intf_idx = intf_idx; 624 __entry->refcnt = refcnt; 625 ), 626 TP_printk("id=%u, intf_idx=%d refcnt=%d", __entry->drm_id, 627 __entry->intf_idx, 628 __entry->drm_id) 629); 630 631TRACE_EVENT(dpu_enc_phys_vid_irq_disable, 632 TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx, 633 int refcnt), 634 TP_ARGS(drm_id, intf_idx, refcnt), 635 TP_STRUCT__entry( 636 __field( uint32_t, drm_id ) 637 __field( enum dpu_intf, intf_idx ) 638 __field( int, refcnt ) 639 ), 640 TP_fast_assign( 641 __entry->drm_id = drm_id; 642 __entry->intf_idx = intf_idx; 643 __entry->refcnt = refcnt; 644 ), 645 TP_printk("id=%u, intf_idx=%d refcnt=%d", __entry->drm_id, 646 __entry->intf_idx, 647 __entry->drm_id) 648); 649 650TRACE_EVENT(dpu_crtc_setup_mixer, 651 TP_PROTO(uint32_t crtc_id, uint32_t plane_id, 652 struct drm_plane_state *state, struct dpu_plane_state *pstate, 653 uint32_t stage_idx, uint32_t pixel_format, 654 struct dpu_sw_pipe *pipe, uint64_t modifier), 655 TP_ARGS(crtc_id, plane_id, state, pstate, stage_idx, 656 pixel_format, pipe, modifier), 657 TP_STRUCT__entry( 658 __field( uint32_t, crtc_id ) 659 __field( uint32_t, plane_id ) 660 __field( uint32_t, fb_id ) 661 __field_struct( struct drm_rect, src_rect ) 662 __field_struct( struct drm_rect, dst_rect ) 663 __field( uint32_t, stage_idx ) 664 __field( enum dpu_stage, stage ) 665 __field( enum dpu_sspp, sspp ) 666 __field( uint32_t, multirect_idx ) 667 __field( uint32_t, multirect_mode ) 668 __field( uint32_t, pixel_format ) 669 __field( uint64_t, modifier ) 670 ), 671 TP_fast_assign( 672 __entry->crtc_id = crtc_id; 673 __entry->plane_id = plane_id; 674 __entry->fb_id = state ? state->fb->base.id : 0; 675 __entry->src_rect = drm_plane_state_src(state); 676 __entry->dst_rect = drm_plane_state_dest(state); 677 __entry->stage_idx = stage_idx; 678 __entry->stage = pstate->stage; 679 __entry->sspp = pipe->sspp->idx; 680 __entry->multirect_idx = pipe->multirect_index; 681 __entry->multirect_mode = pipe->multirect_mode; 682 __entry->pixel_format = pixel_format; 683 __entry->modifier = modifier; 684 ), 685 TP_printk("crtc_id:%u plane_id:%u fb_id:%u src:" DRM_RECT_FP_FMT 686 " dst:" DRM_RECT_FMT " stage_idx:%u stage:%d, sspp:%d " 687 "multirect_index:%d multirect_mode:%u pix_format:%u " 688 "modifier:%llu", 689 __entry->crtc_id, __entry->plane_id, __entry->fb_id, 690 DRM_RECT_FP_ARG(&__entry->src_rect), 691 DRM_RECT_ARG(&__entry->dst_rect), 692 __entry->stage_idx, __entry->stage, __entry->sspp, 693 __entry->multirect_idx, __entry->multirect_mode, 694 __entry->pixel_format, __entry->modifier) 695); 696 697TRACE_EVENT(dpu_crtc_setup_lm_bounds, 698 TP_PROTO(uint32_t drm_id, int mixer, struct drm_rect *bounds), 699 TP_ARGS(drm_id, mixer, bounds), 700 TP_STRUCT__entry( 701 __field( uint32_t, drm_id ) 702 __field( int, mixer ) 703 __field_struct( struct drm_rect, bounds ) 704 ), 705 TP_fast_assign( 706 __entry->drm_id = drm_id; 707 __entry->mixer = mixer; 708 __entry->bounds = *bounds; 709 ), 710 TP_printk("id:%u mixer:%d bounds:" DRM_RECT_FMT, __entry->drm_id, 711 __entry->mixer, DRM_RECT_ARG(&__entry->bounds)) 712); 713 714TRACE_EVENT(dpu_crtc_vblank_enable, 715 TP_PROTO(uint32_t drm_id, uint32_t enc_id, bool enable, 716 struct dpu_crtc *crtc), 717 TP_ARGS(drm_id, enc_id, enable, crtc), 718 TP_STRUCT__entry( 719 __field( uint32_t, drm_id ) 720 __field( uint32_t, enc_id ) 721 __field( bool, enable ) 722 __field( bool, enabled ) 723 ), 724 TP_fast_assign( 725 __entry->drm_id = drm_id; 726 __entry->enc_id = enc_id; 727 __entry->enable = enable; 728 __entry->enabled = crtc->enabled; 729 ), 730 TP_printk("id:%u encoder:%u enable:%s state{enabled:%s}", 731 __entry->drm_id, __entry->enc_id, 732 __entry->enable ? "true" : "false", 733 __entry->enabled ? "true" : "false") 734); 735 736DECLARE_EVENT_CLASS(dpu_crtc_enable_template, 737 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc), 738 TP_ARGS(drm_id, enable, crtc), 739 TP_STRUCT__entry( 740 __field( uint32_t, drm_id ) 741 __field( bool, enable ) 742 __field( bool, enabled ) 743 ), 744 TP_fast_assign( 745 __entry->drm_id = drm_id; 746 __entry->enable = enable; 747 __entry->enabled = crtc->enabled; 748 ), 749 TP_printk("id:%u enable:%s state{enabled:%s}", 750 __entry->drm_id, __entry->enable ? "true" : "false", 751 __entry->enabled ? "true" : "false") 752); 753DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_enable, 754 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc), 755 TP_ARGS(drm_id, enable, crtc) 756); 757DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_disable, 758 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc), 759 TP_ARGS(drm_id, enable, crtc) 760); 761DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_vblank, 762 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc), 763 TP_ARGS(drm_id, enable, crtc) 764); 765 766TRACE_EVENT(dpu_crtc_disable_frame_pending, 767 TP_PROTO(uint32_t drm_id, int frame_pending), 768 TP_ARGS(drm_id, frame_pending), 769 TP_STRUCT__entry( 770 __field( uint32_t, drm_id ) 771 __field( int, frame_pending ) 772 ), 773 TP_fast_assign( 774 __entry->drm_id = drm_id; 775 __entry->frame_pending = frame_pending; 776 ), 777 TP_printk("id:%u frame_pending:%d", __entry->drm_id, 778 __entry->frame_pending) 779); 780 781TRACE_EVENT(dpu_plane_set_scanout, 782 TP_PROTO(struct dpu_sw_pipe *pipe, struct dpu_hw_fmt_layout *layout), 783 TP_ARGS(pipe, layout), 784 TP_STRUCT__entry( 785 __field( enum dpu_sspp, index ) 786 __field_struct( struct dpu_hw_fmt_layout, layout ) 787 __field( enum dpu_sspp_multirect_index, multirect_index) 788 ), 789 TP_fast_assign( 790 __entry->index = pipe->sspp->idx; 791 __entry->layout = *layout; 792 __entry->multirect_index = pipe->multirect_index; 793 ), 794 TP_printk("index:%d layout:{%ux%u @ [%u/%u, %u/%u, %u/%u, %u/%u]} " 795 "multirect_index:%d", __entry->index, __entry->layout.width, 796 __entry->layout.height, __entry->layout.plane_addr[0], 797 __entry->layout.plane_size[0], 798 __entry->layout.plane_addr[1], 799 __entry->layout.plane_size[1], 800 __entry->layout.plane_addr[2], 801 __entry->layout.plane_size[2], 802 __entry->layout.plane_addr[3], 803 __entry->layout.plane_size[3], __entry->multirect_index) 804); 805 806TRACE_EVENT(dpu_plane_disable, 807 TP_PROTO(uint32_t drm_id, bool is_virtual, uint32_t multirect_mode), 808 TP_ARGS(drm_id, is_virtual, multirect_mode), 809 TP_STRUCT__entry( 810 __field( uint32_t, drm_id ) 811 __field( bool, is_virtual ) 812 __field( uint32_t, multirect_mode ) 813 ), 814 TP_fast_assign( 815 __entry->drm_id = drm_id; 816 __entry->is_virtual = is_virtual; 817 __entry->multirect_mode = multirect_mode; 818 ), 819 TP_printk("id:%u is_virtual:%s multirect_mode:%u", __entry->drm_id, 820 __entry->is_virtual ? "true" : "false", 821 __entry->multirect_mode) 822); 823 824DECLARE_EVENT_CLASS(dpu_rm_iter_template, 825 TP_PROTO(uint32_t id, uint32_t enc_id), 826 TP_ARGS(id, enc_id), 827 TP_STRUCT__entry( 828 __field( uint32_t, id ) 829 __field( uint32_t, enc_id ) 830 ), 831 TP_fast_assign( 832 __entry->id = id; 833 __entry->enc_id = enc_id; 834 ), 835 TP_printk("id:%d enc_id:%u", __entry->id, __entry->enc_id) 836); 837DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_intf, 838 TP_PROTO(uint32_t id, uint32_t enc_id), 839 TP_ARGS(id, enc_id) 840); 841DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_ctls, 842 TP_PROTO(uint32_t id, uint32_t enc_id), 843 TP_ARGS(id, enc_id) 844); 845 846TRACE_EVENT(dpu_rm_reserve_lms, 847 TP_PROTO(uint32_t id, uint32_t enc_id, uint32_t pp_id), 848 TP_ARGS(id, enc_id, pp_id), 849 TP_STRUCT__entry( 850 __field( uint32_t, id ) 851 __field( uint32_t, enc_id ) 852 __field( uint32_t, pp_id ) 853 ), 854 TP_fast_assign( 855 __entry->id = id; 856 __entry->enc_id = enc_id; 857 __entry->pp_id = pp_id; 858 ), 859 TP_printk("id:%d enc_id:%u pp_id:%u", __entry->id, 860 __entry->enc_id, __entry->pp_id) 861); 862 863TRACE_EVENT(dpu_vbif_wait_xin_halt_fail, 864 TP_PROTO(enum dpu_vbif index, u32 xin_id), 865 TP_ARGS(index, xin_id), 866 TP_STRUCT__entry( 867 __field( enum dpu_vbif, index ) 868 __field( u32, xin_id ) 869 ), 870 TP_fast_assign( 871 __entry->index = index; 872 __entry->xin_id = xin_id; 873 ), 874 TP_printk("index:%d xin_id:%u", __entry->index, __entry->xin_id) 875); 876 877TRACE_EVENT(dpu_pp_connect_ext_te, 878 TP_PROTO(enum dpu_pingpong pp, u32 cfg), 879 TP_ARGS(pp, cfg), 880 TP_STRUCT__entry( 881 __field( enum dpu_pingpong, pp ) 882 __field( u32, cfg ) 883 ), 884 TP_fast_assign( 885 __entry->pp = pp; 886 __entry->cfg = cfg; 887 ), 888 TP_printk("pp:%d cfg:%u", __entry->pp, __entry->cfg) 889); 890 891TRACE_EVENT(dpu_intf_connect_ext_te, 892 TP_PROTO(enum dpu_intf intf, u32 cfg), 893 TP_ARGS(intf, cfg), 894 TP_STRUCT__entry( 895 __field( enum dpu_intf, intf ) 896 __field( u32, cfg ) 897 ), 898 TP_fast_assign( 899 __entry->intf = intf; 900 __entry->cfg = cfg; 901 ), 902 TP_printk("intf:%d cfg:%u", __entry->intf, __entry->cfg) 903); 904 905TRACE_EVENT(dpu_core_irq_register_callback, 906 TP_PROTO(unsigned int irq_reg, unsigned int irq_bit, void *callback), 907 TP_ARGS(irq_reg, irq_bit, callback), 908 TP_STRUCT__entry( 909 __field( unsigned int, irq_reg ) 910 __field( unsigned int, irq_bit ) 911 __field( void *, callback) 912 ), 913 TP_fast_assign( 914 __entry->irq_reg = irq_reg; 915 __entry->irq_bit = irq_bit; 916 __entry->callback = callback; 917 ), 918 TP_printk("IRQ=[%d, %d] callback:%ps", __entry->irq_reg, __entry->irq_bit, 919 __entry->callback) 920); 921 922TRACE_EVENT(dpu_core_irq_unregister_callback, 923 TP_PROTO(unsigned int irq_reg, unsigned int irq_bit), 924 TP_ARGS(irq_reg, irq_bit), 925 TP_STRUCT__entry( 926 __field( unsigned int, irq_reg ) 927 __field( unsigned int, irq_bit ) 928 ), 929 TP_fast_assign( 930 __entry->irq_reg = irq_reg; 931 __entry->irq_bit = irq_bit; 932 ), 933 TP_printk("IRQ=[%d, %d]", __entry->irq_reg, __entry->irq_bit) 934); 935 936TRACE_EVENT(dpu_core_perf_update_clk, 937 TP_PROTO(struct drm_device *dev, bool stop_req, u64 clk_rate), 938 TP_ARGS(dev, stop_req, clk_rate), 939 TP_STRUCT__entry( 940 __string( dev_name, dev->unique ) 941 __field( bool, stop_req ) 942 __field( u64, clk_rate ) 943 ), 944 TP_fast_assign( 945 __assign_str(dev_name); 946 __entry->stop_req = stop_req; 947 __entry->clk_rate = clk_rate; 948 ), 949 TP_printk("dev:%s stop_req:%s clk_rate:%llu", __get_str(dev_name), 950 __entry->stop_req ? "true" : "false", __entry->clk_rate) 951); 952 953TRACE_EVENT(dpu_hw_ctl_update_pending_flush, 954 TP_PROTO(u32 new_bits, u32 pending_mask), 955 TP_ARGS(new_bits, pending_mask), 956 TP_STRUCT__entry( 957 __field( u32, new_bits ) 958 __field( u32, pending_mask ) 959 ), 960 TP_fast_assign( 961 __entry->new_bits = new_bits; 962 __entry->pending_mask = pending_mask; 963 ), 964 TP_printk("new=%x existing=%x", __entry->new_bits, 965 __entry->pending_mask) 966); 967 968DECLARE_EVENT_CLASS(dpu_hw_ctl_pending_flush_template, 969 TP_PROTO(u32 pending_mask, u32 ctl_flush), 970 TP_ARGS(pending_mask, ctl_flush), 971 TP_STRUCT__entry( 972 __field( u32, pending_mask ) 973 __field( u32, ctl_flush ) 974 ), 975 TP_fast_assign( 976 __entry->pending_mask = pending_mask; 977 __entry->ctl_flush = ctl_flush; 978 ), 979 TP_printk("pending_mask=%x CTL_FLUSH=%x", __entry->pending_mask, 980 __entry->ctl_flush) 981); 982DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, dpu_hw_ctl_clear_pending_flush, 983 TP_PROTO(u32 pending_mask, u32 ctl_flush), 984 TP_ARGS(pending_mask, ctl_flush) 985); 986DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, 987 dpu_hw_ctl_trigger_pending_flush, 988 TP_PROTO(u32 pending_mask, u32 ctl_flush), 989 TP_ARGS(pending_mask, ctl_flush) 990); 991DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, dpu_hw_ctl_trigger_prepare, 992 TP_PROTO(u32 pending_mask, u32 ctl_flush), 993 TP_ARGS(pending_mask, ctl_flush) 994); 995DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, dpu_hw_ctl_trigger_start, 996 TP_PROTO(u32 pending_mask, u32 ctl_flush), 997 TP_ARGS(pending_mask, ctl_flush) 998); 999 1000#define DPU_ATRACE_END(name) trace_tracing_mark_write(current->tgid, name, 0) 1001#define DPU_ATRACE_BEGIN(name) trace_tracing_mark_write(current->tgid, name, 1) 1002#define DPU_ATRACE_FUNC() DPU_ATRACE_BEGIN(__func__) 1003 1004#define DPU_ATRACE_INT(name, value) \ 1005 trace_dpu_trace_counter(current->tgid, name, value) 1006 1007#endif /* _DPU_TRACE_H_ */ 1008 1009/* This part must be outside protection */ 1010#undef TRACE_INCLUDE_PATH 1011#define TRACE_INCLUDE_PATH . 1012#include <trace/define_trace.h>
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