dpu_hw_top.h

  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
  3 */
  4
  5#ifndef _DPU_HW_TOP_H
  6#define _DPU_HW_TOP_H
  7
  8#include "dpu_hw_catalog.h"
  9#include "dpu_hw_mdss.h"
 10#include "dpu_hw_util.h"
 11
 12struct dpu_hw_mdp;
 13
 14/**
 15 * struct traffic_shaper_cfg: traffic shaper configuration
 16 * @en        : enable/disable traffic shaper
 17 * @rd_client : true if read client; false if write client
 18 * @client_id : client identifier
 19 * @bpc_denom : denominator of byte per clk
 20 * @bpc_numer : numerator of byte per clk
 21 */
 22struct traffic_shaper_cfg {
 23	bool en;
 24	bool rd_client;
 25	u32 client_id;
 26	u32 bpc_denom;
 27	u64 bpc_numer;
 28};
 29
 30/**
 31 * struct split_pipe_cfg - pipe configuration for dual display panels
 32 * @en        : Enable/disable dual pipe configuration
 33 * @mode      : Panel interface mode
 34 * @intf      : Interface id for main control path
 35 * @split_flush_en: Allows both the paths to be flushed when master path is
 36 *              flushed
 37 */
 38struct split_pipe_cfg {
 39	bool en;
 40	enum dpu_intf_mode mode;
 41	enum dpu_intf intf;
 42	bool split_flush_en;
 43};
 44
 45/**
 46 * struct dpu_danger_safe_status: danger and safe status signals
 47 * @mdp: top level status
 48 * @sspp: source pipe status
 49 */
 50struct dpu_danger_safe_status {
 51	u8 mdp;
 52	u8 sspp[SSPP_MAX];
 53};
 54
 55/**
 56 * struct dpu_vsync_source_cfg - configure vsync source and configure the
 57 *                                    watchdog timers if required.
 58 * @pp_count: number of ping pongs active
 59 * @frame_rate: Display frame rate
 60 * @ppnumber: ping pong index array
 61 * @vsync_source: vsync source selection
 62 */
 63struct dpu_vsync_source_cfg {
 64	u32 pp_count;
 65	u32 frame_rate;
 66	u32 ppnumber[PINGPONG_MAX];
 67	enum dpu_vsync_source vsync_source;
 68};
 69
 70enum dpu_dp_phy_sel {
 71	DPU_DP_PHY_NONE,
 72	DPU_DP_PHY_0,
 73	DPU_DP_PHY_1,
 74	DPU_DP_PHY_2,
 75};
 76
 77/**
 78 * struct dpu_hw_mdp_ops - interface to the MDP TOP Hw driver functions
 79 * Assumption is these functions will be called after clocks are enabled.
 80 */
 81struct dpu_hw_mdp_ops {
 82	/**
 83	 * @setup_split_pipe : Programs the pipe control registers.
 84	 * Registers are not double buffered, this
 85	 * function should be called before timing control enable
 86	 * @mdp  : mdp top context driver
 87	 * @cfg  : upper and lower part of pipe configuration
 88	 */
 89	void (*setup_split_pipe)(struct dpu_hw_mdp *mdp,
 90			struct split_pipe_cfg *p);
 91
 92	/**
 93	 * @setup_traffic_shaper : programs traffic shaper control.
 94	 * @mdp  : mdp top context driver
 95	 * @cfg  : traffic shaper configuration
 96	 */
 97	void (*setup_traffic_shaper)(struct dpu_hw_mdp *mdp,
 98			struct traffic_shaper_cfg *cfg);
 99
100	/**
101	 * @setup_clk_force_ctrl: set clock force control
102	 * @mdp: mdp top context driver
103	 * @clk_ctrl: clock to be controlled
104	 * @enable: force on enable
105	 * @return: if the clock is forced-on by this function
106	 */
107	bool (*setup_clk_force_ctrl)(struct dpu_hw_mdp *mdp,
108			enum dpu_clk_ctrl_type clk_ctrl, bool enable);
109
110	/**
111	 * @get_danger_status: get danger status
112	 * @mdp: mdp top context driver
113	 * @status: Pointer to danger safe status
114	 */
115	void (*get_danger_status)(struct dpu_hw_mdp *mdp,
116			struct dpu_danger_safe_status *status);
117
118	/**
119	 * @setup_vsync_source: setup vsync source configuration details
120	 * @mdp: mdp top context driver
121	 * @cfg: vsync source selection configuration
122	 */
123	void (*setup_vsync_source)(struct dpu_hw_mdp *mdp,
124				struct dpu_vsync_source_cfg *cfg);
125
126	/**
127	 * @get_safe_status: get safe status
128	 * @mdp: mdp top context driver
129	 * @status: Pointer to danger safe status
130	 */
131	void (*get_safe_status)(struct dpu_hw_mdp *mdp,
132			struct dpu_danger_safe_status *status);
133
134	/**
135	 * @dp_phy_intf_sel: configure intf to phy mapping
136	 * @mdp: mdp top context driver
137	 * @phys: list of phys the DP interfaces should be connected to. 0 disables the INTF.
138	 */
139	void (*dp_phy_intf_sel)(struct dpu_hw_mdp *mdp, enum dpu_dp_phy_sel phys[2]);
140
141	/**
142	 * @intf_audio_select: select the external interface for audio
143	 * @mdp: mdp top context driver
144	 */
145	void (*intf_audio_select)(struct dpu_hw_mdp *mdp);
146};
147
148struct dpu_hw_mdp {
149	struct dpu_hw_blk base;
150	struct dpu_hw_blk_reg_map hw;
151
152	/* top */
153	const struct dpu_mdp_cfg *caps;
154
155	/* ops */
156	struct dpu_hw_mdp_ops ops;
157};
158
159struct dpu_hw_mdp *dpu_hw_mdptop_init(struct drm_device *dev,
160				      const struct dpu_mdp_cfg *cfg,
161				      void __iomem *addr,
162				      const struct dpu_mdss_version *mdss_rev);
163
164#endif /*_DPU_HW_TOP_H */