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dpu_6_3_sm6115.h

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linux-6.19.14/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h C
  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved.
  4 * Copyright (c) 2015-2018, 2020 The Linux Foundation. All rights reserved.
  5 */
  6
  7#ifndef _DPU_6_3_SM6115_H
  8#define _DPU_6_3_SM6115_H
  9
 10static const struct dpu_caps sm6115_dpu_caps = {
 11	.max_mixer_width = DEFAULT_DPU_LINE_WIDTH,
 12	.max_mixer_blendstages = 0x4,
 13	.has_dim_layer = true,
 14	.has_idle_pc = true,
 15	.max_linewidth = 2160,
 16	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
 17};
 18
 19static const struct dpu_mdp_cfg sm6115_mdp = {
 20	.name = "top_0",
 21	.base = 0x0, .len = 0x494,
 22	.clk_ctrls = {
 23		[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
 24		[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
 25	},
 26};
 27
 28static const struct dpu_ctl_cfg sm6115_ctl[] = {
 29	{
 30		.name = "ctl_0", .id = CTL_0,
 31		.base = 0x1000, .len = 0x1dc,
 32		.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9),
 33	},
 34};
 35
 36static const struct dpu_sspp_cfg sm6115_sspp[] = {
 37	{
 38		.name = "sspp_0", .id = SSPP_VIG0,
 39		.base = 0x4000, .len = 0x1f8,
 40		.features = VIG_SDM845_MASK_NO_SDMA,
 41		.sblk = &dpu_vig_sblk_qseed3_3_0,
 42		.xin_id = 0,
 43		.type = SSPP_TYPE_VIG,
 44		.clk_ctrl = DPU_CLK_CTRL_VIG0,
 45	}, {
 46		.name = "sspp_8", .id = SSPP_DMA0,
 47		.base = 0x24000, .len = 0x1f8,
 48		.features = DMA_SDM845_MASK_NO_SDMA,
 49		.sblk = &dpu_dma_sblk,
 50		.xin_id = 1,
 51		.type = SSPP_TYPE_DMA,
 52		.clk_ctrl = DPU_CLK_CTRL_DMA0,
 53	},
 54};
 55
 56static const struct dpu_lm_cfg sm6115_lm[] = {
 57	{
 58		.name = "lm_0", .id = LM_0,
 59		.base = 0x44000, .len = 0x320,
 60		.sblk = &qcm2290_lm_sblk,
 61		.pingpong = PINGPONG_0,
 62		.dspp = DSPP_0,
 63	},
 64};
 65
 66static const struct dpu_dspp_cfg sm6115_dspp[] = {
 67	{
 68		.name = "dspp_0", .id = DSPP_0,
 69		.base = 0x54000, .len = 0x1800,
 70		.sblk = &sdm845_dspp_sblk,
 71	},
 72};
 73
 74static const struct dpu_pingpong_cfg sm6115_pp[] = {
 75	{
 76		.name = "pingpong_0", .id = PINGPONG_0,
 77		.base = 0x70000, .len = 0xd4,
 78		.sblk = &sdm845_pp_sblk,
 79		.merge_3d = 0,
 80		.intr_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
 81	},
 82};
 83
 84static const struct dpu_intf_cfg sm6115_intf[] = {
 85	{
 86		.name = "intf_1", .id = INTF_1,
 87		.base = 0x6a800, .len = 0x2c0,
 88		.type = INTF_DSI,
 89		.controller_id = MSM_DSI_CONTROLLER_0,
 90		.prog_fetch_lines_worst_case = 24,
 91		.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 26),
 92		.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 27),
 93		.intr_tear_rd_ptr = DPU_IRQ_IDX(MDP_INTF1_TEAR_INTR, 2),
 94	},
 95};
 96
 97static const struct dpu_perf_cfg sm6115_perf_data = {
 98	.max_bw_low = 3100000,
 99	.max_bw_high = 4000000,
100	.min_core_ib = 2400000,
101	.min_llcc_ib = 800000,
102	.min_dram_ib = 800000,
103	.min_prefill_lines = 24,
104	.danger_lut_tbl = {0xff, 0xffff, 0x0},
105	.safe_lut_tbl = {0xfff0, 0xff00, 0xffff},
106	.qos_lut_tbl = {
107		{.nentry = ARRAY_SIZE(sc7180_qos_linear),
108		.entries = sc7180_qos_linear
109		},
110		{.nentry = ARRAY_SIZE(sc7180_qos_macrotile),
111		.entries = sc7180_qos_macrotile
112		},
113		{.nentry = ARRAY_SIZE(sc7180_qos_nrt),
114		.entries = sc7180_qos_nrt
115		},
116		/* TODO: macrotile-qseed is different from macrotile */
117	},
118	.cdp_cfg = {
119		{.rd_enable = 1, .wr_enable = 1},
120		{.rd_enable = 1, .wr_enable = 0}
121	},
122	.clk_inefficiency_factor = 105,
123	.bw_inefficiency_factor = 120,
124};
125
126static const struct dpu_mdss_version sm6115_mdss_ver = {
127	.core_major_ver = 6,
128	.core_minor_ver = 3,
129};
130
131const struct dpu_mdss_cfg dpu_sm6115_cfg = {
132	.mdss_ver = &sm6115_mdss_ver,
133	.caps = &sm6115_dpu_caps,
134	.mdp = &sm6115_mdp,
135	.ctl_count = ARRAY_SIZE(sm6115_ctl),
136	.ctl = sm6115_ctl,
137	.sspp_count = ARRAY_SIZE(sm6115_sspp),
138	.sspp = sm6115_sspp,
139	.mixer_count = ARRAY_SIZE(sm6115_lm),
140	.mixer = sm6115_lm,
141	.dspp_count = ARRAY_SIZE(sm6115_dspp),
142	.dspp = sm6115_dspp,
143	.pingpong_count = ARRAY_SIZE(sm6115_pp),
144	.pingpong = sm6115_pp,
145	.intf_count = ARRAY_SIZE(sm6115_intf),
146	.intf = sm6115_intf,
147	.vbif_count = ARRAY_SIZE(sdm845_vbif),
148	.vbif = sdm845_vbif,
149	.perf = &sm6115_perf_data,
150};
151
152#endif
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