dpu_3_3_sdm630.h

  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * Copyright (c) 2023. Linaro Inc. All rights reserved.
  4 */
  5
  6#ifndef _DPU_3_3_SDM630_H
  7#define _DPU_3_3_SDM630_H
  8
  9static const struct dpu_caps sdm630_dpu_caps = {
 10	.max_mixer_width = DEFAULT_DPU_LINE_WIDTH,
 11	.max_mixer_blendstages = 0x7,
 12	.has_src_split = true,
 13	.has_dim_layer = true,
 14	.has_idle_pc = true,
 15	.has_3d_merge = true,
 16	.max_linewidth = DEFAULT_DPU_LINE_WIDTH,
 17	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
 18	.max_hdeci_exp = MAX_HORZ_DECIMATION,
 19	.max_vdeci_exp = MAX_VERT_DECIMATION,
 20};
 21
 22static const struct dpu_mdp_cfg sdm630_mdp = {
 23	.name = "top_0",
 24	.base = 0x0, .len = 0x458,
 25	.clk_ctrls = {
 26		[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
 27		[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
 28		[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
 29		[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },
 30		[DPU_CLK_CTRL_CURSOR0] = { .reg_off = 0x3a8, .bit_off = 16 },
 31	},
 32};
 33
 34static const struct dpu_ctl_cfg sdm630_ctl[] = {
 35	{
 36		.name = "ctl_0", .id = CTL_0,
 37		.base = 0x1000, .len = 0x94,
 38		.features = BIT(DPU_CTL_SPLIT_DISPLAY),
 39	}, {
 40		.name = "ctl_1", .id = CTL_1,
 41		.base = 0x1200, .len = 0x94,
 42	}, {
 43		.name = "ctl_2", .id = CTL_2,
 44		.base = 0x1400, .len = 0x94,
 45		.features = BIT(DPU_CTL_SPLIT_DISPLAY),
 46	}, {
 47		.name = "ctl_3", .id = CTL_3,
 48		.base = 0x1600, .len = 0x94,
 49	}, {
 50		.name = "ctl_4", .id = CTL_4,
 51		.base = 0x1800, .len = 0x94,
 52	},
 53};
 54
 55static const struct dpu_sspp_cfg sdm630_sspp[] = {
 56	{
 57		.name = "sspp_0", .id = SSPP_VIG0,
 58		.base = 0x4000, .len = 0x1ac,
 59		.features = VIG_MSM8998_MASK,
 60		.sblk = &dpu_vig_sblk_qseed3_1_2,
 61		.xin_id = 0,
 62		.type = SSPP_TYPE_VIG,
 63		.clk_ctrl = DPU_CLK_CTRL_VIG0,
 64	}, {
 65		.name = "sspp_8", .id = SSPP_DMA0,
 66		.base = 0x24000, .len = 0x1ac,
 67		.features = DMA_MSM8998_MASK,
 68		.sblk = &dpu_dma_sblk,
 69		.xin_id = 1,
 70		.type = SSPP_TYPE_DMA,
 71		.clk_ctrl = DPU_CLK_CTRL_DMA0,
 72	}, {
 73		.name = "sspp_9", .id = SSPP_DMA1,
 74		.base = 0x26000, .len = 0x1ac,
 75		.features = DMA_MSM8998_MASK,
 76		.sblk = &dpu_dma_sblk,
 77		.xin_id = 5,
 78		.type = SSPP_TYPE_DMA,
 79		.clk_ctrl = DPU_CLK_CTRL_DMA1,
 80	}, {
 81		.name = "sspp_10", .id = SSPP_DMA2,
 82		.base = 0x28000, .len = 0x1ac,
 83		.features = DMA_CURSOR_MSM8998_MASK,
 84		.sblk = &dpu_dma_sblk,
 85		.xin_id = 9,
 86		.type = SSPP_TYPE_DMA,
 87		.clk_ctrl = DPU_CLK_CTRL_DMA2,
 88	},
 89};
 90
 91static const struct dpu_lm_cfg sdm630_lm[] = {
 92	{
 93		.name = "lm_0", .id = LM_0,
 94		.base = 0x44000, .len = 0x320,
 95		.features = MIXER_MSM8998_MASK,
 96		.sblk = &msm8998_lm_sblk,
 97		.pingpong = PINGPONG_0,
 98		.dspp = DSPP_0,
 99	}, {
100		.name = "lm_2", .id = LM_2,
101		.base = 0x46000, .len = 0x320,
102		.features = MIXER_MSM8998_MASK,
103		.sblk = &msm8998_lm_sblk,
104		.pingpong = PINGPONG_2,
105	},
106};
107
108static const struct dpu_pingpong_cfg sdm630_pp[] = {
109	{
110		.name = "pingpong_0", .id = PINGPONG_0,
111		.base = 0x70000, .len = 0xd4,
112		.sblk = &sdm845_pp_sblk,
113		.intr_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
114		.intr_rdptr = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12),
115	}, {
116		.name = "pingpong_2", .id = PINGPONG_2,
117		.base = 0x71000, .len = 0xd4,
118		.sblk = &sdm845_pp_sblk,
119		.intr_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10),
120		.intr_rdptr = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 14),
121	},
122};
123
124static const struct dpu_dspp_cfg sdm630_dspp[] = {
125	{
126		.name = "dspp_0", .id = DSPP_0,
127		.base = 0x54000, .len = 0x1800,
128		.sblk = &msm8998_dspp_sblk,
129	},
130};
131
132static const struct dpu_intf_cfg sdm630_intf[] = {
133	{
134		.name = "intf_0", .id = INTF_0,
135		.base = 0x6a000, .len = 0x280,
136		.type = INTF_DP,
137		.controller_id = MSM_DP_CONTROLLER_0,
138		.prog_fetch_lines_worst_case = 21,
139		.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 24),
140		.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 25),
141	}, {
142		.name = "intf_1", .id = INTF_1,
143		.base = 0x6a800, .len = 0x280,
144		.type = INTF_DSI,
145		.controller_id = MSM_DSI_CONTROLLER_0,
146		.prog_fetch_lines_worst_case = 21,
147		.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 26),
148		.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 27),
149	},
150};
151
152static const struct dpu_perf_cfg sdm630_perf_data = {
153	.max_bw_low = 4100000,
154	.max_bw_high = 4100000,
155	.min_core_ib = 3200000,
156	.min_llcc_ib = 800000,
157	.min_dram_ib = 800000,
158	.undersized_prefill_lines = 2,
159	.xtra_prefill_lines = 2,
160	.dest_scale_prefill_lines = 3,
161	.macrotile_prefill_lines = 4,
162	.yuv_nv12_prefill_lines = 8,
163	.linear_prefill_lines = 1,
164	.downscaling_prefill_lines = 1,
165	.amortizable_threshold = 25,
166	.min_prefill_lines = 25,
167	.danger_lut_tbl = {0xf, 0xffff, 0x0},
168	.safe_lut_tbl = {0xfffc, 0xff00, 0xffff},
169	.qos_lut_tbl = {
170		{.nentry = ARRAY_SIZE(msm8998_qos_linear),
171		.entries = msm8998_qos_linear
172		},
173		{.nentry = ARRAY_SIZE(msm8998_qos_macrotile),
174		.entries = msm8998_qos_macrotile
175		},
176		{.nentry = ARRAY_SIZE(msm8998_qos_nrt),
177		.entries = msm8998_qos_nrt
178		},
179	},
180	.cdp_cfg = {
181		{.rd_enable = 1, .wr_enable = 1},
182		{.rd_enable = 1, .wr_enable = 0}
183	},
184	.clk_inefficiency_factor = 200,
185	.bw_inefficiency_factor = 120,
186};
187
188static const struct dpu_mdss_version sdm630_mdss_ver = {
189	.core_major_ver = 3,
190	.core_minor_ver = 3,
191};
192
193const struct dpu_mdss_cfg dpu_sdm630_cfg = {
194	.mdss_ver = &sdm630_mdss_ver,
195	.caps = &sdm630_dpu_caps,
196	.mdp = &sdm630_mdp,
197	.cdm = &dpu_cdm_1_x_4_x,
198	.ctl_count = ARRAY_SIZE(sdm630_ctl),
199	.ctl = sdm630_ctl,
200	.sspp_count = ARRAY_SIZE(sdm630_sspp),
201	.sspp = sdm630_sspp,
202	.mixer_count = ARRAY_SIZE(sdm630_lm),
203	.mixer = sdm630_lm,
204	.dspp_count = ARRAY_SIZE(sdm630_dspp),
205	.dspp = sdm630_dspp,
206	.pingpong_count = ARRAY_SIZE(sdm630_pp),
207	.pingpong = sdm630_pp,
208	.intf_count = ARRAY_SIZE(sdm630_intf),
209	.intf = sdm630_intf,
210	.vbif_count = ARRAY_SIZE(msm8998_vbif),
211	.vbif = msm8998_vbif,
212	.perf = &sdm630_perf_data,
213};
214
215#endif