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mtk_hdmi_common.c

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linux-6.19.14/drivers/gpu/drm/mediatek/mtk_hdmi_common.c C
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Copyright (c) 2014 MediaTek Inc.
  4 * Copyright (c) 2024 Collabora Ltd.
  5 *                    AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
  6 */
  7
  8#include <drm/drm_modes.h>
  9#include <linux/device.h>
 10#include <linux/hdmi.h>
 11#include <linux/i2c.h>
 12#include <linux/math.h>
 13#include <linux/of.h>
 14#include <linux/of_platform.h>
 15#include <linux/platform_device.h>
 16#include <linux/mfd/syscon.h>
 17#include <sound/hdmi-codec.h>
 18
 19#include "mtk_hdmi_common.h"
 20
 21struct hdmi_acr_n {
 22	unsigned int clock;
 23	unsigned int n[3];
 24};
 25
 26/* Recommended N values from HDMI specification, tables 7-1 to 7-3 */
 27static const struct hdmi_acr_n hdmi_rec_n_table[] = {
 28	/* Clock, N: 32kHz 44.1kHz 48kHz */
 29	{  25175, {  4576,  7007,  6864 } },
 30	{  74176, { 11648, 17836, 11648 } },
 31	{ 148352, { 11648,  8918,  5824 } },
 32	{ 296703, {  5824,  4459,  5824 } },
 33	{ 297000, {  3072,  4704,  5120 } },
 34	{      0, {  4096,  6272,  6144 } }, /* all other TMDS clocks */
 35};
 36
 37/**
 38 * hdmi_recommended_n() - Return N value recommended by HDMI specification
 39 * @freq: audio sample rate in Hz
 40 * @clock: rounded TMDS clock in kHz
 41 */
 42static unsigned int hdmi_recommended_n(unsigned int freq, unsigned int clock)
 43{
 44	const struct hdmi_acr_n *recommended;
 45	unsigned int i;
 46
 47	for (i = 0; i < ARRAY_SIZE(hdmi_rec_n_table) - 1; i++) {
 48		if (clock == hdmi_rec_n_table[i].clock)
 49			break;
 50	}
 51	recommended = hdmi_rec_n_table + i;
 52
 53	switch (freq) {
 54	case 32000:
 55		return recommended->n[0];
 56	case 44100:
 57		return recommended->n[1];
 58	case 48000:
 59		return recommended->n[2];
 60	case 88200:
 61		return recommended->n[1] * 2;
 62	case 96000:
 63		return recommended->n[2] * 2;
 64	case 176400:
 65		return recommended->n[1] * 4;
 66	case 192000:
 67		return recommended->n[2] * 4;
 68	default:
 69		return (128 * freq) / 1000;
 70	}
 71}
 72
 73static unsigned int hdmi_mode_clock_to_hz(unsigned int clock)
 74{
 75	switch (clock) {
 76	case 25175:
 77		return 25174825;	/* 25.2/1.001 MHz */
 78	case 74176:
 79		return 74175824;	/* 74.25/1.001 MHz */
 80	case 148352:
 81		return 148351648;	/* 148.5/1.001 MHz */
 82	case 296703:
 83		return 296703297;	/* 297/1.001 MHz */
 84	default:
 85		return clock * 1000;
 86	}
 87}
 88
 89static unsigned int hdmi_expected_cts(unsigned int audio_sample_rate,
 90				      unsigned int tmds_clock, unsigned int n)
 91{
 92	return DIV_ROUND_CLOSEST_ULL((u64)hdmi_mode_clock_to_hz(tmds_clock) * n,
 93				     128 * audio_sample_rate);
 94}
 95
 96void mtk_hdmi_get_ncts(unsigned int sample_rate, unsigned int clock,
 97		       unsigned int *n, unsigned int *cts)
 98{
 99	*n = hdmi_recommended_n(sample_rate, clock);
100	*cts = hdmi_expected_cts(sample_rate, clock, *n);
101}
102EXPORT_SYMBOL_NS_GPL(mtk_hdmi_get_ncts, "DRM_MTK_HDMI");
103
104int mtk_hdmi_audio_params(struct mtk_hdmi *hdmi,
105			  struct hdmi_codec_daifmt *daifmt,
106			  struct hdmi_codec_params *params)
107{
108	struct hdmi_audio_param aud_params = { 0 };
109	unsigned int chan = params->cea.channels;
110
111	dev_dbg(hdmi->dev, "%s: %u Hz, %d bit, %d channels\n", __func__,
112		params->sample_rate, params->sample_width, chan);
113
114	if (!hdmi->bridge.encoder)
115		return -ENODEV;
116
117	switch (chan) {
118	case 2:
119		aud_params.aud_input_chan_type = HDMI_AUD_CHAN_TYPE_2_0;
120		break;
121	case 4:
122		aud_params.aud_input_chan_type = HDMI_AUD_CHAN_TYPE_4_0;
123		break;
124	case 6:
125		aud_params.aud_input_chan_type = HDMI_AUD_CHAN_TYPE_5_1;
126		break;
127	case 8:
128		aud_params.aud_input_chan_type = HDMI_AUD_CHAN_TYPE_7_1;
129		break;
130	default:
131		dev_err(hdmi->dev, "channel[%d] not supported!\n", chan);
132		return -EINVAL;
133	}
134
135	switch (params->sample_rate) {
136	case 32000:
137	case 44100:
138	case 48000:
139	case 88200:
140	case 96000:
141	case 176400:
142	case 192000:
143		break;
144	default:
145		dev_err(hdmi->dev, "rate[%d] not supported!\n",
146			params->sample_rate);
147		return -EINVAL;
148	}
149
150	switch (daifmt->fmt) {
151	case HDMI_I2S:
152		aud_params.aud_codec = HDMI_AUDIO_CODING_TYPE_PCM;
153		aud_params.aud_sample_size = HDMI_AUDIO_SAMPLE_SIZE_16;
154		aud_params.aud_input_type = HDMI_AUD_INPUT_I2S;
155		aud_params.aud_i2s_fmt = HDMI_I2S_MODE_I2S_24BIT;
156		aud_params.aud_mclk = HDMI_AUD_MCLK_128FS;
157		break;
158	case HDMI_SPDIF:
159		aud_params.aud_codec = HDMI_AUDIO_CODING_TYPE_PCM;
160		aud_params.aud_sample_size = HDMI_AUDIO_SAMPLE_SIZE_16;
161		aud_params.aud_input_type = HDMI_AUD_INPUT_SPDIF;
162		break;
163	default:
164		dev_err(hdmi->dev, "%s: Invalid DAI format %d\n", __func__,
165			daifmt->fmt);
166		return -EINVAL;
167	}
168	memcpy(&aud_params.codec_params, params, sizeof(aud_params.codec_params));
169	memcpy(&hdmi->aud_param, &aud_params, sizeof(aud_params));
170
171	dev_dbg(hdmi->dev, "codec:%d, input:%d, channel:%d, fs:%d\n",
172		aud_params.aud_codec, aud_params.aud_input_type,
173		aud_params.aud_input_chan_type, aud_params.codec_params.sample_rate);
174
175	return 0;
176}
177EXPORT_SYMBOL_NS_GPL(mtk_hdmi_audio_params, "DRM_MTK_HDMI");
178
179int mtk_hdmi_audio_get_eld(struct device *dev, void *data, uint8_t *buf, size_t len)
180{
181	struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
182
183	if (hdmi->enabled)
184		memcpy(buf, hdmi->curr_conn->eld, min(sizeof(hdmi->curr_conn->eld), len));
185	else
186		memset(buf, 0, len);
187
188	return 0;
189}
190EXPORT_SYMBOL_NS_GPL(mtk_hdmi_audio_get_eld, "DRM_MTK_HDMI");
191
192void mtk_hdmi_audio_set_plugged_cb(struct mtk_hdmi *hdmi, hdmi_codec_plugged_cb fn,
193				   struct device *codec_dev)
194{
195	mutex_lock(&hdmi->update_plugged_status_lock);
196	hdmi->plugged_cb = fn;
197	hdmi->codec_dev = codec_dev;
198	mutex_unlock(&hdmi->update_plugged_status_lock);
199}
200EXPORT_SYMBOL_NS_GPL(mtk_hdmi_audio_set_plugged_cb, "DRM_MTK_HDMI");
201
202static int mtk_hdmi_get_all_clk(struct mtk_hdmi *hdmi, struct device_node *np,
203				const char * const *clock_names, size_t num_clocks)
204{
205	int i;
206
207	for (i = 0; i < num_clocks; i++) {
208		hdmi->clk[i] = of_clk_get_by_name(np, clock_names[i]);
209
210		if (IS_ERR(hdmi->clk[i]))
211			return PTR_ERR(hdmi->clk[i]);
212	}
213
214	return 0;
215}
216
217bool mtk_hdmi_bridge_mode_fixup(struct drm_bridge *bridge,
218				const struct drm_display_mode *mode,
219				struct drm_display_mode *adjusted_mode)
220{
221	return true;
222}
223EXPORT_SYMBOL_NS_GPL(mtk_hdmi_bridge_mode_fixup, "DRM_MTK_HDMI");
224
225void mtk_hdmi_bridge_mode_set(struct drm_bridge *bridge,
226			      const struct drm_display_mode *mode,
227			      const struct drm_display_mode *adjusted_mode)
228{
229	struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
230
231	dev_dbg(hdmi->dev, "cur info: name:%s, hdisplay:%d\n",
232		adjusted_mode->name, adjusted_mode->hdisplay);
233	dev_dbg(hdmi->dev, "hsync_start:%d,hsync_end:%d, htotal:%d",
234		adjusted_mode->hsync_start, adjusted_mode->hsync_end,
235		adjusted_mode->htotal);
236	dev_dbg(hdmi->dev, "hskew:%d, vdisplay:%d\n",
237		adjusted_mode->hskew, adjusted_mode->vdisplay);
238	dev_dbg(hdmi->dev, "vsync_start:%d, vsync_end:%d, vtotal:%d",
239		adjusted_mode->vsync_start, adjusted_mode->vsync_end,
240		adjusted_mode->vtotal);
241	dev_dbg(hdmi->dev, "vscan:%d, flag:%d\n",
242		adjusted_mode->vscan, adjusted_mode->flags);
243
244	drm_mode_copy(&hdmi->mode, adjusted_mode);
245}
246EXPORT_SYMBOL_NS_GPL(mtk_hdmi_bridge_mode_set, "DRM_MTK_HDMI");
247
248static void mtk_hdmi_put_device(void *_dev)
249{
250	struct device *dev = _dev;
251
252	put_device(dev);
253}
254
255static int mtk_hdmi_get_cec_dev(struct mtk_hdmi *hdmi, struct device *dev, struct device_node *np)
256{
257	struct platform_device *cec_pdev;
258	struct device_node *cec_np;
259	int ret;
260
261	/* The CEC module handles HDMI hotplug detection */
262	cec_np = of_get_compatible_child(np->parent, "mediatek,mt8173-cec");
263	if (!cec_np)
264		return dev_err_probe(dev, -EOPNOTSUPP, "Failed to find CEC node\n");
265
266	cec_pdev = of_find_device_by_node(cec_np);
267	if (!cec_pdev) {
268		dev_err(hdmi->dev, "Waiting for CEC device %pOF\n", cec_np);
269		of_node_put(cec_np);
270		return -EPROBE_DEFER;
271	}
272	of_node_put(cec_np);
273
274	ret = devm_add_action_or_reset(dev, mtk_hdmi_put_device, &cec_pdev->dev);
275	if (ret)
276		return ret;
277
278	/*
279	 * The mediatek,syscon-hdmi property contains a phandle link to the
280	 * MMSYS_CONFIG device and the register offset of the HDMI_SYS_CFG
281	 * registers it contains.
282	 */
283	hdmi->sys_regmap = syscon_regmap_lookup_by_phandle_args(np, "mediatek,syscon-hdmi",
284								1, &hdmi->sys_offset);
285	if (IS_ERR(hdmi->sys_regmap))
286		return dev_err_probe(dev, PTR_ERR(hdmi->sys_regmap),
287				     "Failed to get system configuration registers\n");
288
289	hdmi->cec_dev = &cec_pdev->dev;
290	return 0;
291}
292
293static int mtk_hdmi_dt_parse_pdata(struct mtk_hdmi *hdmi, struct platform_device *pdev,
294				   const char * const *clk_names, size_t num_clocks)
295{
296	struct device *dev = &pdev->dev;
297	struct device_node *np = dev->of_node;
298	struct device_node *remote, *i2c_np;
299	int ret;
300
301	ret = mtk_hdmi_get_all_clk(hdmi, np, clk_names, num_clocks);
302	if (ret)
303		return dev_err_probe(dev, ret, "Failed to get clocks\n");
304
305	hdmi->irq = platform_get_irq(pdev, 0);
306	if (hdmi->irq < 0)
307		return hdmi->irq;
308
309	hdmi->regs = device_node_to_regmap(dev->of_node);
310	if (IS_ERR(hdmi->regs))
311		return PTR_ERR(hdmi->regs);
312
313	remote = of_graph_get_remote_node(np, 1, 0);
314	if (!remote)
315		return -EINVAL;
316
317	if (!of_device_is_compatible(remote, "hdmi-connector")) {
318		hdmi->next_bridge = of_drm_find_bridge(remote);
319		if (!hdmi->next_bridge) {
320			dev_err(dev, "Waiting for external bridge\n");
321			of_node_put(remote);
322			return -EPROBE_DEFER;
323		}
324	}
325
326	i2c_np = of_parse_phandle(remote, "ddc-i2c-bus", 0);
327	of_node_put(remote);
328	if (!i2c_np)
329		return dev_err_probe(dev, -EINVAL, "No ddc-i2c-bus in connector\n");
330
331	hdmi->ddc_adpt = of_find_i2c_adapter_by_node(i2c_np);
332	of_node_put(i2c_np);
333	if (!hdmi->ddc_adpt)
334		return dev_err_probe(dev, -EPROBE_DEFER, "Failed to get ddc i2c adapter by node\n");
335
336	ret = devm_add_action_or_reset(dev, mtk_hdmi_put_device, &hdmi->ddc_adpt->dev);
337	if (ret)
338		return ret;
339
340	ret = mtk_hdmi_get_cec_dev(hdmi, dev, np);
341	if (ret == -EOPNOTSUPP)
342		dev_info(dev, "CEC support unavailable: node not found\n");
343	else if (ret)
344		return ret;
345
346	return 0;
347}
348
349static void mtk_hdmi_unregister_audio_driver(void *data)
350{
351	platform_device_unregister(data);
352}
353
354static int mtk_hdmi_register_audio_driver(struct device *dev)
355{
356	struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
357	struct hdmi_audio_param *aud_param = &hdmi->aud_param;
358	struct hdmi_codec_pdata codec_data = {
359		.ops = hdmi->conf->ver_conf->codec_ops,
360		.max_i2s_channels = 2,
361		.i2s = 1,
362		.data = hdmi,
363		.no_capture_mute = 1,
364	};
365	int ret;
366
367	aud_param->aud_codec = HDMI_AUDIO_CODING_TYPE_PCM;
368	aud_param->aud_sample_size = HDMI_AUDIO_SAMPLE_SIZE_16;
369	aud_param->aud_input_type = HDMI_AUD_INPUT_I2S;
370	aud_param->aud_i2s_fmt = HDMI_I2S_MODE_I2S_24BIT;
371	aud_param->aud_mclk = HDMI_AUD_MCLK_128FS;
372	aud_param->aud_input_chan_type = HDMI_AUD_CHAN_TYPE_2_0;
373
374	hdmi->audio_pdev = platform_device_register_data(dev,
375							 HDMI_CODEC_DRV_NAME,
376							 PLATFORM_DEVID_AUTO,
377							 &codec_data,
378							 sizeof(codec_data));
379	if (IS_ERR(hdmi->audio_pdev))
380		return PTR_ERR(hdmi->audio_pdev);
381
382	ret = devm_add_action_or_reset(dev, mtk_hdmi_unregister_audio_driver,
383				       hdmi->audio_pdev);
384	if (ret)
385		return ret;
386
387	return 0;
388}
389
390struct mtk_hdmi *mtk_hdmi_common_probe(struct platform_device *pdev)
391{
392	const struct mtk_hdmi_ver_conf *ver_conf;
393	const struct mtk_hdmi_conf *hdmi_conf;
394	struct device *dev = &pdev->dev;
395	struct mtk_hdmi *hdmi;
396	int ret;
397
398	hdmi_conf = of_device_get_match_data(dev);
399	if (!hdmi_conf)
400		return ERR_PTR(-ENODEV);
401
402	ver_conf = hdmi_conf->ver_conf;
403
404	hdmi = devm_drm_bridge_alloc(dev, struct mtk_hdmi, bridge,
405					ver_conf->bridge_funcs);
406	if (IS_ERR(hdmi))
407		return hdmi;
408
409	hdmi->dev = dev;
410	hdmi->conf = hdmi_conf;
411
412	hdmi->clk = devm_kcalloc(dev, ver_conf->num_clocks, sizeof(*hdmi->clk), GFP_KERNEL);
413	if (!hdmi->clk)
414		return ERR_PTR(-ENOMEM);
415
416	ret = mtk_hdmi_dt_parse_pdata(hdmi, pdev, ver_conf->mtk_hdmi_clock_names,
417				      ver_conf->num_clocks);
418	if (ret)
419		return ERR_PTR(ret);
420
421	hdmi->phy = devm_phy_get(dev, "hdmi");
422	if (IS_ERR(hdmi->phy))
423		return dev_err_cast_probe(dev, hdmi->phy, "Failed to get HDMI PHY\n");
424
425	mutex_init(&hdmi->update_plugged_status_lock);
426	platform_set_drvdata(pdev, hdmi);
427
428	ret = mtk_hdmi_register_audio_driver(dev);
429	if (ret)
430		return dev_err_ptr_probe(dev, ret, "Cannot register HDMI Audio driver\n");
431
432	hdmi->bridge.of_node = pdev->dev.of_node;
433	hdmi->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID
434			 | DRM_BRIDGE_OP_HPD;
435
436	if (ver_conf->bridge_funcs->hdmi_write_infoframe &&
437	    ver_conf->bridge_funcs->hdmi_clear_infoframe)
438		hdmi->bridge.ops |= DRM_BRIDGE_OP_HDMI;
439
440	hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
441	hdmi->bridge.ddc = hdmi->ddc_adpt;
442	hdmi->bridge.vendor = "MediaTek";
443	hdmi->bridge.product = "On-Chip HDMI";
444	hdmi->bridge.interlace_allowed = ver_conf->interlace_allowed;
445
446	ret = devm_drm_bridge_add(dev, &hdmi->bridge);
447	if (ret)
448		return dev_err_ptr_probe(dev, ret, "Failed to add bridge\n");
449
450	return hdmi;
451}
452EXPORT_SYMBOL_NS_GPL(mtk_hdmi_common_probe, "DRM_MTK_HDMI");
453
454MODULE_AUTHOR("AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>");
455MODULE_DESCRIPTION("MediaTek HDMI Common Library");
456MODULE_LICENSE("GPL");
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