dc-kms.h

  1/* SPDX-License-Identifier: GPL-2.0+ */
  2/*
  3 * Copyright 2024 NXP
  4 */
  5
  6#ifndef __DC_KMS_H__
  7#define __DC_KMS_H__
  8
  9#include <linux/completion.h>
 10
 11#include <drm/drm_crtc.h>
 12#include <drm/drm_plane.h>
 13#include <drm/drm_vblank.h>
 14
 15#include "dc-de.h"
 16#include "dc-fu.h"
 17#include "dc-pe.h"
 18
 19#define DC_CRTC_IRQS	5
 20
 21struct dc_crtc_irq {
 22	struct dc_crtc *dc_crtc;
 23	unsigned int irq;
 24};
 25
 26/**
 27 * struct dc_crtc - DC specific drm_crtc
 28 *
 29 * Each display controller contains one content stream and one safety stream.
 30 * In general, the two streams have the same functionality. One stream is
 31 * overlaid on the other by @fg. This driver chooses to generate black constant
 32 * color from the content stream as background color, build plane(s) on the
 33 * content stream by using layerblend(s) and always generate a constant color
 34 * from the safety stream. Note that due to the decoupled timing, the safety
 35 * stream still works to show the constant color properly even when the content
 36 * stream has completely hung up due to mal-function of this driver.
 37 */
 38struct dc_crtc {
 39	/** @base: base drm_crtc structure */
 40	struct drm_crtc base;
 41	/** @de: display engine */
 42	struct dc_de *de;
 43	/** @cf_cont: content stream constframe */
 44	struct dc_cf *cf_cont;
 45	/** @cf_safe: safety stream constframe */
 46	struct dc_cf *cf_safe;
 47	/** @ed_cont: content stream extdst */
 48	struct dc_ed *ed_cont;
 49	/** @ed_safe: safety stream extdst */
 50	struct dc_ed *ed_safe;
 51	/** @fg: framegen */
 52	struct dc_fg *fg;
 53	/**
 54	 * @irq_dec_framecomplete:
 55	 *
 56	 * display engine configuration frame complete interrupt
 57	 */
 58	unsigned int irq_dec_framecomplete;
 59	/**
 60	 * @irq_dec_seqcomplete:
 61	 *
 62	 * display engine configuration sequence complete interrupt
 63	 */
 64	unsigned int irq_dec_seqcomplete;
 65	/**
 66	 * @irq_dec_shdload:
 67	 *
 68	 * display engine configuration shadow load interrupt
 69	 */
 70	unsigned int irq_dec_shdload;
 71	/**
 72	 * @irq_ed_cont_shdload:
 73	 *
 74	 * content stream extdst shadow load interrupt
 75	 */
 76	unsigned int irq_ed_cont_shdload;
 77	/**
 78	 * @irq_ed_safe_shdload:
 79	 *
 80	 * safety stream extdst shadow load interrupt
 81	 */
 82	unsigned int irq_ed_safe_shdload;
 83	/**
 84	 * @dec_seqcomplete_done:
 85	 *
 86	 * display engine configuration sequence completion
 87	 */
 88	struct completion dec_seqcomplete_done;
 89	/**
 90	 * @dec_shdload_done:
 91	 *
 92	 * display engine configuration shadow load completion
 93	 */
 94	struct completion dec_shdload_done;
 95	/**
 96	 * @ed_cont_shdload_done:
 97	 *
 98	 * content stream extdst shadow load completion
 99	 */
100	struct completion ed_cont_shdload_done;
101	/**
102	 * @ed_safe_shdload_done:
103	 *
104	 * safety stream extdst shadow load completion
105	 */
106	struct completion ed_safe_shdload_done;
107	/** @event: cached pending vblank event */
108	struct drm_pending_vblank_event *event;
109	/** @irqs: interrupt list */
110	struct dc_crtc_irq irqs[DC_CRTC_IRQS];
111};
112
113/**
114 * struct dc_plane - DC specific drm_plane
115 *
116 * Build a plane on content stream with a fetchunit and a layerblend.
117 */
118struct dc_plane {
119	/** @base: base drm_plane structure */
120	struct drm_plane base;
121	/** @fu: fetchunit */
122	struct dc_fu *fu;
123	/** @cf: content stream constframe */
124	struct dc_cf *cf;
125	/** @lb: layerblend */
126	struct dc_lb *lb;
127	/** @ed: content stream extdst */
128	struct dc_ed *ed;
129};
130
131#endif /* __DC_KMS_H__ */