dc-de.h

 1/* SPDX-License-Identifier: GPL-2.0+ */
 2/*
 3 * Copyright 2024 NXP
 4 */
 5
 6#ifndef __DC_DISPLAY_ENGINE_H__
 7#define __DC_DISPLAY_ENGINE_H__
 8
 9#include <linux/clk.h>
10#include <linux/device.h>
11#include <linux/regmap.h>
12#include <drm/drm_modes.h>
13
14#define DC_DISPLAYS	2
15
16#define DC_FRAMEGEN_MAX_FRAME_INDEX	0x3ffff
17#define DC_FRAMEGEN_MAX_CLOCK_KHZ	300000
18
19struct dc_fg {
20	struct device *dev;
21	struct regmap *reg;
22	struct clk *clk_disp;
23};
24
25struct dc_tc {
26	struct device *dev;
27	struct regmap *reg;
28};
29
30struct dc_de {
31	struct device *dev;
32	struct regmap *reg_top;
33	struct dc_fg *fg;
34	struct dc_tc *tc;
35	int irq_shdload;
36	int irq_framecomplete;
37	int irq_seqcomplete;
38};
39
40/* Frame Generator Unit */
41void dc_fg_cfg_videomode(struct dc_fg *fg, struct drm_display_mode *m);
42void dc_fg_enable(struct dc_fg *fg);
43void dc_fg_disable(struct dc_fg *fg);
44void dc_fg_shdtokgen(struct dc_fg *fg);
45u32 dc_fg_get_frame_index(struct dc_fg *fg);
46u32 dc_fg_get_line_index(struct dc_fg *fg);
47bool dc_fg_wait_for_frame_index_moving(struct dc_fg *fg);
48bool dc_fg_secondary_requests_to_read_empty_fifo(struct dc_fg *fg);
49void dc_fg_secondary_clear_channel_status(struct dc_fg *fg);
50int dc_fg_wait_for_secondary_syncup(struct dc_fg *fg);
51void dc_fg_enable_clock(struct dc_fg *fg);
52void dc_fg_disable_clock(struct dc_fg *fg);
53enum drm_mode_status dc_fg_check_clock(struct dc_fg *fg, int clk_khz);
54void dc_fg_init(struct dc_fg *fg);
55
56/* Timing Controller Unit */
57void dc_tc_init(struct dc_tc *tc);
58
59#endif /* __DC_DISPLAY_ENGINE_H__ */