intel_gvt.c

  1/*
  2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice (including the next
 12 * paragraph) shall be included in all copies or substantial portions of the
 13 * Software.
 14 *
 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 21 * SOFTWARE.
 22 */
 23
 24#include <drm/drm_print.h>
 25
 26#include "i915_drv.h"
 27#include "i915_vgpu.h"
 28#include "intel_gvt.h"
 29#include "gem/i915_gem_dmabuf.h"
 30#include "gt/intel_context.h"
 31#include "gt/intel_ring.h"
 32#include "gt/shmem_utils.h"
 33#include <linux/vmalloc.h>
 34
 35/**
 36 * DOC: Intel GVT-g host support
 37 *
 38 * Intel GVT-g is a graphics virtualization technology which shares the
 39 * GPU among multiple virtual machines on a time-sharing basis. Each
 40 * virtual machine is presented a virtual GPU (vGPU), which has equivalent
 41 * features as the underlying physical GPU (pGPU), so i915 driver can run
 42 * seamlessly in a virtual machine.
 43 *
 44 * To virtualize GPU resources GVT-g driver depends on hypervisor technology
 45 * e.g KVM/VFIO/mdev, Xen, etc. to provide resource access trapping capability
 46 * and be virtualized within GVT-g device module. More architectural design
 47 * doc is available on https://github.com/intel/gvt-linux/wiki.
 48 */
 49
 50static LIST_HEAD(intel_gvt_devices);
 51static const struct intel_vgpu_ops *intel_gvt_ops;
 52static DEFINE_MUTEX(intel_gvt_mutex);
 53
 54static bool is_supported_device(struct drm_i915_private *dev_priv)
 55{
 56	if (IS_BROADWELL(dev_priv))
 57		return true;
 58	if (IS_SKYLAKE(dev_priv))
 59		return true;
 60	if (IS_KABYLAKE(dev_priv))
 61		return true;
 62	if (IS_BROXTON(dev_priv))
 63		return true;
 64	if (IS_COFFEELAKE(dev_priv))
 65		return true;
 66	if (IS_COMETLAKE(dev_priv))
 67		return true;
 68
 69	return false;
 70}
 71
 72static void free_initial_hw_state(struct drm_i915_private *dev_priv)
 73{
 74	struct i915_virtual_gpu *vgpu = &dev_priv->vgpu;
 75
 76	vfree(vgpu->initial_mmio);
 77	vgpu->initial_mmio = NULL;
 78
 79	kfree(vgpu->initial_cfg_space);
 80	vgpu->initial_cfg_space = NULL;
 81}
 82
 83static void save_mmio(struct intel_gvt_mmio_table_iter *iter, u32 offset,
 84		      u32 size)
 85{
 86	struct drm_i915_private *dev_priv = iter->i915;
 87	u32 *mmio, i;
 88
 89	for (i = offset; i < offset + size; i += 4) {
 90		mmio = iter->data + i;
 91		*mmio = intel_uncore_read_notrace(to_gt(dev_priv)->uncore,
 92						  _MMIO(i));
 93	}
 94}
 95
 96static int handle_mmio(struct intel_gvt_mmio_table_iter *iter,
 97		       u32 offset, u32 size)
 98{
 99	if (WARN_ON(!IS_ALIGNED(offset, 4)))
100		return -EINVAL;
101
102	save_mmio(iter, offset, size);
103	return 0;
104}
105
106static int save_initial_hw_state(struct drm_i915_private *dev_priv)
107{
108	struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
109	struct i915_virtual_gpu *vgpu = &dev_priv->vgpu;
110	struct intel_gvt_mmio_table_iter iter;
111	void *mem;
112	int i, ret;
113
114	mem = kzalloc(PCI_CFG_SPACE_EXP_SIZE, GFP_KERNEL);
115	if (!mem)
116		return -ENOMEM;
117
118	vgpu->initial_cfg_space = mem;
119
120	for (i = 0; i < PCI_CFG_SPACE_EXP_SIZE; i += 4)
121		pci_read_config_dword(pdev, i, mem + i);
122
123	mem = vzalloc(2 * SZ_1M);
124	if (!mem) {
125		ret = -ENOMEM;
126		goto err_mmio;
127	}
128
129	vgpu->initial_mmio = mem;
130
131	iter.i915 = dev_priv;
132	iter.data = vgpu->initial_mmio;
133	iter.handle_mmio_cb = handle_mmio;
134
135	ret = intel_gvt_iterate_mmio_table(&iter);
136	if (ret)
137		goto err_iterate;
138
139	return 0;
140
141err_iterate:
142	vfree(vgpu->initial_mmio);
143	vgpu->initial_mmio = NULL;
144err_mmio:
145	kfree(vgpu->initial_cfg_space);
146	vgpu->initial_cfg_space = NULL;
147
148	return ret;
149}
150
151static void intel_gvt_init_device(struct drm_i915_private *dev_priv)
152{
153	if (!dev_priv->params.enable_gvt) {
154		drm_dbg(&dev_priv->drm,
155			"GVT-g is disabled by kernel params\n");
156		return;
157	}
158
159	if (intel_vgpu_active(dev_priv)) {
160		drm_info(&dev_priv->drm, "GVT-g is disabled for guest\n");
161		return;
162	}
163
164	if (!is_supported_device(dev_priv)) {
165		drm_info(&dev_priv->drm,
166			 "Unsupported device. GVT-g is disabled\n");
167		return;
168	}
169
170	if (intel_uc_wants_guc_submission(&to_gt(dev_priv)->uc)) {
171		drm_err(&dev_priv->drm,
172			"Graphics virtualization is not yet supported with GuC submission\n");
173		return;
174	}
175
176	if (save_initial_hw_state(dev_priv)) {
177		drm_dbg(&dev_priv->drm, "Failed to save initial HW state\n");
178		return;
179	}
180
181	if (intel_gvt_ops->init_device(dev_priv))
182		drm_dbg(&dev_priv->drm, "Fail to init GVT device\n");
183}
184
185static void intel_gvt_clean_device(struct drm_i915_private *dev_priv)
186{
187	if (dev_priv->gvt)
188		intel_gvt_ops->clean_device(dev_priv);
189	free_initial_hw_state(dev_priv);
190}
191
192int intel_gvt_set_ops(const struct intel_vgpu_ops *ops)
193{
194	struct drm_i915_private *dev_priv;
195
196	mutex_lock(&intel_gvt_mutex);
197	if (intel_gvt_ops) {
198		mutex_unlock(&intel_gvt_mutex);
199		return -EINVAL;
200	}
201	intel_gvt_ops = ops;
202
203	list_for_each_entry(dev_priv, &intel_gvt_devices, vgpu.entry)
204		intel_gvt_init_device(dev_priv);
205	mutex_unlock(&intel_gvt_mutex);
206
207	return 0;
208}
209EXPORT_SYMBOL_NS_GPL(intel_gvt_set_ops, "I915_GVT");
210
211void intel_gvt_clear_ops(const struct intel_vgpu_ops *ops)
212{
213	struct drm_i915_private *dev_priv;
214
215	mutex_lock(&intel_gvt_mutex);
216	if (intel_gvt_ops != ops) {
217		mutex_unlock(&intel_gvt_mutex);
218		return;
219	}
220
221	list_for_each_entry(dev_priv, &intel_gvt_devices, vgpu.entry)
222		intel_gvt_clean_device(dev_priv);
223
224	intel_gvt_ops = NULL;
225	mutex_unlock(&intel_gvt_mutex);
226}
227EXPORT_SYMBOL_NS_GPL(intel_gvt_clear_ops, "I915_GVT");
228
229/**
230 * intel_gvt_init - initialize GVT components
231 * @dev_priv: drm i915 private data
232 *
233 * This function is called at the initialization stage to create a GVT device.
234 *
235 * Returns:
236 * Zero on success, negative error code if failed.
237 *
238 */
239int intel_gvt_init(struct drm_i915_private *dev_priv)
240{
241	if (i915_inject_probe_failure(dev_priv))
242		return -ENODEV;
243
244	mutex_lock(&intel_gvt_mutex);
245	list_add_tail(&dev_priv->vgpu.entry, &intel_gvt_devices);
246	if (intel_gvt_ops)
247		intel_gvt_init_device(dev_priv);
248	mutex_unlock(&intel_gvt_mutex);
249
250	return 0;
251}
252
253/**
254 * intel_gvt_driver_remove - cleanup GVT components when i915 driver is
255 *			     unbinding
256 * @dev_priv: drm i915 private *
257 *
258 * This function is called at the i915 driver unloading stage, to shutdown
259 * GVT components and release the related resources.
260 */
261void intel_gvt_driver_remove(struct drm_i915_private *dev_priv)
262{
263	mutex_lock(&intel_gvt_mutex);
264	intel_gvt_clean_device(dev_priv);
265	list_del(&dev_priv->vgpu.entry);
266	mutex_unlock(&intel_gvt_mutex);
267}
268
269/**
270 * intel_gvt_resume - GVT resume routine wrapper
271 *
272 * @dev_priv: drm i915 private *
273 *
274 * This function is called at the i915 driver resume stage to restore required
275 * HW status for GVT so that vGPU can continue running after resumed.
276 */
277void intel_gvt_resume(struct drm_i915_private *dev_priv)
278{
279	mutex_lock(&intel_gvt_mutex);
280	if (dev_priv->gvt)
281		intel_gvt_ops->pm_resume(dev_priv);
282	mutex_unlock(&intel_gvt_mutex);
283}
284
285/*
286 * Exported here so that the exports only get created when GVT support is
287 * actually enabled.
288 */
289EXPORT_SYMBOL_NS_GPL(i915_gem_object_alloc, "I915_GVT");
290EXPORT_SYMBOL_NS_GPL(i915_gem_object_create_shmem, "I915_GVT");
291EXPORT_SYMBOL_NS_GPL(i915_gem_object_init, "I915_GVT");
292EXPORT_SYMBOL_NS_GPL(i915_gem_object_ggtt_pin_ww, "I915_GVT");
293EXPORT_SYMBOL_NS_GPL(i915_gem_object_pin_map, "I915_GVT");
294EXPORT_SYMBOL_NS_GPL(i915_gem_object_set_to_cpu_domain, "I915_GVT");
295EXPORT_SYMBOL_NS_GPL(__i915_gem_object_flush_map, "I915_GVT");
296EXPORT_SYMBOL_NS_GPL(__i915_gem_object_set_pages, "I915_GVT");
297EXPORT_SYMBOL_NS_GPL(i915_gem_gtt_insert, "I915_GVT");
298EXPORT_SYMBOL_NS_GPL(i915_gem_prime_export, "I915_GVT");
299EXPORT_SYMBOL_NS_GPL(i915_gem_ww_ctx_init, "I915_GVT");
300EXPORT_SYMBOL_NS_GPL(i915_gem_ww_ctx_backoff, "I915_GVT");
301EXPORT_SYMBOL_NS_GPL(i915_gem_ww_ctx_fini, "I915_GVT");
302EXPORT_SYMBOL_NS_GPL(i915_ppgtt_create, "I915_GVT");
303EXPORT_SYMBOL_NS_GPL(i915_request_add, "I915_GVT");
304EXPORT_SYMBOL_NS_GPL(i915_request_create, "I915_GVT");
305EXPORT_SYMBOL_NS_GPL(i915_request_wait, "I915_GVT");
306EXPORT_SYMBOL_NS_GPL(i915_reserve_fence, "I915_GVT");
307EXPORT_SYMBOL_NS_GPL(i915_unreserve_fence, "I915_GVT");
308EXPORT_SYMBOL_NS_GPL(i915_vm_release, "I915_GVT");
309EXPORT_SYMBOL_NS_GPL(_i915_vma_move_to_active, "I915_GVT");
310EXPORT_SYMBOL_NS_GPL(intel_context_create, "I915_GVT");
311EXPORT_SYMBOL_NS_GPL(__intel_context_do_pin, "I915_GVT");
312EXPORT_SYMBOL_NS_GPL(__intel_context_do_unpin, "I915_GVT");
313EXPORT_SYMBOL_NS_GPL(intel_ring_begin, "I915_GVT");
314EXPORT_SYMBOL_NS_GPL(intel_runtime_pm_get, "I915_GVT");
315#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
316EXPORT_SYMBOL_NS_GPL(intel_runtime_pm_put, "I915_GVT");
317#endif
318EXPORT_SYMBOL_NS_GPL(intel_runtime_pm_put_unchecked, "I915_GVT");
319EXPORT_SYMBOL_NS_GPL(intel_uncore_forcewake_for_reg, "I915_GVT");
320EXPORT_SYMBOL_NS_GPL(intel_uncore_forcewake_get, "I915_GVT");
321EXPORT_SYMBOL_NS_GPL(intel_uncore_forcewake_put, "I915_GVT");
322EXPORT_SYMBOL_NS_GPL(shmem_pin_map, "I915_GVT");
323EXPORT_SYMBOL_NS_GPL(shmem_unpin_map, "I915_GVT");
324EXPORT_SYMBOL_NS_GPL(__px_dma, "I915_GVT");
325EXPORT_SYMBOL_NS_GPL(i915_fence_ops, "I915_GVT");