intel_plane_initial.c

  1// SPDX-License-Identifier: MIT
  2/*
  3 * Copyright © 2021 Intel Corporation
  4 */
  5
  6#include <drm/drm_print.h>
  7
  8#include "gem/i915_gem_lmem.h"
  9#include "gem/i915_gem_region.h"
 10#include "i915_drv.h"
 11#include "intel_crtc.h"
 12#include "intel_display.h"
 13#include "intel_display_core.h"
 14#include "intel_display_types.h"
 15#include "intel_fb.h"
 16#include "intel_frontbuffer.h"
 17#include "intel_plane.h"
 18#include "intel_plane_initial.h"
 19
 20void intel_plane_initial_vblank_wait(struct intel_crtc *crtc)
 21{
 22	intel_crtc_wait_for_next_vblank(crtc);
 23}
 24
 25static bool
 26intel_reuse_initial_plane_obj(struct intel_crtc *this,
 27			      const struct intel_initial_plane_config plane_configs[],
 28			      struct drm_framebuffer **fb,
 29			      struct i915_vma **vma)
 30{
 31	struct intel_display *display = to_intel_display(this);
 32	struct intel_crtc *crtc;
 33
 34	for_each_intel_crtc(display->drm, crtc) {
 35		struct intel_plane *plane =
 36			to_intel_plane(crtc->base.primary);
 37		const struct intel_plane_state *plane_state =
 38			to_intel_plane_state(plane->base.state);
 39		const struct intel_crtc_state *crtc_state =
 40			to_intel_crtc_state(crtc->base.state);
 41
 42		if (!crtc_state->uapi.active)
 43			continue;
 44
 45		if (!plane_state->ggtt_vma)
 46			continue;
 47
 48		if (plane_configs[this->pipe].base == plane_configs[crtc->pipe].base) {
 49			*fb = plane_state->hw.fb;
 50			*vma = plane_state->ggtt_vma;
 51			return true;
 52		}
 53	}
 54
 55	return false;
 56}
 57
 58static enum intel_memory_type
 59initial_plane_memory_type(struct intel_display *display)
 60{
 61	struct drm_i915_private *i915 = to_i915(display->drm);
 62
 63	if (display->platform.dgfx)
 64		return INTEL_MEMORY_LOCAL;
 65	else if (HAS_LMEMBAR_SMEM_STOLEN(i915))
 66		return INTEL_MEMORY_STOLEN_LOCAL;
 67	else
 68		return INTEL_MEMORY_STOLEN_SYSTEM;
 69}
 70
 71static bool
 72initial_plane_phys(struct intel_display *display,
 73		   struct intel_initial_plane_config *plane_config)
 74{
 75	struct drm_i915_private *i915 = to_i915(display->drm);
 76	struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
 77	struct intel_memory_region *mem;
 78	enum intel_memory_type mem_type;
 79	bool is_present, is_local;
 80	dma_addr_t dma_addr;
 81	u32 base;
 82
 83	mem_type = initial_plane_memory_type(display);
 84	mem = intel_memory_region_by_type(i915, mem_type);
 85	if (!mem) {
 86		drm_dbg_kms(display->drm,
 87			    "Initial plane memory region (type %s) not initialized\n",
 88			    intel_memory_type_str(mem_type));
 89		return false;
 90	}
 91
 92	base = round_down(plane_config->base, I915_GTT_MIN_ALIGNMENT);
 93
 94	dma_addr = intel_ggtt_read_entry(&ggtt->vm, base, &is_present, &is_local);
 95
 96	if (!is_present) {
 97		drm_err(display->drm,
 98			"Initial plane FB PTE not present\n");
 99		return false;
100	}
101
102	if (intel_memory_type_is_local(mem->type) != is_local) {
103		drm_err(display->drm,
104			"Initial plane FB PTE unsuitable for %s\n",
105			mem->region.name);
106		return false;
107	}
108
109	if (dma_addr < mem->region.start || dma_addr > mem->region.end) {
110		drm_err(display->drm,
111			"Initial plane programming using invalid range, dma_addr=%pa (%s [%pa-%pa])\n",
112			&dma_addr, mem->region.name, &mem->region.start, &mem->region.end);
113		return false;
114	}
115
116	drm_dbg(display->drm,
117		"Using dma_addr=%pa, based on initial plane programming\n",
118		&dma_addr);
119
120	plane_config->phys_base = dma_addr - mem->region.start;
121	plane_config->mem = mem;
122
123	return true;
124}
125
126static struct i915_vma *
127initial_plane_vma(struct intel_display *display,
128		  struct intel_initial_plane_config *plane_config)
129{
130	struct drm_i915_private *i915 = to_i915(display->drm);
131	struct intel_memory_region *mem;
132	struct drm_i915_gem_object *obj;
133	struct drm_mm_node orig_mm = {};
134	struct i915_vma *vma;
135	resource_size_t phys_base;
136	unsigned int tiling;
137	u32 base, size;
138	u64 pinctl;
139
140	if (plane_config->size == 0)
141		return NULL;
142
143	if (!initial_plane_phys(display, plane_config))
144		return NULL;
145
146	phys_base = plane_config->phys_base;
147	mem = plane_config->mem;
148
149	base = round_down(plane_config->base, I915_GTT_MIN_ALIGNMENT);
150	size = round_up(plane_config->base + plane_config->size,
151			mem->min_page_size);
152	size -= base;
153
154	/*
155	 * If the FB is too big, just don't use it since fbdev is not very
156	 * important and we should probably use that space with FBC or other
157	 * features.
158	 */
159	if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
160	    mem == i915->mm.stolen_region &&
161	    size * 2 > i915->dsm.usable_size) {
162		drm_dbg_kms(display->drm, "Initial FB size exceeds half of stolen, discarding\n");
163		return NULL;
164	}
165
166	obj = i915_gem_object_create_region_at(mem, phys_base, size,
167					       I915_BO_ALLOC_USER |
168					       I915_BO_PREALLOC);
169	if (IS_ERR(obj)) {
170		drm_dbg_kms(display->drm, "Failed to preallocate initial FB in %s\n",
171			    mem->region.name);
172		return NULL;
173	}
174
175	/*
176	 * Mark it WT ahead of time to avoid changing the
177	 * cache_level during fbdev initialization. The
178	 * unbind there would get stuck waiting for rcu.
179	 */
180	i915_gem_object_set_cache_coherency(obj, HAS_WT(i915) ?
181					    I915_CACHE_WT : I915_CACHE_NONE);
182
183	tiling = intel_fb_modifier_to_tiling(plane_config->fb->base.modifier);
184
185	switch (tiling) {
186	case I915_TILING_NONE:
187		break;
188	case I915_TILING_X:
189	case I915_TILING_Y:
190		obj->tiling_and_stride =
191			plane_config->fb->base.pitches[0] |
192			tiling;
193		break;
194	default:
195		MISSING_CASE(tiling);
196		goto err_obj;
197	}
198
199	/*
200	 * MTL GOP likes to place the framebuffer high up in ggtt,
201	 * which can cause problems for ggtt_reserve_guc_top().
202	 * Try to pin it to a low ggtt address instead to avoid that.
203	 */
204	base = 0;
205
206	if (base != plane_config->base) {
207		struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
208		int ret;
209
210		/*
211		 * Make sure the original and new locations
212		 * can't overlap. That would corrupt the original
213		 * PTEs which are still being used for scanout.
214		 */
215		ret = i915_gem_gtt_reserve(&ggtt->vm, NULL, &orig_mm,
216					   size, plane_config->base,
217					   I915_COLOR_UNEVICTABLE, PIN_NOEVICT);
218		if (ret)
219			goto err_obj;
220	}
221
222	vma = i915_vma_instance(obj, &to_gt(i915)->ggtt->vm, NULL);
223	if (IS_ERR(vma))
224		goto err_obj;
225
226retry:
227	pinctl = PIN_GLOBAL | PIN_OFFSET_FIXED | base;
228	if (!i915_gem_object_is_lmem(obj))
229		pinctl |= PIN_MAPPABLE;
230	if (i915_vma_pin(vma, 0, 0, pinctl)) {
231		if (drm_mm_node_allocated(&orig_mm)) {
232			drm_mm_remove_node(&orig_mm);
233			/*
234			 * Try again, but this time pin
235			 * it to its original location.
236			 */
237			base = plane_config->base;
238			goto retry;
239		}
240		goto err_obj;
241	}
242
243	if (i915_gem_object_is_tiled(obj) &&
244	    !i915_vma_is_map_and_fenceable(vma))
245		goto err_obj;
246
247	if (drm_mm_node_allocated(&orig_mm))
248		drm_mm_remove_node(&orig_mm);
249
250	drm_dbg_kms(display->drm,
251		    "Initial plane fb bound to 0x%x in the ggtt (original 0x%x)\n",
252		    i915_ggtt_offset(vma), plane_config->base);
253
254	return vma;
255
256err_obj:
257	if (drm_mm_node_allocated(&orig_mm))
258		drm_mm_remove_node(&orig_mm);
259	i915_gem_object_put(obj);
260	return NULL;
261}
262
263static bool
264intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
265			      struct intel_initial_plane_config *plane_config)
266{
267	struct intel_display *display = to_intel_display(crtc);
268	struct drm_mode_fb_cmd2 mode_cmd = {};
269	struct drm_framebuffer *fb = &plane_config->fb->base;
270	struct i915_vma *vma;
271
272	switch (fb->modifier) {
273	case DRM_FORMAT_MOD_LINEAR:
274	case I915_FORMAT_MOD_X_TILED:
275	case I915_FORMAT_MOD_Y_TILED:
276	case I915_FORMAT_MOD_4_TILED:
277		break;
278	default:
279		drm_dbg(display->drm,
280			"Unsupported modifier for initial FB: 0x%llx\n",
281			fb->modifier);
282		return false;
283	}
284
285	vma = initial_plane_vma(display, plane_config);
286	if (!vma)
287		return false;
288
289	mode_cmd.pixel_format = fb->format->format;
290	mode_cmd.width = fb->width;
291	mode_cmd.height = fb->height;
292	mode_cmd.pitches[0] = fb->pitches[0];
293	mode_cmd.modifier[0] = fb->modifier;
294	mode_cmd.flags = DRM_MODE_FB_MODIFIERS;
295
296	if (intel_framebuffer_init(to_intel_framebuffer(fb),
297				   intel_bo_to_drm_bo(vma->obj),
298				   fb->format, &mode_cmd)) {
299		drm_dbg_kms(display->drm, "intel fb init failed\n");
300		goto err_vma;
301	}
302
303	plane_config->vma = vma;
304	return true;
305
306err_vma:
307	i915_vma_put(vma);
308	return false;
309}
310
311static void
312intel_find_initial_plane_obj(struct intel_crtc *crtc,
313			     struct intel_initial_plane_config plane_configs[])
314{
315	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
316	struct intel_initial_plane_config *plane_config =
317		&plane_configs[crtc->pipe];
318	struct intel_plane *plane =
319		to_intel_plane(crtc->base.primary);
320	struct intel_plane_state *plane_state =
321		to_intel_plane_state(plane->base.state);
322	struct drm_framebuffer *fb;
323	struct i915_vma *vma;
324
325	/*
326	 * TODO:
327	 *   Disable planes if get_initial_plane_config() failed.
328	 *   Make sure things work if the surface base is not page aligned.
329	 */
330	if (!plane_config->fb)
331		return;
332
333	if (intel_alloc_initial_plane_obj(crtc, plane_config)) {
334		fb = &plane_config->fb->base;
335		vma = plane_config->vma;
336		goto valid_fb;
337	}
338
339	/*
340	 * Failed to alloc the obj, check to see if we should share
341	 * an fb with another CRTC instead
342	 */
343	if (intel_reuse_initial_plane_obj(crtc, plane_configs, &fb, &vma))
344		goto valid_fb;
345
346	/*
347	 * We've failed to reconstruct the BIOS FB.  Current display state
348	 * indicates that the primary plane is visible, but has a NULL FB,
349	 * which will lead to problems later if we don't fix it up.  The
350	 * simplest solution is to just disable the primary plane now and
351	 * pretend the BIOS never had it enabled.
352	 */
353	intel_plane_disable_noatomic(crtc, plane);
354
355	return;
356
357valid_fb:
358	plane_state->uapi.rotation = plane_config->rotation;
359	intel_fb_fill_view(to_intel_framebuffer(fb),
360			   plane_state->uapi.rotation, &plane_state->view);
361
362	__i915_vma_pin(vma);
363	plane_state->ggtt_vma = i915_vma_get(vma);
364	if (intel_plane_uses_fence(plane_state) &&
365	    i915_vma_pin_fence(vma) == 0 && vma->fence)
366		plane_state->flags |= PLANE_HAS_FENCE;
367
368	plane_state->surf = i915_ggtt_offset(plane_state->ggtt_vma);
369
370	plane_state->uapi.src_x = 0;
371	plane_state->uapi.src_y = 0;
372	plane_state->uapi.src_w = fb->width << 16;
373	plane_state->uapi.src_h = fb->height << 16;
374
375	plane_state->uapi.crtc_x = 0;
376	plane_state->uapi.crtc_y = 0;
377	plane_state->uapi.crtc_w = fb->width;
378	plane_state->uapi.crtc_h = fb->height;
379
380	if (fb->modifier != DRM_FORMAT_MOD_LINEAR)
381		dev_priv->preserve_bios_swizzle = true;
382
383	plane_state->uapi.fb = fb;
384	drm_framebuffer_get(fb);
385
386	plane_state->uapi.crtc = &crtc->base;
387	intel_plane_copy_uapi_to_hw_state(plane_state, plane_state, crtc);
388
389	atomic_or(plane->frontbuffer_bit, &to_intel_frontbuffer(fb)->bits);
390}
391
392static void plane_config_fini(struct intel_initial_plane_config *plane_config)
393{
394	if (plane_config->fb) {
395		struct drm_framebuffer *fb = &plane_config->fb->base;
396
397		/* We may only have the stub and not a full framebuffer */
398		if (drm_framebuffer_read_refcount(fb))
399			drm_framebuffer_put(fb);
400		else
401			kfree(fb);
402	}
403
404	if (plane_config->vma)
405		i915_vma_put(plane_config->vma);
406}
407
408void intel_initial_plane_config(struct intel_display *display)
409{
410	struct intel_initial_plane_config plane_configs[I915_MAX_PIPES] = {};
411	struct intel_crtc *crtc;
412
413	for_each_intel_crtc(display->drm, crtc) {
414		struct intel_initial_plane_config *plane_config =
415			&plane_configs[crtc->pipe];
416
417		if (!to_intel_crtc_state(crtc->base.state)->uapi.active)
418			continue;
419
420		/*
421		 * Note that reserving the BIOS fb up front prevents us
422		 * from stuffing other stolen allocations like the ring
423		 * on top.  This prevents some ugliness at boot time, and
424		 * can even allow for smooth boot transitions if the BIOS
425		 * fb is large enough for the active pipe configuration.
426		 */
427		display->funcs.display->get_initial_plane_config(crtc, plane_config);
428
429		/*
430		 * If the fb is shared between multiple heads, we'll
431		 * just get the first one.
432		 */
433		intel_find_initial_plane_obj(crtc, plane_configs);
434
435		if (display->funcs.display->fixup_initial_plane_config(crtc, plane_config))
436			intel_plane_initial_vblank_wait(crtc);
437
438		plane_config_fini(plane_config);
439	}
440}