intel_hdmi.h

 1/* SPDX-License-Identifier: MIT */
 2/*
 3 * Copyright © 2019 Intel Corporation
 4 */
 5
 6#ifndef __INTEL_HDMI_H__
 7#define __INTEL_HDMI_H__
 8
 9#include <linux/types.h>
10
11enum hdmi_infoframe_type;
12enum intel_output_format;
13enum port;
14struct drm_connector;
15struct drm_connector_state;
16struct drm_encoder;
17struct intel_connector;
18struct intel_crtc_state;
19struct intel_digital_port;
20struct intel_encoder;
21struct intel_hdmi;
22union hdmi_infoframe;
23
24bool intel_hdmi_init_connector(struct intel_digital_port *dig_port,
25			       struct intel_connector *intel_connector);
26bool intel_hdmi_compute_has_hdmi_sink(struct intel_encoder *encoder,
27				      const struct intel_crtc_state *crtc_state,
28				      const struct drm_connector_state *conn_state);
29int intel_hdmi_compute_config(struct intel_encoder *encoder,
30			      struct intel_crtc_state *pipe_config,
31			      struct drm_connector_state *conn_state);
32void intel_hdmi_encoder_shutdown(struct intel_encoder *encoder);
33bool intel_hdmi_handle_sink_scrambling(struct intel_encoder *encoder,
34				       struct drm_connector *connector,
35				       bool high_tmds_clock_ratio,
36				       bool scrambling);
37void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable);
38void intel_infoframe_init(struct intel_digital_port *dig_port);
39u32 intel_hdmi_infoframes_enabled(struct intel_encoder *encoder,
40				  const struct intel_crtc_state *crtc_state);
41u32 intel_hdmi_infoframe_enable(unsigned int type);
42void intel_hdmi_read_gcp_infoframe(struct intel_encoder *encoder,
43				   struct intel_crtc_state *crtc_state);
44void intel_hdmi_fastset_infoframes(struct intel_encoder *encoder,
45				   const struct intel_crtc_state *crtc_state,
46				   const struct drm_connector_state *conn_state);
47void intel_read_infoframe(struct intel_encoder *encoder,
48			  const struct intel_crtc_state *crtc_state,
49			  enum hdmi_infoframe_type type,
50			  union hdmi_infoframe *frame);
51bool intel_hdmi_limited_color_range(const struct intel_crtc_state *crtc_state,
52				    const struct drm_connector_state *conn_state);
53bool intel_hdmi_bpc_possible(const struct intel_crtc_state *crtc_state,
54			     int bpc, bool has_hdmi_sink);
55int intel_hdmi_tmds_clock(int clock, int bpc, enum intel_output_format sink_format);
56int intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width,
57			   int num_slices, int output_format, bool hdmi_all_bpp,
58			   int hdmi_max_chunk_bytes);
59int intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
60				  int src_max_slices, int src_max_slice_width,
61				  int hdmi_max_slices, int hdmi_throughput);
62int intel_hdmi_dsc_get_slice_height(int vactive);
63bool intel_hdmi_is_frl(u32 clock);
64
65void hsw_write_infoframe(struct intel_encoder *encoder,
66			 const struct intel_crtc_state *crtc_state,
67			 unsigned int type,
68			 const void *frame, ssize_t len);
69void hsw_read_infoframe(struct intel_encoder *encoder,
70			const struct intel_crtc_state *crtc_state,
71			unsigned int type,
72			void *frame, ssize_t len);
73
74#endif /* __INTEL_HDMI_H__ */