intel_drrs.c

  1// SPDX-License-Identifier: MIT
  2/*
  3 * Copyright © 2021 Intel Corporation
  4 */
  5
  6#include <linux/debugfs.h>
  7
  8#include <drm/drm_print.h>
  9
 10#include "intel_atomic.h"
 11#include "intel_de.h"
 12#include "intel_display_regs.h"
 13#include "intel_display_types.h"
 14#include "intel_drrs.h"
 15#include "intel_frontbuffer.h"
 16#include "intel_panel.h"
 17
 18/**
 19 * DOC: Display Refresh Rate Switching (DRRS)
 20 *
 21 * Display Refresh Rate Switching (DRRS) is a power conservation feature
 22 * which enables swtching between low and high refresh rates,
 23 * dynamically, based on the usage scenario. This feature is applicable
 24 * for internal panels.
 25 *
 26 * Indication that the panel supports DRRS is given by the panel EDID, which
 27 * would list multiple refresh rates for one resolution.
 28 *
 29 * DRRS is of 2 types - static and seamless.
 30 * Static DRRS involves changing refresh rate (RR) by doing a full modeset
 31 * (may appear as a blink on screen) and is used in dock-undock scenario.
 32 * Seamless DRRS involves changing RR without any visual effect to the user
 33 * and can be used during normal system usage. This is done by programming
 34 * certain registers.
 35 *
 36 * Support for static/seamless DRRS may be indicated in the VBT based on
 37 * inputs from the panel spec.
 38 *
 39 * DRRS saves power by switching to low RR based on usage scenarios.
 40 *
 41 * The implementation is based on frontbuffer tracking implementation.  When
 42 * there is a disturbance on the screen triggered by user activity or a periodic
 43 * system activity, DRRS is disabled (RR is changed to high RR).  When there is
 44 * no movement on screen, after a timeout of 1 second, a switch to low RR is
 45 * made.
 46 *
 47 * For integration with frontbuffer tracking code, intel_drrs_invalidate()
 48 * and intel_drrs_flush() are called.
 49 *
 50 * DRRS can be further extended to support other internal panels and also
 51 * the scenario of video playback wherein RR is set based on the rate
 52 * requested by userspace.
 53 */
 54
 55const char *intel_drrs_type_str(enum drrs_type drrs_type)
 56{
 57	static const char * const str[] = {
 58		[DRRS_TYPE_NONE] = "none",
 59		[DRRS_TYPE_STATIC] = "static",
 60		[DRRS_TYPE_SEAMLESS] = "seamless",
 61	};
 62
 63	if (drrs_type >= ARRAY_SIZE(str))
 64		return "<invalid>";
 65
 66	return str[drrs_type];
 67}
 68
 69bool intel_cpu_transcoder_has_drrs(struct intel_display *display,
 70				   enum transcoder cpu_transcoder)
 71{
 72	if (HAS_DOUBLE_BUFFERED_M_N(display))
 73		return true;
 74
 75	return intel_cpu_transcoder_has_m2_n2(display, cpu_transcoder);
 76}
 77
 78static void
 79intel_drrs_set_refresh_rate_pipeconf(struct intel_crtc *crtc,
 80				     enum drrs_refresh_rate refresh_rate)
 81{
 82	struct intel_display *display = to_intel_display(crtc);
 83	enum transcoder cpu_transcoder = crtc->drrs.cpu_transcoder;
 84	u32 bit;
 85
 86	if (display->platform.valleyview || display->platform.cherryview)
 87		bit = TRANSCONF_REFRESH_RATE_ALT_VLV;
 88	else
 89		bit = TRANSCONF_REFRESH_RATE_ALT_ILK;
 90
 91	intel_de_rmw(display, TRANSCONF(display, cpu_transcoder),
 92		     bit, refresh_rate == DRRS_REFRESH_RATE_LOW ? bit : 0);
 93}
 94
 95static void
 96intel_drrs_set_refresh_rate_m_n(struct intel_crtc *crtc,
 97				enum drrs_refresh_rate refresh_rate)
 98{
 99	intel_cpu_transcoder_set_m1_n1(crtc, crtc->drrs.cpu_transcoder,
100				       refresh_rate == DRRS_REFRESH_RATE_LOW ?
101				       &crtc->drrs.m2_n2 : &crtc->drrs.m_n);
102}
103
104bool intel_drrs_is_active(struct intel_crtc *crtc)
105{
106	return crtc->drrs.cpu_transcoder != INVALID_TRANSCODER;
107}
108
109static void intel_drrs_set_state(struct intel_crtc *crtc,
110				 enum drrs_refresh_rate refresh_rate)
111{
112	struct intel_display *display = to_intel_display(crtc);
113
114	if (refresh_rate == crtc->drrs.refresh_rate)
115		return;
116
117	if (intel_cpu_transcoder_has_m2_n2(display, crtc->drrs.cpu_transcoder))
118		intel_drrs_set_refresh_rate_pipeconf(crtc, refresh_rate);
119	else
120		intel_drrs_set_refresh_rate_m_n(crtc, refresh_rate);
121
122	crtc->drrs.refresh_rate = refresh_rate;
123}
124
125static void intel_drrs_schedule_work(struct intel_crtc *crtc)
126{
127	struct intel_display *display = to_intel_display(crtc);
128
129	mod_delayed_work(display->wq.unordered, &crtc->drrs.work, msecs_to_jiffies(1000));
130}
131
132static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *crtc_state)
133{
134	struct intel_display *display = to_intel_display(crtc_state);
135	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
136	unsigned int frontbuffer_bits;
137
138	frontbuffer_bits = INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe);
139
140	for_each_intel_crtc_in_pipe_mask(display->drm, crtc,
141					 crtc_state->joiner_pipes)
142		frontbuffer_bits |= INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe);
143
144	return frontbuffer_bits;
145}
146
147/**
148 * intel_drrs_activate - activate DRRS
149 * @crtc_state: the crtc state
150 *
151 * Activates DRRS on the crtc.
152 */
153void intel_drrs_activate(const struct intel_crtc_state *crtc_state)
154{
155	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
156
157	if (!crtc_state->has_drrs)
158		return;
159
160	if (!crtc_state->hw.active)
161		return;
162
163	if (intel_crtc_is_joiner_secondary(crtc_state))
164		return;
165
166	mutex_lock(&crtc->drrs.mutex);
167
168	crtc->drrs.cpu_transcoder = crtc_state->cpu_transcoder;
169	crtc->drrs.m_n = crtc_state->dp_m_n;
170	crtc->drrs.m2_n2 = crtc_state->dp_m2_n2;
171	crtc->drrs.frontbuffer_bits = intel_drrs_frontbuffer_bits(crtc_state);
172	crtc->drrs.busy_frontbuffer_bits = 0;
173
174	intel_drrs_schedule_work(crtc);
175
176	mutex_unlock(&crtc->drrs.mutex);
177}
178
179/**
180 * intel_drrs_deactivate - deactivate DRRS
181 * @old_crtc_state: the old crtc state
182 *
183 * Deactivates DRRS on the crtc.
184 */
185void intel_drrs_deactivate(const struct intel_crtc_state *old_crtc_state)
186{
187	struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
188
189	if (!old_crtc_state->has_drrs)
190		return;
191
192	if (!old_crtc_state->hw.active)
193		return;
194
195	if (intel_crtc_is_joiner_secondary(old_crtc_state))
196		return;
197
198	mutex_lock(&crtc->drrs.mutex);
199
200	if (intel_drrs_is_active(crtc))
201		intel_drrs_set_state(crtc, DRRS_REFRESH_RATE_HIGH);
202
203	crtc->drrs.cpu_transcoder = INVALID_TRANSCODER;
204	crtc->drrs.frontbuffer_bits = 0;
205	crtc->drrs.busy_frontbuffer_bits = 0;
206
207	mutex_unlock(&crtc->drrs.mutex);
208
209	cancel_delayed_work_sync(&crtc->drrs.work);
210}
211
212static void intel_drrs_downclock_work(struct work_struct *work)
213{
214	struct intel_crtc *crtc = container_of(work, typeof(*crtc), drrs.work.work);
215
216	mutex_lock(&crtc->drrs.mutex);
217
218	if (intel_drrs_is_active(crtc) && !crtc->drrs.busy_frontbuffer_bits)
219		intel_drrs_set_state(crtc, DRRS_REFRESH_RATE_LOW);
220
221	mutex_unlock(&crtc->drrs.mutex);
222}
223
224static void intel_drrs_frontbuffer_update(struct intel_display *display,
225					  unsigned int all_frontbuffer_bits,
226					  bool invalidate)
227{
228	struct intel_crtc *crtc;
229
230	for_each_intel_crtc(display->drm, crtc) {
231		unsigned int frontbuffer_bits;
232
233		mutex_lock(&crtc->drrs.mutex);
234
235		frontbuffer_bits = all_frontbuffer_bits & crtc->drrs.frontbuffer_bits;
236		if (!frontbuffer_bits) {
237			mutex_unlock(&crtc->drrs.mutex);
238			continue;
239		}
240
241		if (invalidate)
242			crtc->drrs.busy_frontbuffer_bits |= frontbuffer_bits;
243		else
244			crtc->drrs.busy_frontbuffer_bits &= ~frontbuffer_bits;
245
246		/* flush/invalidate means busy screen hence upclock */
247		intel_drrs_set_state(crtc, DRRS_REFRESH_RATE_HIGH);
248
249		/*
250		 * flush also means no more activity hence schedule downclock, if all
251		 * other fbs are quiescent too
252		 */
253		if (!crtc->drrs.busy_frontbuffer_bits)
254			intel_drrs_schedule_work(crtc);
255		else
256			cancel_delayed_work(&crtc->drrs.work);
257
258		mutex_unlock(&crtc->drrs.mutex);
259	}
260}
261
262/**
263 * intel_drrs_invalidate - Disable Idleness DRRS
264 * @display: display device
265 * @frontbuffer_bits: frontbuffer plane tracking bits
266 *
267 * This function gets called everytime rendering on the given planes start.
268 * Hence DRRS needs to be Upclocked, i.e. (LOW_RR -> HIGH_RR).
269 *
270 * Dirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits.
271 */
272void intel_drrs_invalidate(struct intel_display *display,
273			   unsigned int frontbuffer_bits)
274{
275	intel_drrs_frontbuffer_update(display, frontbuffer_bits, true);
276}
277
278/**
279 * intel_drrs_flush - Restart Idleness DRRS
280 * @display: display device
281 * @frontbuffer_bits: frontbuffer plane tracking bits
282 *
283 * This function gets called every time rendering on the given planes has
284 * completed or flip on a crtc is completed. So DRRS should be upclocked
285 * (LOW_RR -> HIGH_RR). And also Idleness detection should be started again,
286 * if no other planes are dirty.
287 *
288 * Dirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits.
289 */
290void intel_drrs_flush(struct intel_display *display,
291		      unsigned int frontbuffer_bits)
292{
293	intel_drrs_frontbuffer_update(display, frontbuffer_bits, false);
294}
295
296/**
297 * intel_drrs_crtc_init - Init DRRS for CRTC
298 * @crtc: crtc
299 *
300 * This function is called only once at driver load to initialize basic
301 * DRRS stuff.
302 *
303 */
304void intel_drrs_crtc_init(struct intel_crtc *crtc)
305{
306	INIT_DELAYED_WORK(&crtc->drrs.work, intel_drrs_downclock_work);
307	mutex_init(&crtc->drrs.mutex);
308	crtc->drrs.cpu_transcoder = INVALID_TRANSCODER;
309}
310
311static int intel_drrs_debugfs_status_show(struct seq_file *m, void *unused)
312{
313	struct intel_crtc *crtc = m->private;
314	struct intel_display *display = to_intel_display(crtc);
315	const struct intel_crtc_state *crtc_state;
316	int ret;
317
318	ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
319	if (ret)
320		return ret;
321
322	crtc_state = to_intel_crtc_state(crtc->base.state);
323
324	mutex_lock(&crtc->drrs.mutex);
325
326	seq_printf(m, "DRRS capable: %s\n",
327		   str_yes_no(intel_cpu_transcoder_has_drrs(display,
328							    crtc_state->cpu_transcoder)));
329
330	seq_printf(m, "DRRS enabled: %s\n",
331		   str_yes_no(crtc_state->has_drrs));
332
333	seq_printf(m, "DRRS active: %s\n",
334		   str_yes_no(intel_drrs_is_active(crtc)));
335
336	seq_printf(m, "DRRS refresh rate: %s\n",
337		   crtc->drrs.refresh_rate == DRRS_REFRESH_RATE_LOW ?
338		   "low" : "high");
339
340	seq_printf(m, "DRRS busy frontbuffer bits: 0x%x\n",
341		   crtc->drrs.busy_frontbuffer_bits);
342
343	mutex_unlock(&crtc->drrs.mutex);
344
345	drm_modeset_unlock(&crtc->base.mutex);
346
347	return 0;
348}
349
350DEFINE_SHOW_ATTRIBUTE(intel_drrs_debugfs_status);
351
352static int intel_drrs_debugfs_ctl_set(void *data, u64 val)
353{
354	struct intel_crtc *crtc = data;
355	struct intel_display *display = to_intel_display(crtc);
356	struct intel_crtc_state *crtc_state;
357	struct drm_crtc_commit *commit;
358	int ret;
359
360	ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
361	if (ret)
362		return ret;
363
364	crtc_state = to_intel_crtc_state(crtc->base.state);
365
366	if (!crtc_state->hw.active ||
367	    !crtc_state->has_drrs)
368		goto out;
369
370	commit = crtc_state->uapi.commit;
371	if (commit) {
372		ret = wait_for_completion_interruptible(&commit->hw_done);
373		if (ret)
374			goto out;
375	}
376
377	drm_dbg_kms(display->drm, "Manually %sactivating DRRS\n", val ? "" : "de");
378
379	if (val)
380		intel_drrs_activate(crtc_state);
381	else
382		intel_drrs_deactivate(crtc_state);
383
384out:
385	drm_modeset_unlock(&crtc->base.mutex);
386
387	return ret;
388}
389
390DEFINE_DEBUGFS_ATTRIBUTE(intel_drrs_debugfs_ctl_fops,
391			 NULL, intel_drrs_debugfs_ctl_set, "%llu\n");
392
393void intel_drrs_crtc_debugfs_add(struct intel_crtc *crtc)
394{
395	debugfs_create_file("i915_drrs_status", 0444, crtc->base.debugfs_entry,
396			    crtc, &intel_drrs_debugfs_status_fops);
397
398	debugfs_create_file_unsafe("i915_drrs_ctl", 0644, crtc->base.debugfs_entry,
399				   crtc, &intel_drrs_debugfs_ctl_fops);
400}
401
402static int intel_drrs_debugfs_type_show(struct seq_file *m, void *unused)
403{
404	struct intel_connector *connector = m->private;
405
406	seq_printf(m, "DRRS type: %s\n",
407		   intel_drrs_type_str(intel_panel_drrs_type(connector)));
408
409	return 0;
410}
411
412DEFINE_SHOW_ATTRIBUTE(intel_drrs_debugfs_type);
413
414void intel_drrs_connector_debugfs_add(struct intel_connector *connector)
415{
416	if (intel_panel_drrs_type(connector) == DRRS_TYPE_NONE)
417		return;
418
419	debugfs_create_file("i915_drrs_type", 0444, connector->base.debugfs_entry,
420			    connector, &intel_drrs_debugfs_type_fops);
421}