intel_display_debugfs.c

   1// SPDX-License-Identifier: MIT
   2/*
   3 * Copyright © 2020 Intel Corporation
   4 */
   5
   6#include <linux/debugfs.h>
   7#include <linux/string_choices.h>
   8#include <linux/string_helpers.h>
   9
  10#include <drm/drm_debugfs.h>
  11#include <drm/drm_drv.h>
  12#include <drm/drm_edid.h>
  13#include <drm/drm_file.h>
  14#include <drm/drm_fourcc.h>
  15#include <drm/drm_print.h>
  16
  17#include "hsw_ips.h"
  18#include "i915_reg.h"
  19#include "i9xx_wm_regs.h"
  20#include "intel_alpm.h"
  21#include "intel_bo.h"
  22#include "intel_crtc.h"
  23#include "intel_crtc_state_dump.h"
  24#include "intel_de.h"
  25#include "intel_display_debugfs.h"
  26#include "intel_display_debugfs_params.h"
  27#include "intel_display_power.h"
  28#include "intel_display_power_well.h"
  29#include "intel_display_regs.h"
  30#include "intel_display_rpm.h"
  31#include "intel_display_types.h"
  32#include "intel_dmc.h"
  33#include "intel_dp.h"
  34#include "intel_dp_link_training.h"
  35#include "intel_dp_mst.h"
  36#include "intel_dp_test.h"
  37#include "intel_drrs.h"
  38#include "intel_fb.h"
  39#include "intel_fbc.h"
  40#include "intel_fbdev.h"
  41#include "intel_hdcp.h"
  42#include "intel_hdmi.h"
  43#include "intel_hotplug.h"
  44#include "intel_link_bw.h"
  45#include "intel_panel.h"
  46#include "intel_pps.h"
  47#include "intel_psr.h"
  48#include "intel_psr_regs.h"
  49#include "intel_vdsc.h"
  50#include "intel_wm.h"
  51#include "intel_tc.h"
  52
  53static struct intel_display *node_to_intel_display(struct drm_info_node *node)
  54{
  55	return to_intel_display(node->minor->dev);
  56}
  57
  58static int intel_display_caps(struct seq_file *m, void *data)
  59{
  60	struct intel_display *display = node_to_intel_display(m->private);
  61	struct drm_printer p = drm_seq_file_printer(m);
  62
  63	drm_printf(&p, "PCH type: %d\n", INTEL_PCH_TYPE(display));
  64
  65	intel_display_device_info_print(DISPLAY_INFO(display),
  66					DISPLAY_RUNTIME_INFO(display), &p);
  67	intel_display_params_dump(&display->params, display->drm->driver->name, &p);
  68
  69	return 0;
  70}
  71
  72static int i915_frontbuffer_tracking(struct seq_file *m, void *unused)
  73{
  74	struct intel_display *display = node_to_intel_display(m->private);
  75
  76	spin_lock(&display->fb_tracking.lock);
  77
  78	seq_printf(m, "FB tracking busy bits: 0x%08x\n",
  79		   display->fb_tracking.busy_bits);
  80
  81	spin_unlock(&display->fb_tracking.lock);
  82
  83	return 0;
  84}
  85
  86static int i915_sr_status(struct seq_file *m, void *unused)
  87{
  88	struct intel_display *display = node_to_intel_display(m->private);
  89	intel_wakeref_t wakeref;
  90	bool sr_enabled = false;
  91
  92	wakeref = intel_display_power_get(display, POWER_DOMAIN_INIT);
  93
  94	if (DISPLAY_VER(display) >= 9)
  95		/* no global SR status; inspect per-plane WM */;
  96	else if (HAS_PCH_SPLIT(display))
  97		sr_enabled = intel_de_read(display, WM1_LP_ILK) & WM_LP_ENABLE;
  98	else if (display->platform.i965gm || display->platform.g4x ||
  99		 display->platform.i945g || display->platform.i945gm)
 100		sr_enabled = intel_de_read(display, FW_BLC_SELF) & FW_BLC_SELF_EN;
 101	else if (display->platform.i915gm)
 102		sr_enabled = intel_de_read(display, INSTPM) & INSTPM_SELF_EN;
 103	else if (display->platform.pineview)
 104		sr_enabled = intel_de_read(display, DSPFW3(display)) & PINEVIEW_SELF_REFRESH_EN;
 105	else if (display->platform.valleyview || display->platform.cherryview)
 106		sr_enabled = intel_de_read(display, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
 107
 108	intel_display_power_put(display, POWER_DOMAIN_INIT, wakeref);
 109
 110	seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled));
 111
 112	return 0;
 113}
 114
 115static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
 116{
 117	struct intel_display *display = node_to_intel_display(m->private);
 118	struct intel_framebuffer *fbdev_fb = NULL;
 119	struct drm_framebuffer *drm_fb;
 120
 121	fbdev_fb = intel_fbdev_framebuffer(display->fbdev.fbdev);
 122	if (fbdev_fb) {
 123		seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
 124			   fbdev_fb->base.width,
 125			   fbdev_fb->base.height,
 126			   fbdev_fb->base.format->depth,
 127			   fbdev_fb->base.format->cpp[0] * 8,
 128			   fbdev_fb->base.modifier,
 129			   drm_framebuffer_read_refcount(&fbdev_fb->base));
 130		intel_bo_describe(m, intel_fb_bo(&fbdev_fb->base));
 131		seq_putc(m, '\n');
 132	}
 133
 134	mutex_lock(&display->drm->mode_config.fb_lock);
 135	drm_for_each_fb(drm_fb, display->drm) {
 136		struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb);
 137		if (fb == fbdev_fb)
 138			continue;
 139
 140		seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
 141			   fb->base.width,
 142			   fb->base.height,
 143			   fb->base.format->depth,
 144			   fb->base.format->cpp[0] * 8,
 145			   fb->base.modifier,
 146			   drm_framebuffer_read_refcount(&fb->base));
 147		intel_bo_describe(m, intel_fb_bo(&fb->base));
 148		seq_putc(m, '\n');
 149	}
 150	mutex_unlock(&display->drm->mode_config.fb_lock);
 151
 152	return 0;
 153}
 154
 155static int i915_power_domain_info(struct seq_file *m, void *unused)
 156{
 157	struct intel_display *display = node_to_intel_display(m->private);
 158
 159	intel_display_power_debug(display, m);
 160
 161	return 0;
 162}
 163
 164static void intel_seq_print_mode(struct seq_file *m, int tabs,
 165				 const struct drm_display_mode *mode)
 166{
 167	int i;
 168
 169	for (i = 0; i < tabs; i++)
 170		seq_putc(m, '\t');
 171
 172	seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));
 173}
 174
 175static void intel_encoder_info(struct seq_file *m,
 176			       struct intel_crtc *crtc,
 177			       struct intel_encoder *encoder)
 178{
 179	struct intel_display *display = node_to_intel_display(m->private);
 180	struct drm_connector_list_iter conn_iter;
 181	struct drm_connector *connector;
 182
 183	seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n",
 184		   encoder->base.base.id, encoder->base.name);
 185
 186	drm_connector_list_iter_begin(display->drm, &conn_iter);
 187	drm_for_each_connector_iter(connector, &conn_iter) {
 188		const struct drm_connector_state *conn_state =
 189			connector->state;
 190
 191		if (conn_state->best_encoder != &encoder->base)
 192			continue;
 193
 194		seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n",
 195			   connector->base.id, connector->name);
 196	}
 197	drm_connector_list_iter_end(&conn_iter);
 198}
 199
 200static void intel_panel_info(struct seq_file *m,
 201			     struct intel_connector *connector)
 202{
 203	const struct drm_display_mode *fixed_mode;
 204
 205	if (list_empty(&connector->panel.fixed_modes))
 206		return;
 207
 208	seq_puts(m, "\tfixed modes:\n");
 209
 210	list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head)
 211		intel_seq_print_mode(m, 2, fixed_mode);
 212}
 213
 214static void intel_dp_info(struct seq_file *m, struct intel_connector *connector)
 215{
 216	struct intel_encoder *intel_encoder = intel_attached_encoder(connector);
 217	struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder);
 218
 219	seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]);
 220	seq_printf(m, "\taudio support: %s\n",
 221		   str_yes_no(connector->base.display_info.has_audio));
 222
 223	drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports,
 224				connector->detect_edid, &intel_dp->aux);
 225}
 226
 227static void intel_dp_mst_info(struct seq_file *m,
 228			      struct intel_connector *connector)
 229{
 230	bool has_audio = connector->base.display_info.has_audio;
 231
 232	seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
 233}
 234
 235static void intel_hdmi_info(struct seq_file *m,
 236			    struct intel_connector *connector)
 237{
 238	bool has_audio = connector->base.display_info.has_audio;
 239
 240	seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
 241}
 242
 243static void intel_connector_info(struct seq_file *m,
 244				 struct drm_connector *connector)
 245{
 246	struct intel_connector *intel_connector = to_intel_connector(connector);
 247	const struct drm_display_mode *mode;
 248	struct drm_printer p = drm_seq_file_printer(m);
 249	struct intel_digital_port *dig_port = NULL;
 250
 251	seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n",
 252		   connector->base.id, connector->name,
 253		   drm_get_connector_status_name(connector->status));
 254
 255	if (connector->status == connector_status_disconnected)
 256		return;
 257
 258	seq_printf(m, "\tphysical dimensions: %dx%dmm\n",
 259		   connector->display_info.width_mm,
 260		   connector->display_info.height_mm);
 261	seq_printf(m, "\tsubpixel order: %s\n",
 262		   drm_get_subpixel_order_name(connector->display_info.subpixel_order));
 263	seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev);
 264
 265	switch (connector->connector_type) {
 266	case DRM_MODE_CONNECTOR_DisplayPort:
 267	case DRM_MODE_CONNECTOR_eDP:
 268		if (intel_connector->mst.dp)
 269			intel_dp_mst_info(m, intel_connector);
 270		else
 271			intel_dp_info(m, intel_connector);
 272		dig_port = dp_to_dig_port(intel_attached_dp(intel_connector));
 273		break;
 274	case DRM_MODE_CONNECTOR_HDMIA:
 275		intel_hdmi_info(m, intel_connector);
 276		dig_port = hdmi_to_dig_port(intel_attached_hdmi(intel_connector));
 277		break;
 278	default:
 279		break;
 280	}
 281
 282	if (dig_port != NULL && intel_encoder_is_tc(&dig_port->base))
 283		intel_tc_info(&p, dig_port);
 284
 285	intel_hdcp_info(m, intel_connector);
 286
 287	seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc);
 288
 289	intel_panel_info(m, intel_connector);
 290
 291	seq_printf(m, "\tmodes:\n");
 292	list_for_each_entry(mode, &connector->modes, head)
 293		intel_seq_print_mode(m, 2, mode);
 294}
 295
 296static const char *plane_type(enum drm_plane_type type)
 297{
 298	switch (type) {
 299	case DRM_PLANE_TYPE_OVERLAY:
 300		return "OVL";
 301	case DRM_PLANE_TYPE_PRIMARY:
 302		return "PRI";
 303	case DRM_PLANE_TYPE_CURSOR:
 304		return "CUR";
 305	/*
 306	 * Deliberately omitting default: to generate compiler warnings
 307	 * when a new drm_plane_type gets added.
 308	 */
 309	}
 310
 311	return "unknown";
 312}
 313
 314static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation)
 315{
 316	/*
 317	 * According to doc only one DRM_MODE_ROTATE_ is allowed but this
 318	 * will print them all to visualize if the values are misused
 319	 */
 320	snprintf(buf, bufsize,
 321		 "%s%s%s%s%s%s(0x%08x)",
 322		 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "",
 323		 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "",
 324		 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "",
 325		 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "",
 326		 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "",
 327		 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "",
 328		 rotation);
 329}
 330
 331static const char *plane_visibility(const struct intel_plane_state *plane_state)
 332{
 333	if (plane_state->uapi.visible)
 334		return "visible";
 335
 336	if (plane_state->is_y_plane)
 337		return "Y plane";
 338
 339	return "hidden";
 340}
 341
 342static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane)
 343{
 344	const struct intel_plane_state *plane_state =
 345		to_intel_plane_state(plane->base.state);
 346	const struct drm_framebuffer *fb = plane_state->uapi.fb;
 347	struct drm_rect src, dst;
 348	char rot_str[48];
 349
 350	src = drm_plane_state_src(&plane_state->uapi);
 351	dst = drm_plane_state_dest(&plane_state->uapi);
 352
 353	plane_rotation(rot_str, sizeof(rot_str),
 354		       plane_state->uapi.rotation);
 355
 356	seq_puts(m, "\t\tuapi: [FB:");
 357	if (fb)
 358		seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id,
 359			   &fb->format->format, fb->modifier, fb->width,
 360			   fb->height);
 361	else
 362		seq_puts(m, "0] n/a,0x0,0x0,");
 363	seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT
 364		   ", rotation=%s\n", plane_visibility(plane_state),
 365		   DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str);
 366
 367	if (plane_state->planar_linked_plane)
 368		seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n",
 369			   plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name,
 370			   plane_state->is_y_plane ? "Y plane" : "UV plane");
 371}
 372
 373static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane)
 374{
 375	const struct intel_plane_state *plane_state =
 376		to_intel_plane_state(plane->base.state);
 377	const struct drm_framebuffer *fb = plane_state->hw.fb;
 378	char rot_str[48];
 379
 380	if (!fb)
 381		return;
 382
 383	plane_rotation(rot_str, sizeof(rot_str),
 384		       plane_state->hw.rotation);
 385
 386	seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src="
 387		   DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n",
 388		   fb->base.id, &fb->format->format,
 389		   fb->modifier, fb->width, fb->height,
 390		   str_yes_no(plane_state->uapi.visible),
 391		   DRM_RECT_FP_ARG(&plane_state->uapi.src),
 392		   DRM_RECT_ARG(&plane_state->uapi.dst),
 393		   rot_str);
 394}
 395
 396static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc)
 397{
 398	struct intel_display *display = node_to_intel_display(m->private);
 399	struct intel_plane *plane;
 400
 401	for_each_intel_plane_on_crtc(display->drm, crtc, plane) {
 402		seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n",
 403			   plane->base.base.id, plane->base.name,
 404			   plane_type(plane->base.type));
 405		intel_plane_uapi_info(m, plane);
 406		intel_plane_hw_info(m, plane);
 407	}
 408}
 409
 410static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc)
 411{
 412	const struct intel_crtc_state *crtc_state =
 413		to_intel_crtc_state(crtc->base.state);
 414	int num_scalers = crtc->num_scalers;
 415	int i;
 416
 417	/* Not all platforms have a scaler */
 418	if (num_scalers) {
 419		seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d",
 420			   num_scalers,
 421			   crtc_state->scaler_state.scaler_users,
 422			   crtc_state->scaler_state.scaler_id,
 423			   crtc_state->hw.scaling_filter);
 424
 425		for (i = 0; i < num_scalers; i++) {
 426			const struct intel_scaler *sc =
 427				&crtc_state->scaler_state.scalers[i];
 428
 429			seq_printf(m, ", scalers[%d]: use=%s, mode=%x",
 430				   i, str_yes_no(sc->in_use), sc->mode);
 431		}
 432		seq_puts(m, "\n");
 433	} else {
 434		seq_puts(m, "\tNo scalers available on this platform\n");
 435	}
 436}
 437
 438#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE)
 439static void crtc_updates_info(struct seq_file *m,
 440			      struct intel_crtc *crtc,
 441			      const char *hdr)
 442{
 443	u64 count;
 444	int row;
 445
 446	count = 0;
 447	for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++)
 448		count += crtc->debug.vbl.times[row];
 449	seq_printf(m, "%sUpdates: %llu\n", hdr, count);
 450	if (!count)
 451		return;
 452
 453	for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) {
 454		char columns[80] = "       |";
 455		unsigned int x;
 456
 457		if (row & 1) {
 458			const char *units;
 459
 460			if (row > 10) {
 461				x = 1000000;
 462				units = "ms";
 463			} else {
 464				x = 1000;
 465				units = "us";
 466			}
 467
 468			snprintf(columns, sizeof(columns), "%4ld%s |",
 469				 DIV_ROUND_CLOSEST(BIT(row + 9), x), units);
 470		}
 471
 472		if (crtc->debug.vbl.times[row]) {
 473			x = ilog2(crtc->debug.vbl.times[row]);
 474			memset(columns + 8, '*', x);
 475			columns[8 + x] = '\0';
 476		}
 477
 478		seq_printf(m, "%s%s\n", hdr, columns);
 479	}
 480
 481	seq_printf(m, "%sMin update: %lluns\n",
 482		   hdr, crtc->debug.vbl.min);
 483	seq_printf(m, "%sMax update: %lluns\n",
 484		   hdr, crtc->debug.vbl.max);
 485	seq_printf(m, "%sAverage update: %lluns\n",
 486		   hdr, div64_u64(crtc->debug.vbl.sum, count));
 487	seq_printf(m, "%sOverruns > %uus: %u\n",
 488		   hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over);
 489}
 490
 491static int crtc_updates_show(struct seq_file *m, void *data)
 492{
 493	crtc_updates_info(m, m->private, "");
 494	return 0;
 495}
 496
 497static int crtc_updates_open(struct inode *inode, struct file *file)
 498{
 499	return single_open(file, crtc_updates_show, inode->i_private);
 500}
 501
 502static ssize_t crtc_updates_write(struct file *file,
 503				  const char __user *ubuf,
 504				  size_t len, loff_t *offp)
 505{
 506	struct seq_file *m = file->private_data;
 507	struct intel_crtc *crtc = m->private;
 508
 509	/* May race with an update. Meh. */
 510	memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl));
 511
 512	return len;
 513}
 514
 515static const struct file_operations crtc_updates_fops = {
 516	.owner = THIS_MODULE,
 517	.open = crtc_updates_open,
 518	.read = seq_read,
 519	.llseek = seq_lseek,
 520	.release = single_release,
 521	.write = crtc_updates_write
 522};
 523
 524static void crtc_updates_add(struct intel_crtc *crtc)
 525{
 526	debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry,
 527			    crtc, &crtc_updates_fops);
 528}
 529
 530#else
 531static void crtc_updates_info(struct seq_file *m,
 532			      struct intel_crtc *crtc,
 533			      const char *hdr)
 534{
 535}
 536
 537static void crtc_updates_add(struct intel_crtc *crtc)
 538{
 539}
 540#endif
 541
 542static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc)
 543{
 544	struct intel_display *display = node_to_intel_display(m->private);
 545	struct drm_printer p = drm_seq_file_printer(m);
 546	const struct intel_crtc_state *crtc_state =
 547		to_intel_crtc_state(crtc->base.state);
 548	struct intel_encoder *encoder;
 549
 550	seq_printf(m, "[CRTC:%d:%s]:\n",
 551		   crtc->base.base.id, crtc->base.name);
 552
 553	seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n",
 554		   str_yes_no(crtc_state->uapi.enable),
 555		   str_yes_no(crtc_state->uapi.active),
 556		   DRM_MODE_ARG(&crtc_state->uapi.mode));
 557
 558	seq_printf(m, "\thw: enable=%s, active=%s\n",
 559		   str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active));
 560	seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n",
 561		   DRM_MODE_ARG(&crtc_state->hw.adjusted_mode));
 562	seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n",
 563		   DRM_MODE_ARG(&crtc_state->hw.pipe_mode));
 564
 565	seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n",
 566		   DRM_RECT_ARG(&crtc_state->pipe_src),
 567		   str_yes_no(crtc_state->dither), crtc_state->pipe_bpp);
 568	seq_printf(m, "\tport_clock=%d, lane_count=%d\n",
 569		   crtc_state->port_clock, crtc_state->lane_count);
 570
 571	intel_scaler_info(m, crtc);
 572
 573	if (crtc_state->joiner_pipes)
 574		seq_printf(m, "\tLinked to 0x%x pipes as a %s\n",
 575			   crtc_state->joiner_pipes,
 576			   intel_crtc_is_joiner_secondary(crtc_state) ? "slave" : "master");
 577
 578	intel_vdsc_state_dump(&p, 1, crtc_state);
 579
 580	for_each_intel_encoder_mask(display->drm, encoder,
 581				    crtc_state->uapi.encoder_mask)
 582		intel_encoder_info(m, crtc, encoder);
 583
 584	intel_plane_info(m, crtc);
 585
 586	seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n",
 587		   str_yes_no(!crtc->cpu_fifo_underrun_disabled),
 588		   str_yes_no(!crtc->pch_fifo_underrun_disabled));
 589
 590	crtc_updates_info(m, crtc, "\t");
 591}
 592
 593static int i915_display_info(struct seq_file *m, void *unused)
 594{
 595	struct intel_display *display = node_to_intel_display(m->private);
 596	struct intel_crtc *crtc;
 597	struct drm_connector *connector;
 598	struct drm_connector_list_iter conn_iter;
 599	struct ref_tracker *wakeref;
 600
 601	wakeref = intel_display_rpm_get(display);
 602
 603	drm_modeset_lock_all(display->drm);
 604
 605	seq_printf(m, "CRTC info\n");
 606	seq_printf(m, "---------\n");
 607	for_each_intel_crtc(display->drm, crtc)
 608		intel_crtc_info(m, crtc);
 609
 610	seq_printf(m, "\n");
 611	seq_printf(m, "Connector info\n");
 612	seq_printf(m, "--------------\n");
 613	drm_connector_list_iter_begin(display->drm, &conn_iter);
 614	drm_for_each_connector_iter(connector, &conn_iter)
 615		intel_connector_info(m, connector);
 616	drm_connector_list_iter_end(&conn_iter);
 617
 618	drm_modeset_unlock_all(display->drm);
 619
 620	intel_display_rpm_put(display, wakeref);
 621
 622	return 0;
 623}
 624
 625static int i915_shared_dplls_info(struct seq_file *m, void *unused)
 626{
 627	struct intel_display *display = node_to_intel_display(m->private);
 628	struct drm_printer p = drm_seq_file_printer(m);
 629	struct intel_dpll *pll;
 630	int i;
 631
 632	drm_modeset_lock_all(display->drm);
 633
 634	drm_printf(&p, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n",
 635		   display->dpll.ref_clks.nssc,
 636		   display->dpll.ref_clks.ssc);
 637
 638	for_each_dpll(display, pll, i) {
 639		drm_printf(&p, "DPLL%i: %s, id: %i\n", pll->index,
 640			   pll->info->name, pll->info->id);
 641		drm_printf(&p, " pipe_mask: 0x%x, active: 0x%x, on: %s\n",
 642			   pll->state.pipe_mask, pll->active_mask,
 643			   str_yes_no(pll->on));
 644		drm_printf(&p, " tracked hardware state:\n");
 645		intel_dpll_dump_hw_state(display, &p, &pll->state.hw_state);
 646	}
 647	drm_modeset_unlock_all(display->drm);
 648
 649	return 0;
 650}
 651
 652static int i915_ddb_info(struct seq_file *m, void *unused)
 653{
 654	struct intel_display *display = node_to_intel_display(m->private);
 655	struct skl_ddb_entry *entry;
 656	struct intel_crtc *crtc;
 657
 658	if (DISPLAY_VER(display) < 9)
 659		return -ENODEV;
 660
 661	drm_modeset_lock_all(display->drm);
 662
 663	seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size");
 664
 665	for_each_intel_crtc(display->drm, crtc) {
 666		struct intel_crtc_state *crtc_state =
 667			to_intel_crtc_state(crtc->base.state);
 668		enum pipe pipe = crtc->pipe;
 669		enum plane_id plane_id;
 670
 671		seq_printf(m, "Pipe %c\n", pipe_name(pipe));
 672
 673		for_each_plane_id_on_crtc(crtc, plane_id) {
 674			entry = &crtc_state->wm.skl.plane_ddb[plane_id];
 675			seq_printf(m, "  Plane%-8d%8u%8u%8u\n", plane_id + 1,
 676				   entry->start, entry->end,
 677				   skl_ddb_entry_size(entry));
 678		}
 679
 680		entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR];
 681		seq_printf(m, "  %-13s%8u%8u%8u\n", "Cursor", entry->start,
 682			   entry->end, skl_ddb_entry_size(entry));
 683	}
 684
 685	drm_modeset_unlock_all(display->drm);
 686
 687	return 0;
 688}
 689
 690static bool
 691intel_lpsp_power_well_enabled(struct intel_display *display,
 692			      enum i915_power_well_id power_well_id)
 693{
 694	bool is_enabled;
 695
 696	with_intel_display_rpm(display)
 697		is_enabled = intel_display_power_well_is_enabled(display,
 698								 power_well_id);
 699
 700	return is_enabled;
 701}
 702
 703static int i915_lpsp_status(struct seq_file *m, void *unused)
 704{
 705	struct intel_display *display = node_to_intel_display(m->private);
 706	bool lpsp_enabled = false;
 707
 708	if (DISPLAY_VER(display) >= 13 || IS_DISPLAY_VER(display, 9, 10)) {
 709		lpsp_enabled = !intel_lpsp_power_well_enabled(display, SKL_DISP_PW_2);
 710	} else if (IS_DISPLAY_VER(display, 11, 12)) {
 711		lpsp_enabled = !intel_lpsp_power_well_enabled(display, ICL_DISP_PW_3);
 712	} else if (display->platform.haswell || display->platform.broadwell) {
 713		lpsp_enabled = !intel_lpsp_power_well_enabled(display, HSW_DISP_PW_GLOBAL);
 714	} else {
 715		seq_puts(m, "LPSP: not supported\n");
 716		return 0;
 717	}
 718
 719	seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled));
 720
 721	return 0;
 722}
 723
 724static int i915_dp_mst_info(struct seq_file *m, void *unused)
 725{
 726	struct intel_display *display = node_to_intel_display(m->private);
 727	struct intel_encoder *intel_encoder;
 728	struct intel_digital_port *dig_port;
 729	struct drm_connector *connector;
 730	struct drm_connector_list_iter conn_iter;
 731
 732	drm_connector_list_iter_begin(display->drm, &conn_iter);
 733	drm_for_each_connector_iter(connector, &conn_iter) {
 734		if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
 735			continue;
 736
 737		intel_encoder = intel_attached_encoder(to_intel_connector(connector));
 738		if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST)
 739			continue;
 740
 741		dig_port = enc_to_dig_port(intel_encoder);
 742		if (!intel_dp_mst_source_support(&dig_port->dp))
 743			continue;
 744
 745		seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n",
 746			   dig_port->base.base.base.id,
 747			   dig_port->base.base.name);
 748		drm_dp_mst_dump_topology(m, &dig_port->dp.mst.mgr);
 749	}
 750	drm_connector_list_iter_end(&conn_iter);
 751
 752	return 0;
 753}
 754
 755static ssize_t
 756i915_fifo_underrun_reset_write(struct file *filp,
 757			       const char __user *ubuf,
 758			       size_t cnt, loff_t *ppos)
 759{
 760	struct intel_display *display = filp->private_data;
 761	struct intel_crtc *crtc;
 762	int ret;
 763	bool reset;
 764
 765	ret = kstrtobool_from_user(ubuf, cnt, &reset);
 766	if (ret)
 767		return ret;
 768
 769	if (!reset)
 770		return cnt;
 771
 772	for_each_intel_crtc(display->drm, crtc) {
 773		struct drm_crtc_commit *commit;
 774		struct intel_crtc_state *crtc_state;
 775
 776		ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
 777		if (ret)
 778			return ret;
 779
 780		crtc_state = to_intel_crtc_state(crtc->base.state);
 781		commit = crtc_state->uapi.commit;
 782		if (commit) {
 783			ret = wait_for_completion_interruptible(&commit->hw_done);
 784			if (!ret)
 785				ret = wait_for_completion_interruptible(&commit->flip_done);
 786		}
 787
 788		if (!ret && crtc_state->hw.active) {
 789			drm_dbg_kms(display->drm,
 790				    "Re-arming FIFO underruns on pipe %c\n",
 791				    pipe_name(crtc->pipe));
 792
 793			intel_crtc_arm_fifo_underrun(crtc, crtc_state);
 794		}
 795
 796		drm_modeset_unlock(&crtc->base.mutex);
 797
 798		if (ret)
 799			return ret;
 800	}
 801
 802	intel_fbc_reset_underrun(display);
 803
 804	return cnt;
 805}
 806
 807static const struct file_operations i915_fifo_underrun_reset_ops = {
 808	.owner = THIS_MODULE,
 809	.open = simple_open,
 810	.write = i915_fifo_underrun_reset_write,
 811	.llseek = default_llseek,
 812};
 813
 814static const struct drm_info_list intel_display_debugfs_list[] = {
 815	{"intel_display_caps", intel_display_caps, 0},
 816	{"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0},
 817	{"i915_sr_status", i915_sr_status, 0},
 818	{"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
 819	{"i915_power_domain_info", i915_power_domain_info, 0},
 820	{"i915_display_info", i915_display_info, 0},
 821	{"i915_shared_dplls_info", i915_shared_dplls_info, 0},
 822	{"i915_dp_mst_info", i915_dp_mst_info, 0},
 823	{"i915_ddb_info", i915_ddb_info, 0},
 824	{"i915_lpsp_status", i915_lpsp_status, 0},
 825};
 826
 827void intel_display_debugfs_register(struct intel_display *display)
 828{
 829	struct dentry *debugfs_root = display->drm->debugfs_root;
 830
 831	debugfs_create_file("i915_fifo_underrun_reset", 0644, debugfs_root,
 832			    display, &i915_fifo_underrun_reset_ops);
 833
 834	drm_debugfs_create_files(intel_display_debugfs_list,
 835				 ARRAY_SIZE(intel_display_debugfs_list),
 836				 debugfs_root, display->drm->primary);
 837
 838	intel_bios_debugfs_register(display);
 839	intel_cdclk_debugfs_register(display);
 840	intel_dmc_debugfs_register(display);
 841	intel_dp_test_debugfs_register(display);
 842	intel_fbc_debugfs_register(display);
 843	intel_hpd_debugfs_register(display);
 844	intel_opregion_debugfs_register(display);
 845	intel_psr_debugfs_register(display);
 846	intel_wm_debugfs_register(display);
 847	intel_display_debugfs_params(display);
 848}
 849
 850static int i915_lpsp_capability_show(struct seq_file *m, void *data)
 851{
 852	struct intel_connector *connector = m->private;
 853	struct intel_display *display = to_intel_display(connector);
 854	struct intel_encoder *encoder = intel_attached_encoder(connector);
 855	int connector_type = connector->base.connector_type;
 856	bool lpsp_capable = false;
 857
 858	if (!encoder)
 859		return -ENODEV;
 860
 861	if (connector->base.status != connector_status_connected)
 862		return -ENODEV;
 863
 864	if (DISPLAY_VER(display) >= 13)
 865		lpsp_capable = encoder->port <= PORT_B;
 866	else if (DISPLAY_VER(display) >= 12)
 867		/*
 868		 * Actually TGL can drive LPSP on port till DDI_C
 869		 * but there is no physical connected DDI_C on TGL sku's,
 870		 * even driver is not initializing DDI_C port for gen12.
 871		 */
 872		lpsp_capable = encoder->port <= PORT_B;
 873	else if (DISPLAY_VER(display) == 11)
 874		lpsp_capable = (connector_type == DRM_MODE_CONNECTOR_DSI ||
 875				connector_type == DRM_MODE_CONNECTOR_eDP);
 876	else if (IS_DISPLAY_VER(display, 9, 10))
 877		lpsp_capable = (encoder->port == PORT_A &&
 878				(connector_type == DRM_MODE_CONNECTOR_DSI ||
 879				 connector_type == DRM_MODE_CONNECTOR_eDP ||
 880				 connector_type == DRM_MODE_CONNECTOR_DisplayPort));
 881	else if (display->platform.haswell || display->platform.broadwell)
 882		lpsp_capable = connector_type == DRM_MODE_CONNECTOR_eDP;
 883
 884	seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable");
 885
 886	return 0;
 887}
 888DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability);
 889
 890static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
 891{
 892	struct intel_connector *connector = m->private;
 893	struct intel_display *display = to_intel_display(connector);
 894	struct drm_crtc *crtc;
 895	struct intel_dp *intel_dp;
 896	struct drm_modeset_acquire_ctx ctx;
 897	struct intel_crtc_state *crtc_state = NULL;
 898	int ret = 0;
 899	bool try_again = false;
 900
 901	drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
 902
 903	do {
 904		try_again = false;
 905		ret = drm_modeset_lock(&display->drm->mode_config.connection_mutex,
 906				       &ctx);
 907		if (ret) {
 908			if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) {
 909				try_again = true;
 910				continue;
 911			}
 912			break;
 913		}
 914		crtc = connector->base.state->crtc;
 915		if (connector->base.status != connector_status_connected || !crtc) {
 916			ret = -ENODEV;
 917			break;
 918		}
 919		ret = drm_modeset_lock(&crtc->mutex, &ctx);
 920		if (ret == -EDEADLK) {
 921			ret = drm_modeset_backoff(&ctx);
 922			if (!ret) {
 923				try_again = true;
 924				continue;
 925			}
 926			break;
 927		} else if (ret) {
 928			break;
 929		}
 930		intel_dp = intel_attached_dp(connector);
 931		crtc_state = to_intel_crtc_state(crtc->state);
 932		seq_printf(m, "DSC_Enabled: %s\n",
 933			   str_yes_no(crtc_state->dsc.compression_enable));
 934		seq_printf(m, "DSC_Sink_Support: %s\n",
 935			   str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd)));
 936		seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n",
 937			   str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
 938								      DP_DSC_RGB)),
 939			   str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
 940								      DP_DSC_YCbCr420_Native)),
 941			   str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
 942								      DP_DSC_YCbCr444)));
 943		seq_printf(m, "DSC_Sink_BPP_Precision: %d\n",
 944			   drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd));
 945		seq_printf(m, "DSC_Sink_Max_Slice_Count: %d\n",
 946			   drm_dp_dsc_sink_max_slice_count((connector->dp.dsc_dpcd), intel_dp_is_edp(intel_dp)));
 947		seq_printf(m, "Force_DSC_Enable: %s\n",
 948			   str_yes_no(intel_dp->force_dsc_en));
 949		if (!intel_dp_is_edp(intel_dp))
 950			seq_printf(m, "FEC_Sink_Support: %s\n",
 951				   str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability)));
 952	} while (try_again);
 953
 954	drm_modeset_drop_locks(&ctx);
 955	drm_modeset_acquire_fini(&ctx);
 956
 957	return ret;
 958}
 959
 960static ssize_t i915_dsc_fec_support_write(struct file *file,
 961					  const char __user *ubuf,
 962					  size_t len, loff_t *offp)
 963{
 964	struct seq_file *m = file->private_data;
 965	struct intel_connector *connector = m->private;
 966	struct intel_display *display = to_intel_display(connector);
 967	struct intel_encoder *encoder = intel_attached_encoder(connector);
 968	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 969	bool dsc_enable = false;
 970	int ret;
 971
 972	if (len == 0)
 973		return 0;
 974
 975	drm_dbg(display->drm,
 976		"Copied %zu bytes from user to force DSC\n", len);
 977
 978	ret = kstrtobool_from_user(ubuf, len, &dsc_enable);
 979	if (ret < 0)
 980		return ret;
 981
 982	drm_dbg(display->drm, "Got %s for DSC Enable\n",
 983		str_true_false(dsc_enable));
 984	intel_dp->force_dsc_en = dsc_enable;
 985
 986	*offp += len;
 987	return len;
 988}
 989
 990static int i915_dsc_fec_support_open(struct inode *inode,
 991				     struct file *file)
 992{
 993	return single_open(file, i915_dsc_fec_support_show,
 994			   inode->i_private);
 995}
 996
 997static const struct file_operations i915_dsc_fec_support_fops = {
 998	.owner = THIS_MODULE,
 999	.open = i915_dsc_fec_support_open,
1000	.read = seq_read,
1001	.llseek = seq_lseek,
1002	.release = single_release,
1003	.write = i915_dsc_fec_support_write
1004};
1005
1006static int i915_dsc_bpc_show(struct seq_file *m, void *data)
1007{
1008	struct intel_connector *connector = m->private;
1009	struct intel_display *display = to_intel_display(connector);
1010	struct intel_encoder *encoder = intel_attached_encoder(connector);
1011	struct drm_crtc *crtc;
1012	struct intel_crtc_state *crtc_state;
1013	int ret;
1014
1015	if (!encoder)
1016		return -ENODEV;
1017
1018	ret = drm_modeset_lock_single_interruptible(&display->drm->mode_config.connection_mutex);
1019	if (ret)
1020		return ret;
1021
1022	crtc = connector->base.state->crtc;
1023	if (connector->base.status != connector_status_connected || !crtc) {
1024		ret = -ENODEV;
1025		goto out;
1026	}
1027
1028	crtc_state = to_intel_crtc_state(crtc->state);
1029	seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component);
1030
1031out:	drm_modeset_unlock(&display->drm->mode_config.connection_mutex);
1032
1033	return ret;
1034}
1035
1036static ssize_t i915_dsc_bpc_write(struct file *file,
1037				  const char __user *ubuf,
1038				  size_t len, loff_t *offp)
1039{
1040	struct seq_file *m = file->private_data;
1041	struct intel_connector *connector = m->private;
1042	struct intel_encoder *encoder = intel_attached_encoder(connector);
1043	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1044	int dsc_bpc = 0;
1045	int ret;
1046
1047	ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc);
1048	if (ret < 0)
1049		return ret;
1050
1051	intel_dp->force_dsc_bpc = dsc_bpc;
1052	*offp += len;
1053
1054	return len;
1055}
1056
1057static int i915_dsc_bpc_open(struct inode *inode,
1058			     struct file *file)
1059{
1060	return single_open(file, i915_dsc_bpc_show, inode->i_private);
1061}
1062
1063static const struct file_operations i915_dsc_bpc_fops = {
1064	.owner = THIS_MODULE,
1065	.open = i915_dsc_bpc_open,
1066	.read = seq_read,
1067	.llseek = seq_lseek,
1068	.release = single_release,
1069	.write = i915_dsc_bpc_write
1070};
1071
1072static int i915_dsc_output_format_show(struct seq_file *m, void *data)
1073{
1074	struct intel_connector *connector = m->private;
1075	struct intel_display *display = to_intel_display(connector);
1076	struct intel_encoder *encoder = intel_attached_encoder(connector);
1077	struct drm_crtc *crtc;
1078	struct intel_crtc_state *crtc_state;
1079	int ret;
1080
1081	if (!encoder)
1082		return -ENODEV;
1083
1084	ret = drm_modeset_lock_single_interruptible(&display->drm->mode_config.connection_mutex);
1085	if (ret)
1086		return ret;
1087
1088	crtc = connector->base.state->crtc;
1089	if (connector->base.status != connector_status_connected || !crtc) {
1090		ret = -ENODEV;
1091		goto out;
1092	}
1093
1094	crtc_state = to_intel_crtc_state(crtc->state);
1095	seq_printf(m, "DSC_Output_Format: %s\n",
1096		   intel_output_format_name(crtc_state->output_format));
1097
1098out:	drm_modeset_unlock(&display->drm->mode_config.connection_mutex);
1099
1100	return ret;
1101}
1102
1103static ssize_t i915_dsc_output_format_write(struct file *file,
1104					    const char __user *ubuf,
1105					    size_t len, loff_t *offp)
1106{
1107	struct seq_file *m = file->private_data;
1108	struct intel_connector *connector = m->private;
1109	struct intel_encoder *encoder = intel_attached_encoder(connector);
1110	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1111	int dsc_output_format = 0;
1112	int ret;
1113
1114	ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format);
1115	if (ret < 0)
1116		return ret;
1117
1118	intel_dp->force_dsc_output_format = dsc_output_format;
1119	*offp += len;
1120
1121	return len;
1122}
1123
1124static int i915_dsc_output_format_open(struct inode *inode,
1125				       struct file *file)
1126{
1127	return single_open(file, i915_dsc_output_format_show, inode->i_private);
1128}
1129
1130static const struct file_operations i915_dsc_output_format_fops = {
1131	.owner = THIS_MODULE,
1132	.open = i915_dsc_output_format_open,
1133	.read = seq_read,
1134	.llseek = seq_lseek,
1135	.release = single_release,
1136	.write = i915_dsc_output_format_write
1137};
1138
1139static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data)
1140{
1141	struct intel_connector *connector = m->private;
1142	struct intel_display *display = to_intel_display(connector);
1143	struct intel_encoder *encoder = intel_attached_encoder(connector);
1144	struct drm_crtc *crtc;
1145	struct intel_dp *intel_dp;
1146	int ret;
1147
1148	if (!encoder)
1149		return -ENODEV;
1150
1151	ret = drm_modeset_lock_single_interruptible(&display->drm->mode_config.connection_mutex);
1152	if (ret)
1153		return ret;
1154
1155	crtc = connector->base.state->crtc;
1156	if (connector->base.status != connector_status_connected || !crtc) {
1157		ret = -ENODEV;
1158		goto out;
1159	}
1160
1161	intel_dp = intel_attached_dp(connector);
1162	seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n",
1163		   str_yes_no(intel_dp->force_dsc_fractional_bpp_en));
1164
1165out:
1166	drm_modeset_unlock(&display->drm->mode_config.connection_mutex);
1167
1168	return ret;
1169}
1170
1171static ssize_t i915_dsc_fractional_bpp_write(struct file *file,
1172					     const char __user *ubuf,
1173					     size_t len, loff_t *offp)
1174{
1175	struct seq_file *m = file->private_data;
1176	struct intel_connector *connector = m->private;
1177	struct intel_display *display = to_intel_display(connector);
1178	struct intel_encoder *encoder = intel_attached_encoder(connector);
1179	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1180	bool dsc_fractional_bpp_enable = false;
1181	int ret;
1182
1183	if (len == 0)
1184		return 0;
1185
1186	drm_dbg(display->drm,
1187		"Copied %zu bytes from user to force fractional bpp for DSC\n", len);
1188
1189	ret = kstrtobool_from_user(ubuf, len, &dsc_fractional_bpp_enable);
1190	if (ret < 0)
1191		return ret;
1192
1193	drm_dbg(display->drm, "Got %s for DSC Fractional BPP Enable\n",
1194		str_true_false(dsc_fractional_bpp_enable));
1195	intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable;
1196
1197	*offp += len;
1198
1199	return len;
1200}
1201
1202static int i915_dsc_fractional_bpp_open(struct inode *inode,
1203					struct file *file)
1204{
1205	return single_open(file, i915_dsc_fractional_bpp_show, inode->i_private);
1206}
1207
1208static const struct file_operations i915_dsc_fractional_bpp_fops = {
1209	.owner = THIS_MODULE,
1210	.open = i915_dsc_fractional_bpp_open,
1211	.read = seq_read,
1212	.llseek = seq_lseek,
1213	.release = single_release,
1214	.write = i915_dsc_fractional_bpp_write
1215};
1216
1217/*
1218 * Returns the Current CRTC's bpc.
1219 * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc
1220 */
1221static int i915_current_bpc_show(struct seq_file *m, void *data)
1222{
1223	struct intel_crtc *crtc = m->private;
1224	struct intel_crtc_state *crtc_state;
1225	int ret;
1226
1227	ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
1228	if (ret)
1229		return ret;
1230
1231	crtc_state = to_intel_crtc_state(crtc->base.state);
1232	seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3);
1233
1234	drm_modeset_unlock(&crtc->base.mutex);
1235
1236	return ret;
1237}
1238DEFINE_SHOW_ATTRIBUTE(i915_current_bpc);
1239
1240/* Pipe may differ from crtc index if pipes are fused off */
1241static int intel_crtc_pipe_show(struct seq_file *m, void *unused)
1242{
1243	struct intel_crtc *crtc = m->private;
1244
1245	seq_printf(m, "%c\n", pipe_name(crtc->pipe));
1246
1247	return 0;
1248}
1249DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe);
1250
1251static int i915_joiner_show(struct seq_file *m, void *data)
1252{
1253	struct intel_connector *connector = m->private;
1254
1255	seq_printf(m, "%d\n", connector->force_joined_pipes);
1256
1257	return 0;
1258}
1259
1260static ssize_t i915_joiner_write(struct file *file,
1261				 const char __user *ubuf,
1262				 size_t len, loff_t *offp)
1263{
1264	struct seq_file *m = file->private_data;
1265	struct intel_connector *connector = m->private;
1266	struct intel_display *display = to_intel_display(connector);
1267	int force_joined_pipes = 0;
1268	int ret;
1269
1270	if (len == 0)
1271		return 0;
1272
1273	ret = kstrtoint_from_user(ubuf, len, 0, &force_joined_pipes);
1274	if (ret < 0)
1275		return ret;
1276
1277	switch (force_joined_pipes) {
1278	case 0:
1279	case 1:
1280	case 2:
1281		connector->force_joined_pipes = force_joined_pipes;
1282		break;
1283	case 4:
1284		if (HAS_ULTRAJOINER(display)) {
1285			connector->force_joined_pipes = force_joined_pipes;
1286			break;
1287		}
1288
1289		fallthrough;
1290	default:
1291		return -EINVAL;
1292	}
1293
1294	*offp += len;
1295
1296	return len;
1297}
1298
1299static int i915_joiner_open(struct inode *inode, struct file *file)
1300{
1301	return single_open(file, i915_joiner_show, inode->i_private);
1302}
1303
1304static const struct file_operations i915_joiner_fops = {
1305	.owner = THIS_MODULE,
1306	.open = i915_joiner_open,
1307	.read = seq_read,
1308	.llseek = seq_lseek,
1309	.release = single_release,
1310	.write = i915_joiner_write
1311};
1312
1313/**
1314 * intel_connector_debugfs_add - add i915 specific connector debugfs files
1315 * @connector: pointer to a registered intel_connector
1316 *
1317 * Cleanup will be done by drm_connector_unregister() through a call to
1318 * drm_debugfs_connector_remove().
1319 */
1320void intel_connector_debugfs_add(struct intel_connector *connector)
1321{
1322	struct intel_display *display = to_intel_display(connector);
1323	struct dentry *root = connector->base.debugfs_entry;
1324	int connector_type = connector->base.connector_type;
1325
1326	/* The connector must have been registered beforehands. */
1327	if (!root)
1328		return;
1329
1330	intel_drrs_connector_debugfs_add(connector);
1331	intel_hdcp_connector_debugfs_add(connector);
1332	intel_pps_connector_debugfs_add(connector);
1333	intel_psr_connector_debugfs_add(connector);
1334	intel_alpm_lobf_debugfs_add(connector);
1335	intel_dp_link_training_debugfs_add(connector);
1336	intel_link_bw_connector_debugfs_add(connector);
1337
1338	if (DISPLAY_VER(display) >= 11 &&
1339	    ((connector_type == DRM_MODE_CONNECTOR_DisplayPort && !connector->mst.dp) ||
1340	     connector_type == DRM_MODE_CONNECTOR_eDP)) {
1341		debugfs_create_file("i915_dsc_fec_support", 0644, root,
1342				    connector, &i915_dsc_fec_support_fops);
1343
1344		debugfs_create_file("i915_dsc_bpc", 0644, root,
1345				    connector, &i915_dsc_bpc_fops);
1346
1347		debugfs_create_file("i915_dsc_output_format", 0644, root,
1348				    connector, &i915_dsc_output_format_fops);
1349
1350		debugfs_create_file("i915_dsc_fractional_bpp", 0644, root,
1351				    connector, &i915_dsc_fractional_bpp_fops);
1352	}
1353
1354	if ((connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1355	     connector_type == DRM_MODE_CONNECTOR_eDP) &&
1356	    intel_dp_has_joiner(intel_attached_dp(connector))) {
1357		debugfs_create_file("i915_joiner_force_enable", 0644, root,
1358				    connector, &i915_joiner_fops);
1359	}
1360
1361	if (connector_type == DRM_MODE_CONNECTOR_DSI ||
1362	    connector_type == DRM_MODE_CONNECTOR_eDP ||
1363	    connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1364	    connector_type == DRM_MODE_CONNECTOR_HDMIA ||
1365	    connector_type == DRM_MODE_CONNECTOR_HDMIB)
1366		debugfs_create_file("i915_lpsp_capability", 0444, root,
1367				    connector, &i915_lpsp_capability_fops);
1368}
1369
1370/**
1371 * intel_crtc_debugfs_add - add i915 specific crtc debugfs files
1372 * @crtc: pointer to a drm_crtc
1373 *
1374 * Failure to add debugfs entries should generally be ignored.
1375 */
1376void intel_crtc_debugfs_add(struct intel_crtc *crtc)
1377{
1378	struct dentry *root = crtc->base.debugfs_entry;
1379
1380	if (!root)
1381		return;
1382
1383	crtc_updates_add(crtc);
1384	intel_drrs_crtc_debugfs_add(crtc);
1385	intel_fbc_crtc_debugfs_add(crtc);
1386	hsw_ips_crtc_debugfs_add(crtc);
1387
1388	debugfs_create_file("i915_current_bpc", 0444, root, crtc,
1389			    &i915_current_bpc_fops);
1390	debugfs_create_file("i915_pipe", 0444, root, crtc,
1391			    &intel_crtc_pipe_fops);
1392}